Tear prevention structure for multilayer substrates
The multilayer FPC substrate with conductor patterns on multiple layers and through holes addresses base breakage and crack propagation issues, providing enhanced crack resistance and substrate integrity.
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- ALPS ALPINE CO LTD
- Filing Date
- 2024-12-23
- Publication Date
- 2026-07-03
AI Technical Summary
Conventional FPC substrates with slits for flexibility suffer from base breakage, weak reinforcement by single-layer conductor patterns, and increased crack propensity in movable parts, leading to easy substrate breakage.
A tear-prevention structure for multilayer substrates with conductor patterns formed on multiple wiring layers, including through holes and alignment marks, to enhance crack resistance.
The multilayer structure increases crack prevention strength, resists tearing at the slit base, and prevents crack propagation, enhancing substrate integrity under stress.
Smart Images
Figure 2026111253000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a multilayer substrate in which a plurality of wiring layers are laminated via an insulating layer, and particularly to a crack prevention structure formed by slots and mounting holes formed in the multilayer substrate.
Background Art
[0002] Micro LEDs that can directly display images from light-emitting diodes have been developed, and it is being considered to implement them on a film type that can be bent. As a film type substrate, a typical flexible printed circuit board (hereinafter referred to as an FPC board) is formed with slits and holes for easy bending and substrate mounting. For example, Patent Document 1 discloses an FPC board in which a reinforcing conductor pattern is formed in a slot portion to prevent the wiring pattern from being damaged even when cracks occur.
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] For film substrates, insulating layers such as PI (polyimide), PET (polyethylene terephthalate), or PC (polycarbonate) with a thickness of 100 um or less are mainly used, and FPC boards are manufactured by laminating conductor layers on such insulating layers.
[0005] Figure 1 shows an example of a conventional FPC substrate. As described above, the FPC substrate 10 has slits 12 formed to facilitate bending, and the planar shape of the slit portion is circular or rounded rather than rectangular, and furthermore, as disclosed in Patent Document 1, a reinforcing circular conductive pattern 20 is formed close to the base of the slit 12. Although this method is common as a structure to prevent tearing of the slit portion, it has the following problems.
[0006] 1. The slit portion can easily break off at its base due to pulling or snagging. 2. As disclosed in Patent Document 1, even if a reinforcing conductor pattern 20 in the shape of an arc or U is provided to make it difficult to cut at the slit portion, the effect is weak with a single layer of conductor pattern 20. 3. If the conductor pattern 20 for slits or crack reinforcement is a movable part, cracks are more likely to occur in the conductor pattern 20 than in the film material due to bending. 4. If a crack progresses from the slit and reaches the reinforcing conductor pattern 20, the FPC substrate will easily break.
[0007] The present invention aims to solve these conventional problems and provide a tear-prevention structure for multilayer substrates with higher strength than conventional structures. [Means for solving the problem]
[0008] The tear-preventing structure according to the present invention is for a multilayer substrate in which a plurality of wiring layers are laminated with an insulating layer in between, and the tear-preventing structure includes a conductor pattern for tear prevention formed in close proximity to a slit or hole formed in the multilayer substrate, and the conductor pattern is formed on at least two wiring layers of the multilayer substrate. [Effects of the Invention]
[0009] According to the present invention, since a conductor pattern for preventing cracking is formed on at least two wiring layers, the strength of the crack-preventing structure can be increased compared to conventional methods. [Brief explanation of the drawing]
[0010] [Figure 1] This is a schematic plan view illustrating the slit portion and reinforcing conductor pattern formed on a conventional FPC substrate. [Figure 2] Figure 2(A) is a schematic top view of an FPC substrate according to the first embodiment of the present invention, and Figure 2(B) is a schematic cross-sectional view thereof. [Figure 3] Figure 3 shows a conventional FPC substrate as a comparative example; Figure 3(A) is a schematic top view of the FPC substrate, and Figure 3(B) is a schematic cross-sectional view of the same substrate along line AA. [Figure 4] Figure 4(A) is a schematic top view of an FPC substrate according to a second embodiment of the present invention, and Figure 4(B) is a schematic cross-sectional view thereof. [Figure 5] Figure 5(A) is a schematic top view of an FPC substrate according to a third embodiment of the present invention, and Figure 5(B) is a schematic cross-sectional view thereof. [Figure 6] Figure 6(A) is a schematic top view of an FPC substrate according to a fourth embodiment of the present invention, and Figure 6(B) is a schematic cross-sectional view thereof. [Figure 7] Figure 7(A) is a schematic top view of an FPC substrate according to a fifth embodiment of the present invention, and Figure 7(B) is a schematic cross-sectional view thereof. [Figure 8] Figure 8(A) is a schematic top view of an FPC substrate according to the sixth embodiment of the present invention, and Figure 8(B) is a schematic cross-sectional view thereof. [Figure 9] Figures 9(A) and (B) are schematic top views of an FPC substrate according to the seventh embodiment of the present invention, and Figure 9(C) is a schematic cross-sectional view thereof. [Modes for carrying out the invention]
[0011] The present invention relates to a multilayer substrate in which multiple wiring layers are laminated with an insulating layer in between, and more particularly to a tear-prevention structure formed by slits and mounting holes in a flexible multilayer substrate. For example, light-emitting elements such as micro-LEDs, circuit elements, and semiconductor packages are mounted on the multilayer substrate. It should be noted that the drawings referenced in the following description include exaggerations to facilitate understanding of the invention and do not directly represent the shape or scale of the actual product. [Examples]
[0012] Figure 2(A) is a schematic top view of an FPC substrate according to a first embodiment of the present invention, and Figure 2(B) is a schematic cross-sectional view thereof along line AA. As shown in Figure 2(A), a slit 110 is formed in a certain location on the FPC substrate 100. The slit 110 has, for example, an elongated shape, which gives flexibility to the FPC substrate 100, and the FPC substrate 100 is bent through the slit 110. The position, number, shape, size, etc., of the slit 110 formed on the FPC substrate 100 are arbitrary and not particularly limited.
[0013] The planar shape of the base 112 of the slit 110 is circular or has a rounded (R) shape. Two conductor patterns 120A and 120B for crack prevention are formed in close proximity to the base 112 of the slit 110. Conductor pattern 120A is closer to the base 112, and conductor pattern 120B is further away. Conductor pattern 120B is formed at a certain distance from conductor pattern 120A. Conductor pattern 120A does not necessarily have to be the same shape as conductor pattern 120B, but here both have an arched or curved shape that follows the circular or rounded (R) shape of the base 112 of the slit 110.
[0014] As shown in FIG. 2(B), the FPC substrate 100 has a multilayer structure in which a plurality of wiring layers are laminated via insulating layers. The example in the figure represents a multilayer structure including four wiring layers W1, W2, W3, W4 and five insulating layers 130, 132 formed above and below these layers. The cross-sectional view of FIG. 2(B) shows the wiring layers in the gaps between the insulating layers for ease of explanation, but it should be noted that in reality, each layer of the insulating layers is in close contact via an adhesive.
[0015] In this embodiment, the two conductor patterns 120A and 120B for preventing tearing are formed at the same position (constant distance from the base of the slit) in each layer of the wiring layers W1, W2, W3, W4 of the multilayer structure. The two conductor patterns 120A and 120B are formed simultaneously, for example, when forming the wiring patterns on the wiring layers W1, W2, W3, W4.
[0016] The manufacturing method of the FPC substrate is not particularly limited. For example, a base film layer 130 with wiring layers W2 and W3 formed above and below is prepared. The base film 130 is, for example, a flexible film such as polyimide or a transparent film with light transmissibility. Also, on the upper and lower surfaces of the base film 130, conductor films such as copper foil are formed over the entire surface as the wiring layers W2 and W3. Such conductor films are patterned using, for example, an etching process of the subtractive method to form wiring patterns on the wiring layers W2 and W3. When forming the wiring patterns, the conductor film is patterned simultaneously so that the conductor patterns 120A and 120B for preventing tearing remain.
[0017] Next, a coverlay (insulating layer) 132 with the wiring layer W1 formed above and below the base film layer 130 and a coverlay (insulating layer) 134 with the wiring layer W4 formed are adhered via an adhesive. When forming the wiring patterns on the wiring layers W1 and W4, the conductor patterns 120A and 120B for preventing tearing are formed simultaneously. Next, a coverlay (insulating layer) 136 is adhered via an adhesive to cover the wiring layer W1, and a coverlay (insulating layer) 138 is adhered via an adhesive to cover the wiring layer W4.
[0018] Figure 3(A) is a schematic top view of a conventional FPC substrate, and Figure 3(B) is a schematic cross-sectional view of the same line AA, with the same reference numerals used for components identical to those in the first embodiment. In the conventional FPC substrate 10, a conductor pattern 120A for crack prevention is formed on one wiring layer W1. In contrast, in this embodiment, conductor patterns 120A and 120B for crack prevention are formed on all layers of wiring layers W1 to W4, thereby increasing the crack prevention strength compared to the conventional crack prevention structure.
[0019] Next, a second embodiment of the present invention will be described. Figure 4(A) is a schematic top view of an FPC substrate according to the second embodiment, and Figure 4(B) is a schematic cross-sectional view thereof. The same reference numerals are used for components identical to those in the first embodiment. In the second embodiment, unlike the first embodiment, a single conductor pattern 120A for preventing tearing is formed at the same location in each of the wiring layers W1, W2, W3, and W4 of the FPC substrate 100A.
[0020] According to the second embodiment, when the circuit patterns are densely packed and there is limited space to form a conductor pattern for preventing tearing, a structure that is resistant to tearing from both the front and back surfaces of the substrate can be provided by providing the conductor pattern 120A at the same location on all wiring layers.
[0021] Next, a third embodiment of the present invention will be described. Figure 5(A) is a schematic top view of an FPC substrate according to the third embodiment, and Figure 5(B) is a schematic cross-sectional view thereof. The same reference numerals are used for components identical to those in the first embodiment. In the third embodiment, unlike the first and second embodiments, a single tear-preventing conductor pattern 120A, 120B, 120C, 120D is formed on each of the wiring layers W1, W2, W3, and W4 of the FPC substrate 100B at a position that gradually moves away from the base 112 of the slit 110. The conductor patterns 120A, 120B, 120C, and 120D may all be the same shape, or they may become smaller as they move away from the base 112 of the slit 110.
[0022] According to the third embodiment, by changing the position of the conductor patterns 120A, 120B, 120C, and 120D for preventing tearing for each wiring layer, it is possible to provide a structure that prevents the FPC substrate 100B from suddenly tearing away from the slit portion when stress is applied to the FPC substrate 100B.
[0023] Next, a fourth embodiment of the present invention will be described. Figure 6(A) is a schematic top view of an FPC substrate according to the fourth embodiment, and Figure 6(B) is a schematic cross-sectional view thereof. In the FPC substrate 100C of the fourth embodiment, through holes 140 are formed between the conductor pattern 120A and the conductor pattern 120B. The through holes 140 are formed at the same locations in the base film 130 and the coverlays 132, 134, 136, and 138. The planar shape of the through holes 140 is not particularly limited, but preferably it has an arc shape that follows the planar shape of the conductor patterns 120A and 120B.
[0024] According to the fourth embodiment, by forming through holes 140 in all of the insulating layer between the two conductor patterns 120A and 120B, even if part (A) of the slit 110 tears, the through holes 140 can suppress the progression of the tear, and the tear-preventing structure of part (B) can be maintained.
[0025] Next, a fifth embodiment of the present invention will be described. Figure 7(A) is a schematic top view of an FPC substrate according to the fifth embodiment, and Figure 7(B) is a schematic cross-sectional view thereof. Components identical to those of the fourth embodiment are given the same reference numerals. In the fifth embodiment, through holes 140 are formed in the base film 130 and coverlays 136 and 138, but the fifth embodiment differs from the fourth embodiment in that through holes 140 are not formed in the coverlays 132 and 134.
[0026] According to the fifth embodiment, it is possible to provide a structure that prevents tearing from the outermost layers on both the front and back surfaces of the FPC substrate 100D while giving the substrate rigidity (elasticity). The position and layer in which the through-holes 140 are provided can be arbitrarily set according to the thickness of the base film and coverlay, the number of layers of insulating layer, etc. For example, through-holes may not be formed in the base film, but may be formed in the coverlays 136 and 138, or through-holes may be formed only in the base film.
[0027] Next, a sixth embodiment of the present invention will be described. Figure 8(A) is a schematic top view of an FPC substrate according to the sixth embodiment, and Figure 8(B) is a schematic cross-sectional view thereof. In the sixth embodiment, the conductor pattern for preventing tearing is also used as an alignment mark when bonding the insulating layer (coverlay). In the case of a multilayer substrate, alignment marks for bonding the insulating layer are usually provided in the work area outside the substrate, but in this embodiment, the conductor pattern for preventing tearing is also used as an alignment mark, and a structure is provided in which the alignment mark is provided inside the substrate.
[0028] The wiring layer W1 is formed on the coverlay 132, and the wiring layer W4 is formed on the coverlay 134, and these are laminated onto the base film 130. For example, the conductor pattern 120A formed on the wiring layer W2 on the base film 130 is used as an alignment mark for laminating the pattern 120A formed on the coverlay 134. Similarly, the conductor pattern 120C formed on the wiring layer W2 on the base film 130 is used as an alignment mark for laminating the pattern 120C formed on the coverlay 132.
[0029] Thus, according to this embodiment, by using the conductor pattern to also serve as alignment marks, the process of forming alignment marks in a work area outside the substrate can be eliminated, thereby preventing tearing of the FPC substrate and simplifying the manufacturing process of the FPC substrate.
[0030] Next, a seventh embodiment of the present invention will be described. Figures 9(A) and (B) are schematic top views of an FPC substrate according to the seventh embodiment, and Figure 9(C) is a schematic cross-sectional view thereof. In the first to sixth embodiments, a tear prevention structure for the slit portion was illustrated, but in the seventh embodiment, a tear prevention structure for mounting round holes and elliptical holes formed in the FPC substrate is illustrated.
[0031] As shown in Figure 9(A), the FPC substrate 100F has round holes 200 formed in it for attaching the substrate to a housing or the like. For example, the FPC substrate 100F is fixed to the housing or enclosure by screws inserted into the round holes 200.
[0032] In the FPC substrate 100F of this embodiment, two concentric circular conductor patterns 210A and 210B are formed on the outer periphery of the circular hole 200. The two conductor patterns 210A and 210B are formed on all layers of the wiring layers W1, W2, W3, and W4, for example, as in the first embodiment.
[0033] Furthermore, in the example shown in Figure 9(B), the inner conductor pattern 210A is not a continuous pattern but consists of four spaced-apart arc-shaped patterns, and similarly, the outer conductor pattern 210B is not a continuous pattern but consists of four spaced-apart arc-shaped patterns. The spaced-apart portions of the inner conductor pattern 210A and the spaced-apart portions of the outer conductor pattern 210B do not coincide in the radial direction, that is, the spaced-apart portions of conductor pattern 210A are covered by the pattern of conductor pattern 210B. As a result, the entire surface of the hole 200 is substantially covered by conductor patterns 210A and 210B, making it difficult for the crack to propagate.
[0034] The conductor patterns 210A and 210B are not limited to those described above. For example, as in the second embodiment, either one of the conductor patterns 210A or 210B may be formed at the same location on the wiring layers W1, W2, W3, and W4. Alternatively, as in the third embodiment, the position of the conductor patterns 210A / 210B may be changed for each layer of the wiring layers W1, W2, W3, and W4. Furthermore, the widths of the conductor patterns 210A and 210B do not necessarily have to be the same; one may be larger than the other. Although elliptical holes are not illustrated here, similar to the round holes 200, for example, elliptical conductor patterns that mimic the shape of elliptical holes may be formed on all layers of the wiring layers.
[0035] In the above embodiments, an FPC substrate in which wiring layers W1 to W4 are laminated with an insulating layer in between was illustrated, but the number of laminated wiring layers is arbitrary and may be five or more layers, or three or fewer layers. Furthermore, the shape of the conductor pattern for preventing tearing can be appropriately determined according to the shape of the slits and holes formed in the multilayer substrate.
[0036] As explained above, this embodiment provides the following effects. 1. The base of the slit can be prevented from easily breaking due to pulling or snagging. 2. By providing multiple layers of arched or U-shaped tear-prevention patterns, the material can be made more resistant to tearing. 3. Slits and tear-prevention patterns are located in the movable parts, preventing the pattern from continuing to tear even if cracks occur due to bending. 4. Even if a crack progresses from the outer surface and reaches the pattern, it can be prevented from easily continuing to tear or severing.
[0037] Although preferred embodiments of the present invention have been described in detail above, the present invention is not limited to any particular embodiment, and various modifications and changes are possible within the scope of the gist of the invention as described in the claims. [Explanation of Symbols]
[0038] 100~100F: FPC board 110: Slit 112: Base 120A, 120B, 120C, 120D: Conductor pattern 130, 132, 134, 136, 138: Insulating layer 140: Through hole 200: Round hole 210A, 210B: Conductor pattern
Claims
1. A tear-prevention structure for a multilayer substrate in which multiple wiring layers are stacked with an insulating layer in between, The tear-preventing structure includes a tear-preventing conductive pattern formed adjacent to a slit or hole formed in the multilayer substrate. The conductor pattern is a tear-preventing structure formed on at least two wiring layers of the multilayer substrate.
2. The tear-preventing structure according to claim 1, wherein the conductor pattern is formed on each of all wiring layers.
3. The tear-preventing structure according to claim 1, wherein the conductor pattern is formed at different positions in each of the multiple wiring layers.
4. The tear-preventing structure according to claim 1, wherein multiple conductor patterns are formed spaced apart on the same wiring layer.
5. The tear-preventing structure according to claim 4, wherein through holes are formed in the insulating layer between the spaced-apart conductor patterns.
6. The tear-preventing structure according to claim 4, wherein through holes are formed in all or part of the plurality of insulating layers between the spaced-apart conductor patterns.
7. The tear-preventing structure according to claim 1, wherein the conductor pattern also serves as an alignment mark for bonding the insulating layers.