Out-of-band-based independent link training of in-band link between host device and optical module

Abstract

A first optical module includes an optical transceiver and a chip. After completion of link training of an in-band transmission link between the first optical module and the host device, the optical transceiver waits for occurrence of the second optical module, including sending a first wake-up signal from the first optical module to the second optical module and receiving a second wake-up signal from the second optical module when the second optical module is activated. The chip i) performs link training of an in-band transmission link independently of an in-band reception link between the first optical module and the host device based on a first out-of-band signal transmitted via the out-of-band link, and ii) performs link training of the in-band transmission link based on a second wake-up signal and a second out-of-band signal transmitted via the out-of-band link. Link training of the in-band receive link is performed independently of the in-band transmit link.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to U.S. Patent Application No. 18 / 239,819, filed on August 30, 2023, which claims the benefit of U.S. Provisional Application No. 63 / 403,006, filed on September 1, 2022. This application is related to U.S. Application No. 18 / 217,252, filed on June 30, 2023, and U.S. Application No. 17 / 186,897, filed on February 26, 2021. The entire disclosures of the above-referenced applications are incorporated herein by reference. Technical Field

[0003] The present disclosure relates to optical modules, and more particularly to electrical and optical interfaces and corresponding communications between a host device and an optical module on a host printed circuit board (PCB). Background Art

[0004] The background description provided herein is for the purpose of generally presenting the context of the present disclosure. To the extent that the work of the presently named inventors described in this background section and the various aspects of the description that may not otherwise qualify as prior art at the time of filing are not explicitly or implicitly admitted as prior art against the present disclosure.

[0005] A host PCB, such as a packet optical transport platform (P-OTP), may include a host device and an optical module. As an example, the host PCB may include one or more host devices and corresponding optical modules. Each of the optical modules of a first host device communicates with an optical module of one or more remote host devices of one or more other host PCBs. The communication between the optical modules is performed over corresponding optical links (or optical channels) via an optical medium such as a fiber optic cable. The host device(s) and optical module(s) of a single host PCB are referred to as local devices that communicate with each other using a short-range electrical interface. Summary of the invention

[0006] A first optical module is disclosed, and includes an optical transceiver and a digital signal processing chip. The optical transceiver is configured to i) wait for the second optical module to appear after the link training of the in-band transmission link between the first optical module and the host device is completed, including: sending a first wake-up signal from the first optical module to the second optical module, the second optical module is started when powered on, and is in a state of sending a second wake-up signal to the first optical module, and ii) when the second optical module is started, receiving a second wake-up signal from the second optical module. The digital signal processing chip is configured to i) perform link training of the in-band transmission link independently of the in-band reception link between the first optical module and the host device based on the first out-of-band signal sent via the out-of-band link between the first optical module and the host device, and ii) perform link training of the in-band reception link between the first optical module and the host device independently of the in-band transmission link based on the second wake-up signal and the second out-of-band signal sent via the out-of-band link, the first out-of-band signal and the second out-of-band signal being control signals for testing the in-band transmission link and the in-band reception link.

[0007] In other features, the optical transceiver is configured to continue sending the idle signal to the second optical module after completing link training of the in-band transmission link until a second wake-up signal is received.

[0008] In other features, the digital signal processing chip is configured to i) receive the LT signal from the host device during link training of the in-band transmission link, and ii) synchronize the clock of the first optical module with the clock signal embedded in the LT signal based on the clock signal embedded in the LT signal.

[0009] In other features, the first optical module also includes a processor configured to send a first out-of-band signal to a host device to adjust parameters of a transceiver of the host device during link training of the in-band transmission link. The digital signal processing chip is configured to receive the LT signal based on the adjusted parameters of the transceiver of the host device.

[0010] In other features, the digital signal processing chip includes a transceiver and is configured to receive a first out-of-band signal from a host device and adjust a parameter of the transceiver based on the first out-of-band signal.

[0011] In other features, the digital signal processing chip is configured to receive the LT signal from the host device after adjusting the parameters of the transceiver.

[0012] In other features, the digital signal processing chip includes a transceiver and is configured to send an LT signal to a host device during link training of an in-band receive link, and based on the LT signal, receive a second out-of-band signal from the host device to adjust parameters of the transceiver.

[0013] In other features, the digital signal processing chip includes a transceiver and is configured to receive a second out-of-band signal from the host device to adjust a parameter of the transceiver, adjust the parameter, and send an LT signal to the host device to train the in-band receive link.

[0014] In other features, the digital signal processing chip is configured to send a second out-of-band signal to the host device to adjust parameters of a transceiver of the host device, and after adjusting the parameters of the transceiver of the host device, send the LT signal to the host device to train the in-band receive link.

[0015] In other features, the optical transceiver is configured to i) receive the second wake-up signal in response to the first wake-up signal, or ii) receive the second wake-up signal independent of the first wake-up signal.

[0016] In other features, the optical transceiver is configured to i) wait for the second optical module to appear after link training of an in-band transmission link between the first optical module and the host device is completed, including sending a first wake-up signal from the first optical module to the second optical module via the first optical link, and ii) receive a second wake-up signal from the second optical module via the second optical link when the second optical module is powered on.

[0017] In other features, the optical transceiver is configured to: after independently training the in-band transmit link, forward the first reference clock signal to the second optical module; wait for a second reference clock signal from the second optical module; and after receiving the second reference clock signal, begin training the in-band receive link.

[0018] In other features, a link training method is disclosed and includes: performing link training of an in-band transmission link between the first optical module and the host device independently of an in-band reception link between the first optical module and the host device based on a first out-of-band signal sent via an out-of-band link between the first optical module and the host device, the first out-of-band signal being a control signal for testing the in-band transmission link; after the link training of the in-band transmission link between the first optical module and the host device is completed, waiting at the first optical module for a second optical module to appear, including sending a first wake-up signal from the first optical module to the second optical module, the second optical module being started when powered on and being in a state of sending a second wake-up signal to the first optical module; when the second optical module is started, receiving a second wake-up signal from the second optical module at an optical transceiver of the first optical module; and performing link training of the in-band reception link independently of the in-band transmission link based on the second wake-up signal and a second out-of-band signal sent via the out-of-band link, the second out-of-band signal being a control signal for testing the in-band reception link.

[0019] In other features, the method further includes, after completing link training of the in-band transmission link, sending an idle signal from the optical transceiver of the first optical module to the second optical module until a second wake-up signal is received at the first optical module.

[0020] In other features, the method further includes: receiving an LT signal from a host device during link training of an in-band transmission link at the first optical module; and synchronizing a clock of the first optical module with a clock signal embedded in the LT signal based on the clock signal embedded in the LT signal.

[0021] In other features, the method further includes: during link training of the in-band transmission link, sending a first out-of-band signal from the first optical module to the host device to adjust parameters of a transceiver of the host device; and receiving the LT signal at the first optical module based on the adjusted parameters of the transceiver of the host device.

[0022] In other features, the method further includes receiving a first out-of-band signal from a host device at the first optical module; and adjusting a parameter of a transceiver of the first optical module based on the first out-of-band signal.

[0023] In other features, the method further includes receiving, at the first optical module, a LT signal from a host device after adjusting the parameters of the transceiver.

[0024] In other features, the method further includes: sending an LT signal from the first optical module to the host device during link training of the in-band receive link; and receiving a second out-of-band signal from the host device at a transceiver of the first optical module based on the LT signal to adjust parameters of the transceiver.

[0025] In other features, the method further includes: receiving a second out-of-band signal from a host device at the first optical module to adjust a parameter of a transceiver of the first optical module; adjusting the parameter; and sending an LT signal from the first optical module to the host device to train the in-band receive link.

[0026] In other features, the method further includes: sending a second out-of-band signal from the first optical module to the host device to adjust parameters of a transceiver of the host device; and after adjusting the parameters of the transceiver of the host device, sending an LT signal from the first optical module to the host device to train the in-band receive link.

[0027] In other features, the method further includes receiving, via the optical transceiver, a second wake-up signal in response to the first wake-up signal or receiving the second wake-up signal independent of the first wake-up signal.

[0028] In other features, the method further includes: after link training of an in-band transmission link between the first optical module and the host device is completed via the optical transceiver, waiting for the second optical module to appear, including sending a first wake-up signal from the first optical module to the second optical module via the first optical link; and when the second optical module is started, receiving a second wake-up signal from the second optical module at the optical transceiver via the second optical link.

[0029] Further areas of applicability of the present disclosure will become apparent from the detailed description, claims, and drawings.The detailed description and specific examples are intended for purposes of illustration only and are not intended to limit the scope of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 is a functional block diagram of an example communication system according to the present disclosure, which includes a P-OTP host PCB implemented between a switch fabric and an optical network, and has transceivers and optical modules that implement clock synchronization and link training.

[0031] Figure 2 is a functional block diagram of an example communication system according to the present disclosure, which includes a P-OTP host PCB implemented between a server and an optical network and has a transceiver and an optical module that implements clock synchronization and link training.

[0032] Figure 3 is a functional block diagram of an example first host PCB and a second host PCB according to the present disclosure, including a host device and an optical module for implementing clock synchronization and link training.

[0033] Figure 4 is a functional block diagram of an example host device according to the present disclosure, the example host device including a processor, a link training application, a transceiver with an adaptation application, and an out-of-band interface.

[0034] Figure 5 It is a diagram illustrating the Figure 4 A functional block diagram of an example detailed portion of a host device.

[0035] Figure 6 is a functional block diagram of an example optical module including two processors, one of which includes a multiplexer, a demultiplexer, and a first-in-first-out (FIFO) memory, according to an embodiment of the present disclosure.

[0036] Figure 7 is a functional block diagram of another example optical module including three processors according to another embodiment of the present disclosure.

[0037] Figure 8is a functional block diagram of another example optical module including two processors, one of which includes a receiver and a transmitter, according to an embodiment of the present disclosure.

[0038] Fig. 9 is a functional block diagram of an example intermediate processing module implemented between two host devices according to another embodiment of the present disclosure.

[0039] Fig.10 A link training method including operations implemented by a first host PCB according to the present disclosure is illustrated.

[0040] Fig.11 A link training method including operations implemented by a second host PCB according to the present disclosure is illustrated.

[0041] In the drawings, reference numbers may be reused to identify similar and / or identical elements. DETAILED DESCRIPTION

[0042] Link training between host devices can be done using, for example, the Institute of Electrical and Electronics Engineering The IEEE 802.3 standard link training (LT) process is performed. The IEEE 802.3 standard LT process includes increasing and decreasing the equalizer tap value of the transmitter of the host device to provide the best signal-to-noise ratio (SNR). The LT process may include testing tap values ​​and tap value combinations to determine which tap value combination provides the best SNR. This may include increasing and / or decreasing each tap value and iteratively adjusting the previously selected tap value. The tap value may be tested for each of the multiple equalizers (or filters) of the transmitter of the host device. The 802.3 standard LT procedure is used to train a transmitter and a receiver provided in a corresponding remote device communicating through an electrical interface, rather than to train a transmitter and a receiver of a host device communicating with an optical module through an electrical interface, for example. Moreover, the LT procedure is implemented according to a structured protocol that provides interoperability between host devices.

[0043] LT can include testing transmitter settings to determine the best transmitter setting set for in-band signals between the host device and the optical module. In-band signals refer to LT signals or data signals sent through the electrical channels between the host device and the optical module. LT between the host device and the optical module can be performed in the same manner as traditional 802.3LT. However, applying this training to the in-band link between the host device and the optical module may be affected by interoperability issues between devices. This is especially true when performing a full auto-negotiation link training (ANLT) process. Each device that performs a full ANLT has a clear timer starting point. As an example, two devices can perform a full ANLT to establish a clock start time and a link between the devices before sending data. These devices establish and therefore know the clock start time, and start the corresponding timers at the same start time. By doing this, the devices are synchronized. However, if a full ANLT is not performed, so that auto-negotiation is not performed and only LT is performed, then the device does not have a clear start time. Therefore, the device does not know when to start the timer, and by default, the timer is usually started when the device is turned on and initialized. Therefore, these devices are at least initially unsynchronized.

[0044] If the timers of the first device and the second device are started by default when the devices are initialized, the first device may be turned on when the second device is turned off, and vice versa. In addition, the first device may send an LT request signal to the second device to perform LT, and expect a response signal from the second device. However, if the LT signal sent by the first device is turned off and / or not detected, the second device will not respond. This may cause the first device to time out and restart. The first device can continue LT to restart until a response is received from the second device. The second device can perform the same LT process. If a response signal is not received, each device in the device may time out after a predetermined time period. When the first device times out and / or is restarting, the second device can send an LT signal. Therefore, these devices can continue to "chase" each other for an extended period of time. This is called a "race condition."

[0045] For two devices that send LT request signals in-band, a pair of unidirectional in-band links between the two devices cannot be decoupled. The first link in the pair is used to send signals from the first device to the second device, and the second link is used to send signals from the second device to the first device. The LT request signal can be sent on the first link, and the LT response signal can be sent on the second link. To perform this type of LT, both links must be started. Traditionally, the link is started when the transceivers at the opposite ends of the link are powered on and are in a state of sending and receiving signals through the link. When the second link is closed, the first link cannot be trained, and vice versa. Moreover, any restart of one of the devices requires retraining of the two links, including establishing correct clock timing for each link in the link, and adjusting transmitter settings, such as tap coefficients of the equalizer (or filter), other filter parameters, signal amplitude, and precoder (or encoder) settings. As an example, the precoder (or encoder) settings can indicate the enablement and disablement of encoding.

[0046] Two endpoints (e.g., network switches) can perform LT. Each of the endpoints includes a host device and an optical module. A first optical module of the first endpoint is connected to a second optical module of the second endpoint via an optical link. Each of the optical modules can operate in repeater mode and forward data received from the corresponding host device to another optical module. When operating in repeater mode, the optical module cannot generate physical coding sublayer (PCS) data, but can only forward received PCS data. After the LT is completed, the endpoint can expect to receive PCS data. If the endpoint does not receive PCS data within a predetermined time period, the endpoint will restart. When automatic negotiation is not performed, it is difficult to synchronize the two endpoints so that the endpoints complete the LT at the same time. Simultaneous completion allows PCS data to be sent and received when the LT is completed. However, if the endpoints are not synchronized, then PCS data may not be received, and the endpoints time out and restart at different times. This again leads to a race condition.

[0047] Some optical modules operate in clock forwarding mode. This refers to sending LT signals through electrical links and optical links that include clock signals. Based on which subsequent data signals are sent, this allows the transmitters and receivers of the optical module and the host device to synchronize the corresponding clocks. For endpoints including host devices and optical modules, there may be situations where synchronization does not occur. For example, in order for the transmitter and output port (HTX) of the first optical module to have a stable and correct timing clock, the optical receiver and input port (LRX) in the first optical module need to be started (i.e., active and provide a stable and correct clock signal). In order for the optical receiver of the first optical module to start, the transmitter and output port (LTX) of the second optical module need to be started. In order for the optical transmitter of the second optical module to start, the receiver and input port (HRX) of the second optical module need to be started. With respect to the first optical module, HTX refers to the transmission of the transmitter of the first optical module to the first host device via the output port. With respect to the first optical module, LRX refers to the optical receiver of the first optical module receiving a signal from the second optical module via the input port. With respect to the second optical module, LTX refers to the transmission of the transmitter of the second optical module to the first optical module via the output port. With respect to the second optical module, HRX refers to the receiver of the second optical module receiving a signal from the second host device via an input port. Each of the optical modules has corresponding HTX, LRX, LTX, HRX ports.

[0048] The examples set forth herein include training unidirectional electrical links (also referred to as in-band links) between a host device and an optical module independently of one another. The unidirectional links are trained based on out-of-band signals sent on out-of-band links. As an example, two in-band links between a host device and an optical module are trained independently such that one of the in-band links is trained while the other in-band link is turned off (i.e., inactive and / or training). During LT, one or more out-of-band signals are sent on the out-of-band link between the out-of-band interface of the host device and the optical module. The use of the out-of-band link decouples the LT of the in-band link (or the links in an in-band link pair) between the host device and the optical module, and this is different from the IEEE 802.3 standard LT procedure, which does not include an out-of-band link and requires that both in-band links be started in order to perform the LT. Each in-band link in the disclosed examples is trained when the link is started and a reference clock frequency for synchronizing the transmitter of the link is available. This does not require that the other in-band link in the corresponding in-band link pair be started.

[0049] An out-of-band signal refers to a signal sent through a second electrical channel (or management channel) between a host device and an optical module. The signal sent through the second electrical channel is at the same or different frequency as the signal sent on the first electrical channel of the in-band link. The second electrical channel is used to send control information between the host device and the optical module, including, for example, coefficients, number of taps, signal integrity values, requests, status information, etc. The out-of-band link is not used to transmit data between host devices, but in-band signals are used to transmit data between host devices. The in-band signal originates from the host device and / or is sent from the optical module to the host device. As an example, the Ethernet data to be sent originates from the host device. Signal integrity values ​​include SNR, bit error rate (BER), etc.

[0050] The examples disclosed herein also include endpoints (or host PCBs) of LTs configured to perform in-band transmission links independently of each other. Each of the host PCBs is configured to train the corresponding in-band transmission link and send an idle (or virtual) signal on the optical link until a response and / or wake-up signal is received from another host PCB. When the transmission in-band link of the first host device has been trained, an idle signal is sent. The idle signal is sent from the corresponding first optical module of the first host device to the second optical module of the second host device to indicate that the transmission in-band link has been trained and to forward the reference clock for the second optical module. This process is also performed by the second host device. The configuration of the idle signal is similar to the data signal normally sent, but does not include data sent between the host devices. The idle signal includes a virtual bit sent between the optical modules to maintain the optical module in an active waiting state. The normal data signal may include a message, while the idle signal does not include a message. The transmission of the idle signal prevents each optical module in the optical module from timing out and restarting due to lack of a response from another optical module. In an embodiment, the idle signal includes a codeword. The idle signal does include a clock signal, which allows an optical module receiving the idle signal to i) synchronize an optical receiver and ii) synchronize a transmitter that sends an in-band signal to a host device.

[0051] Figure 1A communication system 100 is shown, which includes a P-OTP host PCB 102 implemented between a switch fabric 104 and an optical network. The P-OTP host PCB 102 includes a host device 106 and an optical module 108 mounted on the P-OTP host PCB 102. Each of the host devices 106 includes one or more fabric interfaces 112 and one or more processors 114. Each of the processors 114 includes one or more transceivers 116. In the illustrated embodiment, the host device 106 is implemented as a line card. The configuration and operation of the host device 106 and the optical module 108 are similar to any host device and optical module disclosed and described herein. During operation, data is transmitted between the switch fabric 104 and the fabric interface 112, between the transceiver 116 and the optical module 108 via an in-band link (or channel) 120, and between the optical module 108 and the optical network. Control information is transmitted via an out-of-band link (or channel) 122. In an embodiment, the out-of-band links 122 each include a two-wire interface (TWI) or a high-speed differential four-wire interface that connects a processor of a host device to the optical module for setting up basic functions and performing link training operations.

[0052] The in-band link 120 transmits a test pattern or Ethernet data, and the out-of-band link 122 is used for link training of the in-band link 120, as further described below. Figure 10 to Figure 11 The communication between the host device 106 and the optical module 108 is carried out through a very short range (VSR) electrical interface (or a VSR in-band electrical link). Although a VSR electrical interface generally refers to an interface with a length less than and not exceeding 300 mm, the VSR electrical interface cited herein is substantially shorter than 300 mm. In some embodiments, the host device disclosed herein is directly connected to the corresponding optical module.

[0053] Figure 2A communication system 200 is shown, which includes a P-OTP host PCB 202 implemented between a server 204 and an optical network. The P-OTP host PCB 202 includes a host device 206 and an optical module 208 mounted on the P-OTP host PCB 202. The server 204 includes a controller 209 and one or more network interface cards (NICs) 210. Each of the host devices 206 includes one or more NIC interfaces 212 and one or more processors 214 connected to the NIC 210. Each of the processors 214 includes one or more transceivers 216. In the illustrated embodiment, the host device 206 is implemented as a line card. The configuration and operation of the host device 206 and the optical module 208 are similar to any host device and optical module disclosed and described herein. During operation, data is transmitted between the NIC 210 and the NIC interface 212, between the transceiver 216 and the optical module 208 via an in-band link (or channel) 220, and between the optical module 208 and the optical network. The control information is transmitted via the out-of-band links (or channels) 222. In an embodiment, each of the out-of-band links 222 includes a TWI or a high-speed differential four-wire interface that connects the processor of the host device to the optical module for setting up basic functions and performing link training operations. The in-band link 220 and the out-of-band link 222 are used for link training of the in-band link 220, as further described below. The host device 206 and the optical module 208 are configured to implement Figure 10 to Figure 11 method.

[0054] Controller 209 may refer to one or more processors and memory, wherein the one or more processors are configured to execute instructions to perform the described operations. In an embodiment, the instructions are stored in the memory of the one or more processors. The term "controller" may be replaced with the term "circuit". The memory of the one or more processors includes a non-transitory, tangible computer-readable medium.

[0055] Figure 3 A first host PCB 300 and a second host PCB 302 are shown including host devices 304, 306 and optical modules 308, 310 implementing link training. In an embodiment, the host PCBs 300, 302 are implemented as P-OTP host PCBs, such as Figure 1 to Figure 2 In another embodiment, the host PCB 300, 302 communicates with a network switch or is implemented as a network switch.

[0056] Host devices 304, 306 include interfaces 311, 312, transceivers 314, 316, processors 318, 320, and out-of-band (OOB) interfaces 322, 324. In an embodiment, interfaces 311, 312 communicate with a switching network, a server, and / or a NIC. In an embodiment, transceivers 314, 316 include corresponding clocks 325, 326.

[0057] The optical modules 308, 310 include digital signal processing (DSP) chips 330, 332, optical transceivers 334, 336, processors 338, 340, and OOB interfaces 342, 344. In-band electrical links 350, 351 exist between the transceiver 314 and the DSP chip 330. In-band electrical links 352, 353 exist between the transceiver 316 and the DSP chip 332. OOB electrical link 354 exists between the OOB interfaces 322, 342. OOB electrical link 355 exists between the OOB interfaces 324, 344. Optical links 356, 357 exist between the optical transceivers 334, 336. In-band electrical links 350 to 353 and optical links 356, 357 are unidirectional links. OOB electrical links 354, 355 are bidirectional links. Optical transceivers 334, 336 include corresponding clocks 358, 359.

[0058] The DSP chips 330, 332 include: an electrical transceiver 360, 362 having a clock 364, 366; a clock data recovery (CDR) circuit 368, 370; and a clock forwarding circuit (CFC) 372, 374. In an embodiment, the CDR circuit 368, 370 monitors the frequency of the received bits to determine the clock timing. The timing of the clock 364, 366 is adjusted based on the monitored frequency. In an embodiment, the timing including the frequency and phase of the clock 364, 366 is synchronized with the monitored frequency. This includes matching the frequency and phase of the clock 364, 366 to the frequency and phase of the input signal. The CFC 372, 374 governs the frequency and phase of the bits sent on the optical link 356, 357. This includes adjusting the frequency and phase of the clock 358, 359 based on the bits sent on the optical link 356, 357.

[0059] Clocks 325, 326, 358, 359, 364, 366 are shown as examples. In an embodiment, clocks 325, 326 are not implemented by transceivers 314, 316, but are implemented by processors 318, 340 and / or are implemented external to transceivers 314, 316. In an embodiment, optical modules 308, 310 each have a single clock, rather than each having two clocks and these clocks are implemented by transceivers 334, 336, 360, 362. The single clock of the optical modules 308, 310 is implemented by processors 338, 340, selected ones of transceivers 334, 336, 360, 362, DSP chips 330, 332, and / or is separate from transceivers 334, 336, 360, 362.

[0060] The host devices 304, 306 and the optical modules 308, 310 are configured to implement Figure 10 to Figure 11 Method. The OOB electrical links 354, 355 and other OOB electrical links and interfaces disclosed herein are used for link training purposes, and in some embodiments, their data rates are significantly lower than the data rates of the in-band links (or data communication channels). As an example, the data rate of the in-band interface (or data communication link) can have a channel of 112 gigabits per second (Gbps), while the out-of-band interface (or management link for transmitting control information) can have a channel of 1 kilobit per second (kbps) to 1 megabit per second (1Mbps). In some embodiments, the OOB electrical links 354, 355 are out-of-band TWI or high-speed differential four-wire interfaces, which connect the processor of the host device to the optical module for setting up basic functions and for performing link training operations.

[0061] The OOB electrical links 354, 355 may be referred to as management channels for training the in-band electrical links 350 to 353 (or in-band electrical interfaces). The communication between the host devices 304, 306 and the optical modules 308, 310 is referred to as chip-to-module (C2M) communication. The host devices 304, 306 include transceivers 314, 316, which include transmitters, receivers, adaptation applications, and LT applications, as further described below. The OOB electrical links 354, 355 carry training commands and responses so that the corresponding exchanges are not susceptible to the signal quality of the in-band data link signals being trained on the in-band links. The OOB electrical links 354, 355 are used to adjust the settings of the transmitters of the transceivers 314, 316, 360, 362.

[0062] The indication of the selected transmitter setting set includes at least one of an index value, a preset, and a selected transmitter setting set. Each index value and preset refers to a transmitter parameter set, including a set of coefficients of a corresponding tap of an equalizer (or filter). Each index value identifies a parameter set, but does not include the parameter set. In an embodiment, the preset refers to and includes the current transmitter setting set, including a set of coefficients of a tap of an equalizer (or filter) or another pre-stored set of coefficients of a tap of an equalizer. The transmitter setting is not limited to coefficients and may include other transmitter settings, as further described below. The transmitter setting may refer to any transmitter setting referenced herein, including tap values, signal amplitudes, filter parameters, and the like. The filter parameters include: frequencies or frequency ranges for filtering and / or emphasizing; types of filtering to be performed, and the like. Filter types include peak filtering, low-pass filtering, high-pass filtering, notch filtering, band-pass filtering, and the like.

[0063] Each of the host devices 304, 306 has an independent clock source (e.g., clocks 325, 326). In an embodiment, the frequencies of the clocks 325, 326 are the same nominal frequency, but may deviate slightly due to part-to-part variations and / or other reasons. In an embodiment, the frequencies of the clocks 325, 326 differ by up to ±100 parts per million (ppm) (i.e., 0.01%). The signals sent on the in-band transmission link 350 are governed by the frequency of the clock 325, and the signals sent on the in-band transmission link are governed by the frequency of the clock 326.

[0064] The first optical module 308 obtains the CDR recovery clock frequency from the signal sent over the in-band transmission link 350 and forwards it to the optical link 356. This is done so that the frequency on the optical link 356 matches the frequency on the in-band transmission link 350. The clock 364 generates a reference clock signal with a frequency nominally the same (±100 ppm) as the clock frequency of the clock 325. The CDR circuit 368 modifies the frequency of the clock 364 to match the frequency of the clock 325. The second optical module 310 obtains the CDR recovery clock frequency from the optical link 356 and matches the frequency on the in-band receive link 352 to that frequency. Thus, the clock frequency (or clock signal) is forwarded from the clock 325 to the in-band receive link 352.

[0065] The second optical module 310 also obtains the CDR recovery clock frequency from the signal sent over the in-band transmission link 353 and forwards it to the optical link 357. This is done so that the frequency on the optical link 357 matches the frequency on the in-band transmission link 353. The clock 366 generates a reference clock signal with a frequency that is nominally the same (±100 ppm) as the clock frequency of the clock 326. The CDR circuit 370 modifies the frequency of the clock 366 to match the frequency of the clock 326. The first optical module 308 obtains the CDR recovery clock frequency from the optical link 357 and matches the frequency on the in-band receive link 351 to that frequency. Thus, the clock frequency (or clock signal) is forwarded from the clock 326 to the in-band receive link 351.

[0066] Thus, the clock forwarding process in the first direction operates independently of the clock forwarding process in the opposite direction.

[0067] Figure 4 The host device 400 is shown, which includes an interface 401, processors 402, 404, a power supply 406, an LT application 408, a transceiver 410, and an out-of-band interface 412. In some embodiments, the host device 400 replaces Figures 1 to 3 The host device 401 is a host device in a host device. Interface 401 is a structure interface, a NIC interface, or other electrical interface. In an embodiment, the LT application 408 is stored in the memory of the processor 402 and executed by the processor 402. Although the LT application 408 is shown as being separate from the transceiver 410, the LT application 408 can be stored in the memory of the transceiver 410 and executed by the transceiver 410. The transceiver 410 includes a host transmitter 414, a host receiver 416, and an adaptation application 418. In an embodiment, the adaptation application 418 is stored in the memory of the transceiver 410 and executed by the transceiver 410.

[0068] The second processor 404 transmits data between the interface 401 and the host transmitter 414 and the host receiver 416. The transceiver 410 transmits data between the first processor 402 and the corresponding optical module via an in-band electrical link. The second processor 404 controls the power supply to the first processor 402 via the power supply 406. The LT application 408 is configured to perform a link training operation based on the signal integrity value. The adaptation application 418 is configured to determine the signal integrity value of the signal received via the host receiver 416. The adaptation application 418 is also configured to adjust the tap value of the transmitter of the optical module by sending a request via the OOB interface 412. The adjustment of the tap value is based on the instructions generated by the LT application 408 and / or the second processor 404. The configuration of the adaptation application 418 and the LT application 408 is similar to other adaptation applications and LT applications disclosed herein. The second processor 404 monitors the signal integrity value and, in an embodiment, controls the link training of the in-band electrical link between the host device 400 and the optical module by controlling and / or signaling the LT application and transmitting control information using the OOB interface 412. The control information includes: tap coefficients; signal amplitudes; encoding enable and disable indicators; increment, decrement and / or jump instructions; and / or other transmitter settings and requests.

[0069] In an embodiment, the second processor 404 is configured to: establish a link; check the signal quality of the link in the current state using the current transmitter parameters; if the current signal quality does not pass the predetermined criteria; test a limited set of preset settings of the transmitter settings; and if none of the preset settings meet the predetermined criteria, invoke link training. Link training is implemented by i) the second processor 404 or ii) the first processor 402 or a processor of a corresponding link partner (i.e., a corresponding optical module).

[0070] Figure 5 Shows Figure 44. Portion 500 of a host device 400 of a wireless communication system. Portion 500 includes interface 401, first processor 402, second processor 404, and OOB interface 412. First processor 402 includes transceiver 410, transceiver 410 includes transmitter 414, receiver 416, adaptation application 418, and LT application 408. In the illustrated embodiment, receiver 416 is implemented as a serial deserializer (SerDes) receiver that deserializes received data. Transmitter 414 and receiver 416 include corresponding equalizers 510, 512, each having a tap having a corresponding coefficient. In an embodiment, transmitter 414 includes and / or performs the function of an encoder, and receiver 416 includes and / or performs the function of a decoder. In an embodiment, the encoder and decoder include a forward error correction (FEC) encoder and an FEC decoder. The encoder and decoder provide error detection and / or correction. Adaptation application 418 monitors the received signal and determines a signal integrity value. LT application 408 and adaptation application 418 execute the optical module ( Figure 5 4 (not shown in FIG. 4 ), which communicates with the first processor 402 via a corresponding in-band electrical interface. The low-level link training includes iteratively tuning and testing the parameters of the transmitter, as further described below. The LT application 408 and / or the adaptation application 418 sends a request to the second processor 404 to signal the optical module to change the (multiple) tap values ​​of the transmitter of the optical module and resend the data via the transmitter of the optical module through the in-band electrical interface. The request is sent from the second processor 404 via the OOB interface 412 and, in an embodiment, includes transmitter parameters, such as coefficients, amplitudes, and / or other transmitter parameters. This indicates to the optical module how to adjust the transmitter settings of the transmitter of the optical module.

[0071] The second processor 404 may include a memory 520 including registers 522 and optionally storing a driver 524. In an embodiment, the second processor does not include a driver. In an embodiment, the host device 400 does not include a driver. The register 522 stores transmitter parameters to be sent to the optical module or transmitter parameters received from the optical module. In an embodiment, when adjusting the parameters of the transmitter 414, the optical module stores the transmitter parameters in the register 522, which is accessed by the second processor 404 and provided to the transmitter 414.

[0072] Figure 6An optical module 600 is shown that can replace any optical module disclosed herein. The optical module 600 includes processors 602, 603, an optical transceiver 604, and an OOB interface 605. The processor 602 includes a receive path 606 and a transmit path 608. Although the processor 602 is shown as having a signal transmit path and a single receive path, the processor 602 includes any number of transmit and receive paths configured similarly to the transmit and receive paths shown, thereby transmitting in-band signals to and receiving in-band signals from any number of host processors. The receive path 606 includes: a serial deserializer receiver 610 with an equalizer 611; a demultiplexer 612; a FIFO memory 614; a multiplexer 616; and a transmitter 618 with an equalizer 620. The transmit path 608 includes: a serial deserializer receiver 630 with an equalizer 631; a demultiplexer 632; a FIFO memory 634; a multiplexer 636; and a transmitter 638 with an equalizer 640. In an embodiment, the FIFO memories 614, 634 are implemented as a single FIFO memory 641. In an embodiment, the transmitters 618 and 638 include or perform the functions of an encoder, and the receivers 610, 630 include and / or perform the functions of a decoder. In an embodiment, the encoder and decoder include an FEC encoder and an FEC decoder. The encoder and decoder provide error detection and / or correction. In an embodiment, the transmitter 618 includes and / or performs the functions of a pulse amplitude module driver. The optical transceiver 604 includes an optical transmitter 650 and an optical receiver 652. The optical transmitter 650 includes a laser 654 and a modulator 656. The optical receiver 652 includes a photodiode 658 and an amplifier 660.

[0073] The first processor (also referred to as an electrical transceiver) 602 also includes an adaptation application 670 that communicates with the second processor 603 and, in an embodiment, with the optical receiver 652. The adaptation application 670 monitors signal integrity values ​​of signals received via the SerDes receiver 610 and, optionally, the optical receiver 652, and sends a request to the second processor 603 to adjust a transmitter parameter of a transmitter of the host device.

[0074] The second processor 603 includes a memory 680 having a register 682 and optionally storing a driver 684. In an embodiment, the second processor 603 does not include a driver. In an embodiment, the optical module 600 does not include a driver. The register 682 stores transmitter parameters to be sent to the host device or transmitter parameters received from the host device. In an embodiment, when adjusting the parameters of the transmitter 638, the host device stores the transmitter parameters in the register 682, which is accessed by the second processor 603 and provided to the transmitter 638.

[0075] In an embodiment, the serial deserializer receiver 610 is configured to receive incoming data at 25 Gbps in a pulse amplitude modulation format. The received data is processed and sent to another optical module downstream of the optical module 600 via a modulator 656 through an optical link. As a few examples, the data is sent through the optical link at 40 Gbps, 100 Gbps, 400 Gbps, or another data rate. The serial deserializer receiver 610 or demultiplexer 612 includes and / or performs the functions of a CDR circuit. The demultiplexer 612 demultiplexes the received signal into multiple data streams, which are stored in a FIFO memory 614. The multiplexer 616 multiplexes the data streams into a single data signal provided to the transmitter 618.

[0076] The amplifier 660 receives an optical data signal from an optical link and amplifies the optical data signal. Before being received at the serial deserializer receiver 630, the optical receiver converts the output of the amplifier 660 from an analog signal to a digital signal. Before being sent by the transmitter 638, the digital signal is converted to a pulse amplitude modulation form via the transceiver 602 and / or the transmitter 638. In an embodiment, the transmitter 638 sends data at 25Gbps. The demultiplexer 632 demultiplexes the digital signal into multiple data streams, which are stored in the FIFO memory 634. The multiplexer 636 multiplexes the data stream into a single data signal provided to the transmitter 638.

[0077] Figure 7An optical module 700 is shown that can replace any optical module disclosed herein. The optical module 700 includes processors 701, 702, 703, an optical transceiver 704, and an OOB interface 705. The processor 702 includes a receive path 706 and a transmit path 708. Although the processor 702 is shown as having a signal transmit path and a single receive path, the processor 702 includes any number of transmit and receive paths configured similarly to the transmit and receive paths shown, thereby sending in-band signals to and receiving in-band signals from any number of host processors. The receive path 706 includes: a serial deserializer receiver 710 with an equalizer 711; a demultiplexer 712; a FIFO memory 714; a multiplexer 716; and a transmitter 718 with an equalizer 720. The transmission path 708 includes: a serial deserializer receiver 730 with an equalizer 731; a demultiplexer 732; a FIFO memory 734; a multiplexer 736; and a transmitter 738 with an equalizer 740. The demultiplexers 712, 732 convert serial data into parallel data. Then, the data is processed before and / or after being stored in the FIFO memories 714, 734. The processed parallel data is then converted into serial data via the multiplexers 716, 736. In an embodiment, the FIFO memories 714, 734 are implemented as a single FIFO memory 741. The optical transceiver 704 includes an optical transmitter 750 and an optical receiver 752. The optical transmitter 750 includes a laser 754 and a modulator 756. The optical receiver 752 includes a photodiode 758 and an amplifier 760.

[0078] The first processor (also referred to as an electrical transceiver) 701 also includes an adaptation application 770, which communicates with the third processor 703 and, in an embodiment, communicates with the optical receiver 752. The adaptation application 770 monitors the signal integrity values ​​of the signals received via the serial deserializer receiver 710 and, optionally, the signal integrity values ​​of the signals received via the optical receiver 752. The adaptation application 770 then sends a request to the third processor 703 to adjust the transmitter parameters of the transmitter of the host device. In an embodiment, the driver 783 monitors the signal integrity values ​​received from the adaptation application 770 and determines when to send a request to the second processor to adjust the parameters of the transmitter of the host device. This can include storing the transmitter parameter values ​​(or transmitter settings) in registers 781 and then transmitting them to the host device via the OOB interface 705.

[0079] The second processor 702 includes a memory 780 having a register 781. The third processor 703 includes a memory 782 storing a driver 783. The register 781 stores transmitter parameters to be sent to the host device or transmitter parameters received from the host device. In an embodiment, when adjusting the parameters of the transmitter 738, the host device stores the transmitter parameters in the register 781, and the register 781 is accessed by the second processor 702 and provided to the transmitter 738.

[0080] Figure 8 An optical module 800 is shown that can replace any optical module disclosed herein. The optical module 800 includes processors 802, 803, an optical transceiver 804, and an OOB interface 805. The processor 802 includes a receive path 806 and a transmit path 808. Although the processor 802 is shown as having a signal transmit path and a single receive path, the processor 802 includes any number of transmit and receive paths configured similarly to the transmit and receive paths shown, thereby sending in-band signals to and receiving in-band signals from any number of host processors. The receive path 806 includes: a serial deserializer receiver 810 with an equalizer 811; and a transmitter 818 with an equalizer 820. The transmit path 808 includes: a serial deserializer receiver 830 with an equalizer 831; and a transmitter 838 with an equalizer 840. The optical transceiver 804 includes an optical transmitter 850 and an optical receiver 852. The optical transmitter 850 includes a laser 854 and a modulator 856. The optical receiver 852 includes a photodiode 858 and an amplifier 860 .

[0081] The first processor (also referred to as an electrical transceiver) 802 also includes an adaptation application 870 that communicates with the second processor 803 and, in an embodiment, with the optical receiver 852. The adaptation application 870 monitors the signal integrity values ​​of signals received via the SerDes receiver 810 and, optionally, the signal integrity values ​​of signals received via the optical receiver 852. The adaptation application 870 then sends a request to the second processor 803 to adjust a transmitter parameter of a transmitter of the host device.

[0082] The second processor 803 includes a memory 880 having a register 882 and optionally storing a driver 884. In an embodiment, the second processor 803 does not include a driver. In an embodiment, the optical module 800 does not include a driver. The register 882 stores transmitter parameters to be sent to the host device or transmitter parameters received from the host device. In an embodiment, when adjusting the parameters of the transmitter 838, the host device stores the transmitter parameters in the register 882, which is accessed by the second processor 803 and provided to the transmitter 838.

[0083] Fig. 9 An intermediate processing module 900 implemented between two host devices is shown. The host devices are similar to other host devices disclosed herein, but instead of communicating with the corresponding optical modules via an in-band electrical interface, they communicate with the intermediate processing module 900 via an in-band electrical interface. The intermediate processing module 900 includes processors 902, 903 and an OOB interface 905. The processor 902 includes a first transmit path 906 and a second transmit path 908. Although the processor 902 is shown as having a signal transmit path and a single receive path, the processor 902 includes any number of transmit and receive paths configured similarly to the transmit and receive paths shown, thereby sending in-band signals to any number of host processors and receiving in-band signals from them. The first transmit path 906 includes: a serial deserializer receiver 910 with an equalizer 911; a demultiplexer 912; a FIFO memory 914; a multiplexer 916; and a transmitter 918 with an equalizer 920. The second transmit path 908 includes: a SerDes receiver 930 having an equalizer 931; a demultiplexer 932; a FIFO memory 934; a multiplexer 936; and a transmitter 938 having an equalizer 940. In an embodiment, the FIFO memories 914, 934 are implemented as a single FIFO memory 941.

[0084] The first processor (also referred to as an electrical transceiver) 902 also includes an adaptation application 970 that communicates with the second processor 903. The adaptation application 970 monitors signal integrity values ​​of signals received via the SerDes receiver 910 and sends a request to the second processor 903 to adjust transmitter parameters of a transmitter of a first host device that communicates with the SerDes receiver 910. The signal integrity values ​​include SNR, bit error rate (BER), etc.

[0085] The second processor 903 includes a memory 980 having a register 982 and optionally storing a driver 984. In an embodiment, the second processor 903 does not include a driver. In an embodiment, the intermediate processing module 900 does not include a driver. The register 982 stores transmitter parameters to be sent to the host device or transmitter parameters received from the host device. In an embodiment, when adjusting the parameters of the transmitter 938, the host device stores the transmitter parameters in the register 982, which is accessed by the second processor 903 and provided to the transmitter 938.

[0086] In an embodiment, Figures 5 to 9The equalizers 510, 512, 611, 620, 631, 640, 711, 720, 731, 740, 811, 820, 831, 840, 911, 920, 931, 940 are feedforward equalizers (FFE), continuous time linear equalizers (CTLE) or decision feedback equalizers (DFE) and / or include finite impulse response filters (FIR).

[0087] Figures 4 to 5 The register 522 of the host device 400 allows Figures 6 to 9 The processor 602, 701, 802, 902 of the optical module 600, 700, 800, 900 adjusts the parameters of the transmitter 414 of the host device 400. For example, the processor 602, 701, 802, 902 sends a request, updated parameters and / or signal integrity ranges to the host device 400 via the processor 603, 702, 802, 903 and the OOB interface 605, 705, 805, 905, and the host device 400 stores the request, updated parameters and / or signal integrity ranges in the register 522. The request, updated parameters and / or signal integrity ranges in the register 522 are then retrieved by the processor 404 and used to set the parameters of the transmitter 414. The request includes an increment, decrement and / or jump request. The optimized parameter settings are stored and used after a reset and / or power cycle event.

[0088] Figures 6 to 9 The registers 682, 781, 882, 982 of the optical modules 600, 700, 800, 900 of the host device 400 allow the first processor 402, the transceiver 410, and / or the second processor 404 to adjust the parameters of the transmitter 638, 738, 838, 938 of the corresponding optical module. For example, the first processor 402, the transceiver 410, and / or the second processor 404 send requests, updated parameters, and / or signal integrity ranges to the optical modules 600, 700, 800, 900 via the second processor 404 and the OOB interface 412, and these optical modules store these requests, updated parameters, and / or signal integrity ranges in the registers 682, 781, 882, 982. The requests, updated parameters and / or signal integrity ranges in registers 682, 781, 882, 982 are then retrieved by processor 603, 702, 802, 903 and used to set parameters of transmitter 638, 738, 838, 938. Requests include increment, decrement and / or jump requests. The optimized parameter settings are stored and used after a reset and / or power cycle event.

[0089] In an embodiment, the length of registers 522, 682, 781, 882, 982 is equal to or greater than the cursor (pre-cursor and post-cursor) length. Any number of pre-cursor and post-cursor coefficients are stored for each equalizer. As an example, the equalizer can have 3 pre-cursors and 1 post-cursor. As another example, the equalizer can have 4 to 6 pre-cursors and 1 post-cursor. As another example, the equalizer can have 1 to 2 pre-cursors and 1 to 3 post-cursors. In an embodiment, registers 522, 682, 781, 882, 982 are configured to store up to 7 pre-cursors and up to 8 post-cursors. When increasing and decreasing the tap coefficient, any step size can be used to adjust the tap coefficient. As an example, for an implementation with 3 front cursors C(-3), C(-2), C(-1) and 1 rear cursor C(1), the step size of the front cursor C(-3) is 0.01, the step size of the front cursor C(-2) is 0.02, the step size of the front cursor C(-1) is 0.025, and the step size of the rear cursor C(1) is 0.04.

[0090] In some embodiments, the OOB signaling performed by the host device and optical module disclosed herein includes coded signaling for reading and writing tap values ​​and / or other transmitter parameters (such as power, wavelength, etc.). The encoding is weighted and is signed or unsigned, such as S8, U8, or U16 encoding, where 'S' refers to signed and 'U' refers to unsigned. S8 refers to a signed eight-bit encoding that supports 64 increments, each of which is 0.01, with normalized tap weights up to ±0.64. U8 encoding includes 128 increments, where the increment size is 0.01 and the normalized tap weight is 1.28. In an embodiment, S8 encoding is used to read AUI-S and AUI-L preset contents from corresponding registers of the host device and the optical module, including the current transmitter parameters of the host device and the optical module transmitter parameters.

[0091] In an embodiment, Figures 4 to 5 The transceiver 410 of the host device 400 adjusts the parameters of the transmitter 414 based on the feedback from the corresponding optical module to, for example, improve the BER of the corresponding in-band link. The transceiver 410 writes the length of the equalizer 510 and the cursor value of the transmitter 414 of the host device 400 to the register of the optical module via the second processor 404 and the OOB interface 412. Figure 6The corresponding OOB interface (e.g., OOB interface 605) indicates to the host device 400 whether residual inter-symbol interference (ISI) estimation for the current cursor is supported. Based on the indication, the transceiver 410 reads the register indicating the cursor of the transmitter of the host device. The transmitter of the host device then sends an in-band signal to the optical module, and the optical module determines the signal integrity value of the in-band signal. The host device receives feedback from the optical module and adjusts the cursor value of the transmitter of the host device without reading from the register. The process is iteratively performed until a predetermined criterion is met, a predetermined number of iterations are performed, a timeout period has passed, and / or the signal integrity value is no longer improved. The host device then records the resulting parameters of the transmitter of the host device that provide the best signal integrity value for subsequent use. These parameters are stored as presets for quick access and efficient setting of the transmitter of the host device.

[0092] Fig.10 and Fig.11 The following methods are executed concurrently and / or in overlapping time periods. Therefore, Fig.10 One or more operations with Fig.11 One or more operations are executed concurrently. Fig.10 Shown includes Figure 3 The host PCB 300 implements the LT method of operation. Although relative to Figure 3 The following operations are described in the embodiment of the present invention, but these operations are applicable to other embodiments disclosed herein.

[0093] At 1000, the first host device 304 determines whether the first host PCB 300 is initialized so that the in-band transmission link 350 can be trained. If so, operation 1002 is performed. In an embodiment, initialization includes one or more of the following: the processor 318 determines that the host device 304 and the optical module 308 are powered on, including the transceivers 314 and 360; and if not already set, the processor 318 sets the frequency and / or phase of the clock 325, which can be referred to as an initial reference clock.

[0094] At 1002, the processors 318, 338 train the in-band transmission link 350 via the transceivers 314, 360, the OOB interfaces 322, 342, and the OOB link 354. This includes sending one or more LT signals from the first host device 304 to the first optical module 308 via the in-band transmission link 350 and sending one or more OOB signals between the OOB interfaces 322, 342. In an embodiment, the LT includes i) the first host device 304 sending a request to the first optical module 308 via the OOB link 354 to adjust the settings of the transceiver 360, and / or ii) the first optical module 308 sending a request to the first host device 304 via the OOB link 354 to adjust the settings of the transceiver 314. These settings include transmitter and receiver settings, such as any settings referenced herein. In an embodiment, while performing operation 1002, the in-band receive link 351 is closed. In an embodiment, the LT signal sent on the in-band transmission link 350 is a non-return-to-zero (NRZ) signal with an embedded clock signal. The CDR 368 performs clock data recovery and synchronizes the clock 364 of the transceiver 360 to match the frequency of the embedded clock signal. The CFC 372 forwards the clock signal to the transceiver 334 to synchronize the clock 358. Training of the in-band transmission link 350 includes synchronizing the clock 325 of the host device with one or more clocks (e.g., clocks 364, 358) of the optical module 308. In an embodiment, upon completion of operation 1002, the clocks 325, 364 are synchronized. In another embodiment and upon completion of operation 1002, the clocks 325, 358, 364 are synchronized.

[0095] In 1004, the processor 338 determines whether the LT of the in-band transmission link 350 is completed. If so, it performs operation 1006, otherwise it continues with operation 1002.

[0096] At 1006, the clock 358 of the optical transceiver 334 is synchronized with the clock 364 of the electrical transceiver 360. In an embodiment, when the clock 358 is already synchronized or when the optical module 308 does not include the clock 358, operation 1006 is not performed.

[0097] In 1008, the optical transceiver 334 transmits a wake-up signal to the optical transceiver 336 via the first optical link 356, which in an embodiment is an idle signal. In an embodiment, the processor 338 and / or the DSP chip 330 instructs the optical transceiver 334 to generate the wake-up signal and / or the optical transceiver 334 transmits the wake-up signal in response to the clock 358 being synchronized. The transmission of the wake-up signal is completed to indicate to the second host PCB 302 that the first host PCB 300 has started and is waiting to train the in-band receive link (e.g., links 351, 352). The transmission of the wake-up signal is also performed to maintain the first optical module 308 in an active and wait state until the second optical module 310 responds. This prevents the first optical module 308 from timing out and restarting, which helps prevent race conditions.

[0098] At 1010, the processor 338 and / or the DSP chip 330 determines whether i) another wake-up signal is received from the second optical module 310, and / or ii) a response to the wake-up signal generated by the first optical module 308 has been received from the second optical module 310. If yes, operation 1012 is performed, otherwise operation 1008 is performed.

[0099] At 1012, the processors 318, 338 train the in-band receive link 351 via the transceivers 314, 360, the OOB interfaces 322, 342, and the OOB link 354. This includes sending one or more LT signals from the first optical module 308 to the first host device 304 via the in-band receive link 351 and sending one or more OOB signals between the OOB interfaces 322, 342. In an embodiment, the LT includes i) the first host device 304 sending a request to the first optical module 308 via the OOB link 354 to adjust the settings of the transceiver 360, and / or ii) the first optical module 308 sending a request to the first host device 304 via the OOB link 354 to adjust the settings of the transceiver 314. These settings include any settings referenced herein. In an embodiment, the training of the in-band receive link 351 is done independently of and / or without sending signals on the in-band transmit link 350.

[0100] In the above method, the transmission of the LT training signal of the in-band transmission link 350 enables i) the optical link 356 and the signals thereon to have the same clock frequency as the LT signal, and the LT signal sent on the in-band receiving link 352 has the same clock frequency as the optical link 356 and the signals sent thereon. Links 350, 356, 352 refer to a first signal path between host devices 304, 306. Similarly, the transmission of the LT training signal of the in-band transmission link 353 enables i) the optical link 357 and the signals thereon to have the same frequency as the LT signal, and the LT signal sent on the in-band receiving link 351 has the same clock frequency as the optical link 357 and the signals sent thereon. Links 351, 357, 353 refer to a second signal path between host devices 304, 306. In an embodiment, the clock frequency of the second signal path is the same clock frequency as the first signal path. In another embodiment, the clock frequency of the second signal path is at the same nominal frequency as the first signal path (e.g., the frequency of the first signal path is slightly different, up to ± 100 parts per million (ppm)). In clock forwarding mode, link 356 does not start until link 350 starts. Link 352 does not start until link 356 starts. Similarly, link 357 does not start until link 353 starts. Link 351 does not start until link 357 starts.

[0101] In an embodiment, after the in-band transmission link 350 is trained, a first reference clock signal is sent to the second optical module 310. The first reference clock signal is forwarded to the transceivers 366 and 316. Then, the first optical module 308 waits for a second reference clock signal from the second optical module 310. After receiving the second reference clock signal, the first optical module 308 starts training the in-band reception link 351.

[0102] Fig.11 Shown includes Figure 3 The host PCB 302 implements the LT method of operation.

[0103] At 1100, the second host device 306 determines whether the second host PCB 302 is initialized so that the in-band transmission link 353 can be trained. If so, operation 1102 is performed. In an embodiment, initialization includes one or more of the following: the processor 320 determines that the host device 306 and the optical module 310 are powered on, including the transceivers 316 and 362; and if not already set, the processor 320 sets the frequency and / or phase of the clock 326, which can be referred to as an initial reference clock.

[0104] At 1102, the processors 320, 340 train the in-band transmission link 353 via the transceivers 316, 362, the OOB interfaces 324, 344, and the OOB link 355. This includes sending one or more LT signals from the second host device 306 to the second optical module 310 via the in-band transmission link 353 and sending one or more OOB signals between the OOB interfaces 324, 344. In an embodiment, the LT includes i) the second host device 306 sending a request to the second optical module 310 via the OOB link 355 to adjust the settings of the transceiver 362, and / or ii) the second optical module 310 sending a request to the second host device 306 via the OOB link 355 to adjust the settings of the transceiver 316. These settings include transmitter and receiver settings, such as any settings referenced herein. In an embodiment, while performing operation 1102, the in-band receive link 352 is closed. In an embodiment, the LT signal sent on the in-band transmission link 353 is a non-return-to-zero (NRZ) signal with an embedded clock signal. The CDR 370 performs clock data recovery and synchronizes the clock 366 of the transceiver 362 to match the frequency of the embedded clock signal. The CFC 374 forwards the clock signal to the transceiver 336 to synchronize the clock 359. Training of the in-band transmission link 353 includes synchronizing the clock 326 of the host device 306 with one or more clocks (e.g., clocks 366, 359) of the optical module 310. In an embodiment, upon completion of operation 1102, the clocks 326, 366 are synchronized. In another embodiment and upon completion of operation 1102, the clocks 326, 359, 366 are synchronized.

[0105] At 1104, the processor 340 determines whether the LT of the in-band transmission link 353 is completed. If so, it performs operation 1106, otherwise it continues with operation 1102.

[0106] At 1106, the clock 359 of the optical transceiver 336 is synchronized with the clock 364 of the electrical transceiver 362. In an embodiment, when the clock 359 is already synchronized or when the optical module 310 does not include the clock 359, operation 1106 is not performed.

[0107] At 1108, the optical transceiver 336 transmits a wake-up signal to the optical transceiver 334 via the second optical link 357, which in an embodiment is an idle signal. In an embodiment, the processor 340 and / or the DSP chip 332 instructs the optical transceiver 336 to generate the wake-up signal and / or the optical transceiver 336 transmits the wake-up signal in response to the clock 359 being synchronized. The transmission of the wake-up signal is completed to indicate to the first host PCB 300 that the second host PCB 302 has started and is waiting to train the in-band receive link (e.g., links 351, 352). The transmission of the wake-up signal is also performed to maintain the second optical module 310 in an active and wait state until the first optical module 308 responds. This prevents the second optical module 310 from timing out and restarting, which helps prevent race conditions.

[0108] At 1110, the processor 340 and / or the DSP chip 332 determines whether i) another wake-up signal is received from the first optical module 308, and / or ii) a response to the wake-up signal generated by the second optical module 310 has been received from the first optical module 308. If yes, operation 1112 is performed, otherwise operation 1108 is performed.

[0109] At 1112, the processors 320, 340 train the in-band receive link 352 via the transceivers 316, 362, the OOB interfaces 324, 344, and the OOB link 355. This includes sending one or more LT signals from the second optical module 310 to the second host device 306 via the in-band receive link 352 and sending one or more OOB signals between the OOB interfaces 324, 344. In an embodiment, the LT includes i) the second host device 306 sending a request to the second optical module 310 via the OOB link 355 to adjust the settings of the transceiver 362, and / or ii) the second optical module 310 sending a request to the second host device 306 via the OOB link 355 to adjust the settings of the transceiver 316. These settings include any settings referenced herein. In an embodiment, the training of the in-band receive link 352 is done independently of and / or without sending signals on the in-band transmit link 353.

[0110] In an embodiment, after the in-band transmission link 353 is trained, a first reference clock signal is sent to the first optical module 308. The first reference clock signal is forwarded to the transceivers 360 and 314. Then, the second optical module 310 waits for a second reference clock signal from the first optical module 308. After receiving the second reference clock signal, the second optical module 310 starts training the in-band reception link 352.

[0111] The above example includes providing LT requests, such as update requests, via an OOB link that decouples the in-band transmit and receive link pairs of the host PCB. Each direction (host device to optical module and optical module to host device) is handled by an independent process. A restart in the direction of the host device to the optical module does not cause a restart in the direction of the optical module to the host device, and vice versa.

[0112] At a plug-in event (i.e., the host PCB is turned on and initialized), the disclosed example includes launching LT in the direction of the host device to the optical module, rather than in the direction of the optical module to the host device. In an embodiment, after the LT in the direction of the host device to the optical module is completed, the LT in the direction of the optical module to the host device is then implemented. After the host device to the optical module LT of the host PCB is completed, the optical module of the host PCB starts and continues to send idle signals until a response to one of the idle signals is received. This will maintain the host PCB in a startup, active and waiting state. The idle signal propagates to the optical module on the opposite side of the other host PCB through the optical link of the optical cable. The optical module at each end of the optical cable performs this function and keeps its exit path started when the corresponding entry path is closed. Each optical module in the optical module waits for the corresponding LRX to appear, which eventually occurs after the host device to the optical module LT is performed at each host PCB. When the LRX of the optical module is started, a stable LRX clock signal is received at the optical module and forwarded to the corresponding HTX of the optical module. At this point, the optical module is ready to perform the optical module to host device (TxMod to RxHost) training of the corresponding in-band receive link. This occurs at each of the optical modules in the host PCB.

[0113] The above example ensures that i) the link including the electrical link and the optical link from the first host device to the second host device operates at the same frequency, and ii) the link including the electrical link and the optical link from the second host device to the first host device operates at the same frequency. This ensures that there are no timing issues in the transmission and reception of data between the host devices. Timing issues may cause data delays and / or loss.

[0114] It should be noted that one or more steps within the method may be performed in a different order (or concurrently) without changing the principles of the present disclosure. Further, although each of the embodiments is described above as having certain features, any one or more of those features described with respect to any embodiment of the present disclosure may be implemented in and / or combined with the features of any other embodiment, even if the combination is not explicitly described. In other words, the described embodiments are not mutually exclusive, and the permutation of one or more embodiments with each other is still within the scope of the present disclosure. Moreover, as used herein, the phrase at least one of A, B, and C should use non-exclusive logic or be interpreted as representing logic (A or B or C), and should not be interpreted as representing "at least one of A, at least one of B, and at least one of C".

Claims

1. A first optical module, comprising: an optical transceiver configured to i) wait for a second optical module to appear after link training of an in-band transmission link between the first optical module and a host device is completed, including sending a first wake-up signal from the first optical module to the second optical module, the second optical module being started upon power-on and being in a state to send a second wake-up signal to the first optical module, and ii) receive the second wake-up signal from the second optical module when the second optical module is started; as well as A digital signal processing chip is configured to i) perform the link training of the in-band transmission link independently of the in-band reception link between the first optical module and the host device based on a first out-of-band signal sent via the out-of-band link between the first optical module and the host device, and ii) perform the link training of the in-band reception link between the first optical module and the host device independently of the in-band transmission link based on the second wake-up signal and a second out-of-band signal sent via the out-of-band link, wherein the first out-of-band signal and the second out-of-band signal are control signals for testing the in-band transmission link and the in-band reception link.

2. The first optical module of claim 1, wherein the optical transceiver is configured to, after completing link training of the in-band transmission link, continue to send an idle signal to the second optical module until the second wake-up signal is received.

3. The first optical module according to claim 1, wherein the digital signal processing chip is configured to i) receive an LT signal from the host device during link training of the in-band transmission link, and ii) synchronize a clock of the first optical module with the clock signal embedded in the LT signal based on the clock signal embedded in the LT signal.

4. The first optical module of claim 3, further comprising a processor configured to send the first out-of-band signal to the host device to adjust a parameter of a transceiver of the host device during link training of the in-band transmission link, The digital signal processing chip is configured to receive the LT signal based on the adjusted parameters of the transceiver of the host device. 5 . The first optical module of claim 1 , wherein the digital signal processing chip comprises a transceiver and is configured to: receive the first out-of-band signal from the host device and adjust parameters of the transceiver based on the first out-of-band signal. 6 . The first optical module according to claim 5 , wherein the digital signal processing chip is configured to receive a LT signal from the host device after adjusting the parameter of the transceiver.

7. The first optical module of claim 1 , wherein the digital signal processing chip comprises a transceiver and is configured to: send an LT signal to the host device during link training of the in-band receive link, and based on the LT signal, receive the second out-of-band signal from the host device to adjust parameters of the transceiver.

8. The first optical module according to claim 1, wherein the digital signal processing chip includes a transceiver and is configured to: receive the second out-of-band signal from the host device to adjust parameters of the transceiver, adjust the parameters, and send an LT signal to the host device to train the in-band receiving link.

9. The first optical module according to claim 1, wherein the digital signal processing chip is configured to: send the second out-of-band signal to the host device to adjust the parameters of the transceiver of the host device, and after adjusting the parameters of the transceiver of the host device, send an LT signal to the host device to train the in-band receiving link. 10 . The first optical module of claim 1 , wherein the optical transceiver is configured to i) receive the second wake-up signal in response to the first wake-up signal, or ii) receive the second wake-up signal independently of the first wake-up signal.

11. The first optical module of claim 1 , wherein the optical transceiver is configured to i) wait for the second optical module to appear after link training of the in-band transmission link between the first optical module and the host device is completed, including sending the first wake-up signal from the first optical module to the second optical module via the first optical link, and ii) receive the second wake-up signal from the second optical module via the second optical link when the second optical module is started.

12. The first optical module of claim 1, wherein the optical transceiver is configured as: after independently training the in-band transmission link, forwarding a first reference clock signal to the second optical module; Waiting for a second reference clock signal from the second optical module; as well as After receiving the second reference clock signal, training of the in-band receive link begins.

13. A link training method, comprising: performing link training of an in-band transmission link between the first optical module and the host device independently of an in-band reception link between the first optical module and the host device based on a first out-of-band signal sent via an out-of-band link between the first optical module and the host device, the first out-of-band signal being a control signal for testing the in-band transmission link; After the link training of the in-band transmission link between the first optical module and the host device is completed, waiting at the first optical module for a second optical module to appear, including sending a first wake-up signal from the first optical module to the second optical module, the second optical module being started at power-on and being in a state of sending a second wake-up signal to the first optical module; When the second optical module is started, receiving the second wake-up signal from the second optical module at the optical transceiver of the first optical module; as well as Link training of the in-band reception link is performed independently of the in-band transmission link based on the second wake-up signal and a second out-band signal sent via the out-band link, the second out-band signal being a control signal for testing the in-band reception link.

14. The method according to claim 13, further comprising: After link training of the in-band transmission link is completed, an idle signal is sent from the optical transceiver of the first optical module to the second optical module until the second wake-up signal is received at the first optical module.

15. The method according to claim 13, further comprising: receiving an LT signal from the host device during link training of the in-band transmission link by the first optical module; as well as Based on the clock signal embedded in the LT signal, the clock of the first optical module is synchronized with the clock signal embedded in the LT signal.

16. The method according to claim 15, further comprising: During link training of the in-band transmission link, sending the first out-of-band signal from the first optical module to the host device to adjust a parameter of a transceiver of the host device; as well as The LT signal is received at the first optical module based on the adjusted parameter of the transceiver of the host device.

17. The method according to claim 13, further comprising: receiving, at the first optical module, the first out-of-band signal from the host device; as well as A parameter of a transceiver of the first optical module is adjusted based on the first out-of-band signal.

18. The method according to claim 17, further comprising: After adjusting the parameters of the transceiver, an LT signal is received at the first optical module from the host device.

19. The method according to claim 13, further comprising: sending an LT signal from the first optical module to the host device during link training of the in-band receive link; as well as The second out-of-band signal is received from the host device at the transceiver of the first optical module based on the LT signal to adjust a parameter of the transceiver.

20. The method of claim 13, further comprising: receiving, at the first optical module, the second out-of-band signal from the host device to adjust a parameter of a transceiver of the first optical module; adjusting the parameters; as well as An LT signal is sent from the first optical module to the host device to train the in-band receive link.

21. The method of claim 13, further comprising: sending the second out-of-band signal from the first optical module to the host device to adjust a parameter of a transceiver of the host device; as well as After adjusting the parameters of the transceiver of the host device, an LT signal is sent from the first optical module to the host device to train the in-band receive link. 22 . The method of claim 13 , further comprising, via the optical transceiver, receiving the second wake-up signal in response to the first wake-up signal or receiving the second wake-up signal independently of the first wake-up signal.

23. The method of claim 13, further comprising: waiting, via the optical transceiver and after link training of the in-band transmission link between the first optical module and the host device is completed, for the second optical module to be present, including sending the first wake-up signal from the first optical module to the second optical module via the first optical link; as well as When the second optical module is started, the second wake-up signal from the second optical module is received at the optical transceiver via a second optical link.

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