In-memory computing device, method, and electronic device

Abstract

The present application provides an in-memory computing device, method and electronic device, which relate to the field of in-memory computing. The in-memory computing device disclosed in the present application includes at least one storage computing block, which includes a connected storage computing module and an activation module; the storage computing module includes a first computing unit and multiple storage computing units, and the storage computing units in the same storage computing module are all connected to the first computing unit; the activation module includes multiple activation units, and the activation unit includes an activation function. The first computing unit is connected to the activation unit, and the activation function is used to perform an activation operation on the operation result output by the first computing unit to obtain the result value of the in-memory computing device. The in-memory computing device of the present application can directly complete the activation function function after the operation result of the in-memory calculation is generated, which can effectively reduce the delay and power consumption when processing neural network tasks.

Description

Technical Field

[0001] The present application relates to the field of in-memory computing, and in particular to an in-memory computing device, method, and electronic device. Background Art

[0002] In traditional computing architecture, a computer consists of a processor and memory. The processor performs computations, while the memory stores data. When processing data, the computer needs to retrieve data from the memory, pass it to the processor for computation, and then store the resulting data back in the memory. Consequently, data needs to be frequently transferred between the processor and memory, increasing processing time and the computer's computing power. Summary of the Invention

[0003] In view of this, the present application provides an in-memory computing device, method and electronic device, the main purpose of which is to reduce the delay and power consumption when executing neural network tasks.

[0004] To achieve the above-mentioned object, the present application discloses, in a first aspect, an in-memory computing device, comprising at least one memory computing block, wherein the memory computing block comprises a connected memory computing module and an activation module;

[0005] The storage and calculation module includes a first calculation unit and multiple storage and calculation units, and the storage and calculation units in the same storage and calculation module are all connected to the first calculation unit;

[0006] The activation module includes multiple activation units, each of which includes an activation function. The first operation unit is connected to the activation unit, and the activation function is used to perform an activation operation on the operation result output by the first operation unit to obtain a result value of the in-memory computing device.

[0007] In some embodiments, each of the storage and calculation modules is connected to a corresponding activation unit, and the first operation unit is connected to the activation unit one-to-one.

[0008] In some embodiments, in different storage and computing modules, adjacent storage and computing units are connected.

[0009] In some embodiments, the result value includes a first result value and a second result value;

[0010] The activation function is used to identify the identification value in the identification bit of the operation result. When the identification value meets the first condition, the activation function is used to perform a first activation operation on the operation result to obtain the first result value; when the identification value meets the second condition, the activation function is used to perform a second activation operation on the operation result to obtain the second result value.

[0011] In some embodiments, the flag bit includes the most significant bit of the operation result.

[0012] In some embodiments, the first condition includes the identification value being 1, and the first activation operation is setting the operation result to 0;

[0013] The second condition includes that the identification value is 0, and the second activation operation is to set the operation result to the result value of the activation operation.

[0014] In some embodiments, the storage and computing unit stores stored data, and the storage and computing unit is used to determine the product result of the stored data and the input data after obtaining the input data. The first computing unit is used to accumulate the product results output by multiple storage and computing units to obtain the computing result.

[0015] In some embodiments, the device further includes: an input driver module, a word line driver module, a bit line driver module, and a row decoder;

[0016] The input driving module is connected to the storage and calculation unit, and the input driving module is used to input the input data to the storage and calculation unit;

[0017] The word line driving module is connected to the storage and calculation unit, and the word line driving module is used to enable at least one of the storage and calculation units when receiving a control signal;

[0018] The bit line driving module is connected to the storage and calculation unit, and the bit line driving module is used to write the stored data into the storage and calculation unit;

[0019] The row decoder is connected to the word line driver and is used to convert the address signal of the storage and calculation unit into the control signal.

[0020] A second aspect of the present application discloses an in-memory computing method, comprising:

[0021] Calling a target storage and computing block according to the received control signal, wherein the target storage and computing block is a storage and computing module corresponding to the instruction sequence of the control signal;

[0022] inputting input data into the target storage and calculation unit in the target storage and calculation module according to the control signal;

[0023] The result values ​​obtained by the target storage calculation module and the target activation module are obtained respectively, and the target activation module is used to perform activation operation on the operation result output by the target storage calculation module.

[0024] In a third aspect of the present application, an embodiment provides an electronic device, including:

[0025] At least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to execute any one of the methods disclosed in the second aspect.

[0026] In a fourth aspect of the present application, an embodiment provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, any one of the methods disclosed in the second aspect is implemented.

[0027] In summary, according to the technical solution disclosed in the present application, the in-memory computing device disclosed in the present application is composed of a storage computing module and an activation module. When performing a neural network task, the in-memory module performs data calculation and obtains the calculation result. The in-memory module is directly connected to the activation module, and the activation module directly performs activation operation on the calculation result, so that the result of the in-memory calculation can directly complete the activation function function, without the need for data transmission after the in-memory calculation, which can effectively reduce the delay and power consumption when processing neural network tasks.

[0028] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0030] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0031] Figure 1 The structure of an in-memory computing device provided by an embodiment of the present application is shown. Figure 1 ;

[0032] Figure 2 The structure of an in-memory computing device provided by an embodiment of the present application is shown. Figure 2 ;

[0033] Figure 3 A flow chart of an in-memory computing method provided in an embodiment of the present application is shown. DETAILED DESCRIPTION

[0034] In order to better understand the technical solutions provided by the embodiments of this specification, the technical solutions of the embodiments of this specification are described in detail below through the accompanying drawings and specific embodiments. It should be understood that the embodiments of this specification and the specific features in the embodiments are detailed descriptions of the technical solutions of the embodiments of this specification, rather than limitations on the technical solutions of this specification. In the absence of conflict, the embodiments of this specification and the technical features in the embodiments can be combined with each other.

[0035] In this article, relational terms such as first and second are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply the existence of any such actual relationship or order between these entities or operations. Moreover, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or equipment comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also include elements inherent to such process, method, article or equipment. In the absence of further restrictions, the elements defined by the statement "comprising a ..." do not exclude the presence of other identical elements in the process, method, article or equipment comprising the elements. The term "two or more" includes two or more than two cases.

[0036] In traditional computing architecture, a computer includes a processor and memory. The processor is used to perform data calculations, and the memory is used to store data. When performing data processing, the computer needs to obtain data from the memory, transmit it to the processor for data calculation, and then store the calculated data back into the memory. For example, during neural network calculations, when performing forward propagation calculations in the processor, the input values ​​are calculated in the neurons of the input layer, the calculation results are obtained, and the calculation results are stored in the memory. When using the activation function to convert the calculation results, the processor extracts the calculation results from the memory, further uses the activation function to convert the calculation results, and obtains the final result value. Because the numerical values ​​in the general neural network calculation process are relatively large, the frequent transmission between the processor and the memory increases the time required for data processing and increases the computing power consumption of the computer.

[0037] Figure 1 The structure of an in-memory computing device provided by an embodiment of the present application is shown. Figure 1 .like Figure 1As shown, the present application provides an in-memory computing device, including at least one storage computing block 11, the storage computing block includes a connected storage computing module 12 and an activation module 13; the storage computing module 12 includes a first computing unit 121 and multiple storage computing units 122, and the storage computing units in the same storage computing module are all connected to the first computing unit; the activation module 13 includes multiple activation units 131, the activation unit 131 includes an activation function, the first computing unit 121 is connected to the activation unit 131, and the activation function is used to perform an activation operation on the operation result output by the first computing unit 121 to obtain the result value of the in-memory computing device.

[0038] This embodiment designs an in-memory computing device. This in-memory computing device is a novel computing architecture designed to integrate data processing and storage functions in the same physical location. Specifically, the computing and storage block can perform both computation and data storage. The computing and storage block of the in-memory computing device primarily comprises interconnected computing and activation modules, which are used to execute neural network tasks.

[0039] The storage calculation module performs in-memory calculations on input values ​​when performing neural network tasks. The in-memory module includes a first operation unit and multiple storage calculation units. The multiple storage calculation units perform operations as each neuron in the neural network task. The first operation unit is used to simultaneously connect multiple storage calculation units to perform comprehensive operations on the results calculated by each storage calculation unit, and the result obtained by the operation is used as the operation result of the storage calculation unit. The storage calculation device proposed in this embodiment can directly input the calculation result into the activation unit for activation operation after the storage calculation unit calculates the calculation result, without inputting the calculation result into the memory, and can further perform the activation operation after performing the storage and retrieval operations. The in-memory calculation device of this embodiment can perform neural network tasks without the participation of memory, and can effectively reduce the delay and power consumption when processing neural network tasks.

[0040] In some embodiments, the storage and calculation unit stores stored data, and the storage and calculation unit is used to determine the product result of the stored data and the input data after obtaining the input data. The first calculation unit is used to accumulate the product results output by multiple storage and calculation units to obtain the calculation result.

[0041] Each storage unit can function as a storage unit, storing stored data within it and further performing calculations. After receiving an input value, the unit can perform a calculation based on the input value and its stored data. For example, the unit can perform a product calculation of the input value and the stored data, with the product calculation result being the calculation result of the unit itself.

[0042] The first operation unit is connected to multiple storage and calculation units. After each storage and calculation unit obtains a calculation result, the first operation unit obtains the calculation results of each connected operation unit and performs a comprehensive calculation. Exemplarily, the first operation unit can be an addition tree, which accumulates the obtained calculation results, and the obtained accumulated value serves as the calculation result of the addition tree.

[0043] In some embodiments, the result value includes a first result value and a second result value;

[0044] The activation function is used to identify the identification value in the identification bit of the operation result. If the identification value meets the first condition, the activation function is used to perform a first activation operation on the operation result to obtain a first result value; if the identification value meets the second condition, the activation function is used to perform a second activation operation on the operation result to obtain a second result value.

[0045] After the storage module outputs the calculation result, the activation unit is used to perform an activation operation on the calculation result using an activation function. The activation unit in this embodiment can perform at least two activation operations on the calculation result. The first activation operation can directly output the calculation result output by the storage module, and the second operation result can set the calculation result output by the storage module to 0. Exemplarily, the activation function included in the activation unit can be a rectified linear unit (ReLU) function. The activation operation performed can effectively solve the gradient vanishing problem, accelerate model training, and improve model sparsity and accuracy.

[0046] The activation unit is subject to certain judgment conditions when determining whether to execute the first activation operation or the second operation result. When the first condition is met, the first activation operation is executed, and when the second condition is met, the second operation result is executed, so that the activation unit can select the appropriate activation operation type based on the operation result of the storage and calculation module. In this embodiment, the activation unit selects the activation operation by identifying the value of the operation result flag bit, so as to reasonably select the activation operation type. In some embodiments, the flag bit includes the highest bit of the operation result.

[0047] In the process of judging the value in the identification bit, in some embodiments, the first condition includes the identification value being 1, and the first activation operation is to set the operation result to 0; the second condition includes the identification value being 0, and the second activation operation is to set the operation result as the result value of the activation operation.

[0048] The activation unit can complete multiple types of activation operations by judging the value of the flag bit.

[0049] In some embodiments, each storage and calculation module is connected to a corresponding activation unit, and the first calculation unit is connected one-to-one with the activation unit.

[0050] like Figure 1 As shown, there is a one-to-one correspondence between the storage and calculation module 12 and the activation unit 131. The calculation results obtained by each storage and calculation unit 122 can be directly input into the corresponding activation unit 131 for activation operation, ensuring the orderly execution of the in-memory calculation in the storage and calculation block 11.

[0051] Figure 2 The structure of an in-memory computing device provided by an embodiment of the present application is shown. Figure 2 For example, Figure 2 As shown, in the same storage computing block, multiple storage computing units 122 are included. When performing neural network tasks, the storage computing units correspond to multi-level neurons in the neural network structure. Therefore, in each storage computing block, each storage computing unit is set with a level value. The input value can pass through the storage computing unit to perform multi-level operations. Each storage computing unit is sorted according to the level value, which can ensure that after the input value is input into the storage computing block, the input value can be quickly calculated through the storage computing unit in sequence.

[0052] In some embodiments, each storage and calculation block includes storage and calculation units with multiple levels of values, and the storage and calculation units are arranged according to the level value. The level value of the storage and calculation unit can be used to represent the priority of the storage and calculation unit when performing calculations. The calculation result of the high-level value storage and calculation unit can be used as the weighted value of the data stored in the low-level value storage and calculation unit. For example, Figure 2 As shown, the multiple storage and calculation units 122 included in the storage and calculation module 12 are set to different levels: level 1, level 2, level 3 and level 4. The calculation priority of the storage and calculation unit 122 at level 1 is the highest, and the calculation priority of the storage and calculation unit 122 at level 4 is the lowest. The storage and calculation units 122 can be controlled to start calculation in sequence according to the priorities of the storage and calculation units 122 at level 1, the storage and calculation units 122 at level 2, the storage and calculation units 122 at level 3 and the storage and calculation units 122 at level 4.

[0053] In some embodiments, adjacent storage and computing units in different storage and computing modules are connected.

[0054] In adjacent storage and calculation modules, storage and calculation units of the same level value are connected.

[0055] In the case of a large number of input values, in order to realize parallel operation of input values, such as Figure 2 As shown, the in-memory computing device of this embodiment includes multiple memory computing blocks, and the memory computing units of the same level value in each memory computing block are connected. To improve efficiency, input values ​​can be input to different memory computing units of the same level for separate calculations, which can effectively reduce the execution time of neural network tasks.

[0056] In some embodiments, an in-memory computing device, such as Figure 2 As shown, it also includes: an input driver module 21, a word line driver module 22, a bit line driver module 23 and a row decoder 24; the input driver module 21 is connected to the storage and calculation unit 122, and the input driver module is used to input input data to the storage and calculation unit; the word line driver module 22 is connected to the storage and calculation unit 122, and the word line driver module is used to enable at least one storage and calculation unit when receiving a control signal; the bit line driver module 23 is connected to the storage and calculation unit 122, and the bit line driver module is used to write stored data to the storage and calculation unit; the row decoder 24 is connected to the word line driver module 22, and is used to convert the address signal of the storage and calculation unit into a control signal.

[0057] This embodiment further describes other relevant components of the in-memory computing device. The in-memory computing device also includes an input driver module, a wordline driver module, a bitline driver module, and a row decoder to support the in-memory computing module and the activation module in performing in-memory computing. Specifically, the input driver module 21, wordline driver module 22, bitline driver module 23, and row decoder 24 receive timing control from a clock 25.

[0058] The present application embodiment discloses an in-memory computing method, which is applied to an in-memory computing device, such as Figure 3 The flowchart of an in-memory computing method shown includes:

[0059] Step 301: Call the target storage and computing block according to the received control signal. The target storage and computing block is the storage and computing module corresponding to the instruction sequence of the control signal.

[0060] Step 302: Input data to the storage unit in the target storage module according to the control signal;

[0061] Step 303: Obtain the result values ​​obtained by the target storage calculation module and the target activation module respectively. The target activation module is used to perform activation operation on the operation result output by the target storage calculation module.

[0062] During the application of the in-memory calculation method, the storage unit in the storage calculation module stores stored data, and the target storage calculation block is called according to the control signal, so that the storage calculation module and the activation module in the target storage calculation block are in an activated state. Input data is input into the storage calculation unit in the target storage calculation module, and the storage calculation unit performs calculations based on the input data and the stored data, and performs a comprehensive operation on the result values ​​obtained by the calculations of multiple storage calculation units through the first operation unit, and the result of the comprehensive operation is used as the operation result of the target storage calculation module. After the target activation module obtains the operation result from the target storage calculation module, it directly performs the activation operation. The target activation module can directly complete the activation function without the need for repeated data transmission by external devices, which can effectively reduce the delay and power consumption of the in-memory computing device when processing neural network tasks.

[0063] Based on the above Figure 3 The method shown, and Figure 1 、 Figure 2 The in-memory computing device shown, an embodiment of the present application also provides an electronic device, which includes the in-memory computing device described in the above embodiment.

[0064] Based on the above Figure 3 In addition to the method shown, an embodiment of the present application further provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the in-memory computing method corresponding to any embodiment is implemented.

[0065] It should be noted that, in the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant description of other embodiments.

[0066] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware. Furthermore, the present application may take the form of a computer program product implemented on one or more computer-readable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) containing computer-readable program code.

[0067] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded computer, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0068] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0069] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0070] An embodiment of the present application also provides a computer program product, which includes computer software instructions. When the computer software instructions are executed on a processing device, the processing device executes the process of the in-memory computing method.

[0071] A computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, they fully or partially produce the processes or functions according to the embodiments of the present application. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that can be stored by a computer, or a data storage device such as a server or data center that integrates one or more available media. Available media can include magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., DVDs), or semiconductor media (e.g., solid-state drives (SSDs)).

[0072] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0073] In the several embodiments provided in this application, it should be understood that the disclosed devices, apparatuses and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interface, device or unit, which can be electrical, mechanical or other forms.

[0074] Units described as separate components may or may not be physically separate, and components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0075] In addition, the functional units in the various embodiments of the present application may be integrated into a single processing unit, or each unit may exist physically separately, or two or more units may be integrated into a single unit. The aforementioned integrated units may be implemented in the form of hardware or software functional units.

[0076] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes a number of instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the various embodiments of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or optical disk, and other media that can store program code.

[0077] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.

[0078] Although the preferred embodiments of this specification have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concepts. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of this specification.

[0079] Obviously, those skilled in the art may make various changes and modifications to this specification without departing from the spirit and scope of this specification. Thus, if such changes and modifications fall within the scope of the claims of this specification and their equivalents, this specification is intended to include such changes and modifications.

Claims

1. An in-memory computing device, characterized in that: It includes at least one storage and calculation block, wherein the storage and calculation block includes a storage and calculation module and an activation module connected to each other; The storage and calculation module includes a first calculation unit and multiple storage and calculation units, and the storage and calculation units in the same storage and calculation module are all connected to the first calculation unit; The activation module includes a plurality of activation units, each of which includes an activation function. The first operation unit is connected to the activation unit, and the activation function is used to perform an activation operation on the operation result output by the first operation unit to obtain a result value of the in-memory computing device; Each of the storage and calculation modules is connected to one of the activation units, and the first calculation unit is connected to the activation unit in a one-to-one manner; The activation unit performs at least two activation operations on the operation result. The first activation operation directly outputs the operation result output by the storage and calculation module, and the second activation operation sets the operation result output by the storage and calculation module to 0. Each of the storage and computing blocks includes storage and computing units with multiple levels of values, and the storage and computing units are arranged according to the level values. The level values ​​of the storage and computing units are used to represent the priority of the storage and computing units when executing calculations, and the calculation results of the high-level value storage and computing units are used as the weighted values ​​of the data stored in the low-level value storage and computing units.

2. The in-memory computing device according to claim 1, wherein: In different storage and computing modules, adjacent storage and computing units are connected.

3. The in-memory computing device according to claim 1, wherein: The result value includes a first result value and a second result value; The activation function is used to identify the identification value in the identification bit of the operation result, and when the identification value meets the first condition, the activation function is used to perform a first activation operation on the operation result to obtain the first result value; When the identification value satisfies the second condition, the activation function is used to perform a second activation operation on the operation result to obtain the second result value.

4. The in-memory computing device according to claim 3, wherein: The flag bit includes the most significant bit of the operation result.

5. The in-memory computing device according to claim 4, wherein: The first condition includes that the identification value is 1, and the first activation operation is to set the operation result to 0; The second condition includes that the identification value is 0, and the second activation operation is to set the operation result to the result value of the activation operation.

6. The in-memory computing device according to claim 1, wherein: The storage and calculation unit stores stored data, and the storage and calculation unit is used to determine the product result of the stored data and the input data after obtaining the input data. The first calculation unit is used to accumulate the product results output by multiple storage and calculation units to obtain the calculation result.

7. The in-memory computing device according to claim 6, wherein: Also includes: Input driver module, word line driver module, bit line driver module and row decoder; The input driving module is connected to the storage and calculation unit, and the input driving module is used to input the input data to the storage and calculation unit; The word line driving module is connected to the storage and calculation unit, and the word line driving module is used to enable at least one of the storage and calculation units when receiving a control signal; The bit line driving module is connected to the storage and calculation unit, and the bit line driving module is used to write the stored data into the storage and calculation unit; The row decoder is connected to the word line driver and is used to convert the address signal of the storage and calculation unit into the control signal.

8. An in-memory computing method, characterized in that: An in-memory computing device as claimed in any one of claims 1 to 7, comprising: Calling a target storage and computing block according to the received control signal, wherein the target storage and computing block is a storage and computing module corresponding to the instruction sequence of the control signal; inputting input data into the target storage and calculation unit in the target storage and calculation module according to the control signal; The result values ​​obtained by the target storage calculation module and the target activation module are obtained respectively, and the target activation module is used to perform activation operation on the operation result output by the target storage calculation module.

9. An electronic device, characterized in that: include: An in-memory computing device as claimed in any one of claims 1 to 7.

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