Fraud detection method and system based on topology analysis and quantum graph neural network

Abstract

The invention relates to a fraud detection method and system based on topology analysis and a quantum graph neural network, and the method specifically comprises the steps: constructing a graph structure, enabling nodes in the graph structure to represent transaction entities, and enabling edges to represent the transaction relation between the entities; extracting a node feature vector; analyzing and processing the graph structure by utilizing topological data, and projecting nodes of the graph structure to a low-dimensional space to form a one-dimensional scatter diagram; clustering the scatter diagram nodes to form node features; mapping the clustering features to a quantum state through an angle coding technology, and generating quantum coded data; mapping the quantum coding data to a variable component sub-circuit, and extracting quantum features; and inputting the quantum features into a pooling layer and a linear layer of a neural network to generate a risk score. Therefore, according to the technical scheme, by combining the topology analysis and the quantum graph neural network, the fraud behavior can be identified more accurately, the fraud detection speed is increased, a new fraud mode can be continuously learned and identified, and the detection capability of the new type of fraud behavior is improved.

Description

Technical Field

[0001] The present application relates to the field of quantum computing and machine learning technology, and specifically discloses a fraud detection method and system based on topological analysis and quantum graph neural network. Background Art

[0002] With the advancement of the digital economy, the digital transformation of finance has brought many conveniences, but it has also provided new opportunities for financial fraud. From simple credit card fraud to complex identity impersonation and financial fraud, financial fraud methods are emerging in an endless stream, which not only damages the economic interests of individual users, but also seriously threatens the reputation and asset security of financial institutions.

[0003] In the existing technology, financial institutions use rule engines and machine learning models to build fraud detection systems. However, rule engines need to be frequently updated to adapt to ever-changing fraud methods and are inefficient when processing large-scale data. Machine learning models, such as decision trees and support vector machines, are often limited by the linear assumptions and local feature extraction of data when processing high-dimensional and strongly correlated financial data, and it is difficult to capture complex patterns and deep associations in the data. In addition, in financial transaction data, the interaction relationships between entities often exist in the form of graphs. Graph structure data contains rich information and is crucial to revealing the intrinsic connections of fraudulent behavior. However, existing fraud detection methods often ignore graph structure information or lack effective methods to analyze and utilize this information.

[0004] With the rise of quantum computing technology, quantum graph neural networks (QGNNs) provide a new way to process this type of graph-structured data. QGNNs use the advantages of quantum computing to efficiently process and analyze graph-structured data and capture complex relationships between entities, showing great potential in the field of fraud detection.

[0005] Therefore, the present invention aims to provide a fraud detection method and system based on topological analysis and quantum graph neural network to solve the above problems. By combining topological analysis and quantum graph neural network, the graph structure information in financial transaction data can be more efficiently processed and analyzed, the complex relationships between entities can be captured, and fraudulent behaviors can be more accurately identified. By utilizing the self-learning and adaptability of quantum graph neural network, new fraud patterns can be continuously learned and identified, and the ability to detect new types of fraudulent behaviors can be improved. The super-parallelism of quantum computing can be used to increase the speed of fraud detection. Summary of the invention

[0006] In order to address the deficiencies of the prior art, the present invention proposes a fraud detection method and system based on topological analysis and quantum graph neural network.

[0007] To achieve the above objectives, the technical solutions adopted by the present invention include:

[0008] A fraud detection method based on topological analysis and quantum graph neural network, characterized by comprising:

[0009] Constructing a graph structure, wherein the graph structure includes nodes and edges, wherein the nodes are entities in a transaction, and the edges are transaction relationships between entities;

[0010] Extracting a feature vector of the node;

[0011] Extracting topological features of nodes in the graph structure using a topological data analysis method, and projecting the nodes into a low-dimensional space based on the topological features to form a one-dimensional scatter plot;

[0012] Cluster the nodes in the scatter plot to obtain the node features after clustering;

[0013] The clustered node features are mapped into quantum states through angle encoding technology to generate quantum coded data;

[0014] Mapping the quantum coded data to a variational quantum circuit, wherein the variational quantum circuit has quantum bits, and the quantum bits correspond to the quantum coded data;

[0015] Processing the quantum coded data by the variational quantum circuit to extract quantum features;

[0016] The quantum features are input into the pooling layer and linear layer of the neural network to generate a risk score.

[0017] Further, using a topological data analysis method to extract topological features of nodes in the graph structure, and projecting the nodes into a low-dimensional space based on the topological features to form a one-dimensional scatter plot specifically includes:

[0018] Analyze the topological characteristics of the computing nodes through topological data;

[0019] Based on the topological features, a filtering function is constructed through a Mapper algorithm to project the nodes into a low-dimensional space to form a one-dimensional scatter plot.

[0020] Furthermore, the variational quantum circuit is specifically a multi-layer structure, each layer of the structure includes a revolving gate and a CNOT gate, and the angles of the revolving gate and the CNOT gate are adjusted to match the quantum coded data.

[0021] Furthermore, the method further comprises:

[0022] Based on the risk score, the continuous risk score is converted into a discrete category label by using an optimal threshold to achieve binary classification.

[0023] Furthermore, the method further comprises:

[0024] The neural network is trained using a cross entropy loss function.

[0025] Furthermore, the method further comprises:

[0026] The pooling layer is an average pooling layer, which combines the quantum features and then inputs them into the linear layer.

[0027] In addition, the present invention also relates to a fraud detection system based on topological analysis and quantum graph neural network, characterized in that it includes:

[0028] A graph structure building module, used to build a graph structure, wherein the graph structure includes nodes and edges, wherein the nodes represent entities in a transaction, and the edges represent transaction relationships between entities;

[0029] A feature extraction module, used to extract the feature vector of the node;

[0030] A topological analysis processing module, used to extract the topological features of the nodes in the graph structure using a topological data analysis method, and project the nodes into a low-dimensional space based on the topological features to form a one-dimensional scatter plot;

[0031] The clustering module is used to cluster the nodes in the scatter plot and obtain the node features after clustering;

[0032] The quantum coding module is used to map the clustered node features into quantum states through angle coding technology to generate quantum coded data;

[0033] A variational quantum circuit mapping module, used to map the quantum coded data to a variational quantum circuit, wherein the variational quantum circuit has quantum bits, and the quantum bits correspond to the quantum coded data;

[0034] A quantum feature extraction module, used to process the quantum coded data through the variational quantum circuit to extract quantum features;

[0035] The neural network processing module is used to input the quantum features into the pooling layer and the linear layer of the neural network to generate a risk score.

[0036] Furthermore, the topology analysis processing module is also used for:

[0037] Analyze the topological characteristics of the computing nodes through topological data;

[0038] Based on the topological features, a filtering function is constructed through a Mapper algorithm to project the nodes into a low-dimensional space to form a one-dimensional scatter plot.

[0039] In addition, the present invention also relates to an electronic device, characterized in that it comprises a processor and a memory;

[0040] The memory is used to store operation instructions;

[0041] The processor is used to execute the above method by calling the operation instruction.

[0042] In addition, the present invention also relates to a computer-readable storage medium, characterized in that a computer program is stored on the storage medium, and the computer program implements the above method when executed by a processor.

[0043] The present invention discloses a fraud detection method and system based on topological analysis and quantum graph neural network, including the following steps: constructing a graph structure, in which nodes represent transaction entities and edges represent transaction relationships between entities; extracting node feature vectors; using topological data analysis to process the graph structure and project its nodes into a low-dimensional space to form a one-dimensional scatter plot; clustering the scatter plot nodes to form node features; mapping the cluster features to quantum states through angle coding technology to generate quantum coded data; mapping the quantum coded data to variational quantum circuits and extracting quantum features; inputting the quantum features into the pooling layer and linear layer of the neural network to generate a risk score. Therefore, by combining topological analysis and quantum graph neural network, the technical solution can more deeply mine the complex features in the graph structure, thereby more accurately identifying fraudulent behavior, using the super-parallelism of quantum computing to improve the speed of fraud detection, and using the self-learning and adaptability of quantum graph neural network to continuously learn and identify new fraud patterns and improve the detection ability of new types of fraudulent behavior. BRIEF DESCRIPTION OF THE DRAWINGS

[0044] Figure 1 A schematic diagram of a process of a fraud detection method based on topological analysis and quantum graph neural network provided in an embodiment of the present application;

[0045] Figure 2 A schematic diagram of a variational quantum circuit design provided in an embodiment of the present application;

[0046] Figure 3 A schematic diagram of the structure of a fraud detection system based on topological analysis and quantum graph neural network provided in an embodiment of the present application;

[0047] Figure 4 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0048] The embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and cannot be interpreted as limiting the present invention.

[0049] Those skilled in the art can understand that, unless otherwise stated, the singular forms "one", "an", "said" and "the" used herein may also include plural forms, and the "first", "second", etc., are only used to distinguish and define objects for the purpose of introducing the scheme clearly, and do not limit the objects themselves. Of course, the objects defined by "first" and "second" may be the same terminal, device, user, etc., or the same type of terminal, device and user. It should be further understood that the term "comprising" used in the specification of the present application refers to the presence of the features, integers, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof. The term "and / or" used herein includes all or any unit and all combinations of one or more associated listed items.

[0050] The technical solution of the present application and how the technical solution of the present application solves the above-mentioned technical problems are described in detail below with specific embodiments. The following embodiments may be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments.

[0051] In the financial field, each transaction can be regarded as an entity, and the interactions between entities constitute the edges of the transaction network. Converting these transaction data into a graph structure is a key step in achieving effective fraud detection. Using graph theory methods to construct a graph model of financial transactions helps to reveal the complex relationships between transactions.

[0052] Therefore, this scheme proposes a fraud detection method based on topological analysis and quantum graph neural network, whose structure is as follows Figure 1 As shown, including:

[0053] S1. construct a graph structure, wherein the graph structure includes nodes and edges, wherein the nodes are entities in a transaction, and the edges are transaction relationships between entities, i.e., capital flows;

[0054] S2. Extract the feature vector x of the node i , the feature vector x of the node i This may include information such as transaction amount, timestamp, geographic location, etc.

[0055] S3. Calculating the topological characteristics of the nodes by topological data analysis, wherein the topological characteristics include at least one of degree centrality and clustering coefficient;

[0056] Based on the topological features, a filtering function is constructed by a Mapper algorithm to project the nodes into a low-dimensional space to form a one-dimensional scatter plot;

[0057] S4. Cluster the nodes in the scatter plot to obtain the node features after clustering;

[0058] Specifically, clustering is used to encapsulate initial features, minimize computing resource requirements, and help identify outliers and potential fraud patterns, where node features are used to represent the position attributes of each node on a one-dimensional scatter plot.

[0059] S5. The clustered node features are mapped to the quantum state through angle coding technology to generate quantum coded data;

[0060] Specifically, angle encoding is a method of mapping real values ​​to quantum states, which uses the superposition principle of quantum bits to represent data. For the jth eigenvector in the X eigenvector of i nodes, it is mapped to the angle θ ij :

[0061]

[0062] Further mapping to the quantum state |ψ i >, as shown below:

[0063]

[0064] Where d is the dimension of the feature vector, x ij is the i-th eigenvalue, θ ij is the corresponding phase angle.

[0065] S6. Mapping the quantum coded data to a variational quantum circuit, wherein the variational quantum circuit has a quantum bit, and the quantum bit corresponds to the quantum coded data;

[0066] Specifically, the schematic diagram of the variational quantum circuit design is as follows Figure 2 As shown, the variational quantum circuit has six quantum bits and a seven-layer structure. Each quantum bit represents a node in the graph structure, and the quantum bit corresponds to the quantum coded data.

[0067] The deep structural information of the graph is captured through the multi-layer structure of the circuit, where each layer can be regarded as an iteration of message passing on the graph. By increasing the number of layers, the circuit can capture more complex graph structure patterns.

[0068] Variational quantum circuits allow the characteristics of each node to be encoded and processed independently in quantum states, and multi-layer structures are designed to enhance node characteristics. Variational quantum circuits learn complex patterns in data by adjusting parameters.

[0069] Each layer of the variational quantum circuit includes rotation gates Ry and Rx gates and CNOT gates that match quantum encoded data by adjusting angle parameters, and by adjusting parameters to maximize the network's ability to identify fraudulent patterns.

[0070] S7. Processing the quantum coded data by the variational quantum circuit to extract quantum features;

[0071] Specifically, quantum features are extracted through variational quantum circuits. The quantum features contain deep information of graph structure data, including complex relationships and interaction patterns between nodes.

[0072] S8. Input the quantum features into the pooling layer and the linear layer of the neural network to generate a risk score.

[0073] Specifically, the neural network is pre-trained using a cross entropy loss function;

[0074] The pooling layer is an average pooling layer, which merges the quantum features and then inputs them into the linear layer, wherein the linear layer is a set of weight matrices used to map the input features to the output space. In the quantum graph neural network, the linear layer is used to convert the feature vector after average pooling into the final output, i.e., the risk score.

[0075] S9. Based on the risk score, convert the continuous risk score into a discrete category label by using an optimal threshold to achieve binary classification;

[0076] Specifically, the optimal threshold is achieved by analyzing the receiver operating characteristic (ROC) curve and the precision-recall (PR) curve. In the ROC curve, the optimal threshold usually corresponds to the point closest to the upper left corner of the curve, while in the PR curve, the optimal threshold maximizes the product of precision and recall.

[0077] If the risk score of a sample is greater than or equal to the optimal threshold, the sample is classified as the positive class (e.g., indicating fraudulent behavior); if the risk score is less than the threshold, it is classified as the negative class (e.g., indicating non-fraudulent behavior).

[0078] The following is another embodiment of a financial fraud detection method based on a quantum graph neural network, which uses a graph structure to represent financial transaction data for financial fraud detection, including the following steps:

[0079] Assume that a financial transaction network contains 1,000 accounts, each account is regarded as a node, and transactions between accounts are regarded as edges. Construct a weighted graph G = (V, E), where the vertex V = {v 1 ,v 2 ,…,c 1000}, representing 1000 account nodes, edge E = {(v i ,v j ,w ij )|v i ,v j ∈V} represents the transaction amount as the edge connecting vertex i and vertex j, where wij The transaction amount.

[0080] Assume account v 1 and v 2 There is a transaction of 1,000 yuan between them, so add an edge e to the graph. 12 =(v 1 ,v 2 ,1000).

[0081] Each node v i With the following characteristics: Account balance b i , transaction frequency f i (number of transactions in the past 30 days), average transaction amounta i .

[0082] Each edge e ij It has the following characteristics: transaction amount w ij , transaction timestamp t ij .

[0083] The topological features of the nodes in the graph structure are extracted using a topological data analysis method, and the nodes are projected into a low-dimensional space based on the topological features to form a one-dimensional scatter plot:

[0084] (1) Calculate the topological characteristics of each node, such as degree centrality (DC), betweenness centrality (BC), clustering coefficient (CC), and eigenvector centrality (EC). The formulas for degree centrality and clustering coefficient are shown below, where N i Yes i The set of neighbor nodes, E i is node v i The actual number of edges between neighbor nodes:

[0085] Degree Centrality:

[0086] Clustering coefficient:

[0087] (2) Construct a filter function through the Mapper algorithm to project high-dimensional topological data into a low-dimensional space:

[0088] f(v i )=w 1 DC(v i )+w 2 BC(v i )+w 3 CC(v i )+w 4 EC(v i )

[0089] (3) Perform clustering operations through data coverage and local clustering, such as clustering 1,000 account nodes into K nodes:

[0090] C k ←f(v i )

[0091] Map the features of the original nodes to the features of the clustered nodes, where N is the number of original account nodes, x i,j is the jth feature of account i:

[0092]

[0093] The node features are encoded into the quantum state using angle encoding technology. For node v i The y in the feature Y i , which is mapped to the angle θ i :

[0094]

[0095] Then θ i Encoded into the quantum state |ψ i >Medium:

[0096] |ψ i > = cos(θ i / 2)|0>+sin(θ i / 2)|1>

[0097] If y i =0.5, max(Y)=1, then:

[0098]

[0099] Design a variational quantum circuit (VQC) containing 6 qubits, each qubit represents a node feature in the graph. VQC contains 7 layers, and the structure of each layer is as follows:

[0100] 1.Rx(θ 1 ) gate acts on each quantum bit;

[0101] 2. CNOT gates connect adjacent qubits;

[0102] 3.Rx(θ 2 ) gate acts on each quantum bit;

[0103] 4.Ry(θ 3 ) gate acts on each quantum bit;

[0104] 5. CNOT gates connect adjacent qubits;

[0105] 6.Rx(θ4 ) gate acts on each quantum bit;

[0106] 7.Ry(θ 5 ) gate acts on each quantum bit;

[0107] Among them, θ 1 ,θ 2 ,θ 3 ,θ 4 ,θ 5 is a trainable parameter.

[0108] For the first qubit, the operation at the first level is:

[0109] |ψ 1 > = Rx(θ 1 )|ψ 1 > = cos(θ 1 / 2)|ψ 1 >-i sin((θ 1 / 2)X|ψ 1 >

[0110] Where X is the Pauli X matrix, the operation of the CNOT gate can be expressed as: in Represents the exclusive OR operation.

[0111] The quantum coded data is processed by the variational quantum circuit to extract quantum features:

[0112] The measurement results of the six qubits are processed to obtain a six-dimensional classical vector h = [h 1 ,h 2 ,…,h 6 ]. Among them, σ z is the Pauli Z matrix.

[0113] Use the weight matrix W and the bias vector b to map h to the two-dimensional output space: o = Wh + b. Where W is a 2x6 matrix and b is a 2D vector. The final output is:

[0114]

[0115] Based on the risk score, convert the continuous risk score into a discrete category label by using an optimal threshold to achieve binary classification;

[0116] Use the ROC curve to find the best classification threshold. For different thresholds t, calculate the true positive rate (TPR) and false positive rate (FPR):

[0117]

[0118] The t that maximizes TPR(t)-FPR(t) is selected as the optimal threshold.

[0119] Calculating Evaluation Metrics: Accuracy

[0120] Recall

[0121]

[0122] AUC-PR: Calculates the area under the Precision-Recall curve.

[0123] Example calculation:

[0124] Assume that the test set contains 100 samples, 20 of which are fraud cases. The prediction results of the model under the optimal threshold of 0.6 are as follows: TP=15, FP=5, TN=75, FN=5.

[0125] Accuracy = TP / (TP+FP) = 15 / (15+5) = 0.75 = 75%

[0126] Recall rate = TP / (TP+FN) = 15 / (15+5) = 0.75 = 75%

[0127] F1 score = 2*(precision*recall) / (precision+recall) = 2*(0.75*0.75) / (0.75+0.75) = 0.75 = 75%

[0128] The calculation of AUC-PR requires precision and recall values ​​at multiple thresholds. If the calculated AUC-PR = 0.80, it means that the model has good performance in distinguishing fraudulent and non-fraudulent cases. Assume that for a real fraud case (y = 1), the model predicts a probability of 0.8

[0129] The loss of a single sample = -(1*log(0.8)+(1-1)*log(1-0.8)) = -log(0.8)≈0.223.

[0130] Therefore, by combining topological analysis and quantum graph neural networks, this technical solution can more deeply explore the complex features in the graph structure, thereby more accurately identifying fraudulent behaviors, utilizing the super-parallelism of quantum computing to increase the speed of fraud detection, and utilizing the self-learning and adaptability of quantum graph neural networks to continuously learn and identify new fraud patterns and improve the ability to detect new types of fraudulent behaviors.

[0131] In addition, another aspect also relates to a fraud detection system based on topological analysis and quantum graph neural network, whose structure is as follows Figure 3 As shown, including:

[0132] A graph structure building module 301, used to build a graph structure, wherein the graph structure includes nodes and edges, wherein the nodes represent entities in a transaction, and the edges represent transaction relationships between entities;

[0133] A feature extraction module 302, used to extract a feature vector of the node;

[0134] A topological analysis processing module 303 is used to process the graph structure through topological data analysis and project it into a low-dimensional space to form a one-dimensional scatter plot;

[0135] A clustering module 304 is used to cluster the nodes in the scatter plot to obtain the node features after clustering;

[0136] The quantum coding module 305 is used to map the clustered node features into quantum states through angle coding technology to generate quantum coded data;

[0137] A variational quantum circuit mapping module 306, configured to map the quantum coded data to a variational quantum circuit, wherein the variational quantum circuit has quantum bits, and the quantum bits correspond to the quantum coded data;

[0138] A quantum feature extraction module 307, used to process the quantum coded data through the variational quantum circuit to extract quantum features;

[0139] The neural network processing module 308 is used to input the quantum features into the pooling layer and the linear layer of the neural network to generate a risk score, wherein the neural network is trained using a cross entropy loss function, the pooling layer is an average pooling layer, and the quantum features are merged and then input into the linear layer.

[0140] Further, the topology analysis processing module 303 is specifically used for:

[0141] Analyze the topological characteristics of the computing nodes through topological data;

[0142] Based on the topological features, a filtering function is constructed through a Mapper algorithm to project the nodes into a low-dimensional space to form a one-dimensional scatter plot.

[0143] Furthermore, the variational quantum circuit is specifically a multi-layer structure, each layer of the structure includes a revolving gate and a CNOT gate, and the angles of the revolving gate and the CNOT gate are adjusted to match the quantum coded data.

[0144] Furthermore, it also includes: a binary classification module 309, which is specifically used for:

[0145] Based on the risk score, the continuous risk score is converted into a discrete category label by using an optimal threshold to achieve binary classification.

[0146] By using this system, the above method can be executed and the corresponding technical effects can be achieved.

[0147] An embodiment of the present invention further provides an electronic device for executing the above method, as an implementation device of the method, comprising a processor and a memory;

[0148] A memory, used for storing operation instructions;

[0149] A processor is used to execute the fraud detection method based on topological analysis and quantum graph neural network provided in any embodiment of the present application by calling an operation instruction.

[0150] As an example, Figure 4 A schematic diagram of the structure of an electronic device applicable to an embodiment of the present application is shown, and the electronic device 400 includes: a processor 401 and a memory 403. The processor 401 and the memory 403 are connected, such as being connected through a bus 402. Optionally, the electronic device 400 may also include a transceiver 404. It should be noted that in actual applications, the transceiver 404 is not limited to one. It is understandable that the structure illustrated in the embodiment of the present invention does not constitute a specific limitation on the specific structure of the electronic device 400. In other embodiments of the present application, the electronic device 400 may include more or fewer components than shown in the figure, or combine certain components, or split certain components, or arrange the components differently. The illustrated components may be implemented in hardware, software, or a combination of software and hardware. Optionally, the electronic device may also include a display screen 305 for displaying images, or receiving user operation instructions when necessary.

[0151] The processor 401 is applied in the embodiment of the present application to implement the method shown in the above method embodiment. The transceiver 404 may include a receiver and a transmitter. The transceiver 404 is applied in the embodiment of the present application to implement the function of the electronic device of the embodiment of the present application communicating with other devices when executed.

[0152] Processor 401 may be a CPU (Central Processing Unit), a general purpose processor, a DSP (Digital Signal Processor), an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array) or other programmable logic devices, transistor logic devices, hardware components or any combination thereof. It may implement or execute various exemplary logic blocks, modules and circuits described in conjunction with the disclosure of this application. Processor 401 may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, etc.

[0153] The processor 401 may also include one or more processing units, for example: the processor 401 may include an application processor (application processor, AP), a modem processor, a graphics processor (graphics processing unit, GPU), an image signal processor (image signal processor, ISP), a controller, a memory, a video codec, a digital signal processor (digital signal processor, DSP), a baseband processor, and / or a neural network processor (Neural-network Processing Unit, NPU), etc. Different processing units can be independent devices or integrated into one or more processors. Among them, the controller can be the nerve center and command center of the electronic device 400. The controller can generate an operation control signal according to the instruction opcode and the timing signal to complete the control of fetching and executing instructions. A memory can also be set in the processor 401 for storing instructions and data. In some embodiments, the memory in the processor 401 is a cache memory. The memory can save instructions or data that the processor 401 has just used or circulated.

[0154] The processor 401 can run the fraud detection method based on topological analysis and quantum graph neural network provided in the embodiment of the present application. The processor 401 may include different devices. For example, when the CPU and GPU are integrated, the CPU and the GPU can cooperate to execute the fraud detection method based on topological analysis and quantum graph neural network provided in the embodiment of the present application. Part of the algorithm is executed by the CPU, and the other part of the algorithm is executed by the GPU to obtain faster processing efficiency.

[0155] The bus 402 may include a path to transmit information between the above components. The bus 402 may be a PCI (Peripheral Component Interconnect) bus or an EISA (Extended Industry Standard Architecture) bus. The bus 402 may be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 4 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.

[0156] The memory 403 may be a ROM (Read Only Memory) or other types of static storage devices that can store static information and instructions, a RAM (Random Access Memory) or other types of dynamic storage devices that can store information and instructions, or an EEPROM (Electrically Erasable Programmable Read Only Memory), a CD-ROM (Compact Disc Read Only Memory), or may include a high-speed random access memory, or may include a non-volatile memory, such as at least one disk storage device, a flash memory device, a universal flash storage (UFS), or other optical disk storage, optical disk storage (including compressed optical disk, laser disk, optical disk, digital versatile disk, Blu-ray disk, etc.), a disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited to this.

[0157] Optionally, the memory 403 is used to store application code for executing the solution of the present application, and the execution is controlled by the processor 401. The processor 401 is used to execute the application code stored in the memory 403 to implement the fraud detection method based on topological analysis and quantum graph neural network provided in any embodiment of the present application.

[0158] The memory 403 can be used to store computer executable program codes, which include instructions. The processor 401 executes various functional applications and data processing of the electronic device 400 by running the instructions stored in the memory 403. The memory 403 may include a program storage area and a data storage area. Among them, the program storage area may store the code of the operating system, application program, etc. The data storage area may store data created during the use of the electronic device 400 (such as images, videos, etc. collected by the camera application), etc.

[0159] The memory 403 may also store one or more computer programs corresponding to the fraud detection method based on topological analysis and quantum graph neural network provided in the embodiment of the present application. The one or more computer programs are stored in the above-mentioned memory 403 and are configured to be executed by the one or more processors 401. The one or more computer programs include instructions, and the above-mentioned instructions can be used to execute each step in the above-mentioned corresponding embodiment.

[0160] Of course, the code of the fraud detection method based on topological analysis and quantum graph neural network provided in the embodiment of the present application can also be stored in an external memory.

[0161] The display screen 405 includes a display panel. The display panel may be a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode or an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), a Miniled, a MicroLed, a Micro-oLed, a quantum dot light-emitting diode (QLED), etc. In some embodiments, the electronic device 400 may include 1 or N display screens 405, where N is a positive integer greater than 1. The display screen 405 may be used to display information input by a user or information provided to a user and various graphical user interfaces (GUIs). For example, the display screen 405 may display photos, videos, web pages, or files, etc.

[0162] The electronic device provided in the embodiment of the present application is applicable to any embodiment of the above method. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects in the corresponding method provided above, which will not be repeated here.

[0163] An embodiment of the present invention also provides a computer-readable storage medium capable of implementing all the steps in the method in the above embodiment, wherein a computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, all the steps in the method in the above embodiment are implemented.

[0164] Those skilled in the art will appreciate that embodiments of the present invention may be provided as methods, systems, or computer program products. Therefore, the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0165] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A system that specifies the functions of a box or multiple boxes.

[0166] These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer-readable memory produce a product including an instruction system, which is implemented in the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0167] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process in the computer or other programmable device. Figure 1 A process or multiple processes and / or boxes Figure 1The steps of the functions specified in a box or multiple boxes. Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they know the basic creative concept. Therefore, the attached claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present invention.

[0168] The above is only a preferred specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed by the present invention should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims

1. A fraud detection method based on topological analysis and quantum graph neural network, characterized in that: include: Constructing a graph structure, wherein the graph structure includes nodes and edges, wherein the nodes are entities in a transaction, and the edges are transaction relationships between entities; Extracting a feature vector of the node; Extracting topological features of nodes in the graph structure using a topological data analysis method, and projecting the nodes into a low-dimensional space based on the topological features to form a one-dimensional scatter plot; Cluster the nodes in the scatter plot to obtain the node features after clustering; The clustered node features are mapped into quantum states through angle encoding technology to generate quantum coded data; Mapping the quantum coded data to a variational quantum circuit, wherein the variational quantum circuit has quantum bits, and the quantum bits correspond to the quantum coded data; Processing the quantum coded data by the variational quantum circuit to extract quantum features; The quantum features are input into the pooling layer and linear layer of the neural network to generate a risk score.

2. The method according to claim 1, characterized in that The topological features of the nodes in the graph structure are extracted using a topological data analysis method, and the nodes are projected into a low-dimensional space based on the topological features to form a one-dimensional scatter plot. Specifically, the method includes: Analyze the topological characteristics of the computing nodes through topological data; Based on the topological features, a filtering function is constructed through a Mapper algorithm to project the nodes into a low-dimensional space to form a one-dimensional scatter plot.

3. The method according to claim 1, characterized in that The variational quantum circuit is specifically a multi-layer structure, each layer of the structure includes a revolving gate and a CNOT gate, and the angles of the revolving gate and the CNOT gate are adjusted to match the quantum coded data.

4. The method according to claim 1, characterized in that: Also includes: Based on the risk score, the continuous risk score is converted into a discrete category label by using an optimal threshold to achieve binary classification.

5. The method according to claim 1, characterized in that Also includes: The neural network is trained using a cross entropy loss function.

6. The method according to claim 1, characterized in that The pooling layer is an average pooling layer, which combines the quantum features and then inputs them into the linear layer.

7. A fraud detection system based on topological analysis and quantum graph neural network, characterized in that: include: A graph structure building module, used to build a graph structure, wherein the graph structure includes nodes and edges, wherein the nodes represent entities in a transaction, and the edges represent transaction relationships between entities; A feature extraction module, used to extract the feature vector of the node; A topological analysis processing module, used to process the graph structure through topological data analysis and project it into a low-dimensional space to form a one-dimensional scatter plot; The clustering module is used to cluster the nodes in the scatter plot and obtain the node features after clustering; The quantum coding module is used to map the clustered node features into quantum states through angle coding technology to generate quantum coded data; A variational quantum circuit mapping module, used to map the quantum coded data to a variational quantum circuit, wherein the variational quantum circuit has quantum bits, and the quantum bits correspond to the quantum coded data; A quantum feature extraction module, used to process the quantum coded data through the variational quantum circuit to extract quantum features; The neural network processing module is used to input the quantum features into the pooling layer and the linear layer of the neural network to generate a risk score.

8. The system according to claim 7, characterized in that The topology analysis processing module is also used for: Calculating the topological features of the nodes, wherein the topological features include at least one of degree centrality and clustering coefficient; Based on the topological features, a filter function is constructed through a Mapper algorithm to project the data of the graph structure into a one-dimensional space.

9. An electronic device, characterized in that: including a processor and a memory; The memory is used to store operation instructions; The processor is used to execute the method according to any one of claims 1 to 6 by calling the operation instruction.

10. A computer-readable storage medium, characterized in that: The storage medium stores a computer program, and when the computer program is executed by a processor, the method according to any one of claims 1 to 6 is implemented.

Images