A communication system
By introducing a radio frequency interface signal processing module into the communication system and performing digital predistortion processing, the contradiction between the existing communication system in improving transmission power, signal linearity and system efficiency is solved, and higher power, efficiency and bandwidth are achieved, while reducing system costs.
Patent Information
- Application Number
- CN202510273056.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2024-06-25
- Filing Date
- 2025-03-10
- Publication Date
- 2025-06-10
- Estimated Expiration
- 2045-03-10
AI Technical Summary
There is a contradiction between improving transmission power, signal linearity and system efficiency in existing communication systems, and the design of RF amplifiers requires a trade-off between indicators such as output power, linearity, efficiency and output bandwidth, resulting in limited system performance and cost.
A communication system is proposed, including a baseband module, a radio frequency module and a radio frequency front-end module. Combined with a radio frequency interface signal processing module between the radio frequency module and the radio frequency front-end module, the radio frequency signal is subjected to digital predistortion processing through the signal processing device to obtain a radio frequency signal with digital predistortion information.
By lowering the design threshold for the system to use predistortion methods, the universality of the predistortion method is increased, the nonlinearity problem of the signal generated by the amplifier is weakened or eliminated, and the power, efficiency and bandwidth that the amplifier can achieve is further improved under the same signal quality.
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Figure CN119814052B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of communications, and in particular to a communication system. Background Art
[0002] The development of communication systems has always been limited by the materials and process levels of radio frequency components, facing the mutually exclusive contradiction among transmit bandwidth, transmit power, signal linearity, and system efficiency. Increasing the transmit power may lead to signal distortion or poor linearity, while pursuing signal linear distortion-free may reduce system efficiency and increase the heat dissipation burden.
[0003] Figures 1 to 3 FIG. 1 is a schematic diagram of the transmitting part of an existing communication system. In a general communication system, there are two parts: transmitting and receiving, and each part may have multiple channels working simultaneously or non-simultaneously.
[0004] A radio frequency power amplifier (RF power amplifier or PA) is used to amplify a small radio frequency signal to increase the transmission distance. Limited by materials, the design of the RF power amplifier needs to make trade-offs among important indicators such as output power, linearity, efficiency, and output bandwidth.
[0005] In order to mitigate or eliminate non-linear problems such as those brought by power amplifiers, current radio frequency enhancement technologies mainly occur at the digital intermediate frequency position or in the baseband chip / module. However, this solution has a high usage threshold and a fixed system structure, restricting the application of radio frequency enhancement functions in the terminal field and only being used in a small range in high-power base station equipment.
[0006] Such as Figure 1 and Figure 2 The systems in FIGS. 2 and 3 require an FPGA to support digital signal processing functions in the baseband to optimize radio frequency performance, such as mitigating or eliminating non-linear effects brought by power amplifiers. In these two solutions, the digital signal processing module is located in the baseband chip / module and is usually implemented using an FPGA. However, the FPGA has disadvantages such as large area, high production cost, and high power consumption. Therefore, the system performance and cost are affected by the performance of the FPGA and the radio frequency chip / module. The system shown in FIG. 3 requires the cooperation of the FPGA in the baseband module and the digital signal processing unit 310 in the highly integrated radio frequency module 300 to achieve the purpose of optimizing radio frequency performance. The digital signal processing unit 310 in the highly integrated radio frequency module 300 has limited performance and poor adaptability and can only be used in limited application scenarios. The radio frequency module 300 needs to cooperate with the FPGA and is connected using a high-speed digital interface, and the cost of this interface is relatively high, resulting in an increase in the overall product cost. Summary of the Invention
[0007] In view of the technical problems existing in the prior art, the present application proposes a communication system, including a baseband module, a radio frequency module, and a radio frequency front-end module; and a radio frequency interface signal processing module coupled between the radio frequency module and the radio frequency front-end module; the radio frequency interface processing module is configured to at least receive a first radio frequency signal from the radio frequency module; wherein, the radio frequency interface signal processing module includes a signal processing device, and the signal processing device is configured to at least perform digital pre-distortion operation based on the first radio frequency signal, so as to obtain a second radio frequency signal with digital pre-distortion information.
[0008] Specifically, in the system, the radio frequency interface signal processing module includes: a down-conversion unit configured to receive the first radio frequency signal and perform a down-conversion operation to obtain the first analog signal; an up-conversion unit configured to perform an up-conversion operation on the second analog signal generated by the signal processing device to obtain a second radio frequency signal; the signal processing device is coupled between the up-conversion unit and the down-conversion unit, and is configured to receive the first analog signal, convert it into a first digital signal, and perform digital pre-distortion processing on the first digital signal to obtain a second digital signal and convert it into the second analog signal.
[0009] Specifically, in the system, the radio frequency interface signal processing module further includes a feedback channel configured to receive a radio frequency feedback signal from the radio frequency front-end module and convert the radio frequency feedback signal into a third analog signal and provide it to the signal processing device.
[0010] Specifically, in the system, the radio frequency interface signal processing module is further configured to receive multiple radio frequency analog signals and a radio frequency feedback signal.
[0011] Specifically, in the system, the feedback channel in the radio frequency interface signal processing module includes: a feedback selection switch coupled to the radio frequency front-end module and configured to select and output multiple radio frequency feedback signals; a down-conversion sub-unit configured to perform a down-conversion operation on the radio frequency feedback signal and provide the third analog signal generated after the frequency conversion to the signal processing device; a high-frequency clock sub-unit configured to generate a local oscillator signal required by the down-conversion sub-unit.
[0012] Specifically, in the system, the signal processing device includes: a first analog-to-digital converter configured to convert the first analog signal into a first digital signal; a core processor coupled to the first analog-to-digital converter and configured to process the first digital signal and output at least a second digital signal with digital pre-distortion information; a digital-to-analog converter coupled to the core processor and configured to convert the second digital signal into a second analog signal.
[0013] Specifically, in the described system, the signal processing device further includes a second analog-to-digital converter, coupled to the core processor, configured to receive the third analog signal, convert the third analog signal into a third digital signal, and provide it to the core processor.
[0014] Specifically, in the described system, the signal processing device obtains a second radio frequency signal with predistortion information based on the first radio frequency signal and the radio frequency feedback signal.
[0015] Specifically, in the described system, the system is a wifi router, and the radio frequency interface signal processing module further includes a clock selection switch, configured to select the local oscillator signals generated by multiple high-frequency clock subunits.
[0016] Specifically, in the communication system as described in any of the preceding paragraphs, the communication system further includes a base station, a drone, a mobile phone, a walkie-talkie, a vehicle, a satellite, or a wireless camera.
[0017] The solution proposed in this application reduces the design threshold for the system to use the predistortion method, increases the generality of the predistortion method, can weaken or eliminate the nonlinear problems of the signals generated by the power amplifier, and further improves the power, efficiency, and bandwidth that the power amplifier can achieve under the same signal quality. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Next, the preferred embodiments of this application will be further described in detail with reference to the drawings, where:
[0019] Figures 1 to 3 It is a schematic diagram of the transmitting part of the existing communication system;
[0020] Figure 4 Shown is a schematic diagram of the modules of a communication system according to an embodiment of this application;
[0021] Figure 5 Shown is a schematic diagram of the radio frequency interface signal processing module according to an embodiment of this application;
[0022] Figure 6 Shown is a schematic diagram of the modules of a signal processing device according to an embodiment of this application;
[0023] Figure 7 Shown is a schematic diagram of the modules of the existing WiFi router;
[0024] Figure 8 Shown is a schematic diagram of the modules of the WiFi router according to an embodiment of this application;
[0025] Figure 9 Shown is a schematic diagram of the modules of the existing base station;
[0026] Figure 10 Shown is a schematic diagram of a module of another existing base station. Detailed implementation manners
[0027] To make the objectives, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Apparently, the described embodiments are some but not all of the embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present application without making creative efforts shall fall within the protection scope of the present application.
[0028] In the following detailed description, reference may be made to the accompanying drawings which form a part hereof, and in which are shown by way of illustration specific embodiments in which the application may be practiced. In the drawings, like reference numerals describe substantially similar components in different figures. The various specific embodiments of the present application are described in sufficient detail below to enable those of ordinary skill in the art with relevant knowledge and technology to implement the technical solutions of the present application. It should be understood that other embodiments may be utilized or structural, logical or electrical changes may be made to the embodiments of the present application.
[0029] For technologies, methods and devices known to those of ordinary skill in the relevant art, detailed discussions may not be made, but where appropriate, the technologies, methods and devices should be regarded as a part of the description. Regarding the connections between the units in the drawings, it is only for the convenience of description, which indicates that at least the units at both ends of the connection communicate with each other, and it is not intended to limit that the units not connected cannot communicate. In addition, the number of lines between two units is intended to represent at least the number of signals involved in the communication between the two units or at least the number of output terminals available, and is not used to limit that the two units can only communicate with the signals shown in the figure.
[0030] In the existing solution, it is through Figure 1 or Figure 2 the digital signal processing module 120 or 220 in Figure 3The digital signal processing unit 310 in it is used to compensate the digital signal, attempting to solve problems such as the linearity of the signal. Moreover, it is necessary to match peripheral devices such as ADC and DAC and the corresponding clock circuit, making the system design face challenges in aspects such as interface and electrical characteristic matching, and at the same time, it will further increase the cost, area, and power consumption of this system. In addition, the signal processing algorithm is not targeted enough to process the signal according to the usage scenario and signal quality, etc. Currently, there is no such digital signal processing module in some applications or devices, such as WiFi routers. Or, due to cost considerations, for some device manufacturers such as base station manufacturers, the current expectation or trend is to provide base station equipment that does not include a digital processing module or only includes a digital processing module with basic functions. Such a situation causes the communication system to either reduce the power amplifier efficiency or exchange high costs for signal linearity performance. However, more expectations are to be able to achieve an optimal efficiency while improving linearity with a lower cost and a better design solution.
[0031] In the prior art, the baseband signal is directly frequency-converted to generate a signal at the corresponding frequency point, and then output through the radio frequency front-end module. The radio frequency front-end module mainly completes functions such as the transmission and amplification of radio frequency signals. The modulation devices and power amplification devices included therein, as analog semiconductor devices, are restricted by the physical characteristics of semiconductors. While ensuring low EVM / ACR, to output as high a signal transmission power and system transmission efficiency as possible, the up-conversion module and the radio frequency front-end module need to have extremely high linearity, greatly increasing the requirements for hardware design.
[0032] The communication system proposed in this application includes a radio frequency interface signal processing module with pre-distortion processing capabilities and independent of the baseband and radio frequency modules, which pre-compensates the radio frequency signal output by the power amplifier, enabling the radio frequency signal of this system to have good linearity, improving the performance of the communication system, reducing the requirements for the physical characteristics of devices such as the power amplifier, and greatly increasing the adaptability of high-performance pre-distortion methods in the radio frequency system, reducing the development complexity and application cost of applying high-performance pre-distortion methods.
[0033] Figure 4 Shown is a schematic diagram of the modules of a communication system according to an embodiment of this application. It includes a baseband module 41, a radio frequency module 42 coupled to the baseband module 41, and a radio frequency front-end module 44. The radio frequency interface signal processing module 43 is coupled between the radio frequency module 42 and the radio frequency front-end module 44. The radio frequency front-end module 44 may include a power amplifier unit 441 configured to receive the radio frequency transmission signal output by the radio frequency interface signal processing module 43; it may also include a coupler coupled to the output end of the power amplifier unit 441, and its output end is coupled to the radio frequency interface signal processing module 43, configured to feedback the signal output by the power amplifier with non-linear information to the radio frequency interface signal processing module 43.
[0034] In some embodiments of the present application, the baseband module 41 and the radio frequency module 42 may be jointly located within a baseband chipset. In other embodiments, the radio frequency module 42 may be a highly integrated radio frequency module.
[0035] However, regardless of the structures of the baseband module and the radio frequency module, a radio frequency interface signal processing module can be applied to improve the linearity of signals.
[0036] According to one embodiment, the radio frequency interface signal processing module 43 is configured to receive the radio frequency signal output by the radio frequency module 42, convert the radio frequency signal to a low frequency, and then perform operations such as digital image correction, digital pre-distortion processing, and peak clipping processing to obtain a radio frequency transmission signal with digital pre-distortion information.
[0037] According to one embodiment, the radio frequency interface signal processing module 43 raises the signal after pre-distortion operation processing, for example, back to the frequency point of the received radio frequency signal and outputs it.
[0038] According to one embodiment, the radio frequency interface signal processing module 43 may also be configured to obtain a radio frequency transmission signal with digital pre-distortion information based at least on the radio frequency signal and the radio frequency feedback signal.
[0039] Figure 5 Shown is a schematic diagram of a radio frequency interface signal processing module according to an embodiment of the present application, which can be coupled between the radio frequency module and the radio frequency front-end module. The radio frequency interface signal processing module proposed in the present application can be located between the radio frequency module and the radio frequency front-end module that communicate using radio frequency signals and are separate from each other.
[0040] According to one embodiment, as shown in the figure, the radio frequency interface signal processing module 50 may include a down-conversion unit 510 configured to down-convert the output of the radio frequency module to obtain an analog signal; a signal processing device 520 coupled to the output of the down-conversion unit 510, configured to convert the analog signal into a digital signal, process it, such as pre-distortion processing, etc., and convert the processed digital signal back into an analog signal for output; an up-conversion unit 530 coupled to the signal processing device 520, configured to up-convert the analog signal output by the signal processing device 520 to obtain a radio frequency transmission signal; and a feedback channel configured to feedback the radio frequency feedback signal with non-linear information received from the outside to the signal processing device 520. Among them, the radio frequency feedback signal may include the radio frequency signal with non-linear information output by the power amplifier. In one embodiment, the feedback channel may be coupled to the output of the coupler in the radio frequency front-end module.
[0041] According to one embodiment, the signal processing device 520 can integrate multiple signal processing functions, including quadrature error correction (QEC), predistortion (PD), clipping processing (CFR), power detection (PD), digital filtering (FIR), and DC offset correction (DC-Offset EQ). These functions can significantly improve the quality of the RF signals output by the power amplifier, enabling the power amplifier to operate with higher efficiency and power, while reducing the performance requirements for RF and analog devices.
[0042] According to one embodiment, the feedback channel can monitor the output of the external RF front-end module in real time, which can help the signal processing device 520 perform real-time calibration and adjustment, thereby improving the performance and reliability of the entire communication system. This closed-loop calibration function can not only improve the nonlinear and anti-aging performance of devices (such as power amplifiers, upconversion units, digital-to-analog converters), but also improve the yield and consistency. According to one embodiment, the feedback channel can support multiple channels, such as time-division switching of 2 / 4 / 6 / 8... and other channel inputs.
[0043] According to one embodiment, the feedback channel includes a feedback selection switch 550, which can be coupled to the coupler of the RF front-end module and is configured to select and output multiple RF feedback signals; a high-frequency clock sub-unit 560, which is configured to provide a local oscillator signal, and the frequency of the local oscillator signal provided by the high-frequency clock sub-unit 560 is greater than or equal to the frequency of the RF signal; a down-conversion sub-unit 570, which is coupled to the feedback selection switch 550 and the high-frequency clock sub-unit 560, and is configured to apply the local oscillator signal from the high-frequency clock sub-unit 560 to the output of the feedback selection switch 550, down-convert the signal output by the feedback selection switch 550, and output an analog signal to the signal processing device 520.
[0044] According to another embodiment of the present application, for application scenarios where it is not necessary to track the signals output by the power amplifier in real time, coefficient calibration is performed on the output of the power amplifier at the factory, and the coefficients are recorded in the non-volatile memory for the signal processing device to call each time it is powered on.
[0045] According to one embodiment, the RF interface signal processing module 50 may further include a control unit (not shown), which is configured to control each part in the RF interface signal processing module. The control unit may include a processor with control and processing capabilities, such as an MCU.
[0046] The RF interface signal processing module proposed in the present application can include an enhanced algorithm for improving signal linearity and is independent of the baseband and RF modules. It is applied to different architectures and has higher processing performance, adaptability, and economy. Moreover, it can adjust the predistortion-related parameters in real time, eliminating the need for the baseband module or highly integrated RF module to perform digital signal processing and debugging.
[0047] Figure 6 The figure shows a schematic diagram of the modules of a signal processing device according to an embodiment of the present application. In the present application, "analog" refers to a relatively low-frequency signal, whose center frequency is near zero frequency; "radio frequency" refers to a relatively high-frequency signal, whose center frequency is outside zero frequency, such as 900 MHz.
[0048] As shown in the figure, the signal processing device 60 may include: a switch 630, an analog-to-digital converter 640 coupled thereto, the output end of the analog-to-digital converter 640 is coupled to the input end of the core processor 650, the output end of the core processor 650 is coupled to the input end of the digital-to-analog converter 640', the output end of the digital-to-analog converter 640' is coupled to the switch 630', and the main control 610 is coupled or electrically connected to all other units.
[0049] According to an embodiment, one output end of the switch 630' is configured to provide the processed high-speed analog signal outside the signal processing device 60. According to other embodiments, in some application scenarios, the signal processing device 60 may also not include the switch 630 and the switch 630'.
[0050] According to an embodiment, the main control 610 may be electrically connected to all other units and configure the initialization parameters and startup processes of other modules, communicate with external control modules such as an external MCU, perform command and data interaction, and at the same time, may also monitor the working state of the signal processing device 60 system, implement exception recovery processing and maintainable and monitorable functions.
[0051] According to an embodiment, the analog-to-digital converter 640 or the digital-to-analog converter 640' may respectively adopt a high-precision and high-sampling-rate ADC or DAC module, and may support I_P / I_N / Q_P / Q_N; or I / Q single-ended; or single-channel and other conventional analog signal formats. The analog-to-digital converter 640 is capable of converting the corresponding analog signal into a digital signal. The digital-to-analog converter 640' is configured to convert the signal processed by the core processor 650 into an analog signal.
[0052] According to an embodiment, the signal processing device 60 may further include an analog-to-digital converter 640", which may also include a high-precision and high-sampling-rate ADC, whose input end is configured to receive the frequency-converted radio frequency feedback signal, and whose output end is coupled to the input end of the core processor 650, thereby forming a feedback observation channel, which can collect the observation point data of the target, observe external data in real time, so that the signal processing device 60 calculates the corresponding parameters. The feedback observation channel can greatly improve the tracking performance of the system, enabling the signal processing device 60 to process external scenarios such as rapid cooling, heating, impedance change, etc.
[0053] According to one embodiment, the core processor 650 may have functions such as Quadrature Error Correction (QEC), Digital Pre-Distortion (PD), Clipping and Crest Factor Reduction (CFR), Finite Impulse Response (FIR) digital filtering, signal rate conversion (Resample), and DC offset correction (DC-Offset EQ).
[0054] According to one embodiment, the CFR functional structure in the core processor 650 may perform the following operations:
[0055] The Clipping and Crest Factor Reduction (CFR) technique is a method for reducing signal peaks to improve the efficiency of a power amplifier (PA) and reduce signal distortion. By monitoring the amplitude of the input signal, the peak portion exceeding a set threshold is detected; the peak portion exceeding the threshold is clipped, and its amplitude is limited to the set maximum value; filtering or other techniques are used to restore the signal quality and reduce the negative impact caused by clipping. Among them, the input signal may be a digital signal from the analog-to-digital converter 640.
[0056] According to one embodiment, the EQ functional structure in the core processor 650 is mainly used to compensate for the distortion and interference introduced in the channel, thereby restoring the original signal. The purpose of the equalization filter is to reverse the influence of the channel on the signal.
[0057] According to one embodiment, the compensation module in the core processor 650 is configured to implement the Quadrature Error Correction (QEC) function to compensate for the IQ mirror problem caused by the inconsistency of the IQ signal link. The IQ mirror existing within the zero-IF signal bandwidth will have a great impact on the EVM performance of the entire system. Through quadrature error correction, it is reduced below the system EVM index.
[0058] According to one embodiment, the pre-distortion functional structure in the core processor 650 is a function implemented in the digital domain, and its function is to introduce distortion opposite to the non-linear characteristics of the power amplifier. After the output signal of the signal processing device processed by PD passes through the power amplifier, it can exactly balance the distortion generated by the power amplifier, so that the signal output by the RF signal processing system can be restored to linearity.
[0059] According to one embodiment, the FIR functional structure in the core processor 650 can provide an LPF filter with a stopband attenuation of <10Mhz> 40dBc, and its performance is more than 10 times better than that of a traditional analog LPF.
[0060] The signal processing device proposed in this application has an enhanced algorithm that improves the performance and linearity of power amplifiers. By using the analog-to-digital conversion and digital-to-analog conversion units before and after the core processing unit, as well as the feedback analog-to-digital conversion unit, the adaptability of the signal processing device is improved. The application scenario of the signal processing device is expanded through high-bandwidth and high-linearity analog switches, making it more adaptable and compatible. As a result, the application threshold of radio frequency enhancement technology is reduced, and the cost of the system is also reduced.
[0061] Figure 7 The figure shows a module schematic diagram of an existing WiFi router. Figure 7 The shown WiFi router includes a baseband module 70, a radio frequency module 71, and a radio frequency front-end module 72. The radio frequency front-end module 72 includes a power amplifier unit. In some embodiments, the baseband module 70 and the radio frequency module 71 are located in the WiFi chipset and can be integrated or separated.
[0062] The power amplifier units currently used in WiFi routers focus on linearity and output bandwidth while sacrificing efficiency and output power. In high modulation scenarios (1024QAM and 4096QAM), the output power cannot meet the requirements, resulting in problems such as insufficient coverage area and excessive heat generation under high throughput. Currently, WiFi chipset solution providers offer some signal processing and power amplifier linearization functions, but these functions are currently integrated inside the baseband module and have limited performance, unable to meet the goal of increasing the output power to significantly improve the coverage area under high throughput.
[0063] Figure 8 The figure shows a module schematic diagram of a WiFi router according to an embodiment of the present application. As shown in the figure, the radio frequency interface signal processing module 80 can be coupled between the WiFi chipset 81 and the radio frequency front-end module 82. The radio frequency module is located in the WiFi chipset 81, and the power amplifier units 8210 to 821n are located in the radio frequency front-end module 82. While solving the radio frequency performance of the WiFi router in this embodiment, there is no need to separate the baseband module from the radio frequency module.
[0064] According to an embodiment, the system supports N channels, where N is an integer greater than or equal to 1. Among them, the frequencies of the signals in different channels can be different. The radio frequency transmission interfaces 8110 to 811n in the WiFi chipset 81 are coupled to the down-conversion units 810 to 81n in the radio frequency interface signal processing module 80. The signals output by the down-conversion units are provided to the signal processing device 860 and converted into digital signals through its analog-to-digital converter for, for example, pre-distortion processing.
[0065] According to one embodiment, the signal processing device 860 (as in the foregoing embodiment) may provide a predistortion processing function, as well as functions such as frequency response equalization (EQ), clipping processing (CFR), quadrature imbalance calibration (QE), local oscillator leakage calibration (LOL), filters, power statistics, and so on.
[0066] According to one embodiment, since the WiFi signal has high requirements for EVM, in order to reduce the impact on EVM caused by the additional down-conversion and up-conversion units based on the WiFi set 81, the down-conversion and up-conversion units of the same channel need to use the same high-frequency clock subunit to provide the local oscillator signal. For example, the down-conversion and up-conversion units use the same high-frequency clock. Additionally, when the high-frequency clock is 1 MHz and above, the point-frequency phase noise should be as small as possible. When the frequency of the high-frequency clock is below 1 MHz, the phase noise requirement is relatively lower. The high-frequency clock subunits 830 to 83n used by different channels can be the same or different clock sources depending on the application requirements.
[0067] In one embodiment of the present application, the down-conversion unit 810 and the up-conversion unit 820 are in the same channel and can jointly receive the local oscillator signal from the high-frequency clock subunit 830. The down-conversion unit 81n and the up-conversion unit 82n are in the same channel and can jointly receive the local oscillator signal from the high-frequency clock subunit 83n.
[0068] According to one embodiment, if real-time tracking of radio frequency performance is required, couplers 8220 to 822n or power splitters need to be set at the output ends of the power amplifier units 8210 to 821n in the radio frequency front-end module 82. The output ends of the couplers 8220 to 822n can be electrically connected to the input end of the feedback selection switch 850 for selecting the feedback channel that the radio frequency interface signal processing module currently needs to observe. According to other embodiments, the signals fed back from the couplers 8220 and 822n to the feedback selection switch 850 can have different frequencies.
[0069] According to one embodiment, the output end of the feedback selection switch 850 is electrically connected to the down-conversion subunit 870, transferring the radio frequency feedback signal to the baseband and providing it to the signal processing device 860 for observing the radio frequency feedback signal in real time, calculating, and adjusting the output signal of the radio frequency interface signal processing module in real time.
[0070] According to one embodiment, the down-conversion subunit 870 requires a high-frequency clock source to provide the local oscillator. If there are multiple high-frequency clock subunits in the system, such as the high-frequency clock subunits 830 to 83n, then multiple clocks need to be selected by the clock switching switch 840 before being used as the local oscillator input for the down-conversion subunit 870. The selection of the clock switching switch is related to the radio frequency feedback signal to be monitored.
[0071] According to one embodiment, in the feedback channel, the clock switching switch 840 is configured to select the local oscillator signal generated by the high-frequency clock subunit 830 or 83n based on the radio frequency feedback signal to be observed, and select the same high-frequency clock source as that used by the transmission link to be monitored currently. For example, when monitoring the radio frequency signal of the channel where the monitoring coupler 8220 is located, it is necessary to select the same high-frequency clock source as that of the up-conversion unit 810 and the down-conversion unit 820, that is, the high-frequency clock subunit 830. The high-frequency clock subunits 830 to 83n do not need to share a reference signal with the WiFi chipset 81.
[0072] According to one embodiment, the down-conversion subunit 870 is configured to apply the local oscillator signal provided by the clock switching switch 840 to the signal output by the feedback selection switch 850, so as to down-convert the radio frequency feedback signal to the baseband.
[0073] According to one embodiment, the low-noise amplifiers 8240 to 824n of the radio frequency front-end module 82 are electrically connected to the radio frequency receiving interfaces 8120 to 812n of the WiFi chipset 81. The radio frequency receiving interfaces 8120 to 812n of the WiFi chipset 81 are configured to receive radio frequency receiving signals from the low-noise amplifiers 8240 to 824n.
[0074] Figure 9 The figure shows a schematic diagram of the modules of an existing base station. As can be seen from the figure, the FPGA processing unit 921 is responsible for processing the digital signals generated by the base station. The base station shown in the figure includes a baseband module 91, an intermediate-frequency processing module 92, a radio frequency module 93, and a radio frequency front-end module 94. The intermediate-frequency processing module 92 includes an FPGA processing unit 921 with signal processing capabilities. Since this solution needs to implement functions such as digital pre-distortion, the requirements for the resources and performance of the FPGA processing unit 921 are very high, thus greatly increasing the system cost, system power consumption, and design cost.
[0075] Figure 10 The figure shows a schematic diagram of the modules of another existing base station. The base station shown in the figure includes a baseband module 101, an intermediate-frequency processing module 102, a highly integrated radio frequency module 103, and a radio frequency front-end module 104. As can be seen from the figure, the FPGA processing unit 1022 and the digital signal processing unit 1031 in the highly integrated radio frequency module 103 are jointly responsible for processing the digital signals generated by the base station. However, a high-speed digital interface must be used between the intermediate-frequency processing module 102 and the highly integrated radio frequency module 103 here, and the cost of this interface is very high. Moreover, the signal processing ability of the highly integrated radio frequency module cannot be guaranteed.
[0076] In some embodiments, the radio frequency interface signal processing module proposed in this application may be located, for example Figure 9Between the intermediate radio frequency module 93 and the radio frequency front-end module 94, operations such as pre-distortion are implemented. The radio frequency interface signal processing module is configured to receive signals from the radio frequency module and the radio frequency front-end module. The input and output signals of the radio frequency interface signal processing module are radio frequency signals.
[0077] In some embodiments, the radio frequency interface signal processing module proposed in this application can be located, for example, Figure 10 Between the high-integration radio frequency module 103 and the radio frequency front-end module 104, configured to receive signals from the high-integration radio frequency module and the radio frequency front-end module, and implement operations such as pre-distortion.
[0078] In some other applications, the radio frequency interface signal processing module proposed in this application can also be applied to the repeater scenario of a base station, observe the signals output by the power amplifier unit in the radio frequency front-end module in real time, calculate and adjust the output signals of the radio frequency interface signal processing module in real time.
[0079] According to different embodiments of this application, in different communication devices, such as base stations, drones, mobile phones, walkie-talkies, automobiles, satellites, or wireless cameras, etc., the above signal processing device or radio frequency interface signal processing module can be used, and the effect of reducing product costs can be achieved while implementing the digital enhancement processing function.
[0080] Using the radio frequency interface signal processing module, convert the radio frequency feedback signal output by the radio frequency front-end module and the radio frequency signal output by the radio frequency module to the baseband, provide them to the signal processing device in the radio frequency interface signal processing module for pre-distortion operations, and up-convert the processed signals to the frequency point where the radio frequency transmission signal is located.
[0081] The radio frequency interface signal processing module proposed in this application can be directly applied between the radio frequency module and the radio frequency front-end module without changing the original Wifi router or base station framework, without changing the radio frequency module, to improve the linearity of the radio frequency signal output by the power amplifier, thereby reducing the application threshold of radio frequency enhancement technology and also reducing the cost of baseband chips or radio frequency chips.
[0082] The above embodiments are only for illustrating the present invention and are not intended to limit the present invention. Those of ordinary skill in the relevant technical fields can still make various changes and modifications without departing from the scope of the present invention. Therefore, all equivalent technical solutions should also fall within the scope of the disclosure of the present invention.
Claims
1. A communication system, comprising: Baseband module, RF module, and RF front-end module; and, an independent RF interface signal processing module coupled between the RF module and the RF front-end module; The RF interface processing module is configured to receive multiple first RF signals from the RF module; Wherein, the radio frequency interface signal processing module includes: A plurality of down-conversion units, configured to receive a plurality of the first radio frequency signals and perform down-conversion operations to obtain first analog signals; A plurality of up-conversion units, configured to perform an up-conversion operation on the second analog signal generated by the signal processing device to obtain a second radio frequency signal; A signal processing device, coupled between the plurality of up-conversion units and the plurality of down-conversion units, the signal processing device being configured to perform a digital predistortion operation based at least on the first radio frequency signal, thereby obtaining a second radio frequency signal with digital predistortion information; A feedback channel is configured to receive multiple RF feedback signals from the RF front-end module, convert the RF feedback signals into a third analog signal and provide it to the signal processing device; it includes: a feedback selection switch, coupled to the RF front-end module, configured to select and output the multiple RF feedback signals; a down-conversion subunit, configured to perform down-conversion operation on the RF feedback signal, and provide the third analog signal generated after the frequency conversion to the signal processing device; multiple high-frequency clock subunits, configured to generate local oscillator signals required by the down-conversion subunit and corresponding to the multiple RF feedback signals respectively; a clock selection switch, configured to select the local oscillator signals generated by the multiple high-frequency clock subunits and corresponding to the multiple RF feedback signals respectively.
2. The system according to claim 1, wherein: The signal processing device is further configured to receive the first analog signal and convert it into a first digital signal, and perform digital predistortion processing on the first digital signal to obtain a second digital signal and convert it into the second analog signal.
3. The system according to claim 2, wherein: The signal processing device comprises: a first switch configured to receive a first analog signal; a first analog-to-digital converter configured to convert the first analog signal into a first digital signal; A core processor, coupled to the first analog-to-digital converter, configured to process the first digital signal and output a second digital signal with at least digital predistortion information; a digital-to-analog converter, coupled to the core processor, configured to convert the second digital signal into a second analog signal; and, The second switch is coupled to the digital-to-analog converter and configured to output the second analog signal; wherein the second switch is also coupled to the first switch and configured to send the received signal to the first switch.
4. The system according to claim 3, wherein: The signal processing device further includes a second analog-to-digital converter coupled to the core processor and configured to receive the third analog signal, convert the third analog signal into a third digital signal, and provide the third digital signal to the core processor.
5. The system according to claim 4, wherein: The signal processing device obtains a second radio frequency signal with predistortion information based on the first radio frequency signal and the radio frequency feedback signal.
6. The system according to claim 5, wherein: The system is a wifi router.
7. The communication system according to any one of claims 1-5, wherein the communication system further comprises a base station, a drone, a mobile phone, a walkie-talkie, a car, a satellite, or a wireless camera.
Citation Information
Patent Citations
Digital predistortion linear broadband radio-frequency power amplifier device
CN101741317A