Display panel, display device and manufacturing method of display panel

Abstract

The invention relates to a display panel, a display device and a manufacturing method of the display panel, the display panel comprises a substrate, a plurality of sub-pixels are arranged on the substrate, each sub-pixel comprises a light-emitting element, an isolation groove used for isolating the light-emitting element is arranged between every two adjacent sub-pixels, and the light-emitting element is arranged in the isolation groove. The light-emitting element comprises a first electrode, a first light-emitting layer, a charge generation layer, a second light-emitting layer and a second electrode which are sequentially stacked in the direction away from the substrate. The charge generation layer comprises an N-type charge generation layer and a P-type charge generation layer. And a gap is formed between at least one of the N-type charge generation layer and the P-type charge generation layer and the second electrode in the direction parallel to the substrate.

Description

Technical Field

[0001] The present invention relates to the technical field of display product manufacturing, and in particular to a display panel, a display device and a manufacturing method of a display panel. Background Art

[0002] At present, OLED display devices have become the standard configuration of high-end flagship mobile phones, and tandem display devices are considered to be an important development direction in the field of OLED display in the future due to their high brightness, low power consumption, and long life. The existing tandem display devices are double-layer display devices connected in series by connecting the original single-layer display devices. The double-layer display device has an increased lateral movement of carriers due to the increase in the OLED film layer, so the lateral leakage of the tandem display device increases.

[0003] The series display device connects the original two single-layer display devices in series through the CGL (Charge Generation Layer) film layer, resulting in a significant increase in the driving voltage of the series display device. In order to solve this problem, the doping concentration of the CGL film layer is generally optimized; while the voltage is reduced, the lateral leakage will also worsen.

[0004] In order to solve the lateral leakage problem of the series display device, an isolation groove is added between pixels to cut off the lateral leakage path of the carrier. However, a short circuit caused by the overlap of the cathode and the OLED display device at the edge of the isolation groove affects the product gamma (gamma value) and makes the gamma curve abnormal. Summary of the invention

[0005] In order to solve the above technical problems, the present invention provides a display panel, a display device and a method for manufacturing a display panel, which solve the problem that the short circuit caused by the overlap of the cathode at the edge of the isolation groove and the OLED display device affects the product gamma.

[0006] In order to achieve the above object, the technical solution adopted in the embodiment of the present invention is: a display panel includes a base substrate, a plurality of sub-pixels are arranged on the base substrate, each of the sub-pixels includes a light-emitting element, and an isolation groove for isolating the light-emitting element is arranged between adjacent sub-pixels.

[0007] The light emitting element comprises a first electrode, a first light emitting layer, a charge generating layer, a second light emitting layer and a second electrode which are sequentially stacked in a direction away from the base substrate, wherein the charge generating layer comprises an N-type charge generating layer and a P-type charge generating layer;

[0008] At least one of the N-type charge generation layer and the P-type charge generation layer has a gap between the second electrode and the direction parallel to the base substrate.

[0009] Optionally, an orthographic projection area of ​​at least one of the N-type charge generation layer and the P-type charge generation layer on the base substrate is smaller than an orthographic projection area of ​​the second electrode on the base substrate.

[0010] Optionally, a distance between at least one of the N-type charge generation layer and the P-type charge generation layer and the second electrode in a direction parallel to the substrate is greater than or equal to 0.2 um.

[0011] Optionally, in a direction parallel to the base substrate, there is a gap between the first light-emitting layer and the second electrode.

[0012] Optionally, an area of ​​an orthographic projection of the first light-emitting layer on the base substrate is smaller than an area of ​​an orthographic projection of the second electrode on the base substrate.

[0013] Optionally, an area of ​​an orthographic projection of the first light-emitting layer on the base substrate is less than or equal to an area of ​​an orthographic projection of at least one of the N-type charge generation layer and the P-type charge generation layer on the base substrate.

[0014] Optionally, at least one of the N-type charge generation layer and the P-type charge generation layer is coated outside the first light-emitting layer.

[0015] Optionally, the second light-emitting layer is coated on the outside of the charge generating layer.

[0016] Optionally, the first light-emitting layer includes a first light-emitting functional layer, the second light-emitting layer includes a second light-emitting functional layer, and the thickness of the first light-emitting functional layer and / or the thickness of the second light-emitting functional layer is less than 300A.

[0017] Optionally, the first light-emitting layer includes a first blocking layer, the second light-emitting layer includes a second blocking layer, and the thickness of the first blocking layer and / or the thickness of the second blocking layer is less than 300 Å.

[0018] Optionally, a flat layer, a passivation layer and a pixel definition layer are stacked in a direction away from the base substrate, a plurality of pixel openings are arranged on the pixel definition layer, and the light emitting elements are arranged in the pixel openings;

[0019] The isolation groove is disposed between adjacent pixel openings, and the isolation groove extends to the planar layer in a direction close to the base substrate.

[0020] An embodiment of the present invention further provides a display device, comprising the above-mentioned display panel.

[0021] An embodiment of the present invention further provides a method for manufacturing a display panel, which is used to manufacture the above-mentioned display panel, comprising:

[0022] Forming a driving structure layer on a base substrate, wherein the driving structure layer includes a pixel circuit;

[0023] forming a planarization layer and a passivation layer in sequence on the driving structure layer;

[0024] The passivation layer is etched by a dry etching process to form an opening area in a region between adjacent sub-pixels, wherein the opening area extends to the planar layer;

[0025] forming a first electrode on a side of the passivation layer away from the substrate;

[0026] forming a pixel definition layer on a side of the first electrode away from the substrate, wherein the pixel definition layer has a plurality of pixel openings, and the pixel openings allow at least a portion of the first electrode to be exposed;

[0027] A first light-emitting layer, a charge generation layer, and a second light-emitting layer are sequentially formed on a side of the pixel definition layer away from the base substrate, wherein the charge generation layer includes an N-type charge generation layer and a P-type charge generation layer;

[0028] At least one of the N-type charge generation layer and the P-type charge generation layer has a gap between the second electrode and the direction parallel to the base substrate.

[0029] The beneficial effect of the present invention is that: in the display panel provided by the present invention, at least one of the N-type charge generation layer and the P-type charge generation layer has a gap with the second electrode in a direction parallel to the base substrate, and the setting of the gap avoids the problem of short circuit between the light-emitting element and the second electrode at the edge of the isolation groove, thereby solving the problem of poor gamma caused by the short circuit between the light-emitting element and the second electrode at the edge of the isolation groove. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 A schematic diagram showing a display panel in an embodiment of the present invention;

[0031] Figure 2 A schematic diagram showing a display panel in an embodiment of the present invention;

[0032] Figure 3 A schematic diagram showing a display panel in an embodiment of the present invention;

[0033] Figure 4 A schematic diagram showing a JV curve of a display panel in an embodiment of the present invention.

[0034] Figure 5 A schematic diagram showing a gamma curve in an embodiment of the present invention;

[0035] Figure 6A schematic diagram showing a light emitting element in an embodiment of the present invention;

[0036] Figure 7 A schematic diagram showing a JV curve of a display panel in an embodiment of the present invention;

[0037] Figure 8 A schematic diagram showing an isolation trench in an embodiment of the present invention;

[0038] Fig. 9 A schematic diagram showing an isolation trench in an embodiment of the present invention;

[0039] Fig.10 A schematic diagram showing an isolation trench in an embodiment of the present invention;

[0040] Fig.11 A schematic diagram showing an isolation trench in an embodiment of the present invention. DETAILED DESCRIPTION

[0041] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0042] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, similar words such as "one", "one" or "the" do not indicate quantity restrictions, but indicate that there is at least one. Similar words such as "include" or "comprise" mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Similar words such as "connect" or "connected" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0043] The features such as "parallel", "perpendicular", and "same" used in the embodiments of the present disclosure include the features such as "parallel", "perpendicular", and "same" in a strict sense, as well as the cases where "approximately parallel", "approximately perpendicular", "approximately the same", etc. include certain tolerances, taking into account the tolerances associated with the measurement of specific quantities (e.g., the limitations of the measurement system), and represent the acceptable deviation range for a specific value determined by ordinary technicians in the field. For example, "approximately" can mean within one or more standard deviations, or within 3% or 5% of the value.

[0044] Organic Light Emitting Diodes (OLED) are stacked together to form a series of independent light-emitting units. Figure 1 , so that the same amount of current passes through multiple different light-emitting units to emit light together, thereby improving the brightness and efficiency of the tandem OLED, further improving the efficiency and life of the OLED device. In the tandem OLED, multiple light-emitting functional layers are usually connected in series through a charge generation layer as a connecting layer.

[0045] Compared with traditional single-emission OLEDs, the current efficiency and luminous brightness of tandem OLEDs are increased, and at the same brightness, the current density of tandem OLEDs is lower, which can effectively extend the service life of tandem OLEDs. However, the charge generation layer is a common film layer with strong conductivity. There is an OLED leakage problem caused by lateral carrier transmission, which will cause crosstalk between adjacent pixel units, thereby affecting the display effect. In order to solve this type of lateral leakage problem, an isolation groove design is added around the pixel to avoid lateral transmission of carriers. However, such a structure causes the OLED display device and the cathode to be short-circuited at the edge of the isolation groove, causing poor gamma.

[0046] refer to Figure 1-Figure 3 In view of the above problems, this embodiment provides a display panel, including a base substrate, on which a plurality of sub-pixels are arranged, each of which includes a light-emitting element, and an isolation groove 5 for isolating the light-emitting element is arranged between adjacent sub-pixels.

[0047] The light emitting element comprises a first electrode 6, a first light emitting layer 1, a charge generating layer 2, a second light emitting layer 3 and a second electrode 4 which are sequentially stacked in a direction away from the base substrate, wherein the charge generating layer 2 comprises an N-type charge generating layer 21 and a P-type charge generating layer 22;

[0048] At least one of the N-type charge generation layer 21 and the P-type charge generation layer 22 has a gap between the second electrode 4 and the direction parallel to the base substrate.

[0049] The charge generation layer 2 may include an N-type charge generation layer 21 and a P-type charge generation layer 22 stacked in sequence in a direction away from the first electrode 6. The N-type charge generation layer 21 and the P-type charge generation layer 22 are in direct contact and form an NP junction. The NP junction can simultaneously generate electrons and holes in the N-type charge generation layer 21 and the P-type charge generation layer 22. The generated electrons can be transmitted to the side where the first electrode 6 is located through the N-type charge generation layer 21, and the generated holes can be transmitted to the side where the second electrode 4 is located through the P-type charge generation layer 22. In this embodiment, at least one of the N-type charge generation layer 21 and the P-type charge generation layer 22 has a gap with the second electrode 4 in a direction parallel to the substrate. The resistance between the light-emitting element and the second electrode 4 at the edge of the isolation groove 5 is increased to avoid the gamma problem caused by the short circuit between the second electrode 4 and the OLED light-emitting element.

[0050] Figure 1 It means that there is a gap between the charge generation layer 2 and the second electrode 4, Figure 2 It indicates that there is a gap between the N-type charge generation layer 21 and the second electrode 4. Figure 3 This indicates that there is a gap between the P-type charge generation layer and the second electrode 4 .

[0051] For example, the N-type charge generation layer 21 may be formed by doping an N-type material into an organic material, and the P-type charge generation layer 22 may be formed by doping a P-type material into an organic material.

[0052] In an exemplary embodiment, the first electrode 6 is an anode, and the second electrode 4 is a cathode.

[0053] In an exemplary embodiment, the distance a between at least one of the N-type charge generation layer 21 and the P-type charge generation layer 22 and the second electrode 4 in a direction parallel to the substrate is greater than or equal to 0.2 um. Figure 1 , but it is not limited to this.

[0054] Exemplarily, in order to effectively avoid the problem of short circuit between the light emitting element and the second electrode 4 at the edge of the isolation groove 5, the area of ​​the orthographic projection of at least one of the N-type charge generation layer 21 and the P-type charge generation layer 22 on the base substrate is smaller than the area of ​​the orthographic projection of the second electrode 4 on the base substrate. In other words, the second electrode 4 completely covers at least one of the N-type charge generation layer 21 and the P-type charge generation layer 22.

[0055] In an exemplary embodiment, the N-type charge generation layer 21 has a gap with the second electrode 4 in a direction parallel to the substrate, and the P-type charge generation layer 22 has a gap with the second electrode 4 in a direction parallel to the substrate. For example, the charge generation layer 2 is integrally retracted relative to the edge of the isolation groove 5. Figure 1 , thereby effectively avoiding short circuit between the light emitting element and the second electrode 4.

[0056] In the related art, there is a second electrode 4 at the edge of the isolation groove 5 that covers the various film layers of the light-emitting element. During the start-up stage, the current is relatively small, and the first light-emitting layer 1 will be lit first. In order to solve the gamma problem caused by the sequence of light emission of the first light-emitting layer 1 and the second light-emitting layer 3 caused by the short circuit between the first light-emitting layer 1 and the second electrode 4, in an exemplary embodiment, in a direction parallel to the base substrate, there is a gap between the first light-emitting layer 1 and the second electrode 4.

[0057] The mask plates for forming each film layer of the first light-emitting layer 1 and the second light-emitting layer 3 are arranged differently, so that the area of ​​the orthographic projection of the first light-emitting layer 1 on the base substrate is smaller than the area of ​​the orthographic projection of the second electrode 4 on the base substrate, so that there is a gap between the first light-emitting layer 1 and the second electrode 4.

[0058] In an exemplary embodiment, the orthographic projection area of ​​the first light emitting layer 1 on the base substrate is less than or equal to the orthographic projection area of ​​at least one of the N-type charge generation layer 21 and the P-type charge generation layer 22 on the base substrate.

[0059] In the direction parallel to the base substrate, there is a gap between the first light-emitting layer 1 and the second electrode 4. There is a gap between at least one of the N-type charge generation layer 21 and the P-type charge generation layer 22 and the second electrode 4. In some embodiments, in the direction parallel to the base substrate, there is a gap between the first light-emitting layer 1 and the second electrode 4. There is a gap between the charge generation layer 2 and the second electrode 4. The two functions are superimposed to effectively avoid the problem of short circuit between the light-emitting element and the second electrode 4 at the edge of the isolation groove 5.

[0060] In an exemplary embodiment, at least one of the N-type charge generation layer 21 and the P-type charge generation layer 22 is coated on the outside of the first light emitting layer 1 .

[0061] Exemplarily, the second light-emitting layer 3 is coated on the outside of the charge generating layer 2 .

[0062] Exemplarily, the distance between each edge of the second light-emitting layer 3 and the corresponding edge of the first light-emitting layer 1 is greater than or equal to 0.2um (that is, the difference between the size of the opening area of ​​the mask plate used to make the first light-emitting layer 1 and the size of the opening area of ​​the mask plate used to make the second light-emitting layer 3 is greater than or equal to 0.2um), so as to better realize that the charge generation layer 2 is coated on the outside of the first light-emitting layer 1, and the second light-emitting layer 3 is coated on the outside of the charge generation layer 2, with reference to Figure 1 and Figure 8 .

[0063] Figure 4 is a schematic diagram of the JV curve of the light-emitting element, Figure 4 The middle curve 100 is the JV curve after the N-type charge generation layer 21 and the P-type charge generation layer 22 are retracted in a direction parallel to the substrate so that a gap is formed between the N-type charge generation layer 21, the P-type charge generation layer 22 and the second electrode 4. Curve 200 is the JV curve of the film layers of the second electrode 4 covering the light-emitting element in the related art (the second electrode is in contact with each light-emitting element). Obviously, there is a gap between at least one of the N-type charge generation layer 21 and the P-type charge generation layer 2222 and the second electrode 4, which significantly increases the voltage of the light-emitting element.

[0064] Figure 5 It is a comparative schematic diagram of the gamma curve of the display panel (the gamma curve obtained after the N-type charge generation layer 21 and the P-type charge generation layer 22 are both set inward), the dotted line 300 is the standard gamma curve, and the solid line 400 is the gamma curve of the display panel in this embodiment. It can be seen that the display panel in this embodiment solves the problem of poor gamma.

[0065] refer to Figure 6In order to better reduce the voltage of the light-emitting element, ternary co-evaporation (three evaporation sources are evaporated together in one chamber, for example, the first light-emitting layer 1 includes a first light-emitting functional layer, the first light-emitting functional layer includes a first red light-emitting functional layer R, a first green light-emitting functional layer G, and a first blue light-emitting functional layer B. The first red light-emitting functional layer R, the first green light-emitting functional layer G, and the first blue light-emitting functional layer B in the first light-emitting functional layer can be formed simultaneously through ternary co-evaporation. During the ternary co-evaporation process, the three evaporation sources can be heated at the same time to form a gas phase, and then these gas phases are deposited on the substrate to form the desired film. By adjusting the evaporation rate of each material, the composition and thickness of the film can be precisely controlled. However, to achieve ternary co-evaporation, the thickness of the evaporated material needs to be less than 500A) to save the light-emitting material of the light-emitting element. In an exemplary embodiment, the first light-emitting layer 1 includes a first light-emitting functional layer, and the second light-emitting layer 3 includes a second light-emitting functional layer. The thickness of the first light-emitting functional layer and / or the thickness of the second light-emitting functional layer are both less than 300A.

[0066] In an exemplary embodiment, the first light-emitting layer 1 includes a first blocking layer, the second light-emitting layer 3 includes a second blocking layer, and the thickness of the first blocking layer and / or the thickness of the second blocking layer are both less than 300 Å.

[0067] In some embodiments, the thickness of the first light-emitting functional layer and / or the thickness of the second light-emitting functional layer are both less than 300 Å. Also, the thickness of the first barrier layer and / or the thickness of the second barrier layer are both less than 300 Å. Fig.10 Taking the green display screen as an example, by adopting this solution, after the thickness of the corresponding film layers of the first light-emitting layer 1 and the second light-emitting layer 3 is thinned, the voltage drops by 0.1-0.5V. Fig.10 In FIG. 5 , curve 500 is the voltage after the thickness of the corresponding film layers of the first light-emitting layer 1 and the second light-emitting layer 3 is reduced, and curve 600 is the voltage of the light-emitting element before the thickness is changed.

[0068] refer to Figure 6 In an exemplary embodiment, the light-emitting element may include a first electrode 6, a first hole injection layer 101, a first hole transport layer 102, a first blocking layer, a first light-emitting functional layer, a charge generation layer 2, a second hole transport layer 103, a second blocking layer, a second light-emitting functional layer, an electron transport layer 104, and a second electrode 4, which are stacked in sequence in a direction away from the substrate; wherein the first light-emitting functional layer (located at Figure 6The first light-emitting functional layer (between the N-type charge generation layer 21 and the first electrode 6) may include a first red light-emitting functional layer R, a first green light-emitting functional layer G, and a first blue light-emitting functional layer B. The first barrier layer includes a first red barrier layer R' corresponding to the first red light-emitting functional layer R, a first green barrier layer G' corresponding to the first green light-emitting functional layer G, and a first blue barrier layer B' corresponding to the first blue light-emitting functional layer B. The second light-emitting functional layer (located between the first and second electrodes 6) may include a first red light-emitting functional layer R, a first green light-emitting functional layer G, and a first blue barrier layer B' corresponding to the first blue light-emitting functional layer B. Figure 6 The P-type charge generating layer 22 and the second electrode 4) include a second red light-emitting functional layer R, a second green light-emitting functional layer G, and a second blue light-emitting functional layer B, and the second blocking layer includes a second red blocking layer R′ corresponding to the second red light-emitting functional layer R, a second green blocking layer G′ corresponding to the second green light-emitting functional layer G, and a second blue blocking layer B′ corresponding to the second blue light-emitting functional layer B.

[0069] In the above scheme, the thickness of the first electrode 6 is 50-200nm, the thickness of the first hole injection layer is 5-40nm, the thickness of the first hole transport layer is 5-40nm, the thickness of the first red blocking layer is 10-40nm, the thickness of the first green blocking layer is 10-30nm, the thickness of the first blue blocking layer is 0.2-20nm, the thickness of the first red light-emitting functional layer is 20-60nm, the thickness of the first green light-emitting functional layer is 20-50nm, the thickness of the first blue light-emitting functional layer is 10-30nm, and the thickness of the N-type charge generation layer 21 is 5-40 nm, the thickness of the P-type charge generation layer 22 is 5-40nm, the thickness of the second hole transport layer is 5-40nm, the thickness of the second red blocking layer is 10-40nm, the thickness of the second green blocking layer is 10-30nm, the thickness of the second blue blocking layer is 0.2-20nm, the thickness of the second red light-emitting functional layer is 20-60nm, the thickness of the second green light-emitting functional layer is 20-50nm, the thickness of the second blue light-emitting functional layer is 10-30nm, the thickness of the electron transport layer is 200-500nm, and the thickness of the second electrode 4 is 10-20nm.

[0070] Exemplarily, the material of the first light-emitting functional layer may be an electron transport material or a hole transport material, and the material of the second light-emitting functional layer may be an electron transport material or a hole transport material, for example, F4TCNQ, m-MTDATA, BCP, etc., but not limited thereto.

[0071] In an exemplary embodiment, a planarization layer 7, a passivation layer 8 and a pixel definition layer 9 are stacked in a direction away from the base substrate, a plurality of pixel openings are provided on the pixel definition layer 9, and the light emitting element is provided in the pixel opening 91;

[0072] The isolation groove 5 is disposed between adjacent pixel openings 91 , and the isolation groove 5 extends to the planar layer 7 in a direction close to the base substrate.

[0073] In an exemplary embodiment, in a direction parallel to the base substrate, the isolation groove 5 includes: a plurality of annular isolation groove groups, each annular isolation groove group includes: a plurality of annular isolation grooves with gaps, and at least part of each of the sub-pixels 10 is surrounded by one of the annular isolation grooves; wherein the shape of the annular isolation groove matches the shape of the sub-pixel 10 it surrounds.

[0074] refer to Fig. 9 The plurality of sub-pixels 10 include red sub-pixels, green sub-pixels and blue sub-pixels, each red sub-pixel is surrounded by an annular partition groove, and each blue sub-pixel is surrounded by an annular partition groove. Fig.10 , each green sub-pixel is surrounded by a ring-shaped partition groove.

[0075] refer to Figure 8 , exemplarily, the plurality of sub-pixels 10 include red sub-pixels, green sub-pixels and blue sub-pixels, each of which is rectangular and arranged in an array. The isolation grooves 5 disposed between adjacent sub-pixels include a longitudinal groove structure disposed between two adjacent columns of sub-pixels, and a transverse groove structure disposed between two adjacent rows of sub-pixels; between two adjacent columns of sub-pixels, the longitudinal groove structure is provided with a plurality of grooves disposed along the column direction (such as Figure 8 Similarly, between two adjacent rows of sub-pixels, a plurality of transverse groove structures are provided and arranged along the row direction (such as Figure 8 The X direction in the image is used to set the spacing.

[0076] refer to Fig.11 Exemplarily, the plurality of sub-pixels 10 include red sub-pixels, green sub-pixels and blue sub-pixels, which are arranged in a triangle, and the display panel includes a first column of sub-pixels and a second column of sub-pixels that are staggered, the red sub-pixels and the green sub-pixels are staggered in the first column of sub-pixels, the blue sub-pixels are arranged in the second column of sub-pixels, and in the row direction of the sub-pixels, strip isolation grooves 5 are arranged on opposite sides of the green sub-pixels, and in the column direction of the sub-pixels, U-shaped isolation grooves 5 are arranged on opposite sides of the red sub-pixels.

[0077] An embodiment of the present invention further provides a display device, comprising the above-mentioned display panel.

[0078] An embodiment of the present invention further provides a method for manufacturing a display panel, which is used to manufacture the above-mentioned display panel, comprising:

[0079] Forming a driving structure layer on a base substrate, wherein the driving structure layer includes a pixel circuit;

[0080] forming a planarization layer and a passivation layer in sequence on the driving structure layer;

[0081] The passivation layer is etched by a dry etching process to form an opening area in a region between adjacent sub-pixels, wherein the opening area extends to the planar layer;

[0082] forming a first electrode on a side of the passivation layer away from the substrate;

[0083] forming a pixel definition layer on a side of the first electrode away from the substrate, wherein the pixel definition layer has a plurality of pixel openings, and the pixel openings allow at least a portion of the first electrode to be exposed;

[0084] A first light-emitting layer, a charge generation layer, and a second light-emitting layer are sequentially formed on a side of the pixel definition layer away from the base substrate, wherein the charge generation layer includes an N-type charge generation layer and a P-type charge generation layer;

[0085] At least one of the N-type charge generation layer and the P-type charge generation layer has a gap between the second electrode and the direction parallel to the base substrate.

[0086] There are a few points to note:

[0087] (1) The drawings of the embodiments of the present disclosure only relate to the structures related to the embodiments of the present disclosure, and other structures may refer to the general design.

[0088] (2) For the sake of clarity, in the drawings used to describe the embodiments of the present disclosure, the thickness of layers or regions is exaggerated or reduced, that is, these drawings are not drawn according to the actual scale. It is understood that when an element such as a layer, film, region or substrate is referred to as being "on" or "under" another element, the element may be "directly" "on" or "under" the other element or there may be intermediate elements.

[0089] (3) In the absence of conflict, the embodiments of the present disclosure and the features therein may be combined with each other to obtain new embodiments.

[0090] It is to be understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of the present invention, but the present invention is not limited thereto. For those of ordinary skill in the art, various modifications and improvements can be made without departing from the spirit and essence of the present invention, and these modifications and improvements are also considered to be within the scope of protection of the present invention.

Claims

1. A display panel, comprising a base substrate, a plurality of sub-pixels are arranged on the base substrate, each of the sub-pixels comprises a light-emitting element, and an isolation groove for isolating the light-emitting element is arranged between adjacent sub-pixels, characterized in that: The light emitting element comprises a first electrode, a first light emitting layer, a charge generating layer, a second light emitting layer and a second electrode which are sequentially stacked in a direction away from the base substrate, wherein the charge generating layer comprises an N-type charge generating layer and a P-type charge generating layer; At least one of the N-type charge generation layer and the P-type charge generation layer has a gap between the second electrode and the direction parallel to the base substrate.

2. The display panel according to claim 1, characterized in that: An orthographic projection area of ​​at least one of the N-type charge generation layer and the P-type charge generation layer on the base substrate is smaller than an orthographic projection area of ​​the second electrode on the base substrate.

3. The display panel according to claim 1, characterized in that: A distance between at least one of the N-type charge generation layer and the P-type charge generation layer and the second electrode in a direction parallel to the base substrate is greater than or equal to 0.2 um.

4. The display panel according to claim 1, characterized in that: In a direction parallel to the base substrate, a gap is provided between the first light emitting layer and the second electrode.

5. The display panel according to claim 4, characterized in that: An area of ​​an orthographic projection of the first light emitting layer on the base substrate is smaller than an area of ​​an orthographic projection of the second electrode on the base substrate.

6. The display panel according to claim 4, characterized in that: An area of ​​an orthographic projection of the first light emitting layer on the base substrate is smaller than or equal to an area of ​​an orthographic projection of at least one of the N-type charge generation layer and the P-type charge generation layer on the base substrate.

7. The display panel according to claim 4, characterized in that: At least one of the N-type charge generation layer and the P-type charge generation layer covers the outside of the first light emitting layer.

8. The display panel according to claim 7, characterized in that: The second light-emitting layer covers the outside of the charge generating layer.

9. The display panel according to claim 1, characterized in that: The first light-emitting layer includes a first light-emitting functional layer, the second light-emitting layer includes a second light-emitting functional layer, and the thickness of the first light-emitting functional layer and / or the thickness of the second light-emitting functional layer is less than 300 Å.

10. The display panel according to claim 1, characterized in that: The first light-emitting layer includes a first blocking layer, and the second light-emitting layer includes a second blocking layer. The thickness of the first blocking layer and / or the thickness of the second blocking layer is less than 300 Å.

11. The display panel according to claim 1, characterized in that: A flat layer, a passivation layer and a pixel definition layer are stacked in a direction away from the base substrate, a plurality of pixel openings are arranged on the pixel definition layer, and the light emitting elements are arranged in the pixel openings; The isolation groove is disposed between adjacent pixel openings, and the isolation groove extends to the planar layer in a direction close to the base substrate.

12. A display device, characterized in that: A display panel comprising any one of claims 1 to 11.

13. A method for manufacturing a display panel, used for manufacturing the display panel according to any one of claims 1 to 11, characterized in that: include: Forming a driving structure layer on a base substrate, wherein the driving structure layer includes a pixel circuit; forming a planarization layer and a passivation layer in sequence on the driving structure layer; The passivation layer is etched by a dry etching process to form an opening area in a region between adjacent sub-pixels, wherein the opening area extends to the planar layer; forming a first electrode on a side of the passivation layer away from the substrate; forming a pixel definition layer on a side of the first electrode away from the substrate, wherein the pixel definition layer has a plurality of pixel openings, and the pixel openings allow at least a portion of the first electrode to be exposed; A first light-emitting layer, a charge generation layer, and a second light-emitting layer are sequentially formed on a side of the pixel definition layer away from the base substrate, wherein the charge generation layer includes an N-type charge generation layer and a P-type charge generation layer; At least one of the N-type charge generation layer and the P-type charge generation layer has a gap between the second electrode and the direction parallel to the base substrate.

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