Pixel circuit and driving method thereof, display panel and display device
By using multiple control circuits in the pixel circuit to achieve multiplexing at different stages, the problem of threshold voltage offset of the pixel circuit driving transistor in the display panel is solved, threshold voltage compensation of the driving circuit and circuit simplification are realized, and the uniformity of the display panel is improved.
Patent Information
- Application Number
- CN202510192200.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-20
- Publication Date
- 2025-04-15
- Estimated Expiration
- 2045-02-20
AI Technical Summary
The threshold voltage of the driving transistor in the pixel circuit at different locations in the display panel may have different offset states, resulting in poor uniformity of the display panel.
By introducing a first control circuit, a second control circuit and a third control circuit into the pixel circuit, multiplexing is achieved in the initialization, compensation and light emission stages, the control drive circuit generates a driving current, and the potential difference is stored through the storage circuit to compensate the threshold voltage of the driving circuit.
The uniformity compensation of the threshold voltage of the driving circuit is realized, the uniformity of the display panel is improved, and the circuit structure is simplified.
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Figure CN119832835A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of display technology, and in particular to a pixel circuit and a driving method thereof, a display panel, and a display device. Background Art
[0002] Pixel circuits are circuits formed based on semiconductor technology. They realize pixel light emission through array arrangement and can be applied to display devices, image sensors and other devices. Different types of display devices can have different pixel circuits, and the quality of pixel circuit design will also affect the display performance of the display device accordingly.
[0003] In the related art, the threshold voltages of driving transistors in pixel circuits at different positions in a display panel may have different offset states, resulting in poor uniformity of the display panel. Summary of the invention
[0004] In view of this, an object of the embodiments of the present disclosure is to provide a pixel circuit and a driving method thereof, a display panel, and a display device, so as to solve the above-mentioned problems to a certain extent.
[0005] According to a first aspect of an embodiment of the present disclosure, a pixel circuit is provided, including a light-emitting device, a driving circuit, a data writing circuit, a first control circuit, a second control circuit, a third control circuit and a first storage circuit, wherein:
[0006] The light emitting device has a first end electrically connected to the first signal end;
[0007] The first control circuit is electrically connected to the second end of the light emitting device, the first end of the driving circuit and the first control end respectively, and is configured to: under the control of the first control signal connected to the first control end, transmit the first voltage signal provided by the first signal end to the second control circuit and control the driving circuit to generate a driving current;
[0008] The second control circuit is electrically connected to the first terminal and the third terminal of the driving circuit and the first scanning signal terminal, respectively, and is configured to: under the control of the first scanning signal connected to the first scanning signal terminal, initialize the potential of the third terminal of the driving circuit based on the first voltage signal transmitted by the first control circuit, and write the threshold voltage of the driving circuit to the third terminal of the driving circuit in cooperation with the third control circuit;
[0009] The third control circuit is electrically connected to the second terminal, the second signal terminal and the second control terminal of the driving circuit respectively, and is configured to: under the control of the second control signal connected to the second control terminal, write the second voltage signal provided by the second signal terminal into the second terminal of the driving circuit and control the driving circuit to generate the driving current;
[0010] The first storage circuit is electrically connected to the first node and the third terminal of the driving circuit respectively, and is configured to: store a potential difference between the first node and the third terminal of the driving circuit;
[0011] The data writing circuit is electrically connected to the data signal terminal, the first node and the second scanning signal terminal respectively, and is configured to: under the control of the second scanning signal connected to the second scanning signal terminal, write the data signal connected to the data signal terminal into the third terminal of the driving circuit through the first storage circuit;
[0012] The driving circuit has a first end electrically connected to the first control circuit and the second control circuit, a second end electrically connected to the third control circuit, and a third end electrically connected to the first storage circuit, and is configured to generate a driving current for driving the light-emitting device under the control of the first control circuit and the third control circuit.
[0013] According to a second aspect of the embodiments of the present disclosure, a display panel is provided, comprising a plurality of pixel circuits as described in the first aspect arranged in an array.
[0014] According to a third aspect of the embodiments of the present disclosure, a display device is provided, including:
[0015] The display panel as described in the second aspect;
[0016] The peripheral driving circuit is electrically coupled to the display panel and is configured to provide a driving signal for the display panel.
[0017] A fourth aspect of the embodiments of the present disclosure provides a driving method of the pixel circuit as described in the first aspect, including:
[0018] In an initialization phase, under the control of a first control signal connected to the first control terminal and a first scan signal connected to the first scan signal terminal, the first control circuit and the second control circuit are used to initialize the potential of the third terminal of the driving circuit based on the first voltage signal;
[0019] In the compensation stage, under the control of the first scan signal connected to the first scan signal terminal and the second control signal connected to the second control terminal, the threshold voltage of the driving circuit is written to the third terminal of the driving circuit by using the second control circuit and the third control circuit;
[0020] In the data writing stage, under the control of the second scanning signal connected to the second scanning signal terminal, the data signal connected to the data signal terminal is written into the third terminal of the driving circuit by using the first storage circuit;
[0021] In the light-emitting stage, under the control of the first control signal connected to the first control terminal and the second control signal connected to the second control terminal, the first control circuit and the third control circuit are used to control the driving circuit to generate a driving current for driving the light-emitting device.
[0022] From the above description, it can be seen that the pixel circuit and its driving method, display panel, and display device provided in the embodiments of the present disclosure realize multiplexing by utilizing the first control circuit, the second control circuit, and the third control circuit respectively at different stages, which on the one hand achieves the compensation effect of the threshold voltage of the driving circuit, and on the other hand achieves circuit simplification. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] In order to more clearly illustrate the embodiments of the present disclosure or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0024] Figure 1 A schematic structural diagram of a display device according to an embodiment of the present disclosure is shown.
[0025] Figure 2A A schematic cross-sectional structure diagram of a display panel according to an embodiment of the present disclosure is shown.
[0026] Figure 2B A structural diagram of a display substrate according to an embodiment of the present disclosure is shown.
[0027] Figure 3A A schematic diagram of an exemplary pixel circuit provided by an embodiment of the present disclosure is shown.
[0028] Figure 3B A more specific circuit structure schematic diagram of a pixel circuit provided by an embodiment of the present disclosure is shown.
[0029] Figure 3C Another more specific circuit structure schematic diagram of a pixel circuit provided by an embodiment of the present disclosure is shown.
[0030] Figure 3D A timing control schematic diagram of a pixel circuit according to an embodiment of the present disclosure is shown.
[0031] Figure 4A A schematic diagram of another exemplary pixel circuit provided by an embodiment of the present disclosure is shown.
[0032] Figure 4B Shows Figure 4AA more specific circuit structure diagram of a pixel circuit.
[0033] Figure 4C Shows Figure 4A Another more specific circuit structure schematic diagram of the pixel circuit.
[0034] Figure 4D Another timing control schematic diagram of a pixel circuit according to an embodiment of the present disclosure is shown.
[0035] Figure 5A A schematic diagram of another exemplary pixel circuit provided by an embodiment of the present disclosure is shown.
[0036] Figure 5B Shows Figure 5A A more specific circuit structure diagram of a pixel circuit.
[0037] Fig. 6A A schematic diagram of another exemplary pixel circuit provided by an embodiment of the present disclosure is shown.
[0038] Figure 6B Shows Fig. 6A A more specific circuit structure diagram of a pixel circuit.
[0039] Figure 7 A flow chart of an exemplary driving method of a pixel circuit provided by an embodiment of the present disclosure is shown. DETAILED DESCRIPTION
[0040] In order to make the objectives, technical solutions and advantages of the present disclosure more clearly understood, the present disclosure is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.
[0041] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not represent any order, quantity or importance, but are only used to distinguish different components. "Including" or "comprising" and similar words mean that the elements or objects appearing in front of the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.
[0042] Unless the context requires otherwise, in the embodiments of the present disclosure, the term "comprise" and its other forms, such as the third person singular form "comprises" and the present participle form "comprising", are interpreted as open and inclusive, that is, "including, but not limited to".
[0043] In the description of the embodiments of the present disclosure, the terms "one embodiment", "some embodiments", "exemplary embodiments", "example", "specific example" or "some examples" and the like are intended to indicate that specific features, structures, materials or characteristics associated with the embodiment or example are included in at least one embodiment or example of the present disclosure. The schematic representations of the above terms do not necessarily refer to the same embodiment or example. In addition, the specific features, structures, materials or characteristics may be included in any one or more embodiments or examples in any appropriate manner.
[0044] When describing some embodiments, the expression "connected" and its derivatives may be used. For example, when describing some embodiments, the term "connected" may be used to indicate that two or more components have direct physical or electrical contact with each other.
[0045] “At least one of A, B, and C” has the same meaning as “at least one of A, B, or C” and both include the following combinations of A, B, and C: A only, B only, C only, the combination of A and B, the combination of A and C, the combination of B and C, and the combination of A, B, and C.
[0046] The use of "suitable for" or "configured to" in the embodiments of the present disclosure is meant to be open and inclusive language.
[0047] It should be understood that in the embodiments of the present disclosure, “electrical connection” may be a direct connection or an electrical connection achieved through other wiring (eg, a signal transmission line).
[0048] Figure 1 A schematic structural diagram of a display device 100 according to an embodiment of the present disclosure is shown.
[0049] like Figure 1 As shown, some embodiments of the present disclosure provide a display device 100. It can be understood that the display device 100 is a product with an image display function. Exemplarily, the display device 100 can be used to display static images, such as pictures or photos. The display device 100 can also be used to display dynamic images, such as videos or game screens.
[0050] In some embodiments, the display device 100 can be a laptop computer, a mobile phone, a wireless device, a personal data assistant (PDA), a handheld or portable computer, a GPS receiver / navigator, a camera, an MP4 video player, a camcorder, a game console, a watch, a clock, a calculator, a television monitor, a flat panel display, a computer monitor, an automobile display (e.g., an odometer display, etc.), a navigator, a cockpit controller and / or display, a display of a camera view (e.g., a display of a rearview camera in a vehicle), an electronic photograph, an electronic billboard or sign, a projector, packaging and aesthetic structures (e.g., a display of an image of a piece of jewelry), etc.
[0051] In some embodiments,
[0052] The display device 100 includes a display panel 200. In addition, the display device 100 may also include an under-screen camera and an under-screen fingerprint recognition sensor, so that the display device 100 can realize various functions such as taking pictures, recording videos, fingerprint recognition or face recognition. In some embodiments, the display device 100 may also include a peripheral driving circuit, which is electrically coupled to the display panel 200 and is configured to provide the display panel 200 with the required driving signal.
[0053] Figure 2A A schematic cross-sectional structure diagram of a display panel 200 according to an embodiment of the present disclosure is shown.
[0054] The display panel 200 may include a display substrate 210. For example, as shown in FIG2 , the display panel 200 may further include other functional film layers 212 located on the display side of the display substrate 210, such as a touch function layer, an anti-reflection layer, an anti-fingerprint layer, a hardening layer, and a packaging cover plate, so that the display panel 200 can achieve different functions. The embodiments of the present disclosure do not further limit the other functional film layers 212 of the display panel 200, and the display substrate 210 is illustrated below.
[0055] Figure 2B FIG. 2 shows a structural diagram of a display substrate 210 according to an embodiment of the present disclosure.
[0056] In some embodiments, Figure 2B As shown, the display substrate 210 includes a plurality of sub-pixels 300. The plurality of sub-pixels 300 are arranged in a plurality of columns along a first direction X, and in a plurality of rows along a second direction Y. In some embodiments, the first direction X and the second direction Y intersect. Exemplarily, the first direction X is perpendicular to the second direction Y. In some embodiments, the first direction X is a horizontal direction, and the second direction Y is a vertical direction.
[0057] It can be understood that the sub-pixel 300 is the smallest unit for the display substrate 210 to display the picture. Each sub-pixel 300 can emit a single color of light, such as red light, green light or blue light. The display substrate 210 may include a plurality of red sub-pixels, a plurality of green sub-pixels and a plurality of blue sub-pixels. By adjusting the brightness (or grayscale) of the sub-pixels 300 of different colors, red light, green light and blue light of different intensities can be obtained, and at least two of the red light, green light and blue light of different intensities are superimposed to display more colors of light, thereby realizing the full-color display of the display substrate 210.
[0058] Understandably, if Figure 2B As shown, the display substrate 210 has a display area AA and a non-display area PA, and the non-display area PA is arranged at the periphery of the display area AA. The display area AA is used to display image information, and a plurality of sub-pixels 300 are located in the display area AA of the display substrate 210.
[0059] In some embodiments, each sub-pixel 300 may further include a pixel circuit for realizing the light emission of the light emitting device. Optionally, the light emitting device may include at least one of a light emitting diode (Light Emitting Diode, LED), an organic light emitting diode (Organic Light Emitting Diode, OLED), a quantum dot light emitting diode (Quantum Dot Light Emitting Diodes, QLED), a sub-millimeter light emitting diode (Mini LED) and a micro light emitting diode (Micro LED). It can be understood that the pixel circuit may not include a light emitting device, but only include an electrical device for realizing a driving function, so that the pixel circuit is electrically connected to the light emitting device to realize the driving of the light emitting device.
[0060] Micro LED has a wide range of applications in the future display field due to its high brightness and high reliability. Therefore, the embodiments of the present disclosure can be applied to a display device using Micro LED as a light-emitting device. Optionally, the display device 100 of the embodiments of the present disclosure can be a wearable device (e.g., a virtual reality (VR) device, an augmented reality (AR) device, etc.) and the light-emitting device therein can be Micro LED, so that a better display effect can be achieved.
[0061] As mentioned above, in the related art, the threshold voltages of the driving transistors in the pixel circuits at different positions in the display panel may have different offset states, resulting in poor uniformity of the display panel.
[0062] In view of this, an embodiment of the present disclosure proposes a pixel circuit to solve the above-mentioned problem to a certain extent.
[0063] Figure 3A A schematic diagram of an exemplary pixel circuit 310 provided in an embodiment of the present disclosure is shown.
[0064] like Figure 3A As shown, in some embodiments, the pixel circuit 310 may include a light emitting device MLED, a driving circuit 311 , a first control circuit 312 , a second control circuit 313 , a third control circuit 314 , a first storage circuit 315 and a data writing circuit 316 .
[0065] The light emitting device MLED, a first end (e.g., a positive electrode) thereof can be electrically connected to the first signal end VDD, for receiving a first voltage signal provided by the first signal end VDD. Exemplarily, the first voltage signal can be a high level signal. Optionally, the light emitting device MLED can be a light emitting diode (Light Emitting Diode, referred to as LED), an organic light emitting diode (Organic Light Emitting Diode, referred to as OLED), a quantum dot light emitting diode (Quantum Dot Light Emitting Diodes, referred to as QLED), a sub-millimeter light emitting diode (Mini LED), or a micro light emitting diode (Micro LED).
[0066] The first control circuit 312 may be electrically connected to the second terminal (e.g., cathode) of the light emitting device MLED, the first terminal of the driving circuit 311, and the first control terminal EM1, respectively, and may be configured to: under the control of the first control signal connected to the first control terminal EM1, transmit the first voltage signal provided by the first signal terminal VDD to the second control circuit 313 and control the driving circuit 311 to generate a driving current for driving the light emitting device MLED. For example, referring to Figure 3D , the first control circuit 312 can transmit the first voltage signal provided by the first signal terminal VDD to the second control circuit 313 in phase 1 (e.g., initialization phase) under the control of the first control signal connected to the first control terminal EM1, and control the driving circuit 311 to generate a driving current for driving the light-emitting device MLED in phase 4 (e.g., light-emitting phase). In this way, the first control circuit 312 can implement the initialization function in phase 1 and the light-emitting control function in phase 4, thereby simplifying the circuit structure.
[0067] The second control circuit 313 may be electrically connected to the first terminal and the third terminal of the driving circuit 311 and the first scanning signal terminal Gate1 respectively, and may be configured to: under the control of the first scanning signal connected to the first scanning signal terminal Gate1, initialize the potential of the third terminal of the driving circuit 311 based on the first voltage signal transmitted by the first control circuit 312, and write the threshold voltage Vth of the driving circuit 311 to the third terminal of the driving circuit 311 with the cooperation of the third control circuit 314. For example, referring to Figure 3D , the second control circuit 313 can, under the control of the first scan signal connected to the first scan signal terminal Gate1, initialize the potential of the third terminal of the driving circuit 311 based on the first voltage signal transmitted by the first control circuit 312 in phase 1 (for example, the initialization phase), and write the threshold voltage Vth of the driving circuit 311 to the third terminal of the driving circuit 311 in phase 2 (for example, the compensation phase) with the cooperation of the third control circuit 314. In this way, the second control circuit 313 can realize the initialization function in phase 1 and realize the internal compensation function of the threshold voltage Vth of the driving circuit 311 in phase 2, thereby simplifying the circuit structure.
[0068] The third control circuit 314 may be electrically connected to the second terminal, the second signal terminal VSS and the second control terminal EM2 of the driving circuit 311 respectively, and may be configured to: under the control of the second control signal connected to the second control terminal EM2, write the second voltage signal provided by the second signal terminal VSS to the second terminal of the driving circuit 311 and control the driving circuit 311 to generate the driving current for driving the light emitting device MLED. Figure 3D , the third control circuit 314 can, under the control of the second control signal connected to the second control terminal EM2, write the second voltage signal provided by the second signal terminal VSS to the second terminal of the driving circuit 311 in phase 2 (for example, the compensation phase), so as to cooperate with the second control circuit 313 to write the threshold voltage to the third terminal of the driving circuit 311, and control the driving circuit 311 to generate the driving current for driving the light-emitting device MLED in phase 4 (for example, the light-emitting phase). In this way, the third control circuit 313 can cooperate with the second control circuit 313 in phase 2 to realize the internal compensation function of the threshold voltage, and realize the light-emitting control function in phase 4, thereby simplifying the circuit structure.
[0069] The first storage circuit 315 can be electrically connected to the first node N1 and the third end of the driving circuit (which can also be the second node N2), respectively, and can be configured to store the potential difference between the first node and the third end of the driving circuit (which can also be the second node N2).
[0070] The data writing circuit 316 can be electrically connected to the data signal terminal Data, the first node N1 and the second scanning signal terminal Gate2 respectively, and can be configured to: under the control of the second scanning signal connected to the second scanning signal terminal Gate2, write the data signal connected to the data signal terminal Data into the third terminal of the driving circuit 311 through the first storage circuit 315.
[0071] The driving circuit 311 may have a first end electrically connected to the first control circuit 312 and the second control circuit 313, a second end electrically connected to the third control circuit 314, and a third end (which may also be the second node N2) electrically connected to the first storage circuit 315, and may be configured to generate a driving current for driving the light-emitting device MLED under the control of the first control circuit 312 and the third control circuit 314, thereby controlling the light-emitting device MLED to emit light.
[0072] It can be seen that the pixel circuit of the above embodiment realizes the internal compensation effect of the threshold voltage of the driving circuit on the one hand, and realizes the simplification of the circuit on the other hand by using the first control circuit, the second control circuit and the third control circuit to realize multiplexing at different stages. In some embodiments, the pixel circuit can be applicable to low temperature polysilicon (LTPS) thin film transistors (TFT) and oxide thin film transistors (Oxide TFT), and the uniformity compensation of the threshold voltage Vth of the driving transistor DTFT is realized by internal compensation.
[0073] In some embodiments, Figure 3A As shown, the pixel circuit 310 may further include an initialization circuit 317. Optionally, the initialization circuit 317 may be electrically connected to the first node N1, the second signal terminal VSS, and the first scanning signal terminal Gate1, respectively, and may be configured to: under the control of the first scanning signal connected to the first scanning signal terminal Gate1, initialize the potential of the first node N1 based on the second voltage signal provided by the second signal terminal VSS, thereby resetting the potential of the first node N1 to ensure the normal operation of the pixel circuit 310.
[0074] In some embodiments, Figure 3AAs shown, the pixel circuit 310 further includes a second storage circuit 318. Optionally, the second storage circuit 318 is electrically connected to the third terminal (which may also be the second node N2) of the driving circuit 311 and the first signal terminal VDD or the second signal terminal VSS, respectively, and may be configured to: store the potential difference between the third terminal of the driving circuit 311 and the first voltage signal provided by the first signal terminal VDD, or store the potential difference between the third terminal of the driving circuit 311 and the second voltage signal provided by the second signal terminal VSS, so that the potential of the second node N2 can be more stable, thereby ensuring the stable operation of the pixel circuit 310.
[0075] Figure 3B and Figure 3C A more specific circuit structure schematic diagram of a pixel circuit 310 provided by an embodiment of the present disclosure is respectively shown.
[0076] In some embodiments, Figure 3B and Figure 3C As shown, the driving circuit may include a driving transistor DTFT, a first end of the driving transistor DTFT is electrically connected to the first control circuit 312 and the second control circuit 313, a second end of the driving transistor DTFT is electrically connected to the third control circuit 314, and a control end of the driving transistor DTFT is electrically connected to the first storage circuit 315. Exemplarily, the first control circuit 312 may include a first transistor T1, the second control circuit 313 may include a second transistor T2, the third control circuit 314 may include a third transistor T3, the first storage circuit 315 may include a first capacitor C1, a first end of the driving transistor DTFT may be electrically connected to the first transistor T1 and the second transistor T2, a second end of the driving transistor DTFT may be electrically connected to the third transistor T3, and a control end of the driving transistor DTFT may be electrically connected to the first capacitor C1.
[0077] In some embodiments, Figure 3B and Figure 3C As shown, the first control circuit 312 may include a first transistor T1, a first end of the first transistor T1 is electrically connected to the second end of the light emitting device MLED, a second end of the first transistor T1 is electrically connected to the first end of the driving circuit 311, and a control end of the first transistor T1 is electrically connected to the first control end EM1. Exemplarily, the driving circuit 311 may include a driving transistor DTFT, and a second end of the first transistor T1 may be electrically connected to a first end of the driving transistor DTFT. In this way, the function of the first control circuit 312 can be realized by using the first transistor T1, and the circuit structure can be simplified.
[0078] In some embodiments, Figure 3B and Figure 3C As shown, the second control circuit 313 may include a second transistor T2. Optionally, the first end of the second transistor T2 is electrically connected to the first end of the driving circuit 311, the second end of the second transistor T2 is electrically connected to the third end of the driving circuit 311, and the control end of the second transistor T2 is electrically connected to the first scanning signal end Gate1. Exemplarily, the driving circuit 311 may include a driving transistor DTFT, the first end of the second transistor T2 is electrically connected to the first end of the driving transistor DTFT, and the second end of the second transistor T2 is electrically connected to the control end of the driving transistor DTFT. In this way, the function of the second control circuit 313 can be realized by using the second transistor T2, and the circuit structure can be simplified.
[0079] In some embodiments, Figure 3B and Figure 3C As shown, the third control circuit 314 may include a third transistor T3, a first end of the third transistor T3 is electrically connected to the second end of the driving circuit 311, a second end of the third transistor T3 is electrically connected to the second signal end VSS, and a control end of the third transistor T3 is electrically connected to the second control end EM2. Exemplarily, the driving circuit 311 may include a driving transistor DTFT, a first end of the third transistor T3 may be electrically connected to the second end of the driving transistor DTFT. In this way, the function of the third control circuit 314 can be realized by using the third transistor T3, and the circuit structure can be simplified.
[0080] In some embodiments, Figure 3B and Figure 3C As shown, the first storage circuit 315 may include a first capacitor C1, a first end of the first capacitor C1 is electrically connected to the first node N1, and a second end of the first capacitor C1 is electrically connected to a third end (which may also be the second node N2) of the driving circuit 311. In this way, the function of the first storage circuit 315 can be realized by using the first capacitor C1, and the circuit structure can be simplified.
[0081] In some embodiments, Figure 3B and Figure 3C As shown, the data writing circuit 316 may include a fourth transistor T4. Optionally, a first terminal of the fourth transistor T4 may be electrically connected to the data signal terminal Data, a second terminal of the fourth transistor T4 may be electrically connected to the first node N1, and a control terminal of the fourth transistor T4 may be electrically connected to the second scan signal terminal Gate2.
[0082] In some embodiments, Figure 3B and Figure 3C As shown, the initialization circuit 317 includes a fifth transistor T5. Optionally, a first end of the fifth transistor T5 is electrically connected to the first node N1, a second end of the fifth transistor T5 is electrically connected to the second signal end VSS, and a control end of the fifth transistor T5 is electrically connected to the first scan signal end Gate1. In this way, the function of the initialization circuit 317 can be realized by using the fifth transistor T5, and the circuit structure can be simplified.
[0083] In some embodiments, Figure 3B and Figure 3C As shown, the second storage circuit 318 may include a second capacitor C2. Optionally, a first end of the second capacitor C2 is electrically connected to a third end of the driving circuit 311 (e.g., a control end of the driving transistor DTFT), and a second end of the second capacitor C2 is electrically connected to the first signal end VDD or the second signal end VSS. In this way, the function of the second storage circuit 318 can be realized by using the second capacitor C2, and the circuit structure can be simplified.
[0084] Combination Figures 3A to 3D The pixel circuit of the above embodiment may go through four stages when working: stage 1 (e.g., initialization stage), stage 2 (e.g., compensation stage), stage 3 (e.g., data writing stage), and stage 4 (e.g., light emitting stage). Each stage is described below.
[0085] Phase 1: The first scanning signal terminal Gate1 and the first control terminal EM1 are set high, the first transistor T1, the second transistor T2 and the fifth transistor T5 are turned on, and the potential of the first node N1 is set to V N1 =VSS, the potential of the control terminal of the driving transistor DTFT is set to Vg=VDD.
[0086] Phase 2: The first scanning signal terminal Gate1 maintains a high potential, the first control terminal EM1 is set low, the second control terminal EM2 is set high, the second transistor T2, the fifth transistor T5 and the third transistor T3 are turned on, and the first end of the driving transistor DTFT is connected to the control end, thereby realizing a diode connection. At this time, the potential of the second end of the driving transistor DTFT is set to Vs=VSS, so that the threshold voltage Vth of the driving transistor DTFT can be written to the control end of the driving transistor DTFT, Vg=Vs+Vth.
[0087] Phase 3: The second scanning signal terminal Gate2 is set high, the sixth transistor T6 is turned on, and data is written into the first node N1. At this time, the voltage change of the first node N1 is ΔVb=VSS-Vdata, and the first capacitor C1 between the first node N1 and the control terminal of the driving transistor DTFT causes the potential of the control terminal of the driving transistor DTFT to jump. Thereby, the data signal Vdata at the data signal terminal Data is written into the control terminal of the driving transistor DTFT, thereby realizing gray scale control.
[0088] Phase 4: The first control terminal EM1 and the second control terminal EM2 are set high, the first transistor T1 and the third transistor T3 are turned on, and the potential of the control terminal of the driving transistor DTFT stores the information of the data signal Vdata, and the light-emitting branch flows through the driving current controlled by the voltage of the data signal Vdata, so that the light-emitting device MLED emits light.
[0089] Figure 4A FIG. 4 is a schematic diagram of another exemplary pixel circuit 320 provided by an embodiment of the present disclosure.
[0090] like Figure 4A As shown, in some embodiments, the first control circuit 312 may further include a first control subcircuit 3121 and a first light emitting control subcircuit 3122 .
[0091] The first control subcircuit 3121 can be electrically connected to the second end of the light-emitting device MLED, the first end of the driving circuit 311 and the third scanning signal terminal Gate3, respectively, and can be configured to: under the control of the third scanning signal connected to the third scanning signal terminal Gate3, transmit the first voltage signal provided by the first signal terminal VDD to the second control circuit 313.
[0092] The first light-emitting control subcircuit 3122 can be electrically connected to the second end of the light-emitting device MLED, the first end of the driving circuit 311 and the first control end EM1, respectively, and can be configured to: under the control of the first control signal connected to the first control end EM1, control the driving circuit 311 to generate the driving current for driving the light-emitting device MLED.
[0093] Among them, Figure 4D As shown, the duration of the effective level of the first control signal connected to the first control terminal EM1 is greater than the duration of the effective level of the third scan signal connected to the third scan signal terminal Gate3.
[0094] like Figure 3D As shown, in Figure 3AIn the pixel circuit embodiment, the first control signal connected to the first control terminal EM1 needs to be turned on in stage 1 and stage 4, and the two turn-on time widths are different, which places high requirements on the shift register.
[0095] contrast Figure 3D and Figure 4D It can be seen that, in this embodiment, the first control circuit 312 is further divided into a first control subcircuit 3121 and a first light-emitting control subcircuit 3122, so that the first control subcircuit 3121 can be controlled by the third scanning signal connected to the third scanning signal terminal Gate3, and the first light-emitting control subcircuit 3122 can be controlled by the first control signal connected to the first control terminal EM1, so that the effective level of the first control signal connected to the first control terminal EM1 can maintain a periodic wider high-level output, and the effective level of the third scanning signal connected to the third scanning signal terminal Gate3 can maintain a periodic narrower high-level output, without the need for Figure 3A Like the first control signal connected to the first control terminal EM1 in the pixel circuit, it is necessary to alternately realize a narrower high-level output and a wider high-level output in stage 1 and stage 4 respectively, so as to better realize the control of the pixel circuit.
[0096] like Figure 4A As shown, in some embodiments, the third control circuit 314 may further include a second control subcircuit 3141 and a second light emitting control subcircuit 3142 .
[0097] The second control subcircuit 3141 can be electrically connected to the second end of the driving circuit 311, the second signal terminal VSS and the fourth scanning signal terminal Gate4, respectively, and can be configured to: under the control of the fourth scanning signal connected to the fourth scanning signal terminal Gate4, write the second voltage signal provided by the second signal terminal VSS to the second end of the driving circuit 311.
[0098] The second light-emitting control subcircuit 3142 can be electrically connected to the second end of the driving circuit 311, the second signal end VSS and the second control end EM2, respectively, and can be configured to: under the control of the second control signal connected to the second control end EM2, control the driving circuit 311 to generate the driving current for driving the light-emitting device MLED.
[0099] Among them, Figure 4D As shown, the duration of the effective level of the second control signal connected to the second control terminal EM2 is greater than the duration of the effective level of the fourth scanning signal connected to the fourth scanning signal terminal Gate4.
[0100] like Figure 3D As shown, in Figure 3A In the pixel circuit embodiment, the second control signal connected to the second control terminal EM2 needs to be turned on in stage 2 and stage 4, and the two turn-on time widths are different, which places high requirements on the shift register.
[0101] contrast Figure 3D and Figure 4D It can be seen that, in this embodiment, the third control circuit 314 is further split into a second control subcircuit 3141 and a second light-emitting control subcircuit 3142, so that the second control subcircuit 3141 can be controlled by the fourth scanning signal connected to the fourth scanning signal terminal Gate4, and the second light-emitting control subcircuit 3142 can be controlled by the second control signal connected to the second control terminal EM2, so that the effective level of the second control signal connected to the second control terminal EM2 can maintain a periodic wider high-level output, and the effective level of the fourth scanning signal connected to the fourth scanning signal terminal Gate4 can maintain a periodic narrower high-level output, without the need for Figure 3A Like the second control signal connected to the second control terminal EM2 in the pixel circuit, it is necessary to alternately realize a narrower high-level output and a wider high-level output in stage 2 and stage 4 respectively, so as to better realize the control of the pixel circuit.
[0102] In some embodiments, Figure 4D As shown, since the first control subcircuit 3121 and the second control subcircuit 3141 can respectively implement the control of stage 1 and stage 2, the first control signal connected to the first control terminal EM1 and the second control signal connected to the second control terminal EM2 are both at a valid level in stage 4. Therefore, the first control terminal EM1 can be multiplexed as the second control terminal EM2, so that the first control signal and the second control signal can be merged, thereby simplifying the circuit structure.
[0103] Figure 4B and Figure 4C A more specific circuit structure schematic diagram of a pixel circuit 320 provided by an embodiment of the present disclosure is respectively shown.
[0104] In some embodiments, Figure 4B and Figure 4CAs shown, the first control subcircuit 3121 includes a sixth transistor T6, a first end of the sixth transistor T6 is electrically connected to the second end of the light emitting device MLED, a second end of the sixth transistor T6 is electrically connected to the first end of the driving circuit 311, and a control end of the sixth transistor T6 is electrically connected to the third scanning signal end Gate3; the first light emitting control subcircuit 3122 includes a first transistor T1, a first end of the first transistor T1 is electrically connected to the second end of the light emitting device MLED, a second end of the first transistor T1 is electrically connected to the first end of the driving circuit 311, and a control end of the first transistor T1 is electrically connected to the first control end EM1. In this way, it is only necessary to use the third scanning signal connected to the third scanning signal end Gate3 to control the sixth transistor T6 to turn on in stage 1, and use the first control signal connected to the first control end EM1 to control the first transistor T1 to turn on in stage 4, thereby reducing the requirements for the shift register.
[0105] In some embodiments, Figure 4B and Figure 4C As shown, the second control subcircuit 3141 includes a seventh transistor T7, a first end of the seventh transistor T7 is electrically connected to the second end of the driving circuit 311, a second end of the seventh transistor T7 is electrically connected to the second signal end VSS, and a control end of the seventh transistor T7 is electrically connected to the fourth scanning signal end Gate4; the second light-emitting control subcircuit 3142 includes a third transistor T3, a first end of the third transistor T3 is electrically connected to the second end of the driving circuit 311, a second end of the third transistor T3 is electrically connected to the second signal end VSS, and a control end of the third transistor T3 is electrically connected to the second control end EM2. In this way, it is only necessary to use the fourth scanning signal connected to the fourth scanning signal end Gate4 to control the seventh transistor T7 to turn on in stage 2, and use the second control signal connected to the second control end EM2 to control the third transistor T3 to turn on in stage 4, thereby reducing the requirements for the shift register.
[0106] Figure 5A FIG. 4 is a schematic diagram of another exemplary pixel circuit 330 provided in an embodiment of the present disclosure.
[0107] In some embodiments, Figure 5A As shown, Figure 3ADifferent from the pixel circuit 310 of the embodiment, the second storage circuit 318 of the pixel circuit 330 of the present embodiment is electrically connected to the first node N1 and the first signal terminal VDD or the second signal terminal VSS, respectively, and is configured to: store the potential difference between the first node N1 and the first voltage signal provided by the first signal terminal VDD, or store the potential difference between the first node N1 and the second voltage signal provided by the second signal terminal VSS, so as to stabilize the potential of the first node N1 and reduce the jump of the potential of the first node N1 caused by the second scanning signal connected to the second scanning signal terminal Gate2 being turned off, thereby reducing the influence on the potential of the control terminal of the driving transistor DTFT.
[0108] Figure 5B Shows Figure 5A A more specific circuit structure diagram of a pixel circuit.
[0109] In some embodiments, Figure 5B As shown, the second storage circuit 318 includes a second capacitor C2; the first end of the second capacitor C2 is electrically connected to the first node N1, and the second end of the second capacitor C2 is electrically connected to the first signal terminal VDD or the second signal terminal VSS. The second capacitor C2 is used to stabilize the potential of the first node N1, reduce the jump of the potential of the first node N1 caused by the second scanning signal connected to the second scanning signal terminal Gate2 being turned off, thereby reducing the impact on the potential of the control terminal of the driving transistor DTFT. The driving timing of the pixel circuit 330 can refer to Figure 3D , I will not go into details here.
[0110] Fig. 6A FIG. 4 is a schematic diagram of another exemplary pixel circuit 340 provided in an embodiment of the present disclosure.
[0111] like Fig. 6A As shown, in some embodiments, Figure 5A The difference between the pixel circuit 330 and the pixel circuit 330 is that, in this embodiment, the first control circuit 312 is further divided into a first control subcircuit 3121 and a first light-emitting control subcircuit 3122, so that the first control subcircuit 3121 can be controlled by the third scanning signal connected to the third scanning signal terminal Gate3, and the first light-emitting control subcircuit 3122 can be controlled by the first control signal connected to the first control terminal EM1, so that the effective level of the first control signal connected to the first control terminal EM1 can maintain a periodic wider high-level output, and the effective level of the third scanning signal connected to the third scanning signal terminal Gate3 can maintain a periodic narrower high-level output, without the need for Figure 3AIn the pixel circuit of the present invention, the first control signal connected to the first control terminal EM1 needs to be alternately realized in stage 1 and stage 4 to respectively realize a narrower high-level output and a wider high-level output, so as to better realize the control of the pixel circuit. In this embodiment, the third control circuit 314 is further divided into a second control subcircuit 3141 and a second light-emitting control subcircuit 3142, so that the second control subcircuit 3141 can be controlled by the fourth scanning signal connected to the fourth scanning signal terminal Gate4, and the second light-emitting control subcircuit 3142 can be controlled by the second control signal connected to the second control terminal EM2, so that the effective level of the second control signal connected to the second control terminal EM2 can maintain a periodic wider high-level output, and the effective level of the fourth scanning signal connected to the fourth scanning signal terminal Gate4 can maintain a periodic narrower high-level output, without the need for Figure 3A The second control signal connected to the second control terminal EM2 in the pixel circuit needs to be alternately realized in phase 2 and phase 4 to respectively realize a narrower high level output and a wider high level output, so as to better realize the control of the pixel circuit. The driving timing of the pixel circuit 340 can refer to Figure 4D , I will not go into details here.
[0112] In some embodiments, Figure 4D As shown, since the first control subcircuit 3121 and the second control subcircuit 3141 can respectively implement the control of stage 1 and stage 2, the first control signal connected to the first control terminal EM1 and the second control signal connected to the second control terminal EM2 are both at a valid level in stage 4. Therefore, the first control terminal EM1 can be multiplexed as the second control terminal EM2, so that the first control signal and the second control signal can be merged, thereby simplifying the circuit structure.
[0113] Figure 6B Shows Fig. 6A A more specific circuit structure diagram of a pixel circuit.
[0114] like Figure 6BAs shown, in some embodiments, the first control subcircuit 3121 includes a sixth transistor T6, a first end of the sixth transistor T6 is electrically connected to the second end of the light emitting device MLED, a second end of the sixth transistor T6 is electrically connected to the first end of the driving circuit 311, and a control end of the sixth transistor T6 is electrically connected to the third scanning signal end Gate3; the first light emitting control subcircuit 3122 includes a first transistor T1, a first end of the first transistor T1 is electrically connected to the second end of the light emitting device MLED, a second end of the first transistor T1 is electrically connected to the first end of the driving circuit 311, and a control end of the first transistor T1 is electrically connected to the first control end EM1. In this way, it is only necessary to use the third scanning signal connected to the third scanning signal end Gate3 to control the sixth transistor T6 to turn on in stage 1, and use the first control signal connected to the first control end EM1 to control the first transistor T1 to turn on in stage 4, thereby reducing the requirements for the shift register.
[0115] In some embodiments, Figure 6B As shown, the second control subcircuit 3141 includes a seventh transistor T7, a first end of the seventh transistor T7 is electrically connected to the second end of the driving circuit 311, a second end of the seventh transistor T7 is electrically connected to the second signal end VSS, and a control end of the seventh transistor T7 is electrically connected to the fourth scanning signal end Gate4; the second light-emitting control subcircuit 3142 includes a third transistor T3, a first end of the third transistor T3 is electrically connected to the second end of the driving circuit 311, a second end of the third transistor T3 is electrically connected to the second signal end VSS, and a control end of the third transistor T3 is electrically connected to the second control end EM2. In this way, it is only necessary to use the fourth scanning signal connected to the fourth scanning signal end Gate4 to control the seventh transistor T7 to turn on in stage 2, and use the second control signal connected to the second control end EM2 to control the third transistor T3 to turn on in stage 4, thereby reducing the requirements for the shift register.
[0116] It should be noted that the "control end" involved in the embodiments of the present disclosure may specifically refer to the gate or base of a transistor, the "first end" may specifically refer to the source or emitter of a transistor, and the corresponding "second end" may specifically refer to the drain or collector of the transistor. Of course, those skilled in the art should know that the "first end" and the "second end" are interchangeable.
[0117] It can be understood that the transistors in the embodiments of the present disclosure use N-type transistors. Based on the same inventive concept, the transistors can also be replaced by P-type transistors. Accordingly, the effective level of each signal can also be a low level, thereby achieving the purpose of the embodiments of the present disclosure.
[0118] The embodiment of the present disclosure also provides a driving method of a pixel circuit. The driving method can apply any embodiment of the aforementioned pixel circuit or an arrangement or combination of the embodiments.
[0119] Figure 7 A schematic flow chart of an exemplary driving method 700 for a pixel circuit provided in an embodiment of the present disclosure is shown.
[0120] like Figure 7 As shown, the driving method 700 may further include the following steps.
[0121] In step 702, during the initialization phase, under the control of the first control signal connected to the first control terminal EM1 and the first scan signal connected to the first scan signal terminal Gate1, the first control circuit 312 and the second control circuit 313 are used to initialize the potential of the third terminal of the driving circuit 311 based on the first voltage signal.
[0122] In step 704, in the compensation stage, under the control of the first scan signal connected to the first scan signal terminal Gate1 and the second control signal connected to the second control terminal EM2, the threshold voltage of the driving circuit 311 is written to the third terminal of the driving circuit 311 using the second control circuit 313 and the third control circuit 314.
[0123] In step 706 , in the data writing stage, under the control of the second scanning signal connected to the second scanning signal terminal Gate2 , the data signal connected to the data signal terminal Data is written into the third terminal of the driving circuit 311 using the first storage circuit 315 .
[0124] In step 708, in the light-emitting stage, under the control of the first control signal connected to the first control terminal EM1 and the second control signal connected to the second control terminal EM2, the first control circuit 312 and the third control circuit 314 are used to control the driving circuit 311 to generate a driving current for driving the light-emitting device MLED.
[0125] The driving method of the pixel circuit provided in the embodiment of the present disclosure realizes multiplexing of the first control circuit, the second control circuit and the third control circuit at different stages, thereby achieving a compensation effect of the threshold voltage of the driving circuit on the one hand and circuit simplification on the other hand.
[0126] Those skilled in the art should understand that the above description is only a specific embodiment of the present disclosure and is not intended to limit the present disclosure. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present disclosure should be included in the protection scope of the present disclosure.
Claims
1. A pixel circuit, comprising a light emitting device, a driving circuit, a data writing circuit, a first control circuit, a second control circuit, a third control circuit and a first storage circuit, wherein: The light emitting device has a first end electrically connected to the first signal end; The first control circuit is electrically connected to the second end of the light emitting device, the first end of the driving circuit and the first control end respectively, and is configured to: under the control of the first control signal connected to the first control end, transmit the first voltage signal provided by the first signal end to the second control circuit and control the driving circuit to generate a driving current; The second control circuit is electrically connected to the first terminal and the third terminal of the driving circuit and the first scanning signal terminal respectively, and is configured to: under the control of the first scanning signal connected to the first scanning signal terminal, initialize the potential of the third terminal of the driving circuit based on the first voltage signal transmitted by the first control circuit, and write the threshold voltage of the driving circuit to the third terminal of the driving circuit with the cooperation of the third control circuit; The third control circuit is electrically connected to the second terminal, the second signal terminal and the second control terminal of the driving circuit respectively, and is configured to: under the control of the second control signal connected to the second control terminal, write the second voltage signal provided by the second signal terminal into the second terminal of the driving circuit and control the driving circuit to generate the driving current; The first storage circuit is electrically connected to the first node and the third terminal of the driving circuit respectively, and is configured to: store a potential difference between the first node and the third terminal of the driving circuit; The data writing circuit is electrically connected to the data signal terminal, the first node and the second scanning signal terminal respectively, and is configured to: under the control of the second scanning signal connected to the second scanning signal terminal, write the data signal connected to the data signal terminal into the third terminal of the driving circuit through the first storage circuit; The driving circuit has a first end electrically connected to the first control circuit and the second control circuit, a second end electrically connected to the third control circuit, and a third end electrically connected to the first storage circuit, and is configured to generate a driving current for driving the light-emitting device under the control of the first control circuit and the third control circuit.
2. The pixel circuit according to claim 1, further comprising an initialization circuit, wherein: The initialization circuit is electrically connected to the first node, the second signal terminal, and the first scan signal terminal, respectively, and is configured to initialize the potential of the first node based on a second voltage signal provided by the second signal terminal under the control of the first scan signal connected to the first scan signal terminal.
3. The pixel circuit according to claim 1, further comprising a second storage circuit, wherein: The second storage circuit is electrically connected to the third terminal of the driving circuit and the first signal terminal or the second signal terminal, respectively, and is configured to: store a potential difference between the third terminal of the driving circuit and a first voltage signal provided by the first signal terminal, or store a potential difference between the third terminal of the driving circuit and a second voltage signal provided by the second signal terminal; or The second storage circuit is electrically connected to the first node and the first signal terminal or the second signal terminal, respectively, and is configured to: store the potential difference between the first node and the first voltage signal provided by the first signal terminal, or store the potential difference between the first node and the second voltage signal provided by the second signal terminal.
4. The pixel circuit according to claim 1, wherein: The first control circuit includes a first control subcircuit and a first light-emitting control subcircuit; The first control subcircuit is electrically connected to the second terminal of the light-emitting device, the first terminal of the driving circuit and the third scanning signal terminal, respectively, and is configured to: under the control of the third scanning signal connected to the third scanning signal terminal, transmit the first voltage signal provided by the first signal terminal to the second control circuit; The first light-emitting control subcircuit is electrically connected to the second end of the light-emitting device, the first end of the driving circuit and the first control end respectively, and is configured to: under the control of the first control signal connected to the first control end, control the driving circuit to generate the driving current; Wherein, the duration of the effective level of the first control signal is greater than the duration of the effective level of the third scanning signal; and / or, The third control circuit includes a second control subcircuit and a second light emitting control subcircuit; The second control subcircuit is electrically connected to the second terminal, the second signal terminal and the fourth scanning signal terminal of the driving circuit respectively, and is configured to: under the control of the fourth scanning signal connected to the fourth scanning signal terminal, write the second voltage signal provided by the second signal terminal into the second terminal of the driving circuit; The second light-emitting control subcircuit is electrically connected to the second terminal of the driving circuit, the second signal terminal and the second control terminal respectively, and is configured to: control the driving circuit to generate the driving current under the control of the second control signal connected to the second control terminal; The duration of the effective level of the second control signal is greater than the duration of the effective level of the fourth scan signal.
5. The pixel circuit according to claim 1, wherein: The driving circuit comprises a driving transistor, a first terminal of the driving transistor is electrically connected to the first control circuit and the second control circuit, a second terminal of the driving transistor is electrically connected to the third control circuit, and a control terminal of the driving transistor is electrically connected to the first storage circuit; and / or, The first control circuit includes a first transistor, a first terminal of the first transistor is electrically connected to the second terminal of the light emitting device, a second terminal of the first transistor is electrically connected to the first terminal of the driving circuit, and a control terminal of the first transistor is electrically connected to the first control terminal; and / or, The second control circuit includes a second transistor, a first end of the second transistor is electrically connected to the first end of the driving circuit, a second end of the second transistor is electrically connected to the third end of the driving circuit, and a control end of the second transistor is electrically connected to the first scanning signal end; and / or, The third control circuit comprises a third transistor, a first end of the third transistor is electrically connected to the second end of the driving circuit, a second end of the third transistor is electrically connected to the second signal end, and a control end of the third transistor is electrically connected to the second control end; and / or, The first storage circuit includes a first capacitor, a first end of the first capacitor is electrically connected to the first node, and a second end of the first capacitor is electrically connected to a third end of the driving circuit; and / or, The data writing circuit includes a fourth transistor, a first end of the fourth transistor is electrically connected to the data signal end, a second end of the fourth transistor is electrically connected to the first node, and a control end of the fourth transistor is electrically connected to the second scan signal end.
6. The pixel circuit according to claim 2, wherein: The initialization circuit includes a fifth transistor, a first terminal of the fifth transistor is electrically connected to the first node, a second terminal of the fifth transistor is electrically connected to the second signal terminal, and a control terminal of the fifth transistor is electrically connected to the first scan signal terminal.
7. The pixel circuit according to claim 3, wherein: The second storage circuit includes a second capacitor; The first end of the second capacitor is electrically connected to the third end of the driving circuit, and the second end of the second capacitor is electrically connected to the first signal end or the second signal end; or A first end of the second capacitor is electrically connected to the first node, and a second end of the second capacitor is electrically connected to the first signal end or the second signal end.
8. The pixel circuit according to claim 4, wherein: The first control subcircuit includes a sixth transistor, a first end of the sixth transistor is electrically connected to the second end of the light emitting device, a second end of the sixth transistor is electrically connected to the first end of the driving circuit, and a control end of the sixth transistor is electrically connected to the third scanning signal end; the first light emitting control subcircuit includes a first transistor, a first end of the first transistor is electrically connected to the second end of the light emitting device, a second end of the first transistor is electrically connected to the first end of the driving circuit, and a control end of the first transistor is electrically connected to the first control end; and / or, The second control subcircuit includes a seventh transistor, a first end of the seventh transistor is electrically connected to the second end of the drive circuit, a second end of the seventh transistor is electrically connected to the second signal end, and a control end of the seventh transistor is electrically connected to the fourth scan signal end; the second light-emitting control subcircuit includes a third transistor, a first end of the third transistor is electrically connected to the second end of the drive circuit, a second end of the third transistor is electrically connected to the second signal end, and a control end of the third transistor is electrically connected to the second control end.
9. The pixel circuit according to claim 4 or 8, wherein: The first control end is multiplexed as the second control end.
10. The pixel circuit according to claim 1, wherein: The light emitting device includes at least one of a light emitting diode, an organic light emitting diode, a quantum dot light emitting diode, a sub-millimeter light emitting diode and a micro light emitting diode.
11. A display panel comprising a plurality of pixel circuits as claimed in any one of claims 1 to 10 arranged in an array.
12. A display device, comprising: The display panel as claimed in claim 11; The peripheral driving circuit is electrically coupled to the display panel and is configured to provide a driving signal for the display panel.
13. The display device according to claim 12, wherein: The display device includes a wearable device.
14. A method for driving a pixel circuit according to any one of claims 1 to 10, comprising: In an initialization phase, under the control of a first control signal connected to the first control terminal and a first scan signal connected to the first scan signal terminal, the first control circuit and the second control circuit are used to initialize the potential of the third terminal of the driving circuit based on the first voltage signal; In the compensation stage, under the control of the first scan signal connected to the first scan signal terminal and the second control signal connected to the second control terminal, the threshold voltage of the driving circuit is written to the third terminal of the driving circuit by using the second control circuit and the third control circuit; In the data writing stage, under the control of the second scanning signal connected to the second scanning signal terminal, the data signal connected to the data signal terminal is written into the third terminal of the driving circuit by using the first storage circuit; In the light-emitting stage, under the control of the first control signal connected to the first control terminal and the second control signal connected to the second control terminal, the first control circuit and the third control circuit are used to control the driving circuit to generate a driving current for driving the light-emitting device.
Citation Information
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