Pixel circuit, driving method thereof, display panel and display device

Abstract

The present disclosure provides a pixel circuit and a driving method thereof, a display panel and a display device. The pixel circuit comprises a light emitting device, a driving circuit, a data writing circuit, a first control circuit, a second control circuit, a third control circuit and a first storage circuit, wherein: the first control circuit is electrically connected with the second end of the light emitting device, the first end and the first control end of the driving circuit; the second control circuit is electrically connected with the first end and the third end of the driving circuit and the first scanning signal end; the third control circuit is electrically connected with the second end of the driving circuit, the second signal end and the second control end; the first storage circuit is electrically connected with the first node and the third end of the driving circuit; the data writing circuit is electrically connected with the data signal end, the first node and the second scanning signal end; and the driving circuit is electrically connected with the first control circuit and the second control circuit at the first end, is electrically connected with the third control circuit at the second end, and is electrically connected with the first storage circuit at the third end.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of display, and in particular to a pixel circuit, a driving method thereof, a display panel and a display device. BACKGROUND

[0002] The pixel circuit is a circuit formed based on semiconductor technology, and realizes pixel light emission through arrayed arrangement, and can be applied to display devices, image sensors and the like. Different types of display devices can have different pixel circuits, and the design of the pixel circuit will correspondingly affect the display performance of the display device.

[0003] In the related art, the threshold voltage of the driving transistor in the pixel circuit at different positions in the display panel can have different offset states, resulting in poor uniformity of the display panel. SUMMARY

[0004] Therefore, the purpose of the embodiments of the present disclosure is to provide a pixel circuit, a driving method thereof, a display panel and a display device to solve the above problems to some extent.

[0005] In a first aspect, the present disclosure provides a pixel circuit, comprising a light emitting device, a driving circuit, a data writing circuit, a first control circuit, a second control circuit, a third control circuit and a first storage circuit, wherein:

[0006] The light emitting device is electrically connected to a first signal end at a first end thereof;

[0007] The first control circuit is electrically connected to a second end of the light emitting device, a first end and a first control end of the driving circuit, and is configured to transmit a first voltage signal provided by the first signal end to the second control circuit and control the driving circuit to generate a driving current under the control of a first control signal input at the first control end;

[0008] The second control circuit is electrically connected to the first end and a third end of the driving circuit and a first scan signal end, and is configured to initialize the potential of the third end of the driving circuit based on the first voltage signal transmitted by the first control circuit and write the threshold voltage of the driving circuit to the third end of the driving circuit under the cooperation of the third control circuit under the control of a first scan signal input at the first scan signal end;

[0009] The third control circuit is electrically connected to a second end of the driving circuit, a second signal end and a second control end, and is configured to write a second voltage signal provided by the second signal end to the second end of the driving circuit and control the driving circuit to generate the driving current under the control of a second control signal input at the second control end.

[0010] The first storage circuit is electrically connected with the first node and the third terminal of the driving circuit respectively, and is configured to store a potential difference between the first node and the third terminal of the driving circuit.

[0011] The data writing circuit is electrically connected with the data signal terminal, the first node and the second scan signal terminal respectively, and is configured to write data signals input from the data signal terminal to the third terminal of the driving circuit through the first storage circuit under the control of the second scan signal input from the second scan signal terminal.

[0012] The driving circuit is electrically connected with the first control circuit and the second control circuit at the first terminal, is electrically connected with the third control circuit at the second terminal, and is electrically connected with the first storage circuit at the third terminal, and is configured to generate a driving current for driving the light emitting device under the control of the first control circuit and the third control circuit.

[0013] In a second aspect of the embodiments of the present disclosure, a display panel is provided, which includes a plurality of pixel circuits as described in the first aspect arranged in an array.

[0014] In a third aspect of the embodiments of the present disclosure, a display device is provided, which includes:

[0015] The display panel as described in the second aspect;

[0016] The peripheral driving circuit is electrically coupled with the display panel, and is configured to provide driving signals for the display panel.

[0017] In a fourth aspect of the embodiments of the present disclosure, a driving method of the pixel circuit as described in the first aspect is provided, which includes:

[0018] In the initialization stage, under the control of the first control signal input from the first control terminal and the first scan signal input from the first scan signal terminal, the first control circuit and the second control circuit are utilized to initialize the potential of the third terminal of the driving circuit based on the first voltage signal;

[0019] In the compensation stage, under the control of the first scan signal input from the first scan signal terminal and the second control signal input from the second control terminal, the second control circuit and the third control circuit are utilized to write the threshold voltage of the driving circuit to the third terminal of the driving circuit;

[0020] In the data writing stage, under the control of the second scan signal input from the second scan signal terminal, the first storage circuit is utilized to write the data signals input from the data signal terminal to the third terminal of the driving circuit;

[0021] In the light emitting stage, under the control of the first control signal input at the first control end and the second control signal input at the second control end, the first control circuit and the third control circuit are used to control the driving circuit to generate a driving current for driving the light emitting device.

[0022] From the above, it can be seen that the pixel circuit and the driving method thereof, the display panel and the display device provided by the embodiments of the present disclosure achieve multiplexing in different stages by using the first control circuit, the second control circuit and the third control circuit, which on the one hand realizes the threshold voltage compensation effect of the driving circuit, and on the other hand realizes circuit simplification. BRIEF DESCRIPTION OF DRAWINGS

[0023] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure or the prior art, the drawings needed to be used in the embodiments or the prior art description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present disclosure, and other drawings can be obtained by those skilled in the art without creative labor.

[0024] Figure 1 A structural schematic diagram of a display device according to an embodiment of the present disclosure is shown.

[0025] Figure 2A A cross-sectional structural schematic diagram of a display panel according to an embodiment of the present disclosure is shown.

[0026] Figure 2B A structural diagram of a display substrate according to an embodiment of the present disclosure is shown.

[0027] Figure 3A A schematic diagram of an exemplary pixel circuit provided by an embodiment of the present disclosure is shown.

[0028] Figure 3B A more specific circuit structural schematic diagram of a pixel circuit provided by an embodiment of the present disclosure is shown.

[0029] Figure 3C A more specific circuit structural schematic diagram of a pixel circuit provided by an embodiment of the present disclosure is shown.

[0030] Figure 3D A timing control schematic diagram of a pixel circuit according to an embodiment of the present disclosure is shown.

[0031] Figure 4A A schematic diagram of another exemplary pixel circuit provided by an embodiment of the present disclosure is shown.

[0032] Figure 4B A schematic diagram of another exemplary pixel circuit provided by an embodiment of the present disclosure is shown. Figure 4Aa more specific circuit structure schematic diagram of the pixel circuit.

[0033] Figure 4C a more specific circuit structure schematic diagram of the pixel circuit. Figure 4A a more specific circuit structure schematic diagram of the pixel circuit.

[0034] Figure 4D a more specific circuit structure schematic diagram of the pixel circuit.

[0035] Figure 5A a more specific circuit structure schematic diagram of the pixel circuit.

[0036] Figure 5B a more specific circuit structure schematic diagram of the pixel circuit. Figure 5A a more specific circuit structure schematic diagram of the pixel circuit.

[0037] Figure 6A a more specific circuit structure schematic diagram of the pixel circuit.

[0038] Figure 6B a more specific circuit structure schematic diagram of the pixel circuit. Figure 6A a more specific circuit structure schematic diagram of the pixel circuit.

[0039] Figure 7 a more specific circuit structure schematic diagram of the pixel circuit. DETAILED DESCRIPTION

[0040] In order to make the objects, technical solutions and advantages of the present disclosure clearer, the present disclosure will be further described in detail below with reference to specific embodiments and drawings.

[0041] It should be noted that, unless otherwise defined, technical terms or scientific terms used in the embodiments of the present disclosure should be understood as their common meanings to those skilled in the art to which the present disclosure pertains. The terms "first", "second" and similar terms used in the present disclosure do not denote any order, quantity or importance, but are only used to distinguish different components. The terms "include", "contain" and similar terms mean that the elements or objects before the terms encompass the elements or objects listed after the terms and their equivalents, and do not exclude other elements or objects. The terms "connect" or "connected" and similar terms do not mean physical or mechanical connection, but can include electrical connection, whether direct or indirect. The terms "upper", "lower", "left", "right" and the like only represent relative positional relationships, and when the absolute positions of the described objects change, the relative positional relationships may also change accordingly.

[0042] Unless otherwise required by context, in the embodiments of the present disclosure, the term "comprise" and its other forms such as "comprises" and "comprising" are to be construed as being inclusive and open-ended, that is, "including, but not limited to."

[0043] In the description of the embodiments of the present disclosure, the terms "one embodiment", "some embodiments", "exemplary embodiments", "example", "specific example" or "some examples" etc. are intended to indicate that the specific features, structures, materials or characteristics associated with the embodiment or example include at least one of the embodiments or examples of the present disclosure. The illustrative representations of the above terms do not necessarily denote the same embodiment or example. In addition, specific features, structures, materials or characteristics described are intended to be included in any suitable combination or one or more embodiments or examples.

[0044] In describing some embodiments, the term "connected" and / or variants thereof are used. For example, the term "connected" can be used to mean that two or more elements are in direct physical or electrical contact with each other.

[0045] "A, B, and C at least one of" has the same meaning as "at least one of A, B, or C", both of which include the following combinations of A, B, and C: only A, only B, only C, a combination of A and B, a combination of A and C, a combination of B and C, and a combination of A, B, and C.

[0046] The use of "adapted to" or "configured to" in the embodiments of the present disclosure means open and inclusive language.

[0047] It should be understood that in the embodiments of the present disclosure, "electrically connected" can be directly connected or electrically connected through other wires (such as signal transmission lines).

[0048] Figure 1 A structural schematic diagram of a display device 100 according to an embodiment of the present disclosure is shown.

[0049] As shown in Figure 1 Some embodiments of the present disclosure provide a display device 100. It can be understood that the display device 100 is a product with image display function. Exemplarily, the display device 100 can be used to display static images, for example, pictures or photos. The display device 100 can also be used to display dynamic images, for example, videos or game screens.

[0050] In some embodiments, the display device 100 can be a notebook computer, a mobile phone, a wireless device, a personal data assistant (PDA), a handheld or portable computer, a GPS receiver / navigator, a camera, an MP4 video player, a camcorder, a game console, a watch, a clock, a calculator, a television monitor, a flat panel display, a computer monitor, an automobile display (e.g., a speedometer display, etc.), a navigation instrument, a cockpit controller and / or display, a display of a camera view (e.g., a display of a rear view camera in a vehicle), an electronic photograph, an electronic billboard or sign, a projector, a packaging and aesthetic structure (e.g., a display of an image for a piece of jewelry), etc.

[0051] In some embodiments,

[0052] The display device 100 includes a display panel 200. In addition, the display device 100 can further include an under-screen camera, an under-screen fingerprint identification sensor, etc., so that the display device 100 can implement multiple different functions such as photographing, video recording, fingerprint identification, or face recognition. In some embodiments, the display device 100 can further include a peripheral driving circuit electrically coupled to the display panel 200 and configured to provide the display panel 200 with driving signals required by the display panel 200.

[0053] Figure 2A A cross-sectional structure schematic diagram of the display panel 200 according to an embodiment of the present disclosure is shown.

[0054] The display panel 200 can include a display substrate 210. Exemplarily, as shown in FIG. 2, the display panel 200 can further include other functional film layers 212 on the display side of the display substrate 210, such as a touch function layer, an anti-reflection layer, an anti-fingerprint layer, a hardening layer, an encapsulation cover plate, etc., so that the display panel 200 can implement different functions. Embodiments of the present disclosure do not make further limitations on the other functional film layers 212 of the display panel 200, and the display substrate 210 is exemplarily described below.

[0055] Figure 2B A structure diagram of the display substrate 210 according to an embodiment of the present disclosure is shown.

[0056] In some embodiments, as Figure 2B shown, the display substrate 210 includes a plurality of sub-pixels 300. The plurality of sub-pixels 300 are arranged into multiple columns along a first direction X and arranged into multiple rows along a second direction Y. In some embodiments, the first direction X and the second direction Y intersect. Exemplarily, the first direction X is perpendicular to the second direction Y. In some embodiments, the first direction X is a horizontal direction, and the second direction Y is a vertical direction.

[0057] It can be understood that the sub-pixel 300 is the smallest unit for the display substrate 210 to perform picture display. Each sub-pixel 300 can emit a single color of light, such as red light, green light or blue light. The display substrate 210 can include a plurality of red light sub-pixels, a plurality of green light sub-pixels and a plurality of blue light sub-pixels. By adjusting the brightness (or gray scale) of the sub-pixels 300 of different colors, different intensities of red light, green light and blue light can be obtained, and at least two of the different intensities of red light, green light and blue light are superimposed, and more colors of light can be displayed, thereby realizing full-color display of the display substrate 210.

[0058] It can be understood that, as shown in Figure 2B The display substrate 210 has a display area AA and a non-display area PA, and the non-display area PA is arranged at the periphery of the display area AA. The display area AA is used to display image information, and a plurality of sub-pixels 300 are located in the display area AA of the display substrate 210.

[0059] In some embodiments, each sub-pixel 300 can further include a pixel circuit for realizing light emission of a light emitting device. Optionally, the light emitting device can include at least one of a light emitting diode (LED), an organic light emitting diode (OLED), a quantum dot light emitting diode (QLED), a sub-millimeter light emitting diode (Mini LED) and a micro light emitting diode (Micro LED). It can be understood that the pixel circuit can not include the light emitting device, but only include an electrical device for realizing a driving function, so that the pixel circuit is electrically connected with the light emitting device for realizing driving of the light emitting device.

[0060] Micro LED has a wide application in the future display field due to its high brightness and high reliability. Therefore, the embodiments of the present disclosure can be applied to a display device using Micro LED as a light emitting device. Optionally, the display device 100 of the embodiments of the present disclosure can be a wearable device (for example, a virtual reality (VR) device, an augmented reality (AR) device, etc.) and the light emitting device therein can be a Micro LED, so that better display effect can be achieved.

[0061] As described above, in the related art, the threshold voltage of the driving transistor in the pixel circuit at different positions in the display panel can have different offset states, resulting in poor uniformity of the display panel.

[0062] Therefore, the embodiments of the present disclosure propose a pixel circuit to solve the above problems to some extent.

[0063] Figure 3A A schematic diagram of an exemplary pixel circuit 310 provided in an embodiment of the present disclosure is shown.

[0064] like Figure 3A As shown, in some embodiments, the pixel circuit 310 may include a light-emitting device MLED, a driving circuit 311, a first control circuit 312, a second control circuit 313, a third control circuit 314, a first storage circuit 315, and a data writing circuit 316.

[0065] The light-emitting device MLED has a first terminal (e.g., a positive terminal) that can be electrically connected to a first signal terminal VDD to receive a first voltage signal provided by the first signal terminal VDD. Exemplarily, this first voltage signal can be a high-level signal. Optionally, the light-emitting device MLED can be a light-emitting diode (LED), an organic light-emitting diode (OLED), a quantum dot light-emitting diode (QLED), a sub-millimeter light-emitting diode (Mini LED), or a micro light-emitting diode (Micro LED).

[0066] The first control circuit 312 can be electrically connected to the second terminal (e.g., the negative terminal) of the light-emitting device MLED, the first terminal of the driving circuit 311, and the first control terminal EM1, respectively. It can be configured to: under the control of a first control signal input to the first control terminal EM1, transmit a first voltage signal provided by the first signal terminal VDD to the second control circuit 313 and control the driving circuit 311 to generate a driving current to drive the light-emitting device MLED. For example, referring to… Figure 3D Under the control of the first control signal received at the first control terminal EM1, the first control circuit 312 can transmit the first voltage signal provided by the first signal terminal VDD to the second control circuit 313 in stage 1 (e.g., initialization stage), and control the driving circuit 311 to generate a driving current to drive the light-emitting device MLED in stage 4 (e.g., light-emitting stage). In this way, the first control circuit 312 can perform the initialization function in stage 1 and the light-emitting control function in stage 4, thereby simplifying the circuit structure.

[0067] The second control circuit 313 can be electrically connected with the first end and the third end of the drive circuit 311 and the first scan signal terminal Gate1 respectively, and can be configured to initialize the potential of the third end of the drive circuit 311 based on the first voltage signal transmitted by the first control circuit 312 under the control of the first scan signal input to the first scan signal terminal Gate1, and write the threshold voltage Vth of the drive circuit 311 to the third end of the drive circuit 311 under the cooperation of the third control circuit 314. For example, referring to Figure 3D The second control circuit 313 can initialize the potential of the third end of the drive circuit 311 based on the first voltage signal transmitted by the first control circuit 312 under the control of the first scan signal input to the first scan signal terminal Gate1 in stage 1 (for example, initialization stage), and write the threshold voltage Vth of the drive circuit 311 to the third end of the drive circuit 311 under the cooperation of the third control circuit 314 in stage 2 (for example, compensation stage). In this way, the second control circuit 313 can realize the initialization function in stage 1 and the internal compensation function of the threshold voltage Vth of the drive circuit 311 in stage 2, so as to simplify the circuit structure.

[0068] The third control circuit 314 can be electrically connected with the second end of the drive circuit 311, the second signal terminal VSS and the second control terminal EM2 respectively, and can be configured to write the second voltage signal provided by the second signal terminal VSS to the second end of the drive circuit 311 under the control of the second control signal input to the second control terminal EM2, and control the drive circuit 311 to generate the drive current for driving the light emitting device MLED. For example, referring to Figure 3D The third control circuit 314 can write the second voltage signal provided by the second signal terminal VSS to the second end of the drive circuit 311 under the control of the second control signal input to the second control terminal EM2 in stage 2 (for example, compensation stage), so as to cooperate with the second control circuit 313 to write the threshold voltage to the third end of the drive circuit 311, and control the drive circuit 311 to generate the drive current for driving the light emitting device MLED in stage 4 (for example, light emitting stage). In this way, the third control circuit 313 can cooperate with the second control circuit 313 to realize the internal compensation function of the threshold voltage in stage 2 and realize the light emitting control function in stage 4, so as to simplify the circuit structure.

[0069] The first storage circuit 315 can be electrically connected with the first node N1 and the third end of the drive circuit (which can also be the second node N2) respectively, and can be configured to store the potential difference between the first node and the third end of the drive circuit (which can also be the second node N2).

[0070] The data writing circuit 316 can be electrically connected with the data signal terminal Data, the first node N1 and the second scan signal terminal Gate2 respectively, and can be configured to write the data signal accessed by the data signal terminal Data into the third terminal of the driving circuit 311 under the control of the second scan signal accessed by the second scan signal terminal Gate2.

[0071] The driving circuit 311 can be electrically connected with the first control circuit 312 and the second control circuit 313 at the first terminal, electrically connected with the third control circuit 314 at the second terminal, and electrically connected with the first storage circuit 315 at the third terminal (which can also be the second node N2), and can be configured to generate a driving current for driving the light emitting device MLED under the control of the first control circuit 312 and the third control circuit 314, so as to control the light emitting device MLED to emit light.

[0072] It can be seen that the pixel circuit of the above embodiment realizes multiplexing in different stages by using the first control circuit, the second control circuit and the third control circuit, which on the one hand realizes the internal compensation effect of the threshold voltage of the driving circuit, and on the other hand realizes the simplification of the circuit. In some embodiments, the pixel circuit can be applicable to low temperature polysilicon (LTPS) thin film transistor (TFT) and oxide thin film transistor (Oxide TFT), and the uniformity compensation of the threshold voltage Vth of the driving transistor DTFT is realized by using the internal compensation method.

[0073] In some embodiments, as shown in Figure 3A Optionally, the initialization circuit 317 can be electrically connected with the first node N1, the second signal terminal VSS and the first scan signal terminal Gate1 respectively, and can be configured to initialize the potential of the first node N1 based on the second voltage signal provided by the second signal terminal VSS under the control of the first scan signal accessed by the first scan signal terminal Gate1, so as to reset the potential of the first node N1 and ensure the normal work of the pixel circuit 310.

[0074] In some embodiments, as shown in Figure 3AAs shown, the pixel circuit 310 further includes a second storage circuit 318. Optionally, the second storage circuit 318 is electrically connected with the third end (which can also be a second node N2) of the driving circuit 311 and the first signal end VDD or the second signal end VSS respectively, and can be configured to store a potential difference between the first voltage signal provided by the third end of the driving circuit 311 and the first signal end VDD, or a potential difference between the second voltage signal provided by the third end of the driving circuit 311 and the second signal end VSS, so that the potential of the second node N2 can be more stable, ensuring stable operation of the pixel circuit 310.

[0075] Figure 3B and Figure 3C respectively show a more specific circuit structure schematic diagram of a pixel circuit 310 provided by the embodiments of the present disclosure.

[0076] In some embodiments, as shown in Figure 3B and Figure 3C As shown, the driving circuit can include a driving transistor DTFT, a first end of the driving transistor DTFT is electrically connected with the first control circuit 312 and the second control circuit 313, a second end of the driving transistor DTFT is electrically connected with the third control circuit 314, and a control end of the driving transistor DTFT is electrically connected with the first storage circuit 315. Exemplarily, the first control circuit 312 can include a first transistor T1, the second control circuit 313 can include a second transistor T2, the third control circuit 314 can include a third transistor T3, the first storage circuit 315 can include a first capacitor C1, the first end of the driving transistor DTFT can be electrically connected with the first transistor T1 and the second transistor T2, the second end of the driving transistor DTFT can be electrically connected with the third transistor T3, and the control end of the driving transistor DTFT can be electrically connected with the first capacitor C1.

[0077] In some embodiments, as shown in Figure 3B and Figure 3C As shown, the first control circuit 312 can include a first transistor T1, a first end of the first transistor T1 is electrically connected with the second end of the light emitting device MLED, a second end of the first transistor T1 is electrically connected with the first end of the driving circuit 311, and a control end of the first transistor T1 is electrically connected with the first control end EM1. Exemplarily, the driving circuit 311 can include a driving transistor DTFT, and the second end of the first transistor T1 can be electrically connected with the first end of the driving transistor DTFT. In this way, the function of the first control circuit 312 can be realized by using the first transistor T1, and the circuit structure can be simplified.

[0078] In some embodiments, as shown in Figure 3B and Figure 3C The second control circuit 313 can include a second transistor T2. Optionally, a first end of the second transistor T2 is electrically connected with a first end of the driving circuit 311, a second end of the second transistor T2 is electrically connected with a third end of the driving circuit 311, and a control end of the second transistor T2 is electrically connected with the first scan signal end Gate1. Illustratively, the driving circuit 311 can include a driving transistor DTFT, and the first end of the second transistor T2 is electrically connected with a first end of the driving transistor DTFT, and the second end of the second transistor T2 is electrically connected with a control end of the driving transistor DTFT. In this way, the second transistor T2 can realize the function of the second control circuit 313, and the circuit structure can be simplified.

[0079] In some embodiments, as shown in Figure 3B and Figure 3C The third control circuit 314 can include a third transistor T3, a first end of the third transistor T3 is electrically connected with a second end of the driving circuit 311, a second end of the third transistor T3 is electrically connected with the second signal end VSS, and a control end of the third transistor T3 is electrically connected with the second control end EM2. Illustratively, the driving circuit 311 can include a driving transistor DTFT, and the first end of the third transistor T3 can be electrically connected with a second end of the driving transistor DTFT. In this way, the third transistor T3 can realize the function of the third control circuit 314, and the circuit structure can be simplified.

[0080] In some embodiments, as shown in Figure 3B and Figure 3C The first storage circuit 315 can include a first capacitor C1, a first end of the first capacitor C1 is electrically connected with the first node N1, and a second end of the first capacitor C1 is electrically connected with a third end (which can also be a second node N2) of the driving circuit 311. In this way, the first capacitor C1 can realize the function of the first storage circuit 315, and the circuit structure can be simplified.

[0081] In some embodiments, as shown in Figure 3B and Figure 3C The data writing circuit 316 can include a fourth transistor T4. Optionally, a first end of the fourth transistor T4 can be electrically connected with the data signal end Data, a second end of the fourth transistor T4 is electrically connected with the first node N1, and a control end of the fourth transistor T4 is electrically connected with the second scan signal end Gate2.

[0082] In some embodiments, as shown in Figure 3B andFigure 3C As shown in FIG. 7, the initialization circuit 317 can include a fifth transistor T5. Optionally, a first end of the fifth transistor T5 is electrically connected with the first node N1, a second end of the fifth transistor T5 is electrically connected with the second signal terminal VSS, and a control end of the fifth transistor T5 is electrically connected with the first scan signal terminal Gate1. In this way, the fifth transistor T5 can be used to implement the function of the initialization circuit 317, and the circuit structure can be simplified.

[0083] In some embodiments, as shown in FIG. 7, the second storage circuit 318 can include a second capacitor C2. Optionally, a first end of the second capacitor C2 is electrically connected with a third end (e.g., a control end of the driving transistor DTFT) of the driving circuit 311, and a second end of the second capacitor C2 is electrically connected with the first signal terminal VDD or the second signal terminal VSS. In this way, the second capacitor C2 can be used to implement the function of the second storage circuit 318, and the circuit structure can be simplified. Figure 3A-3D Figure 4A As shown in FIG. 7, the second storage circuit 318 can include a second capacitor C2. Optionally, a first end of the second capacitor C2 is electrically connected with a third end (e.g., a control end of the driving transistor DTFT) of the driving circuit 311, and a second end of the second capacitor C2 is electrically connected with the first signal terminal VDD or the second signal terminal VSS. In this way, the second capacitor C2 can be used to implement the function of the second storage circuit 318, and the circuit structure can be simplified.

[0084] In combination with FIG. 6, the pixel circuit of the above embodiments can experience four stages in operation: stage 1 (e.g., initialization stage), stage 2 (e.g., compensation stage), stage 3 (e.g., data writing stage), and stage 4 (e.g., light emitting stage), which are described below. Figure 4A Stage 1: the first scan signal terminal Gate1 and the first control end EM1 are high, the first transistor T1, the second transistor T2 and the fifth transistor T5 are turned on, at this time, the potential of the first node N1 is set to V N1 = VSS, and the potential of the control end of the driving transistor DTFT is set to Vg = VDD.

[0085] Stage 2: the first scan signal terminal Gate1 remains high, the first control end EM1 is low, and the second control end EM2 is high, the second transistor T2, the fifth transistor T5 and the third transistor T3 are turned on, the first end of the driving transistor DTFT is in communication with the control end, thereby realizing a diode connection, at this time, the potential of the second end of the driving transistor DTFT is set to Vs = VSS, thereby the threshold voltage Vth of the driving transistor DTFT can be written to the control end of the driving transistor DTFT, Vg = Vs + Vth.

[0086]

[0087] ​​Phase 3: the second scan signal terminal Gate2 is high, the sixth transistor T6 is turned on, data is written into the first node N1, at this time, the voltage variation of the first node N1 is ΔVb = VSS-Vdata, the first capacitor C1 between the first node N1 and the control terminal of the driving transistor DTFT makes the potential of the control terminal of the driving transistor DTFT jump Thus, the data signal Vdata of the data signal terminal Data is written into the control terminal of the driving transistor DTFT, and gray scale control is realized.

[0088] Phase 4: the first control terminal EM1 and the second control terminal EM2 are high, the first transistor T1 and the third transistor T3 are turned on, and the potential of the control terminal of the driving transistor DTFT saves the information of the data signal Vdata, the light-emitting branch flows through the driving current controlled by the voltage of the data signal Vdata, and the light-emitting device MLED emits light.

[0089] Figure 4D A schematic diagram of another exemplary pixel circuit 320 provided by the embodiments of the present disclosure is shown.

[0090] As Figure 3D shown, in some embodiments, the first control circuit 312 can further include a first control sub-circuit 3121 and a first light-emitting control sub-circuit 3122.

[0091] The first control sub-circuit 3121 can be electrically connected with the second end of the light-emitting device MLED, the first end of the driving circuit 311, and the third scan signal terminal Gate3 respectively, and can be configured to transmit the first voltage signal provided by the first signal terminal VDD to the second control circuit 313 under the control of the third scan signal inputted by the third scan signal terminal Gate3.

[0092] The first light-emitting control sub-circuit 3122 can be electrically connected with the second end of the light-emitting device MLED, the first end of the driving circuit 311, and the first control terminal EM1 respectively, and can be configured to control the driving circuit 311 to generate the driving current for driving the light-emitting device MLED under the control of the first control signal inputted by the first control terminal EM1.

[0093] As Figure 3A shown, the duration of the effective level of the first control signal inputted by the first control terminal EM1 is greater than the duration of the effective level of the third scan signal inputted by the third scan signal terminal Gate3.

[0094] As Figure 3D shown, in Figure 4DIn the pixel circuit embodiment, the first control signal inputted by the first control terminal EM1 needs to be turned on in stage 1 and stage 4, and the time width of the two times of turning on is different, which has a higher requirement for the shift register.

[0095] Contrast Figure 3A and Figure 4A As can be seen, in the embodiment, the first control circuit 312 is further split into a first control sub-circuit 3121 and a first light-emitting control sub-circuit 3122, so that the first control sub-circuit 3121 can be controlled by the third scan signal inputted by the third scan signal terminal Gate3, and the first light-emitting control sub-circuit 3122 can be controlled by the first control signal inputted by the first control terminal EM1, so that the effective level of the first control signal inputted by the first control terminal EM1 can maintain a periodically wider high-level output, and the effective level of the third scan signal inputted by the third scan signal terminal Gate3 can maintain a periodically narrower high-level output, without the need for the first control signal inputted by the first control terminal EM1 in the pixel circuit to alternately realize a narrower high-level output and a wider high-level output in stage 1 and stage 4 respectively, so that the control of the pixel circuit can be better realized. Figure 4D

[0096] As shown in Figure 3D In some embodiments, the third control circuit 314 can further include a second control sub-circuit 3141 and a second light-emitting control sub-circuit 3142.

[0097] The second control sub-circuit 3141 can be electrically connected with the second terminal of the driving circuit 311, the second signal terminal VSS and the fourth scan signal terminal Gate4 respectively, and can be configured to write the second voltage signal provided by the second signal terminal VSS to the second terminal of the driving circuit 311 under the control of the fourth scan signal inputted by the fourth scan signal terminal Gate4.

[0098] The second light-emitting control sub-circuit 3142 can be electrically connected with the second terminal of the driving circuit 311, the second signal terminal VSS and the second control terminal EM2 respectively, and can be configured to control the driving circuit 311 to generate the driving current for driving the light-emitting device MLED under the control of the second control signal inputted by the second control terminal EM2.

[0099] As shown in Figure 3A The duration of the effective level of the second control signal inputted by the second control terminal EM2 is greater than the duration of the effective level of the fourth scan signal inputted by the fourth scan signal terminal Gate4.

[0100] ​As shown in Figure 3D In the pixel circuit embodiment of Figure 4D , the second control signal accessed by the second control terminal EM2 needs to be turned on in stage 2 and stage 4, and the two turning-on time widths are different, which has a higher requirement for the shift register.

[0101] By comparison Figure 3A and Figure 4D It can be seen that, by further splitting the third control circuit 314 into the second control sub-circuit 3141 and the second light-emitting control sub-circuit 3142, the second control sub-circuit 3141 can be controlled by the fourth scan signal accessed by the fourth scan signal terminal Gate4, and the second light-emitting control sub-circuit 3142 can be controlled by the second control signal accessed by the second control terminal EM2, so that the effective level of the second control signal accessed by the second control terminal EM2 can maintain a periodically wider high-level output, and the effective level of the fourth scan signal accessed by the fourth scan signal terminal Gate4 can maintain a periodically narrower high-level output, without the second control signal accessed by the second control terminal EM2 in the pixel circuit of Figure 4B alternately achieving a narrower high-level output and a wider high-level output in stage 2 and stage 4, respectively, so that the control of the pixel circuit can be better achieved.

[0102] In some embodiments, as shown in Figure 4C , since the first control sub-circuit 3121 and the second control sub-circuit 3141 can respectively achieve the control in stage 1 and stage 2, the first control signal accessed by the first control terminal EM1 and the second control signal accessed by the second control terminal EM2 are both at the effective level in stage 4, therefore, the first control terminal EM1 can be multiplexed as the second control terminal EM2, so that the first control signal and the second control signal can be combined, thereby simplifying the circuit structure.

[0103] Figure 4B and Figure 4C respectively show a more specific circuit structure schematic diagram of a pixel circuit 320 provided by an embodiment of the present disclosure.

[0104] In some embodiments, as shown in Figure 4B and Figure 4CAs shown, the first control sub-circuit 3121 includes a sixth transistor T6, a first end of the sixth transistor T6 is electrically connected with the second end of the light emitting device MLED, a second end of the sixth transistor T6 is electrically connected with the first end of the driving circuit 311, and a control end of the sixth transistor T6 is electrically connected with the third scan signal end Gate3; the first light emitting control sub-circuit 3122 includes a first transistor T1, a first end of the first transistor T1 is electrically connected with the second end of the light emitting device MLED, a second end of the first transistor T1 is electrically connected with the first end of the driving circuit 311, and a control end of the first transistor T1 is electrically connected with the first control end EM1. In this way, only the third scan signal input through the third scan signal end Gate3 is needed to control the sixth transistor T6 to be turned on in stage 1, and only the first control signal input through the first control end EM1 is needed to control the first transistor T1 to be turned on in stage 4, thereby reducing the requirement for the shift register.

[0105] In some embodiments, as shown in Figure 5A and Figure 5A As shown, the second control sub-circuit 3141 includes a seventh transistor T7, a first end of the seventh transistor T7 is electrically connected with the second end of the driving circuit 311, a second end of the seventh transistor T7 is electrically connected with the second signal end VSS, and a control end of the seventh transistor T7 is electrically connected with the fourth scan signal end Gate4; the second light emitting control sub-circuit 3142 includes a third transistor T3, a first end of the third transistor T3 is electrically connected with the second end of the driving circuit 311, a second end of the third transistor T3 is electrically connected with the second signal end VSS, and a control end of the third transistor T3 is electrically connected with the second control end EM2. In this way, only the fourth scan signal input through the fourth scan signal end Gate4 is needed to control the seventh transistor T7 to be turned on in stage 2, and only the second control signal input through the second control end EM2 is needed to control the third transistor T3 to be turned on in stage 4, thereby reducing the requirement for the shift register.

[0106] Figure 3A A schematic diagram of another exemplary pixel circuit 330 is shown.

[0107] In some embodiments, as shown in Figure 5B and Figure 5AThe second storage circuit 318 of the pixel circuit 330 in the embodiment is electrically connected with the first node N1 and the first signal terminal VDD or the second signal terminal VSS respectively, and is configured to store the potential difference between the first voltage signal provided by the first node N1 and the first signal terminal VDD, or store the potential difference between the second voltage signal provided by the first node N1 and the second signal terminal VSS, so as to stabilize the potential of the first node N1, reduce the potential jump of the first node N1 caused by the second scanning signal input by the second scanning signal terminal Gate2 when the second scanning signal is off, and thus reduce the influence on the potential of the control terminal of the driving transistor DTFT.

[0108] Figure 5B A more specific circuit structure schematic diagram of the pixel circuit is shown. Figure 3D

[0109] In some embodiments, as shown in Figure 6A the second storage circuit 318 includes a second capacitor C2; a first end of the second capacitor C2 is electrically connected with the first node N1, and a second end of the second capacitor C2 is electrically connected with the first signal terminal VDD or the second signal terminal VSS. The second capacitor C2 is used to stabilize the potential of the first node N1 and reduce the potential jump of the first node N1 caused by the second scanning signal input by the second scanning signal terminal Gate2 when the second scanning signal is off, so as to reduce the influence on the potential of the control terminal of the driving transistor DTFT. The driving timing of the pixel circuit 330 can refer to Figure 6A , which will not be described here again.

[0110] Figure 5A A schematic diagram of another exemplary pixel circuit 340 provided by the embodiment of the present disclosure is shown.

[0111] As shown in Figure 3A , in some embodiments, different from the pixel circuit 330, Figure 3A the first control circuit 312 is further split into a first control sub-circuit 3121 and a first light-emitting control sub-circuit 3122, so that the first control sub-circuit 3121 can be controlled by the third scanning signal input by the third scanning signal terminal Gate3, and the first light-emitting control sub-circuit 3122 can be controlled by the first control signal input by the first control terminal EM1, so that the effective level of the first control signal input by the first control terminal EM1 can maintain a periodically wider high-level output, and the effective level of the third scanning signal input by the third scanning signal terminal Gate3 can maintain a periodically narrower high-level output, without the need for Figure 4D ​The first control signal inputted by the first control terminal EM1 of the pixel circuit needs to alternately realize the narrower high level output and the wider high level output in stage 1 and stage 4 respectively, so as to better realize the control of the pixel circuit. The third control circuit 314 is further split into the second control sub-circuit 3141 and the second light emitting control sub-circuit 3142, so that the second control sub-circuit 3141 can be controlled by the fourth scanning signal inputted by the fourth scanning signal terminal Gate4, and the second light emitting control sub-circuit 3142 can be controlled by the second control signal inputted by the second control terminal EM2, so that the effective level of the second control signal inputted by the second control terminal EM2 can keep the periodic wider high level output, and the effective level of the fourth scanning signal inputted by the fourth scanning signal terminal Gate4 can keep the periodic narrower high level output, without the need of the first control signal and the second control signal alternately realizing the narrower high level output and the wider high level output in stage 1 and stage 4 respectively as in the prior art. Figure 4D The second control signal inputted by the second control terminal EM2 of the pixel circuit needs to alternately realize the narrower high level output and the wider high level output in stage 2 and stage 4 respectively, so as to better realize the control of the pixel circuit. The driving timing of the pixel circuit 340 can refer to Figure 6B , which will not be repeated here.

[0112] In some embodiments, as shown in Figure 6A , since the first control sub-circuit 3121 and the second control sub-circuit 3141 can realize the control of stage 1 and stage 2 respectively, the first control signal inputted by the first control terminal EM1 and the second control signal inputted by the second control terminal EM2 are both at the effective level in stage 4, so that the first control terminal EM1 can be multiplexed as the second control terminal EM2, so that the first control signal and the second control signal can be combined, so as to simplify the circuit structure.

[0113] Figure 6B A more specific circuit structure schematic diagram of the pixel circuit is shown in Figure 6B .

[0114] As shown in Figure 7As shown in the figure, in some embodiments, the first control sub-circuit 3121 includes a sixth transistor T6, a first end of the sixth transistor T6 is electrically connected with a second end of the light emitting device MLED, a second end of the sixth transistor T6 is electrically connected with a first end of the driving circuit 311, and a control end of the sixth transistor T6 is electrically connected with the third scan signal end Gate3; the first light emitting control sub-circuit 3122 includes a first transistor T1, a first end of the first transistor T1 is electrically connected with the second end of the light emitting device MLED, a second end of the first transistor T1 is electrically connected with the first end of the driving circuit 311, and a control end of the first transistor T1 is electrically connected with the first control end EM1. In this way, only the third scan signal accessed through the third scan signal end Gate3 is needed to control the sixth transistor T6 to be turned on in stage 1, and only the first control signal accessed through the first control end EM1 is needed to control the first transistor T1 to be turned on in stage 4, thereby reducing the requirement for the shift register.

[0115] In some embodiments, as shown in the figure, Figure 7 As shown in the figure, the second control sub-circuit 3141 includes a seventh transistor T7, a first end of the seventh transistor T7 is electrically connected with a second end of the driving circuit 311, a second end of the seventh transistor T7 is electrically connected with the second signal end VSS, and a control end of the seventh transistor T7 is electrically connected with the fourth scan signal end Gate4; the second light emitting control sub-circuit 3142 includes a third transistor T3, a first end of the third transistor T3 is electrically connected with the second end of the driving circuit 311, a second end of the third transistor T3 is electrically connected with the second signal end VSS, and a control end of the third transistor T3 is electrically connected with the second control end EM2. In this way, only the fourth scan signal accessed through the fourth scan signal end Gate4 is needed to control the seventh transistor T7 to be turned on in stage 2, and only the second control signal accessed through the second control end EM2 is needed to control the third transistor T3 to be turned on in stage 4, thereby reducing the requirement for the shift register.

[0116] It should be noted that the "control end" referred to in the embodiments of the present disclosure can specifically refer to the gate or base of a transistor, and the "first end" can specifically refer to the source or emitter of a transistor, and the corresponding "second end" can specifically refer to the drain or collector of a transistor. Of course, it should be known by those skilled in the art that the "first end" and the "second end" can be interchanged.

[0117] It can be understood that the transistor in the embodiments of the present disclosure adopts an N-type transistor, and based on the same inventive concept, the transistor can also be replaced by a P-type transistor, and accordingly, the effective level of each signal can be a low level, thereby also achieving the purpose of the embodiments of the present disclosure.

[0118] The pixel circuit driving method provided by the embodiments of the present disclosure is also provided. The driving method can be applied to any of the pixel circuits provided by the embodiments or the permutations and combinations of the embodiments.

[0119] ​ A flowchart of an exemplary pixel circuit driving method 700 provided by the embodiments of the present disclosure is shown.

[0120] As shown in the driving method 700, the following steps can be further included. ​

[0121] At step 702, in the initialization stage, under the control of the first control signal inputted by the first control terminal EM1 and the first scanning signal inputted by the first scanning signal terminal Gate1, the third terminal of the driving circuit 311 is initialized by the first control circuit 312 and the second control circuit 313 based on the first voltage signal.

[0122] At step 704, in the compensation stage, under the control of the first scanning signal inputted by the first scanning signal terminal Gate1 and the second control signal inputted by the second control terminal EM2, the threshold voltage of the driving circuit 311 is written to the third terminal of the driving circuit 311 by the second control circuit 313 and the third control circuit 314.

[0123] At step 706, in the data writing stage, under the control of the second scanning signal inputted by the second scanning signal terminal Gate2, the data signal inputted by the data signal terminal Data is written to the third terminal of the driving circuit 311 by the first storage circuit 315.

[0124] At step 708, in the light emitting stage, under the control of the first control signal inputted by the first control terminal EM1 and the second control signal inputted by the second control terminal EM2, the driving circuit 311 generates the driving current for driving the light emitting device MLED by the first control circuit 312 and the third control circuit 314.

[0125] The pixel circuit driving method provided by the embodiments of the present disclosure realizes multiplexing by the first control circuit, the second control circuit and the third control circuit in different stages, which on the one hand realizes the compensation effect of the threshold voltage of the driving circuit and on the other hand realizes circuit simplification.

[0126] It should be understood by those of ordinary skill in the art that the above description is only specific embodiments of the present disclosure and is not intended to limit the present disclosure. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present disclosure shall be included in the protection scope of the present disclosure.​

Claims

1. A pixel circuit, comprising a light-emitting device, a driving circuit, a data writing circuit, a first control circuit, a second control circuit, a third control circuit, and a first storage circuit, wherein: The light-emitting device has its first end electrically connected to the first signal end; The first control circuit includes a first control sub-circuit and a first light-emitting control sub-circuit; The first control sub-circuit is electrically connected to the second terminal of the light-emitting device, the first terminal of the driving circuit, and the third scanning signal terminal, respectively, and is configured to: during the initialization phase, under the control of the third scanning signal connected to the third scanning signal terminal, transmit the first voltage signal provided by the first signal terminal to the second control circuit; The first light-emitting control sub-circuit is electrically connected to the second terminal of the light-emitting device, the first terminal of the driving circuit, and the first control terminal, respectively, and is configured to: during the light-emitting phase, under the control of the first control signal connected to the first control terminal, control the driving circuit to generate a driving current; wherein, the duration of the effective level of the first control signal is greater than the duration of the effective level of the third scanning signal; The second control circuit is electrically connected to the first terminal and the third terminal of the driving circuit and the first scan signal terminal, respectively, and is configured to: in the initialization phase, under the control of the first scan signal connected to the first scan signal terminal, initialize the potential of the third terminal of the driving circuit based on the first voltage signal transmitted by the first control circuit; and in the compensation phase, with the cooperation of the third control circuit, write the threshold voltage of the driving circuit to the third terminal of the driving circuit. The third control circuit includes a second control sub-circuit and a second light-emitting control sub-circuit. The second control sub-circuit is electrically connected to the second terminal, the second signal terminal, and the fourth scan signal terminal of the driving circuit, respectively, and is configured to: during the compensation phase, under the control of the fourth scan signal connected to the fourth scan signal terminal, write a second voltage signal provided by the second signal terminal to the second terminal of the driving circuit; the second light-emitting control sub-circuit is electrically connected to the second terminal, the second signal terminal, and the second control terminal of the driving circuit, respectively, and is configured to: during the light-emitting phase, under the control of the second control signal connected to the second control terminal, control the driving circuit to generate the driving current; wherein, the duration of the effective level of the second control signal is greater than the duration of the effective level of the fourth scan signal. The first storage circuit is electrically connected to the first node and the third terminal of the driving circuit, respectively, and is configured to store the potential difference between the first node and the third terminal of the driving circuit. The data writing circuit is electrically connected to the data signal terminal, the first node, and the second scan signal terminal, respectively, and is configured to: during the data writing stage, under the control of the second scan signal connected to the second scan signal terminal, write the data signal connected to the data signal terminal to the third terminal of the driving circuit through the first storage circuit; The driving circuit has a first terminal electrically connected to the first control circuit and the second control circuit, a second terminal electrically connected to the third control circuit, and a third terminal electrically connected to the first storage circuit, and is configured to generate a driving current to drive the light-emitting device under the control of the first control circuit and the third control circuit. The initialization phase, the compensation phase, the data writing phase, and the light emission phase do not overlap in timing.

2. The pixel circuit according to claim 1 further includes an initialization circuit, wherein: The initialization circuit is electrically connected to the first node, the second signal terminal, and the first scan signal terminal, respectively, and is configured to initialize the potential of the first node based on the second voltage signal provided by the second signal terminal under the control of the first scan signal connected to the first scan signal terminal.

3. The pixel circuit according to claim 1, further comprising a second storage circuit, wherein: The second storage circuit is electrically connected to the third terminal of the driving circuit and the first signal terminal or the second signal terminal, respectively, and is configured to: store the potential difference between the first voltage signal provided by the third terminal of the driving circuit and the first signal terminal, or store the potential difference between the second voltage signal provided by the third terminal of the driving circuit and the second signal terminal. or The second storage circuit is electrically connected to the first node and the first signal terminal or the second signal terminal, respectively, and is configured to: store the potential difference between the first voltage signal provided by the first node and the first signal terminal, or store the potential difference between the second voltage signal provided by the first node and the second signal terminal.

4. The pixel circuit according to claim 1, wherein, The driving circuit includes a driving transistor, a first terminal of which is electrically connected to the first control circuit and the second control circuit, a second terminal of which is electrically connected to the third control circuit, and a control terminal of which is electrically connected to the first storage circuit. And / or, The first control circuit includes a first transistor, a first terminal of the first transistor is electrically connected to a second terminal of the light-emitting device, a second terminal of the first transistor is electrically connected to a first terminal of the driving circuit, and a control terminal of the first transistor is electrically connected to a first control terminal. And / or, The second control circuit includes a second transistor, the first terminal of the second transistor is electrically connected to the first terminal of the driving circuit, the second terminal of the second transistor is electrically connected to the third terminal of the driving circuit, and the control terminal of the second transistor is electrically connected to the first scan signal terminal. And / or, The third control circuit includes a third transistor, the first terminal of which is electrically connected to the second terminal of the driving circuit, the second terminal of which is electrically connected to the second signal terminal, and the control terminal of which is electrically connected to the second control terminal. And / or, The first storage circuit includes a first capacitor, a first terminal of which is electrically connected to the first node, and a second terminal of which is electrically connected to the third terminal of the driving circuit. And / or, The data writing circuit includes a fourth transistor, the first terminal of which is electrically connected to the data signal terminal, the second terminal of which is electrically connected to the first node, and the control terminal of which is electrically connected to the second scan signal terminal.

5. The pixel circuit according to claim 2, wherein, The initialization circuit includes a fifth transistor, the first terminal of which is electrically connected to the first node, the second terminal of which is electrically connected to the second signal terminal, and the control terminal of which is electrically connected to the first scan signal terminal.

6. The pixel circuit according to claim 3, wherein, The second storage circuit includes a second capacitor; The first terminal of the second capacitor is electrically connected to the third terminal of the driving circuit, and the second terminal of the second capacitor is electrically connected to either the first signal terminal or the second signal terminal; or The first end of the second capacitor is electrically connected to the first node, and the second end of the second capacitor is electrically connected to either the first signal terminal or the second signal terminal.

7. The pixel circuit according to claim 1, wherein, The first control sub-circuit includes a sixth transistor, the first terminal of which is electrically connected to the second terminal of the light-emitting device, the second terminal of which is electrically connected to the first terminal of the driving circuit, and the control terminal of which is electrically connected to the third scan signal terminal; the first light-emitting control sub-circuit includes a first transistor, the first terminal of which is electrically connected to the second terminal of the light-emitting device, the second terminal of which is electrically connected to the first terminal of the driving circuit, and the control terminal of which is electrically connected to the first control terminal; And / or, The second control sub-circuit includes a seventh transistor, the first terminal of which is electrically connected to the second terminal of the driving circuit, the second terminal of which is electrically connected to the second signal terminal, and the control terminal of which is electrically connected to the fourth scan signal terminal; the second light emission control sub-circuit includes a third transistor, the first terminal of which is electrically connected to the second terminal of the driving circuit, the second terminal of which is electrically connected to the second signal terminal, and the control terminal of which is electrically connected to the second control terminal.

8. The pixel circuit according to claim 1 or 7, wherein, The first control terminal is reused as the second control terminal.

9. The pixel circuit according to claim 1, wherein, The light-emitting device includes at least one of light-emitting diodes, organic light-emitting diodes, quantum dot light-emitting diodes, sub-millimeter light-emitting diodes, and micro light-emitting diodes.

10. A display panel comprising an array of pixel circuits as described in any one of claims 1-9.

11. A display device, comprising: The display panel as described in claim 10; The peripheral driving circuit is electrically coupled to the display panel and is configured to provide driving signals to the display panel.

12. The display device according to claim 11, wherein, The display device includes wearable devices.

13. A driving method for a pixel circuit as described in any one of claims 1-9, comprising: During the initialization phase, under the control of the third scan signal connected to the third scan signal terminal and the first scan signal connected to the first scan signal terminal, the potential of the third terminal of the driving circuit is initialized based on the first voltage signal using the first control circuit and the second control circuit. During the compensation phase, under the control of the fourth scan signal connected to the fourth scan signal terminal and the second control signal connected to the second control terminal, the threshold voltage of the driving circuit is written to the third terminal of the driving circuit using the second control circuit and the third control circuit. During the data writing phase, under the control of the second scan signal connected to the second scan signal terminal, the first storage circuit is used to write the data signal connected to the data signal terminal into the third terminal of the driving circuit. During the light-emitting stage, under the control of the first control signal connected to the first control terminal and the second control signal connected to the second control terminal, the first control circuit and the third control circuit are used to control the driving circuit to generate a driving current to drive the light-emitting device.

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