Image processing and optical parameter calculation method and system for space
By using FPGA as the core computing unit in the image processing system, and combining adaptive background noise suppression and memory self-test mechanisms, the real-time and stability problems of traditional CPUs and DSPs when processing large-scale image data are solved, efficient image processing and optical parameter calculation are achieved, and the reliability and service life of the system are improved.
Patent Information
- Application Number
- CN202411887226.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-20
- Publication Date
- 2025-04-15
AI Technical Summary
When traditional CPUs and DSPs process large-scale image data, the processing speed and real-time performance are difficult to meet the needs of high-speed operation. Especially in the spatial environment, the image data acquisition frequency is high and the data volume is large, which makes it impossible to achieve real-time processing and fast response. At the same time, the timing control is complex when processing multitasking, which is prone to conflicts or delays, affecting the stability and reliability of the system.
Using field programmable gate array (FPGA) as the core computing unit, it has a highly parallel architecture that can handle multiple tasks in the same time, and proposes adaptive background noise suppression and optimization processing technology, and introduces a memory self-test mechanism to improve the stability and reliability of the system.
The speed of image processing and optical parameter calculation is significantly improved, the stable image processing and optical parameter calculation accuracy is maintained in different lighting conditions and complex environments, the stability and reliability of the system are improved, the risk of system downtime caused by hardware failures is reduced, the service life of the equipment is extended, and the maintenance cost is reduced.
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Figure CN119835542A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of light parameter calculation, and in particular relates to a method and system for space image processing and light parameter calculation. Background Art
[0002] Image processing and optical parameter calculation in space environment are mainly used in the aerospace field, especially in real-time processing and analysis of image data collected by optical sensors in spacecraft, satellites, space stations and other equipment. In traditional space image processing and optical parameter calculation, general-purpose processors such as microcontrollers (CPUs) and digital signal processors (DSPs) are usually used to implement them. When processing large-scale image data, the processing speed and real-time performance of traditional CPUs and DSPs are difficult to meet the requirements of high-speed operation. Especially in space environments, the acquisition frequency of image data is high and the amount of data is large. Traditional processing methods cannot achieve real-time processing and rapid response. In space applications, image processing and optical parameter calculation often require multiple tasks to be performed simultaneously. When traditional CPUs and DSPs process multiple tasks, the timing control is relatively complex, and conflicts or delays are prone to occur, affecting the stability and reliability of the system. Therefore, there is an urgent need for a method and system for space image processing and optical parameter calculation that solves the above problems. Summary of the invention
[0003] In order to solve the above technical problems, the present invention provides a method and system for space image processing and light parameter calculation, which are particularly suitable for image processing and light parameter calculation in a space environment.
[0004] The technical solution adopted by the present invention is: in the first aspect, a method for spatial image processing and light parameter calculation is provided, comprising:
[0005] When receiving the field synchronization signal of the image frame, the image data is collected and cached;
[0006] Store the cached image data into the DDR memory according to the corresponding DDR address;
[0007] Calculate the centroid coordinates after eliminating noise interference;
[0008] Read computer control instructions;
[0009] The image forwarding mode, the beam quality calculation mode and the light energy calculation mode are selected and executed according to the control instructions.
[0010] Furthermore, calculating the centroid coordinates after eliminating noise interference includes the following steps:
[0011] receiving raw image data;
[0012] The raw image data exceeds 8 bytes of memory background noise;
[0013] Subtract the background noise from the original image data to obtain valid data and store it in the memory;
[0014] Read cached image data;
[0015] Decompose image data into pixels;
[0016] Calculate the cumulative sum of pixel gray values;
[0017] Determine the row and column number of each pixel in the image according to the DDR address;
[0018] Calculate the first-order moment in the X direction and the first-order moment in the Y direction;
[0019] Determine the completion of reading the entire image;
[0020] If the reading is not completed, the cached image data will be read again. If the reading is completed, the centroid coordinates X and Y will be calculated.
[0021] Furthermore, the image forwarding mode includes the following steps:
[0022] Read cached image data;
[0023] Check that execution continues when not in another mode;
[0024] Take out the image data from the DDR memory according to the corresponding DDR address;
[0025] Send to computer.
[0026] Further, the beam quality calculation mode includes the following steps:
[0027] Get the center of mass coordinates X, Y;
[0028] Check that execution continues when not in another mode;
[0029] Read image data;
[0030] Calculate the beam quality.
[0031] Furthermore, the light energy calculation mode includes the following steps:
[0032] Get the center of mass coordinates X, Y;
[0033] Check that execution continues when not in another mode;
[0034] Read image data;
[0035] Calculate light energy.
[0036] In a second aspect, a spatial image processing and light parameter calculation system is provided, comprising:
[0037] An image receiving module, used for receiving image data and an asynchronous clock signal from a camera, and sending the image data to a memory control module;
[0038] A phase-locked loop module, used to receive a main clock signal provided externally, and generate a low voltage differential signal clock and an image processing clock;
[0039] The memory control module is used for data buffering between modules with different speeds, receiving asynchronous clock signals, low voltage differential signal clocks and image processing clocks to complete domain synchronization of asynchronous clocks, ensuring the correct storage and retrieval of data, and controlling and managing DDR memory;
[0040] A parameter calculation module, used for calculating light parameters according to the processed image data from the memory control module;
[0041] The low voltage differential signal transmission module is used to send the processed image data and light parameter results to the computer, send the control instructions from the computer to the memory control module, and receive the low voltage differential signal clock and image processing clock from the phase-locked loop module.
[0042] Furthermore, the memory control module includes:
[0043] Control logic unit, used to manage the read and write operations, timing control and data integrity check of DDR memory, store and retrieve image data from DDR memory, and send DDR clock to DDR memory;
[0044] FIFO transceiver unit, used to buffer data between modules with different rates and complete domain synchronization of asynchronous clocks;
[0045] The FIFO read / write unit is used to manage the read / write operations of the buffer, and to perform read / write speed adjustment, flow control, and priority management.
[0046] Furthermore, data integrity check refers to receiving a self-check control instruction from a computer, writing a preset fixed data pattern to a specific address segment in the DDR memory, then reading data from the same address segment, and comparing the consistency of the original written data with the read data.
[0047] In a third aspect, an electronic device is provided, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the spatial image processing and light parameter calculation method provided by the present disclosure.
[0048] In a fourth aspect, a non-transitory computer-readable storage medium storing computer instructions is provided, wherein the computer instructions are used to enable a computer to execute the spatial image processing and light parameter calculation method provided by the present disclosure.
[0049] The advantages and positive effects of the present invention are as follows: due to the adoption of the above technical solution, a field programmable gate array is used as the core computing unit, which has a highly parallel architecture and can process multiple tasks at the same time, significantly improving the speed of image processing and light parameter calculation; an adaptive background noise suppression and optimization processing technology is proposed, which can maintain stable image processing and light parameter calculation accuracy under different lighting conditions and complex environments; a memory self-check mechanism is introduced to regularly check the hardware status of the system, timely discover and report potential faults, effectively improve the stability and reliability of the system, reduce the risk of system downtime due to hardware failures, extend the service life of the equipment, and reduce maintenance costs. BRIEF DESCRIPTION OF THE DRAWINGS
[0050] Figure 1 Schematic diagram of a method for calculating optical parameters according to an embodiment of the present invention
[0051] Figure 2 Schematic diagram of a flow chart of calculating the centroid coordinates after eliminating noise interference according to an embodiment of the present invention
[0052] Figure 3 Schematic diagram of the structure of an optical parameter calculation system according to an embodiment of the present invention DETAILED DESCRIPTION
[0053] The present disclosure is described more fully below with reference to the accompanying drawings, in which exemplary embodiments of the present disclosure are described. The technical solutions in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.
[0054] like Figure 1 As shown, the present invention provides a method for space image processing and light parameter calculation, comprising:
[0055] S100, when receiving a field synchronization signal of an image frame, collecting image data and caching it;
[0056] When the system starts, the DDR memory is initialized first to ensure that the memory is in normal working condition. During the initialization process, the timing parameters and power supply voltage of the DDR memory are checked to ensure that they meet the design requirements. The Cameralink interface is initialized and its transmission mode is configured to ensure that the image data can be transmitted correctly. When the Cameralink interface receives the field synchronization signal of the image frame, the image acquisition process is triggered. The rising edge of the field signal indicates the beginning of a frame of image, and the image data is ready to be received at this time. The acquired image data is cached in the buffer.
[0057] S200, storing the cached image data into the DDR memory according to the corresponding DDR address;
[0058] Set the storage address pointer of the DDR memory to zero and prepare to store the image data in DDR in sequence. Read the image data from the buffer and store the read image data in the memory according to the corresponding DDR address. The amount of data read each time depends on the depth of the FIFO and the write speed of the DDR to ensure the stability of data transmission. When all the image data is stored in the DDR, the storage address pointer reaches the highest bit, indicating that the storage process of a frame of image is completed.
[0059] S300, calculating the centroid coordinates after eliminating noise interference;
[0060] S400, reading a control instruction of a computer;
[0061] The control instructions from the host computer are received through the serial communication protocol. These instructions can be used to configure system parameters, start or stop specific operations, or query system status information. It also includes switching working modes, switching between different modes such as image acquisition, image forwarding, centroid calculation, beam quality calculation, and light energy calculation.
[0062] S500, selecting and executing an image forwarding mode, a beam quality calculation mode, and a light energy calculation mode according to a control instruction.
[0063] like Figure 2 As shown, in one embodiment, calculating the centroid coordinates after eliminating noise interference includes the following steps:
[0064] S301, receiving original image data;
[0065] S302, the original image data exceeds 8 bytes and reads the memory background noise;
[0066] S303, subtracting background noise from the original image data to obtain valid data and storing the data in a memory;
[0067] Using time domain mean filtering technology, the background noise is continuously collected during the initialization phase of the system power-on. By averaging the acquired time domain data and taking advantage of the fact that the integral characteristic of white noise in the time domain tends to zero, the white noise component in the background noise is effectively eliminated. In subsequent image processing, all images are subtracted from the background noise mean to eliminate noise interference. An adaptive background noise suppression and optimization processing technology is proposed, which can maintain stable image processing and light parameter calculation accuracy under different lighting conditions and complex environments.
[0068] S304, reading cached image data;
[0069] Read a complete frame of image data from the buffer. Make sure the amount of data read is large enough to cover the entire image frame. If the image is in color, it is usually necessary to convert it to grayscale to simplify the centroid calculation.
[0070] S305, decomposing the image data into pixels;
[0071] The read image data is decomposed into single pixels, each pixel contains a gray value or multiple color components, the gray value of each pixel is stored in the DDR memory in sequence, and its corresponding row number and column number are recorded. The row number and column number are used for the subsequent centroid coordinate calculation.
[0072] S306, calculating the cumulative sum of pixel gray values;
[0073] Traverse all pixels and calculate the cumulative grayscale value of the entire image.
[0074] S307, determining the row number and column number of each pixel in the image according to the DDR address;
[0075] S308, calculating the first-order moment in the X direction and the first-order moment in the Y direction;
[0076] S309, determining the completion status of reading the entire image;
[0077] Whether the currently read image data has covered the entire image can be determined by comparing the number of read pixels with the total number of pixels in the image.
[0078] S310: If the reading is not completed, start again from reading the cached image data, and if the reading is completed, calculate the centroid coordinates X, Y.
[0079] The calculation formula of the centroid position is the first-order moment of the image gray value Among them, I(x,y) represents the grayscale value of the image at point (x,y), is the centroid of the ith image in the x direction, and is the centroid of the ith image in the y direction.
[0080] In one embodiment, the image forwarding mode includes the following steps:
[0081] Read cached image data;
[0082] Check that execution continues when not in another mode;
[0083] Take out the image data from the DDR memory according to the corresponding DDR address;
[0084] Send to computer.
[0085] In one embodiment, the beam quality calculation mode includes the following steps:
[0086] Get the center of mass coordinates X, Y;
[0087] Check that execution continues when not in another mode;
[0088] Read image data;
[0089] Calculate the beam quality.
[0090] E is obtained by summing the grayscale values of the entire image ref The reference light energy, i.e. Combined with E real The light energy is converted to BQ beam quality, that is, where k 2 , k 3 is the correction factor.
[0091] In one embodiment, the light energy calculation mode includes the following steps:
[0092] Get the center of mass coordinates X, Y;
[0093] Check that execution continues when not in another mode;
[0094] Read image data;
[0095] Calculate light energy.
[0096] Considering the primary diffraction limit of light, the sum of the gray values within a certain radius around its center of mass is multiplied by the correction factor. Through the equation Q = E real =k 1 *∫∫ S I(x, y)dxdy calculates the Q light energy, where the integration domain is a circle with a certain radius around the center of mass, that is, {(x, y)|(xX i ) 2 +(yY i ) 2 <r 2}, where r is a constant, k 1 is the correction factor.
[0097] like Figure 3 As shown, in order to facilitate the execution of the calculation method provided by the present disclosure, the present disclosure also provides a spatial image processing and light parameter calculation system, including:
[0098] The image receiving module 100 is used to receive image data and an asynchronous clock signal from a camera and send the image data to the memory control module 300;
[0099] The phase-locked loop module 200 is used to receive a main clock signal provided externally and generate a low voltage differential signal clock and an image processing clock;
[0100] The memory control module 300 is used for data buffering between modules with different rates, receiving asynchronous clock signals, low voltage differential signal clocks and image processing clocks to complete domain synchronization of asynchronous clocks, ensuring correct storage and retrieval of data, and controlling and managing DDR memory;
[0101] Field Programmable Gate Array (FPGA) is used as the core computing unit. FPGA has a highly parallel architecture and can handle multiple tasks at the same time, significantly improving the speed of image processing and light parameter calculation. Compared with traditional CPU / DSP, FPGA can better play the advantages of parallel computing, especially when processing large-scale image data, the processing speed is greatly improved, meeting the high real-time requirements in space applications.
[0102] The parameter calculation module 400 is used to calculate the light parameters according to the processed image data from the memory control module 300;
[0103] The low voltage differential signal transmission module 500 is used to send the processed image data and light parameter results to the computer, send the control instructions from the computer to the memory control module 300, and receive the low voltage differential signal clock and image processing clock from the phase-locked loop module 200.
[0104] In one embodiment, the memory control module includes:
[0105] The control logic unit 301 is used to manage the read and write operations, timing control and data integrity check of the DDR memory, store and retrieve image data from the DDR memory, and send a DDR clock to the DDR memory;
[0106] FIFO transceiver unit 302, used for data buffering between modules with different rates and completing domain synchronization of asynchronous clocks;
[0107] The FIFO read / write unit 303 is used to manage the read / write operations of the buffer, and perform read / write speed adjustment, flow control and priority management.
[0108] In one embodiment, the data integrity check refers to receiving a self-check control instruction from a computer, writing a preset fixed data pattern to a specific address segment in the DDR memory, then reading data from the same address segment, and comparing the consistency of the original written data with the read data.
[0109] After receiving the self-test instruction, control the read and write operations of the DDR memory, write the preset fixed data pattern to the specified address segment, and read the data from the same address segment for comparison. Compare the read data with the original written data bit by bit to check whether there is any difference. If a difference is found, record the address where the error occurred and the specific error type. After the self-test is completed, feedback the self-test results to the host computer or user through the serial interface or other communication methods to report the health status of the memory. The memory self-test mechanism is introduced to regularly check the hardware status of the system, timely discover and report potential faults, effectively improve the stability and reliability of the system, reduce the risk of system downtime due to hardware failure, extend the service life of the equipment, and reduce maintenance costs.
[0110] Based on the embodiments of the present disclosure, the present disclosure also provides an electronic device and a readable storage medium.
[0111] An electronic device includes at least one processor; and a memory connected to the at least one processor in communication; wherein the memory stores instructions that can be executed by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the spatial image processing and light parameter calculation method provided by the present disclosure.
[0112] Electronic devices are intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframes, and other suitable computers. Electronic devices may also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present disclosure described and / or claimed herein.
[0113] A non-transitory computer-readable storage medium storing computer instructions, wherein the computer instructions are used to enable a computer to execute the spatial image processing and light parameter calculation method provided by the present disclosure.
[0114] Various embodiments of the present disclosure may be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), complex programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.
[0115] The program code for implementing the method of the present disclosure may be written in any combination of one or more programming languages. These program codes may be provided to a processor or controller of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that the program code, when executed by the processor or controller, enables the functions / operations specified in the flow chart and / or block diagram to be implemented. The program code may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.
[0116] In the context of the present disclosure, a machine-readable medium may be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, device, or equipment. A machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or equipment, or any suitable combination of the foregoing. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
[0117] The embodiments of the present invention are described in detail above, but the contents described are only preferred embodiments of the present invention and cannot be considered to limit the scope of implementation of the present invention. All equivalent changes and improvements made within the scope of the present invention should still fall within the scope of the patent coverage of the present invention.
Claims
1. A spatial image processing and light parameter calculation method, characterized in that: include: When receiving the field synchronization signal of the image frame, the image data is collected and cached; Store the cached image data into the DDR memory according to the corresponding DDR address; Calculate the centroid coordinates after eliminating noise interference; Read computer control instructions; The image forwarding mode, the beam quality calculation mode and the light energy calculation mode are selected and executed according to the control instructions.
2. The method according to claim 1, characterized in that Calculating the centroid coordinates after eliminating noise interference includes the following steps: receiving raw image data; The raw image data exceeds 8 bytes of memory background noise; Subtract the background noise from the original image data to obtain valid data and store it in the memory; Read cached image data; Decompose image data into pixels; Calculate the cumulative sum of pixel gray values; Determine the row and column number of each pixel in the image according to the DDR address; Calculate the first-order moment in the X direction and the first-order moment in the Y direction; Determine the completion of reading the entire image; If the reading is not completed, the cached image data will be read again. If the reading is completed, the centroid coordinates X and Y will be calculated.
3. The method according to claim 1, characterized in that: The image forwarding mode includes the following steps: Read cached image data; Check that execution continues when not in another mode; Take out the image data from the DDR memory according to the corresponding DDR address; Send to computer.
4. The method according to claim 1, characterized in that: The beam quality calculation mode includes the following steps: Get the center of mass coordinates X, Y; Check that execution continues when not in another mode; Read image data; Calculate the beam quality.
5. The method according to claim 1, characterized in that The light energy calculation mode includes the following steps: Get the center of mass coordinates X, Y; Check that execution continues when not in another mode; Read image data; Calculate light energy.
6. A spatial image processing and light parameter calculation system, characterized in that: include: An image receiving module, used for receiving image data and an asynchronous clock signal from a camera, and sending the image data to a memory control module; A phase-locked loop module, used to receive a main clock signal provided externally, and generate a low voltage differential signal clock and an image processing clock; The memory control module is used for data buffering between modules with different speeds, receiving asynchronous clock signals, low voltage differential signal clocks and image processing clocks to complete domain synchronization of asynchronous clocks, ensuring the correct storage and retrieval of data, and controlling and managing DDR memory; A parameter calculation module, used for calculating light parameters according to the processed image data from the memory control module; The low voltage differential signal transmission module is used to send the processed image data and light parameter results to the computer, send the control instructions from the computer to the memory control module, and receive the low voltage differential signal clock and image processing clock from the phase-locked loop module.
7. The system according to claim 6, characterized in that The memory control module includes: Control logic unit, used to manage the read and write operations, timing control and data integrity check of DDR memory, store and retrieve image data from DDR memory, and send DDR clock to DDR memory; FIFO transceiver unit, used to buffer data between modules with different rates and complete domain synchronization of asynchronous clocks; The FIFO read / write unit is used to manage the read / write operations of the buffer, and to perform read / write speed adjustment, flow control, and priority management.
8. The system according to claim 7, characterized in that: Data integrity check refers to receiving self-test control instructions from the computer, writing a preset fixed data pattern to a specific address segment in the DDR memory, then reading data from the same address segment, and comparing the consistency of the original written data with the read data.
9. An electronic device, comprising: at least one processor; as well as a memory communicatively connected to at least one processor; wherein, The memory stores instructions that can be executed by at least one processor. The instructions are executed by at least one processor so that the at least one processor can execute the method according to any one of claims 1 to 5.
10. A non-transitory computer-readable storage medium storing computer instructions, wherein: The computer instructions are used to make a computer execute the method according to any one of claims 1 to 5.