Display panel and preparation method thereof

Abstract

The embodiment of the invention provides a display panel and a preparation method of the display panel, and relates to the technical field of display. The display panel comprises a substrate and an array film layer located on the substrate. The array film layer comprises a plurality of conductive layers and organic insulating layers located between the adjacent conductive layers. In a display area of the display panel, a first film layer opening hole used for being connected with wires in different conducting layers is formed in an organic insulating layer, and a first included angle between the hole wall of the first film layer opening hole and the bottom face, facing a substrate, of the organic insulating layer is an acute angle larger than 45 degrees, namely, the first included angle is larger than 45 degrees. The gradient between the hole wall of the first film layer opening and the bottom surface of the organic insulating layer is steep. According to the design, the space occupied by the first film layer holes can be effectively reduced, and the pixel density of the display panel can be improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular, to a display panel and a method for preparing the display panel. Background Art

[0002] As users' visual needs improve, users have higher and higher requirements on the pixel density of display panels. How to improve the pixel density of display panels is a key research direction for technical personnel in this field. Summary of the invention

[0003] In order to at least overcome the above-mentioned deficiencies in the prior art, an object of the present application is to provide a display panel and a method for manufacturing the display panel.

[0004] In a first aspect, an embodiment of the present application provides a display panel, the display panel comprising:

[0005] substrate;

[0006] An array film layer, wherein the array film layer is located on the substrate;

[0007] The array film layer includes a plurality of conductive layers and an organic insulating layer at least located between adjacent conductive layers;

[0008] In the display area of ​​the display panel, a first film layer opening for connecting wiring in different conductive layers is provided in the organic insulating layer, wherein a first angle between the hole wall of the first film layer opening and the bottom surface of the organic insulating layer facing the substrate is an acute angle greater than 45°.

[0009] In a possible implementation, each of the organic insulating layers includes at least a first organic insulating layer and a second organic insulating layer, and the first organic insulating layer is arranged on a side of the second organic insulating layer away from the substrate;

[0010] The first film layer opening includes a first opening portion located in the first organic insulating layer and a second opening portion located in the second organic insulating layer;

[0011] The orthographic projection of the second opening portion on the substrate is located within the orthographic projection of the first opening portion on the substrate, or the orthographic projection of the second opening portion on the substrate coincides with the orthographic projection of the first opening portion on the substrate.

[0012] In a possible implementation, the display panel further includes a frame area arranged around the display area;

[0013] The first organic insulating layer includes a first edge sidewall located in the frame area, and the second organic insulating layer includes a second edge sidewall located in the frame area;

[0014] In a direction away from the display area, the second edge sidewall extends relative to the first edge sidewall;

[0015] Preferably, in a direction away from the display area, the second edge sidewall protrudes 3um to 10um relative to the first edge sidewall;

[0016] Preferably, a second angle between the second edge side wall and the bottom surface of the organic insulating layer facing the substrate is smaller than the first angle.

[0017] In a possible implementation, the organic insulating layer includes a planarization layer;

[0018] The display panel also includes an anode layer and a pixel definition layer;

[0019] The anode layer is located on a side of the planarization layer away from the substrate, and the anode layer is connected to the wiring in the conductive layer through the first film layer opening in the planarization layer;

[0020] The pixel defining layer is located on a side of the anode layer away from the substrate, and the pixel defining layer includes a pixel opening, and the pixel opening exposes a portion of the anode layer to form a pixel anode;

[0021] The orthographic projection of the pixel opening on the substrate does not overlap with the orthographic projection of the first film layer opening in the planarization layer on the substrate.

[0022] In a possible implementation, the planarization layer includes at least a first planarization layer and a second planarization layer, and the first planarization layer is disposed on a side of the second planarization layer away from the substrate;

[0023] In a direction perpendicular to the substrate, the thickness of the first planarization layer is the same as the thickness of the second planarization layer;

[0024] Preferably, the thickness of the first planarization layer and the thickness of the second planarization layer are 0.7um to 1.3um;

[0025] Preferably, the thickness of the first planarization layer and the thickness of the second planarization layer are 1.1 um;

[0026] Preferably, the thickness of the first planarization layer and the thickness of the second planarization layer are 0.8 um.

[0027] In a second aspect, an embodiment of the present application further provides a method for preparing a display panel, the method comprising:

[0028] providing a substrate;

[0029] A plurality of conductive layers and an organic insulating layer located between adjacent conductive layers are manufactured on the substrate to obtain an array film layer; in the display area of ​​the display panel, a first film layer opening for connecting wiring in different conductive layers is manufactured in the organic insulating layer, wherein a first angle between the hole wall of the first film layer opening and the bottom surface of the organic insulating layer toward the substrate is an acute angle greater than 45°.

[0030] In a possible implementation, the step of manufacturing a plurality of conductive layers and an organic insulating layer located between adjacent conductive layers on the substrate to obtain an array film layer includes:

[0031] forming a conductive layer on the substrate;

[0032] Forming an organic insulating layer on a side of the conductive layer away from the substrate;

[0033] Repeat the above steps until the array film layer is obtained;

[0034] Preferably, the step of forming an organic insulating layer on a side of the conductive layer away from the substrate comprises:

[0035] A first organic insulating layer is formed on a side of the conductive layer away from the substrate, and the first organic insulating layer is patterned to obtain a first opening portion;

[0036] A second organic insulating layer is formed on a side of the first organic insulating layer away from the substrate, and the second organic insulating layer is patterned to obtain a second opening portion, wherein the orthographic projection of the second opening portion on the substrate is located within the orthographic projection of the first opening portion on the substrate, or the orthographic projection of the second opening portion on the substrate coincides with the orthographic projection of the first opening portion on the substrate.

[0037] In a possible implementation, the step of forming a first organic insulating layer on a side of the conductive layer away from the substrate and patterning the first organic insulating layer to obtain a first opening portion includes:

[0038] Coating a photoresist layer on the first organic insulating layer, and performing development and exposure through a first mask to form a first photoresist layer opening exposing the first organic insulating layer;

[0039] Etching the first organic insulating layer exposed by the opening of the first photoresist layer to obtain a first opening portion;

[0040] Preferably, the step of forming a second organic insulating layer on a side of the first organic insulating layer away from the substrate and patterning the second organic insulating layer to obtain a second opening portion comprises:

[0041] Coating a photoresist layer on the second organic insulating layer, and performing development and exposure through a second mask to form a second photoresist layer opening exposing the second organic insulating layer, wherein the orthographic projection of the second photoresist layer opening on the substrate coincides with the orthographic projection of the first opening portion on the substrate, or the orthographic projection of the second photoresist layer opening on the substrate is located within the orthographic projection of the first opening portion on the substrate;

[0042] The second planarization portion located at the opening of the photoresist layer is etched to obtain a second opening portion.

[0043] In a possible implementation, after the step of forming a second organic insulating layer on a side of the first organic insulating layer away from the substrate and patterning the second organic insulating layer to obtain a second opening portion, the method further includes:

[0044] Plasma treatment is performed on the first opening portion and the second opening portion to optimize the bottom boundaries of the first opening portion and the second opening portion.

[0045] In a third aspect, the present application further provides a display device, comprising the display panel described in any one of the first aspects or the display panel prepared by any one of the preparation methods in the second aspect.

[0046] Based on any one of the above aspects, the display panel and the method for preparing the display panel provided in the embodiments of the present application include a substrate and an array film layer located on the substrate. The array film layer includes a plurality of conductive layers and an organic insulating layer located between adjacent conductive layers. In the display area of ​​the display panel, a first film layer opening for connecting wiring in different conductive layers is provided in the organic insulating layer, wherein the first angle between the hole wall of the first film layer opening and the bottom surface of the organic insulating layer facing the substrate is an acute angle greater than 45°, that is, the slope between the hole wall of the first film layer opening and the bottom surface of the organic insulating layer is steeper. With such a design, the space occupied by the first film layer opening can be effectively reduced, which is conducive to improving the pixel density of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.

[0048] Figure 1 A schematic diagram of the regional distribution of the display panel provided in this embodiment;

[0049] Figure 2 One of the structural schematic diagrams of a display panel provided in an embodiment of the present application;

[0050] Figure 3 A second structural schematic diagram of a display panel provided in an embodiment of the present application;

[0051] Figure 4 A third structural schematic diagram of a display panel provided in an embodiment of the present application;

[0052] Figure 5 A schematic diagram of a structure of a display panel in the related art;

[0053] Figure 6 A fourth structural schematic diagram of a display panel provided in an embodiment of the present application;

[0054] Figure 7 A schematic diagram of a process of a method for preparing a display panel provided in an embodiment of the present application;

[0055] Figure 8 for Figure 7 The corresponding process diagram;

[0056] Fig. 9 for Figure 7 Schematic diagram of the sub-process of step S120;

[0057] Fig.10 for Fig. 9 The corresponding process diagram;

[0058] Fig.11 for Fig. 9 Schematic diagram of the sub-process of step S122;

[0059] Fig.12 for Fig.11 Corresponding process diagram. DETAILED DESCRIPTION

[0060] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.

[0061] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for which protection is sought, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0062] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0063] In the description of this application, it should be noted that the terms "upper", "lower", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship in which the product of the application is usually placed when in use, which is only for the convenience of describing this application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on this application. In addition, the terms "first", "second", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.

[0064] In the description of this application, it should also be noted that, unless otherwise clearly specified and limited, the terms "disposed", "connected", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal connection of two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0065] It should be noted that, in the absence of conflict, different features in the embodiments of the present application may be combined with each other.

[0066] In the related art, the display panel usually includes a plurality of conductive layers and an organic insulating layer located between adjacent conductive layers. The organic insulating layer is often provided with a film opening for realizing circuit routing to ensure normal signal connection. However, the film opening in the related art often has an upper aperture that is too large due to technical limitations. For example, when the lower aperture of the film opening is designed to be 4um, the upper aperture may exceed 10um in the finished product. At this time, the angle between the hole wall of the film opening and the bottom surface of the organic insulating layer is about 36°. The film opening with an upper aperture that is too large will cause the hole wall slope of the film opening to be relatively gentle, which will increase the space occupied by the film opening, thereby compressing the layout space of other components, which is not conducive to the improvement of pixel density (Pixels Per Inch, PPI).

[0067] In order to solve the above technical problems, the inventor innovatively designed the following technical solutions, and the specific implementation solutions of the present application will be described in detail below in conjunction with the accompanying drawings. It should be noted that the defects existing in the solutions in the above prior art are the results obtained by the inventor after practice and careful research. Therefore, the discovery process of the above technical problems and the solutions proposed by this embodiment for the above technical problems below should all be the contributions made by the inventor to the present application in the process of invention and creation, and should not be understood as the technical content known to those skilled in the art.

[0068] Please refer to Figure 1 and Figure 2 The embodiment of the present application provides a display panel 10, which includes a display area AA and a frame area BA arranged around the display area AA. The display panel 10 also includes a substrate 110 and an array film layer 120 located on the substrate 110. The array film layer 120 includes a plurality of conductive layers 121 and an organic insulating layer 122 located at least between adjacent conductive layers 121.

[0069] For example, please refer to Figure 3 , the array film layer may further include a semiconductor layer, the semiconductor layer may further include a source S, a drain D and a channel (e.g., a P-Si channel) between the source S and the drain D constituting the transistor. The multiple conductive layers 121 may include a first conductive layer M1, a second conductive layer M2 and a third conductive layer M3, the organic insulating layer 122 may include a gate insulating layer G1, a capacitor insulating layer C1 and an interlayer insulating layer IDL covering the semiconductor layer, wherein the first conductive layer M1 is located between the gate insulating layer G1 and the capacitor insulating layer C1, the second conductive layer M2 is located between the capacitor insulating layer C1 and the interlayer insulating layer IDL, the third conductive layer M3 is located on the side of the interlayer insulating layer IDL away from the substrate 110, and the first conductive layer M1, the third conductive layer M3 and the semiconductor layer may form a transistor. Specifically, the first conductive layer M1 can form the gates of multiple transistors and the first capacitor plate, the second conductive layer M2 can form the second capacitor plate, the third conductive layer M3 can form the source and drain of multiple transistors, and the capacitor insulating layer C1 can insulate and isolate the first capacitor plate and the second capacitor plate, so that the first capacitor plate and the second capacitor plate form a capacitor. The capacitor insulating layer C1 and the interlayer insulating layer IDL insulate and isolate the gates, sources, and drains of multiple transistors from each other.

[0070] In the display area AA of the display panel 10, a first film layer opening 130 for connecting the wiring in different conductive layers 121 is provided in the organic insulating layer 122, and a conductive material, such as copper metal, aluminum metal, etc., may be provided in the first film layer opening 130. Among them, the first angle between the hole wall of the first film layer opening 130 and the bottom surface of the organic insulating layer 122 facing the substrate 110 is an acute angle greater than 45°, that is, the slope between the hole wall of the first film layer opening 130 and the bottom surface of the organic insulating layer 122 is steeper than the slope in the prior art. For example, when the lower aperture of the first film layer opening 130 is designed to be 2.5um, its upper aperture can be controlled between 3.5um and 5um. At this time, the first angle between the hole wall of the first film layer opening 130 and the bottom surface of the organic insulating layer 122 facing the substrate 110 is about 60° to 66°.

[0071] Such a design can effectively reduce the upper aperture of the first film layer opening 130 , reduce the space occupied by the first film layer opening 130 , and improve the pixel density of the display panel 10 .

[0072] Furthermore, the inventors found that when making the first film layer opening 130, the etching time is long due to the thick thickness of the organic insulating layer 122. In this case, when the lower aperture of the first film layer opening 130 meets the requirements, the upper area of ​​the first film layer opening 130 may be over-etched due to the long contact time with the etchant, resulting in the upper aperture of the first film layer opening 130 being too large.

[0073] To do this, refer to Figure 4 Each organic insulating layer 122 at least includes a first organic insulating layer 1221 and a second organic insulating layer 1222. In a direction away from the substrate 110, the first organic insulating layer 1221 and the second organic insulating layer 1222 are stacked. The first film layer opening 130 includes a first opening portion located in the first organic insulating layer 1221 and a second opening portion located in the second organic insulating layer 1222. By manufacturing the first opening portion and the second opening portion in layers, the size of each opening portion can be more accurately controlled.

[0074] Specifically, the first organic insulating layer 1221 may be first manufactured, and the first organic insulating layer 1221 may be etched to obtain the first opening portion, and then the second organic insulating layer 1222 may be manufactured on the first organic insulating layer 1221, and the second organic insulating layer 1222 may be etched to obtain the second opening portion. If the mask used when etching the first organic insulating layer 1221 is the same as the mask used when etching the first organic insulating layer 1221, the orthographic projection of the second opening portion on the substrate 110 may coincide with the orthographic projection of the first opening portion on the substrate 110; if the mask used when etching the first organic insulating layer 1221 is different from the mask used when etching the first organic insulating layer 1221, the orthographic projection of the second opening portion on the substrate 110 may be located within the orthographic projection of the first opening portion on the substrate 110.

[0075] In the above structure, by respectively making the first opening portion and the second opening portion in the first organic insulating layer 1221 and the second organic insulating layer 1222, the etching time can be effectively shortened to avoid over-etching caused by the etching solution being in contact with the upper portion of the opening for too long, thereby effectively controlling the space occupied by the first film layer opening 130 and improving the pixel density of the display panel 10.

[0076] It should be noted that a multilayer structure can be introduced according to the actual thickness of the organic insulating layer and the aperture design of the first film layer opening 130. By performing layered openings on the multilayer structure, the etching time required for each opening portion can be effectively shortened, and the size of each opening portion can be more accurately controlled.

[0077] Further, please refer again to Figure 4 , the first organic insulating layer 1221 includes a first edge sidewall located in the frame area BA, and the second organic insulating layer 1222 includes a second edge sidewall located in the frame area BA. In the direction away from the display area AA, the second edge sidewall extends relative to the first edge sidewall, wherein in the direction away from the display area AA, the second edge sidewall extends 3um to 10um relative to the first edge sidewall, illustratively, the second edge sidewall extends 3um, 4um, 5um, 6um, 7um, 8um, 9um and 10um relative to the first edge sidewall, and preferably, in the direction away from the display area AA, the second edge sidewall extends 5um relative to the first edge sidewall.

[0078] Among them, the second angle θ2 between the second edge side wall and the bottom surface of the organic insulating layer 122 facing the substrate 110 is smaller than the first angle θ1, that is, the second angle θ2 between the second edge side wall and the bottom surface of the organic insulating layer 122 facing the substrate 110 is an acute angle less than 45°, for example, the second angle θ2 can be 40°, 35°, 32° or 28°, etc.

[0079] With such a design, in the direction away from the display area AA, the second edge side wall extends relative to the first edge side wall, and the slope between the second edge side wall and the bottom surface of the organic insulating layer 122 toward the substrate 110 is gentler, which can not only reduce etching residues, but also help to improve the stress distribution of the organic insulating layer 122, reduce the phenomenon of stress concentration distribution, reduce the possibility of cracks, and improve the reliability of the display panel 10.

[0080] The inventors also found in actual research that the display panel 10 may further include an anode layer 140, a pixel defining layer 150, and a planarization layer 123 located between the conductive layer 121 and the anode layer 140, and the pixel defining layer 150 is used to define the pixel opening 151. However, when the slope between the side wall of the first film layer opening 130 in the planarization layer 123 and the bottom surface of the planarization layer 123 is relatively gentle (i.e., the space occupied by the first film layer opening 130 is too large), not only will the pixel density in the display panel 10 be reduced, but color deviation may also occur. For details, please refer to Figure 5 When the slope between the side wall of the first film layer opening 130 and the bottom surface of the planarization layer 123 is relatively gentle, part of the hole wall of the first film layer opening 130 may enter the pixel opening 151 (that is, the orthographic projection of the hole wall of the first film layer opening 130 on the substrate 110 partially overlaps with the orthographic projection of the pixel opening 151 on the substrate 110), which will cause the surface of the anode layer 140 exposed at the pixel opening 151 to be uneven. This unevenness may affect the reflection and refraction of light, thereby causing color difference problems.

[0081] To do this, refer to Figure 6 The organic insulating layer 122 in the embodiment of the present application may further include a planarization layer 123 , and the display panel 10 in the embodiment of the present application may further include an anode layer 140 and a pixel defining layer 150 .

[0082] The anode layer 140 is located on the side of the planarization layer 123 away from the substrate 110, and the anode layer 140 is connected to the wiring in the conductive layer 121 through the first film layer opening 130 in the planarization layer 123. The pixel definition layer 150 is located on the side of the anode layer 140 away from the substrate 110, and the pixel definition layer 150 includes a pixel opening 151, and the pixel opening 151 exposes part of the anode layer 140 to form a pixel anode.

[0083] Among them, since the first angle between the hole wall of the first film layer opening 130 and the bottom surface of the planarization layer 123 facing the substrate 110 in the present application is an acute angle greater than 45°, that is, the upper aperture of the first film layer opening 130 is small, the orthographic projection of the pixel opening 151 on the substrate 110 does not overlap with the orthographic projection of the first film layer opening 130 in the planarization layer 123 on the substrate 110. Such a design can not only reduce the space occupied by the first film layer opening 130, improve the space utilization rate of the planarization layer 123, and improve the pixel density in the display panel 10, but also make the surface flatness of the pixel opening 151 not affected by the first film layer opening 130, thereby improving the color shift problem caused by the uneven surface of the pixel opening 151.

[0084] Further, the planarization layer 123 may also include a first planarization layer and a second planarization layer, and the first planarization layer and the second planarization layer are stacked in a direction perpendicular to the substrate 110. In the direction perpendicular to the substrate 110, the thickness of the first planarization layer and the thickness of the second planarization layer may be the same or different, and preferably, the thickness of the first planarization layer and the thickness of the second planarization layer are the same.

[0085] The thickness of the first planarization layer and the thickness of the second planarization layer are between 0.7um and 1.3um. Preferably, in the direction perpendicular to the substrate 110, the total thickness of the first planarization layer and the second planarization layer may be 1.6um to 2.2um. Exemplarily, the thickness of the first planarization layer and the thickness of the second planarization layer are both 0.8um, or the thickness of the first planarization layer and the thickness of the second planarization layer are both 1.1um.

[0086] Based on the same inventive concept, this embodiment also provides a method for preparing the above display panel. Figure 7 and Figure 8 , Figure 7 is a schematic diagram of a method for preparing a display panel, Figure 8 for Figure 7 The corresponding process diagram. Figure 7 and Figure 8 , each step of the method for preparing the display panel is described in detail.

[0087] Step S110: providing a substrate.

[0088] In this step, the substrate 110 may be made of transparent materials such as glass and resin.

[0089] Step S120: manufacturing a plurality of conductive layers and an organic insulating layer between adjacent conductive layers on a substrate to obtain an array film layer.

[0090] In the display area AA of the display panel 10, a first film layer opening 130 is made in the organic insulating layer to connect the wirings in different conductive layers 121, and a conductive material, such as copper metal, aluminum metal, etc., can be arranged in the first film layer opening 130. The first angle between the hole wall of the first film layer opening 130 and the bottom surface of the organic insulating layer facing the substrate 110 is an acute angle greater than 45°, that is, the slope between the hole wall of the first film layer opening 130 and the bottom surface of the organic insulating layer is steeper than the slope in the prior art.

[0091] In this embodiment, by designing the first film layer opening 130 with a steeper slope, the space occupied by the first film layer opening 130 can be effectively reduced, which is beneficial to improving the pixel density of the display panel.

[0092] For further information, please refer to Fig. 9 and Fig.10 , step S120 can be implemented by the following method.

[0093] Step S121: forming a conductive layer on the substrate.

[0094] Step S122: forming an organic insulating layer on a side of the conductive layer away from the substrate.

[0095] In this step, an organic insulating layer may be sequentially formed on a side of the conductive layer 121 away from the substrate 110 by spin coating an organic material.

[0096] Exemplarily, the array film layer may include a semiconductor layer, and the semiconductor layer may also include a source S, a drain D, and a P-Si channel connecting the source S and the drain D constituting a transistor. The plurality of conductive layers 121 may include a first conductive layer M1, a second conductive layer M2, and a third conductive layer M3, and the organic insulating layer 122 may include a gate insulating layer G1, a capacitor insulating layer C1, and an interlayer insulating layer IDL located overlying the semiconductor layer, wherein the first conductive layer M1 is located between the gate insulating layer G1 and the capacitor insulating layer C1, the second conductive layer M2 is located between the capacitor insulating layer C1 and the interlayer insulating layer IDL, and the third conductive layer M3 is located on a side of the interlayer insulating layer IDL away from the substrate 110, and the first conductive layer M1, the third conductive layer M3, and the semiconductor layer may form a transistor. Specifically, the first conductive layer M1 can form the gates of multiple transistors and the first capacitor plate, the second conductive layer M2 can form the second capacitor plate, the third conductive layer M3 can form the source and drain of multiple transistors, and the capacitor insulating layer C1 can not only insulate and isolate the first capacitor plate and the second capacitor plate, so that the first capacitor plate and the second capacitor plate form a capacitor. The capacitor insulating layer C1 and the interlayer insulating layer IDL insulate and isolate the gates, sources and drains of multiple transistors from each other.

[0097] Step S121 and step S122 are repeatedly performed until the array film layer 120 is obtained.

[0098] For further information, please refer to Fig.11 and Fig.12 In step S122, the first organic insulating layer 1221 can be sequentially manufactured on the side of the conductive layer 121 away from the substrate 110 by spin coating an organic material, and then the first opening portion can be obtained.

[0099] Step S1221: coating a photoresist layer on the first organic insulating layer, and developing and exposing the layer through a first mask to form a first photoresist layer opening exposing the first organic insulating layer.

[0100] In this step, the first mask is used to define the shape and position of the first opening portion. Specifically, a photoresist layer 160 can be coated on the first organic insulating layer 1221, and then the photoresist layer is developed and exposed through the first mask to form a first photoresist layer opening 161 exposing the first organic insulating layer, and finally the undeveloped portion of the photoresist layer 160 is removed.

[0101] Step S1222: etching the first organic insulating layer exposed by the opening of the photoresist layer to obtain a first opening portion.

[0102] In the above steps, the angle between the hole wall of the first opening portion and the bottom surface of the first organic insulating layer 1221 is an acute angle greater than 45°.

[0103] After the first opening portion is manufactured, the second organic insulating layer 1222 may be manufactured on a side of the first organic insulating layer 1221 away from the substrate 110 , and then the second opening portion may be manufactured by the following method.

[0104] Step S1223: coating a photoresist layer on the second planarization layer, and developing and exposing the layer through a second mask to form a second photoresist layer opening exposing the second planarization layer.

[0105] In this step, the second mask is used to define the shape and position of the second opening portion. Specifically, a photoresist layer 160 can be coated on the second organic insulating layer 1222, and then the photoresist layer 160 is developed and exposed through the second mask to form a second photoresist layer opening exposing the second planarization layer, and finally the undeveloped portion of the photoresist layer 160 is removed.

[0106] Step S1224: etching the second planarization portion located at the opening of the photoresist layer to obtain a second opening portion.

[0107] In the above steps, the second mask may be the same as the first mask or different from the first mask. When the second mask is the same as the first mask, the orthographic projection of the second photoresist layer opening 162 on the substrate 110 coincides with the orthographic projection of the first opening portion on the substrate, and the orthographic projection of the second opening portion on the substrate 110 coincides with the orthographic projection of the first opening portion on the substrate 110. When the second mask is different from the first mask, the orthographic projection of the second photoresist layer opening 162 on the substrate 110 is located within the orthographic projection of the first opening portion on the substrate 110, and the orthographic projection of the second opening portion on the substrate 110 is located within the orthographic projection of the first opening portion on the substrate 110.

[0108] In this embodiment, the first organic insulating layer 1221 and the second organic insulating layer 1222 are respectively etched to obtain the first opening portion and the second opening portion, which can effectively shorten the etching time and avoid over-etching caused by the etching solution being in contact with the upper portion of the opening for too long, thereby effectively controlling the upper pore size of the first film layer opening 130, reducing the space occupied by the first film layer opening, and thereby improving the pixel density of the display panel 10.

[0109] It should be noted that a multilayer structure can be introduced according to the actual thickness of the organic insulating layer and the aperture design of the first film layer opening 130. By performing layered openings on the multilayer structure, the etching time required for each opening portion can be effectively shortened, and the size of each opening portion can be more accurately controlled.

[0110] In addition, the frame area BA of the first mask and the second mask may adopt a special edge design so that the first organic insulating layer 1 and the second organic insulating layer 2 form a first edge sidewall and a second edge sidewall in the frame area BA, respectively. In the direction away from the display area AA, the second edge sidewall extends relative to the first edge sidewall, wherein in the direction away from the display area AA, the second edge sidewall extends 3um to 10um relative to the first edge sidewall, illustratively, the second edge sidewall extends 3um, 4um, 5um, 6um, 7um, 8um, 9um and 10um relative to the first edge sidewall, and preferably, in the direction away from the display area AA, the second edge sidewall extends 5um relative to the first edge sidewall.

[0111] Among them, the second angle between the second edge side wall and the bottom surface of the organic insulating layer facing the substrate 110 is smaller than the first angle, that is, the second angle between the second edge side wall and the bottom surface of the organic insulating layer facing the substrate 110 is an acute angle less than 45°, for example, the second angle θ2 can be 40°, 35°, 32° or 28°, etc.

[0112] In this embodiment, the second edge side wall is designed to extend relative to the first edge side wall to reduce the slope between the second edge side wall and the bottom surface of the organic insulating layer toward the substrate 110. This can not only reduce etching residues, but also help improve the stress distribution of the organic insulating layer, reduce the phenomenon of stress concentration distribution, reduce the possibility of cracks, and improve the reliability of the display panel 10.

[0113] Furthermore, after step S1224, the first opening portion and the second opening portion may be plasma cleaned to optimize the bottom boundaries of the first opening portion and the second opening portion.

[0114] In summary, the embodiments of the present application provide a display panel and a method for preparing the display panel, wherein the display panel includes a substrate and an array film layer located on the substrate. The array film layer includes a plurality of conductive layers and an organic insulating layer located between adjacent conductive layers. In the display area of ​​the display panel, a first film layer opening for connecting wiring in different conductive layers is provided in the organic insulating layer, wherein the first angle between the hole wall of the first film layer opening and the bottom surface of the organic insulating layer facing the substrate is an acute angle greater than 45°, that is, the slope between the hole wall of the first film layer opening and the bottom surface of the organic insulating layer is steeper. With such a design, the space occupied by the first film layer opening can be effectively reduced, which is beneficial to improving the pixel density of the display panel.

[0115] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A display panel, characterized in that: The display panel comprises: substrate; An array film layer, wherein the array film layer is located on the substrate; The array film layer includes a plurality of conductive layers and an organic insulating layer at least located between adjacent conductive layers; In the display area of ​​the display panel, a first film layer opening for connecting wiring in different conductive layers is provided in the organic insulating layer, wherein a first angle between the hole wall of the first film layer opening and the bottom surface of the organic insulating layer facing the substrate is an acute angle greater than 45°.

2. The display panel according to claim 1, wherein: Each of the organic insulating layers at least includes a first organic insulating layer and a second organic insulating layer, and the first organic insulating layer is arranged on a side of the second organic insulating layer away from the substrate; The first film layer opening includes a first opening portion located in the first organic insulating layer and a second opening portion located in the second organic insulating layer; The orthographic projection of the second opening portion on the substrate is located within the orthographic projection of the first opening portion on the substrate, or the orthographic projection of the second opening portion on the substrate coincides with the orthographic projection of the first opening portion on the substrate.

3. The display panel according to claim 2, wherein: The display panel further includes a frame area arranged around the display area; The first organic insulating layer includes a first edge sidewall located in the frame area, and the second organic insulating layer includes a second edge sidewall located in the frame area; In a direction away from the display area, the second edge sidewall extends relative to the first edge sidewall; Preferably, in a direction away from the display area, the second edge sidewall protrudes 3um to 10um relative to the first edge sidewall; Preferably, a second angle between the second edge side wall and the bottom surface of the organic insulating layer facing the substrate is smaller than the first angle.

4. The display panel according to any one of claims 1 to 3, characterized in that: The organic insulating layer includes a planarization layer; The display panel also includes an anode layer and a pixel definition layer; The anode layer is located on a side of the planarization layer away from the substrate, and the anode layer is connected to the wiring in the conductive layer through the first film layer opening in the planarization layer; The pixel defining layer is located on a side of the anode layer away from the substrate, and the pixel defining layer includes a pixel opening, and the pixel opening exposes a portion of the anode layer to form a pixel anode; The orthographic projection of the pixel opening on the substrate does not overlap with the orthographic projection of the first film layer opening in the planarization layer on the substrate.

5. The display panel according to claim 4, wherein: The planarization layer at least includes a first planarization layer and a second planarization layer, wherein the first planarization layer is disposed on a side of the second planarization layer away from the substrate; In a direction perpendicular to the substrate, the thickness of the first planarization layer is the same as the thickness of the second planarization layer; Preferably, the thickness of the first planarization layer and the thickness of the second planarization layer are 0.7um to 1.3um; Preferably, the thickness of the first planarization layer and the thickness of the second planarization layer are 1.1 um; Preferably, the thickness of the first planarization layer and the thickness of the second planarization layer are 0.8 um.

6. A method for preparing a display panel, characterized in that: The method comprises: providing a substrate; A plurality of conductive layers and an organic insulating layer located between adjacent conductive layers are manufactured on the substrate to obtain an array film layer; in the display area of ​​the display panel, a first film layer opening for connecting wiring in different conductive layers is manufactured in the organic insulating layer, wherein a first angle between the hole wall of the first film layer opening and the bottom surface of the organic insulating layer toward the substrate is an acute angle greater than 45°.

7. The method for preparing a display panel according to claim 6, wherein: The step of manufacturing a plurality of conductive layers and an organic insulating layer between adjacent conductive layers on the substrate to obtain an array film layer comprises: forming a conductive layer on the substrate; Forming an organic insulating layer on a side of the conductive layer away from the substrate; Repeat the above steps until the array film layer is obtained; Preferably, the step of forming an organic insulating layer on a side of the conductive layer away from the substrate comprises: A first organic insulating layer is formed on a side of the conductive layer away from the substrate, and the first organic insulating layer is patterned to obtain a first opening portion; A second organic insulating layer is formed on a side of the first organic insulating layer away from the substrate, and the second organic insulating layer is patterned to obtain a second opening portion, wherein the orthographic projection of the second opening portion on the substrate is located within the orthographic projection of the first opening portion on the substrate, or the orthographic projection of the second opening portion on the substrate coincides with the orthographic projection of the first opening portion on the substrate.

8. The method for preparing a display panel according to claim 7, wherein: The step of forming a first organic insulating layer on a side of the conductive layer away from the substrate and patterning the first organic insulating layer to obtain a first opening portion includes: Coating a photoresist layer on the first organic insulating layer, and performing development and exposure through a first mask to form a first photoresist layer opening exposing the first organic insulating layer; Etching the first organic insulating layer exposed by the opening of the first photoresist layer to obtain a first opening portion; Preferably, the step of forming a second organic insulating layer on a side of the first organic insulating layer away from the substrate and patterning the second organic insulating layer to obtain a second opening portion comprises: Coating a photoresist layer on the second organic insulating layer, and performing development and exposure through a second mask to form a second photoresist layer opening exposing the second organic insulating layer, wherein the orthographic projection of the second photoresist layer opening on the substrate coincides with the orthographic projection of the first opening portion on the substrate, or the orthographic projection of the second photoresist layer opening on the substrate is located within the orthographic projection of the first opening portion on the substrate; The second planarization portion located at the opening of the photoresist layer is etched to obtain a second opening portion.

9. The method for preparing a display panel according to claim 7, wherein: After the step of forming a second organic insulating layer on a side of the first organic insulating layer away from the substrate and patterning the second organic insulating layer to obtain a second opening portion, the method further includes: Plasma treatment is performed on the first opening portion and the second opening portion to optimize the bottom boundaries of the first opening portion and the second opening portion.

10. A display device, characterized in that: The display device comprises a display panel as described in any one of claims 1 to 5 or a display panel prepared by the preparation method as described in any one of claims 6 to 9.

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