Coupler device for phased array system

Abstract

The invention relates to a coupler device. The invention provides a coupler device used in a phased array system. The coupler device includes a weighting network and a phase matrix network. The weighting network is configured to convert and amplify an input signal to obtain eight intermediate amplified signals. The phase matrix network is coupled to the weighting network and is configured to generate eight output signals based on the eight intermediate amplified signals. An output array of the eight output signals is obtained via performing a matrix multiplication of the array of the eight intermediate amplified signals with a phase matrix of the phase matrix network.

Description

Technical Field

[0001] The present invention relates to wireless communication systems, and more particularly, to a coupler device for a phased array system. Background Art

[0002] Phased array technology has become widely deployed in systems and subsystems for various applications (including 5G and beyond) due to its ability to generate beams, which improve power link budget and tracking accuracy. The precise control of the amplitude and phase of the RF signal at each antenna provided is necessary to synthesize the desired beam pattern. The resulting ability to accurately adjust the phase shift and amplitude weighting is essential in phased array systems. The tuning range of the phase shift and amplitude weighting determines the properties of the beam pattern, such as beam angle range, width, and beam type (e.g., sum or difference beam pattern). The accuracy of the phase and amplitude adjustment determines the deviation and resolution of the beam angle. Summary of the invention

[0003] In an aspect of the present invention, a coupler device for a phase array system is provided. The coupler device includes a weighting network and a phase matrix network. The weighting network is configured to convert and amplify an input signal to obtain eight intermediate amplified signals. The phase matrix network is coupled to the weighting network and is configured to generate eight output signals based on the eight intermediate amplified signals. An output array of the eight output signals is obtained by performing a matrix multiplication of the array of the eight intermediate amplified signals and a phase matrix of the phase matrix network.

[0004] In another aspect of the present invention, a coupler device for use in a phase array system is provided. The coupler device includes a weighting network and a phase matrix network. The weighting network includes a plurality of adjustable amplifiers configured in two stages. The plurality of adjustable amplifiers are configured to convert an input signal into a first amplified signal, a second amplified signal, a third amplified signal, and a fourth amplified signal. The phase matrix network is coupled to the weighting network. The phase matrix network is configured to generate a first output signal, a second output signal, a third output signal, and a fourth output signal based on the first amplified signal, the second amplified signal, the third amplified signal, and the fourth amplified signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0005] When read in conjunction with the accompanying drawings, the aspects of the present invention are best understood from the following [embodiments]. It should be noted that, in accordance with standard practice in the industry, various components are not drawn to scale. In fact, for clarity of discussion, the sizes of various components may be arbitrarily increased or reduced.

[0006] Figure 1 is a block diagram of a phased array system 1 according to an embodiment of the present invention.

[0007] Figure 2A FIG. 4 is a block diagram of a phased array system 2 according to an embodiment of the present invention.

[0008] Figure 2B for Figure 2A A block diagram of a coupler device of an embodiment.

[0009] Figure 2C To plot on the complex plane Figure 2B Schematic diagram of output signals B and C.

[0010] Figure 2D for Figure 2B Schematic diagram of an adjustable amplifier.

[0011] Figure 2E for Figure 2D Schematic diagram of the small signal model of a BJT.

[0012] Figure 2F for Figure 2D Schematic diagram of the small signal model of the adjustable amplifier.

[0013] Figure 2G for Figure 2D Another schematic diagram of the small signal model of the adjustable amplifier.

[0014] Figure 2H Drawing basis Figure 2A Phase control of a phased array system 2 of an embodiment.

[0015] Figure 3 FIG. 4 is a block diagram of a coupler device 300 according to another embodiment of the present invention.

[0016] Figure 4 FIG. 4 is a block diagram of a coupler device according to another embodiment of the present invention.

[0017] Figure 5A FIG. 4 is a schematic diagram of a power divider according to an embodiment of the present invention.

[0018] Figure 5B FIG. 4 is a schematic diagram illustrating a power divider according to another embodiment of the present invention.

[0019] Figure 6 FIG. 4 is a schematic diagram illustrating a Marchand balun according to an embodiment of the present invention.

[0020] Fig. 7A FIG. 4 is a block diagram of a phased array system according to an embodiment of the present invention.

[0021] Figure 7B Based on Fig. 7AA block diagram of a coupler device of an embodiment.

[0022] Figure 8 FIG. 4 is a block diagram of a phased array system according to another embodiment of the present invention.

[0023] Fig. 9 is a block diagram of a coupler device according to yet another embodiment of the present invention.

[0024] Fig.10 FIG. 4 is a block diagram of a phased array system according to yet another embodiment of the present invention. DETAILED DESCRIPTION

[0025] The following disclosure provides many different embodiments or examples for implementing the different components of the provided target. Specific examples of operation, assembly and configuration are described below to simplify the present invention. Of course, these are only examples and are not intended to be restrictive. For example, in the description, the first operation is performed before or after the second operation and may include an embodiment in which the first and second operations are performed together, and may also include an embodiment in which additional operations can be performed between the first and second operations. For example, in the following description, forming a first component above, on or therein the second component may include an embodiment in which the first and second components are formed as direct contacts, and may also include an embodiment in which additional components can be formed between the first and second components so that the first component and the second component may not be in direct contact. In addition, the present invention may repeat reference numbers and / or letters in various examples. This repetition is for the purpose of simplicity and clarity and does not itself specify the relationship between the various embodiments and / or configurations discussed.

[0026] For ease of description, time-relative terms such as "before", "before", "after", "after", and the like may be used herein to describe the relationship of one operation or component to another (some) operation or component, as illustrated in the figures. Time-relative terms are intended to cover different sequences of operations depicted in the figures. In addition, for ease of description, spatially relative terms such as "below", "below", "below", "above", "on", and the like may be used herein to describe the relationship of one component or component to another (some) component or component, as illustrated in the figures. Spatially relative terms are intended to cover different orientations of the device in use or operation other than the orientation depicted in the figures. The device may be oriented in other ways (rotated 90 degrees or in other orientations), and the spatially relative descriptors used herein may be interpreted accordingly. For ease of description, connection-relative terms such as "connect," "connected," "connection," "coupled," "coupled," "in communication," and the like may be used herein to describe an operational connection, coupling, or link between two components or members. Connection-relative terms are intended to encompass different connections, couplings, or links of devices or components. Devices or components may be connected, coupled, or linked to each other directly or indirectly, such as through another set of components. Devices or components may be connected, coupled, or linked to each other wired and / or wirelessly.

[0027] As used herein, the singular terms "a", "an", and "the" may include plural references unless the context clearly indicates otherwise. For example, reference to a device may include a plurality of devices unless the context clearly indicates otherwise. The terms "include" and "comprise" may indicate the presence of described features, integers, steps, operations, elements, and / or components, but may not exclude the presence of one or more combinations of features, integers, steps, operations, components, and / or components. The term "and / or" may include any or all combinations of one or more of the listed items.

[0028] In addition, sometimes amounts, ratios and other numerical values ​​are presented in a range format herein. It should be understood that this range format is used for convenience and brevity, and should be flexibly understood to include numerical values ​​that are explicitly specified as limits of a range, but also include all individual numerical values ​​or sub-ranges contained within the range, as if each numerical value and sub-range were explicitly specified.

[0029] The nature and use of the embodiments are discussed in detail below. However, it should be understood that the present invention provides many applicable inventive concepts that can be embodied in a variety of specific contexts. The specific embodiments discussed are merely illustrative of specific ways to embody and use the present invention, and do not limit its scope.

[0030] Figure 11 is a block diagram of a phase array system 1 according to an embodiment of the present invention. The phase array system 1 may include a power distribution network 10, a plurality of phase shifters 21 (i.e., ), a plurality of variable gain amplifiers 22, and a plurality of amplifiers 23. For the purpose of description, there are 8 output paths of the power distribution network 10, each of which corresponds to a respective phase shifter 21, a respective variable gain amplifier 22, and a respective amplifier 23. The phase array system 1 can receive an input signal A distributed to each of the phase shifters 11 through the power distribution network 10. For example, the power distribution network 10 can include a plurality of power dividers 12, each of which can be configured to equally distribute the input power at two output ports. Therefore, the input signal A can be equally distributed to 8 output signals A1 to A8 via the power dividers 12 in the power distribution network 10, and the output signals A1 to A8 are fed to respective phase shifters 21.

[0031] In some embodiments, the phase shifters 21 may be digitally controlled phase shifters, each of which may be configured to operate according to respective control parameters ( Figure 1 The phase of the input signal (e.g., A1 to A8) is converted by the phase shifter 21 to generate output signals with respective preset phases. The phase shifter 21 can electronically change the phase between 0° and 360° in a progressive and repetitive manner to generate a specific scanning pattern. The output signal of each phase shifter 21 can be amplitude-weighted via a respective variable gain amplifier (VGA) 22, and the amplitude-weighted signal can be amplified via a respective amplifier 23 to generate a desired output signal (e.g., B1 to B8). The output signals B1 to B8 can be transmitted via respective antennas ( Figure 1 (not shown) radiation to synthesize different beam situations.

[0032] However, due to the architecture of the phased array system 1, there may be three stages of power dividers 12 in the power distribution network 10, where each stage may result in a 3dB power loss when dividing the input signal into two output signals. If more antennas are used by the phased array system 1, there will be more stages of power dividers 12 in the power distribution network 10, resulting in greater power loss of the output signals of the power distribution network. For example, if 8 antenna elements are used, there may be a 3dB*3=9dB power loss for each output signal A1 to A8 of the power distribution network. If the target output power is 20dB, the amplifier 23 at the output stage may require a high gain of more than 29dB to compensate for the signal loss of the power distribution network 10.

[0033] Figure 2A is a block diagram of a phased array system 2 according to an embodiment of the present invention. Figure 2B Based on Figure 2A 202 is a block diagram of an embodiment of a coupler device 202. Figure 2C Based on Figure 2BThe embodiment of FIG. 1 shows a schematic diagram of output signals B and C on a complex plane. Please refer to FIG. 2A to FIG. 2C .

[0034] In some embodiments, the phased array system 2 may include a weighting network 200. The weighting network 200 may include a plurality of coupler devices 202. For the purpose of description, eight output signals B1 to B8 are generated by the weighting network 200 of the phased array system 2, and the coupler devices 202 may be configured as a three-stage cascaded architecture, but the present invention is not limited thereto. The output signals B1 to B8 may be transmitted via respective antennas ( Figure 2A (not shown) radiation to synthesize different beam situations.

[0035] For example, the coupler device 202 can be configured to amplify the input signal A, reconfigure the power ratio, and adjust the amplitude and / or phase of the output signal at each path to the respective amplifier 204 to generate the desired output signal to synthesize different beam conditions. The output signal at each path of the weighting network 200 (e.g., A1 to A8) can be sent to the respective amplifier 204 at the output stage, and the amplified output signal at each path can be transmitted via the respective antenna ( Figure 2A In some other embodiments, the output signal at each path of the weighting network 200 (e.g., A1 to A8) may be sent to a respective phase inverter 203. The inverted output signal at each path may be sent to a respective amplifier 204 at the output stage, and the amplified output signal at each path may be transmitted via a respective antenna ( Figure 2A (not shown) radiation.

[0036] refer to Figure 2B , the coupler device 202 may include a tunable amplifier 2021 and a coupler 2022. The tunable amplifier 2021 may be configured to control the gains of the intermediate signals a1 and a2 based on the input signal A, respectively. The coupler 2022 may be configured to generate output signals B and C based on the intermediate signals a1 and a2. In detail, Figure 2A Each of the coupler devices 202 shown in FIG. 1 can be configured to control the phase difference of its two output signals B and C to a fixed phase angle It can be expressed by the following formula (1).

[0037]

[0038] In addition, the relationship between the phases of the input signal A and the output signals B and C can be expressed by the following formula (2).

[0039]

[0040] In some embodiments, the coupler 2022 is substantially a 90° hybrid coupler having two input ports P1 to P2 and two output ports P3 to P4. Two paths (i.e., two transmission lines) couple each input port to two output ports P3 to P4. For example, a first transmission line may be coupled between the input port P1 and the output port P3, a second transmission line may be coupled between the input port P1 and the output port P4, a third transmission line may be coupled between the input port P2 and the output port P3, and a fourth transmission line may be coupled between the input port P2 and the output port P4.

[0041] The output signals B and C may be linear combinations of the intermediate signals a1 and a2. For example, the first portion of the output signal B may come from the intermediate signal a1, which is directly transmitted from the input port P1 to the output port P3 via the first transmission line, and the second portion of the output signal B may come from the intermediate signal a2, which is transmitted from the input port P2 to the output port P3 via the second transmission line with a substantially 90° phase shift. Therefore, the output signal B (i.e., vector B) may be expressed by the following formula (3).

[0042] B=a1∠0°+j·a2∠90°=a1+a2j (3)

[0043] Similarly, the first part of the output signal C may come from the intermediate signal a2, which is directly transmitted from the input port P2 to the output port P4, and the second part of the output signal C may come from the intermediate signal a1, which is transmitted from the input port P1 to the output port P4 with a substantially 90° phase shift. Therefore, the output signal C (i.e., vector C) may be expressed by the following formula (4).

[0044] C=a2∠0°+j·a1∠90°=a2+a1j (4)

[0045] Therefore, in Figure 2C The output signals B and C are plotted on the complex plane shown in FIG. It should be noted that there is an interior angle separating the output signals B and C. The adjustable amplifier 2021 can adjust a first gain and a second gain of the input signal A so as to control the amplitudes of the signals a1 and a2 respectively, thereby also controlling the internal angle shown in formula (1).

[0046] Figure 2D Based on Figure 2B Schematic diagram of an adjustable amplifier 2021 of an embodiment. Figure 2E Based on Figure 2D Schematic diagram of an example of a small signal model of a BJT. Figure 2F Based on Figure 2D Schematic diagram of a small signal model of the adjustable amplifier 2021 of an embodiment. Figure 2GBased on Figure 2D Another schematic diagram of a small signal model of the adjustable amplifier 2021 of an embodiment. Please refer to Figure 2B and Figure 2D to Figure 2G .

[0047] exist Figure 2D A schematic diagram of an adjustable amplifier 2021 is shown in FIG. In some embodiments, a bipolar junction transistor BJT A and BJT B Can have control voltage Vbb A and Vbb B In addition, the bipolar junction transistor BJT A and BJT B A large capacitor Cb and resistor Rbb can be used for biasing. The values ​​of capacitor Cb and resistor Rbb can be large enough so that Figure 2D The components shown in Figure 1 can be used as a bias network and can be omitted from the RF small signal analysis. A and BJT B的 The base can be connected to the node N1, and the bipolar junction transistor BJT A and BJT B的 Base current Ib A and Ib B The control voltage Vbb A and Vbb B Independently controlled.

[0048] An input matching network 210 may be used to shunt the bipolar junction transistor (BJT) A and BJT B The output matching networks 220A and 220B may be substantially the same and may be applied to bipolar junction transistors (BJTs). A and BJT B The output port of the bipolar junction transistor BJT A and BJT B The output impedance of the output matching network 220A and 220B can be matched to the system impedance Z0. In addition, the output matching network 220A and 220B can be configured to provide a bipolar junction transistor BJT A and BJT B Bias current Ic A Ic B .

[0049] exist Figure 2E A bipolar junction transistor (eg, Figure 2D BJT in A or BJT B ), where CI and CO represent the equivalent capacitance at the base and collector nodes, respectively.BJT,M ) can be evaluated using the following formula (5).

[0050]

[0051] where r π represents the input resistance of the BJT, r o represents the output resistance of the BJT, and β represents the current gain of the BJT. In addition, by applying the parameter r π , Ic and Ib (for example, and Ic=βIb), formula (5) can be rewritten as the following formula (6).

[0052]

[0053] refer to Figure 2F In the small signal model of the adjustable amplifier 2021 shown in FIG. 1 , the input resonant capacitor can be incorporated into the input matching network 210 and the output matching network 220A to 220B as the source network and the load network. This is because the bipolar junction transistor BJT A and BJT B Therefore, the small signal model of the adjustable amplifier 2021 can be simplified to two current-controlled current sources connected to a source network 230 and two load networks 240A to 240B, and Figure 2G A simplified small signal model of the adjustable amplifier 2021 shown in FIG.

[0054] In some embodiments, Figure 2A The link budget of the phased array system 2 shown in FIG. 2 may be associated with the total power of the signal. The input signal A may be distributed and weighted via the coupler device 202 in the weighting network 200 to obtain signals A1 to A8. The signals A1 to A8 may be amplified via respective amplifiers 204 at the output stage. Since the coupler 2022 of the coupler device 202 may be a lossless and passive component, the link budget of the phased array system 2 may be associated with the stage of the coupler device.

[0055] refer to Figure 2G , Bipolar Junction Transistor BJT A The input resistance r πA The collector current I CA Functions (for example, and I CA =βI bA ) expression, and the bipolar junction transistor BJT B The input resistance can be determined by the collector current I CB Functions (for example, and I CB =βI bB) expression. With this design of the adjustable amplifier 2021, the gains of the output signals at the output ports Port2 and Port3 of the adjustable amplifier 2021 can be independently controlled. Therefore, the adjustable amplifier 2021 can be equivalent to an ideal power divider with an amplifier, so as to achieve the functions of power saving and signal amplification.

[0056] Figure 2H Drawing basis Figure 2A Phase control of the phase array system 2 of the embodiment. Figure 2C In the embodiment described in the embodiment, the phase difference between the output signals B and C can be controlled by adjusting the gain of the output signals B and C of the coupler device 202 using the adjustable amplifier 2021, and the coupler device 202 can also have a phase shift function. Therefore, the coupler device 202 can be appropriately configured so that the phase difference of the output signal of each coupler device 202 can be horizontal and vertical. For example, with respect to the coupler device 202 receiving the input signal A, the first-stage phase difference For the coupler device 202 in the second stage, the second stage phase difference For the coupler device 202 in the third stage, the third stage phase difference Can be horizontal (i.e., X-axis), such as Figure 2H Displayed in.

[0057] Figure 3 FIG. 4 is a block diagram of a coupler device 300 according to another embodiment of the present invention.

[0058] In some embodiments, Figure 2A The coupler device 202 shown in FIG. Figure 3 . The coupler device 300 shown in FIG. 300 may include a power divider 302, variable gain amplifiers 304 and 306, and a coupler 308.

[0059] The power divider 302 may be a 1-to-2 passive power divider configured to divide the input signal A into two signals A1 and A2. The signals A1 and A2 may be amplified by variable gain amplifiers 304 and 306 to obtain intermediate signals a1 and a2, respectively. The gains of the variable gain amplifiers 304 and 306 may be independently controlled. The coupler 308 may be similar to Figure 2B The details of the coupler 2022 shown in FIG. 2 are not repeated here.

[0060] For power saving, the power divider 302 may cause a 3 dB signal loss of the input signal A. As the number of stages of the power divider 302 increases, the signal loss in the phased array system increases accordingly. Figure 2A3 shows three stages of the coupler device 202. Using the coupler device 300 as the coupler device 202 results in a 9 dB signal loss. If a design with 64 antenna elements is used, the coupler device 300 will have 6 stages, which will result in a 3 dB*6=18 dB signal loss. In addition, the resulting signal loss can be compensated via the amplifier 204 at the output stage. If the output power requirement is 20 dB, the amplifier 204 at the output stage needs a very high gain of 38 dB, which may have the risk of signal oscillation.

[0061] Figure 4 FIG. 1 is a block diagram of a coupler device according to yet another embodiment of the present invention. Figure 2A and Figure 4 .

[0062] In another embodiment, Figure 2A The coupler device 202 shown in FIG. Figure 4 The coupler device 400 shown in FIG. 4 may be a 1-to-2 coupler device, which includes a power divider 402, a balun 404, a switch 406, a variable gain amplifier 408, a coupler 410, and an amplifier 412, such as Figure 4 Displayed in.

[0063] In some embodiments, the power divider 402 may be a three-port microwave device for power distribution or power combination. The power divider 402 may be a 1-to-2 passive power divider configured to divide the input signal A into two signals a1 and a2. In some embodiments, the power divider 402 may be configured to divide the input signal A into two signals a1 and a2. Figure 5A , which is a three-port network that can be implemented in any type of transmission media (such as microstrip line, stripline, coplanar waveguide, etc.). In some embodiments, microstrip line 502 may have a characteristic impedance value of approximately 50 ohms, and microstrip lines 504 and 506 may have a characteristic impedance value of approximately 100 ohms, but the present invention is not limited thereto.

[0064] In some embodiments, the power distributor 402 may be configured to Figure 5B The Wilkinson power divider 500b shown in FIG. 5 can be a robust power divider with matched output ports and dissipation of reflected power, and is compatible with Figure 5ACompared with the T-junction power divider 500a shown in FIG. 1 , it can provide better isolation between the output ports N2 and N3. The Wilkinson power divider 500b can also be used to provide arbitrary power distribution. In some embodiments, the microstrip line 512 can have a characteristic impedance value of approximately 50 ohms, and the microstrip lines 514 and 516 can have a characteristic impedance value substantially equal to 70.7 ohms. The microstrip lines 518 and 520 can have a characteristic impedance value substantially equal to 50 ohms, and the resistor R1 can have a resistance value substantially equal to 100 ohms, but the present invention is not limited thereto.

[0065] In some embodiments, each of the baluns 404 may be referred to as a balanced-to-unbalanced device that is configured to provide its input signal and the inverted input signal at its two output terminals. Figure 4 The balun 404 on the left side of can receive the signal a1 as an input signal, and it can provide the signal a1 and the inverted signal -a1 at its two output terminals. Similarly, Figure 4 The balun 404 on the right side of the balun can receive the signal a2 as its input signal, and it can provide the signal a2 and the inverted signal -a2 at its two output terminals. In some embodiments, the balun 404 can be used Figure 6 The Marchand balun 600 shown in FIG. 1 is a broadband 3-port network including two sets of coupled lines (602 and 606, 604 and 608). Each set of coupled lines may have a length substantially equal to λ / 4, where λ represents the length of the balun. Figure 2A The wavelength of the RF signal used by the phased array system 2 shown in FIG.

[0066] refer to Figure 6 , Port1 indicates an unbalanced port, and Port2 and Port3 indicate balanced ports. Figure 4 In the configuration of the coupler device 400 in FIG. 1 , the input signal A1 is fed to the unbalanced port Port1 of the balun 404 on the left side, and signals A1 and −A1 may be generated at the balanced ports Port2 and Port3. In addition, the input signal A2 is fed to the unbalanced port Port1 of the balun 404 on the right side, and signals A2 and −A2 may be generated at the balanced ports Port2 and Port3. In other words, the balanced port Port2 may provide an output signal having a zero phase difference with the input signal, and the balanced port Port3 may provide an output signal having a 180-degree phase difference with the input signal (i.e., an inverted input signal).

[0067] Now follow back to Figure 4In some embodiments, the switch 406 may be implemented using a series single-axis double-cut (SPDT) switch or a series shunt SPDT switch, but the present invention is not limited thereto. Figure 4 In the configuration of the coupler device 400 in FIG. 1 , the signal S1 may be the inverted signal A1 (i.e., −A1), and the signal S2 may be the inverted signal A2 (i.e., −A2). It should be noted that the signal selection of the switch 406 may be based on the design of the coupler device, and in some other embodiments, the signals S1 and S2 may be the signals A1 and A2.

[0068] In some embodiments, each of the variable gain amplifiers 408 may be a three-stage amplifier including a common gate (CG) amplifier, a common source (CS) amplifier, and a common drain (CD) amplifier connected in series. The common gate amplifier may be used as an input stage, the common source amplifier may be used as a gain stage, and the common drain amplifier may be used as an output stage. In some embodiments, a variable resistor (not shown) may be disposed between the common gate amplifier and the common source amplifier to adjust the gain of the common source amplifier. Figure 4 In the configuration of coupler device 400 shown in , variable gain amplifier 408 may be configured to amplify signals S1 and S2 to generate signals a1 and a2.

[0069] In some embodiments, the coupler 410 may be implemented using a branch-line coupler or a coupled-line coupler, but the present invention is not limited thereto. For example, the coupler 410 may receive signals a1 and a2 to generate signals b1 and c1. In some embodiments, the coupler 410 may be similar to Figure 2B The coupler 2022 shown in the figure, details of which can be found in Figure 2B Mentioned in the embodiments.

[0070] In some embodiments, each of the amplifiers 412 may also be a three-stage amplifier including a common gate (CG) amplifier, a common source (CS) amplifier, and a common drain (CD) amplifier connected in series. The common gate amplifier may be used as an input stage, the common source amplifier may be used as a gain stage, and the common drain amplifier may be used as an output stage. Compared to the variable gain amplifier 408, the gain of the amplifier 412 may be fixed in order to compensate for the signal loss caused by the passive components in the coupler device 400 (such as the power divider 402, the balun 404, and the switch 406). In Figure 4 In the configuration of coupler device 400 shown in FIG. 1 , amplifier 412 may be configured to amplify signals a1 and a2 to generate output signals B and C. In some embodiments, amplifier 412 may be omitted from coupler device 400, and other amplifiers (e.g., amplifier 204) may be disposed in Figure 2AAt the output stage of each path of the phased array system 2 shown in FIG.

[0071] Fig. 7A is a block diagram of a phased array system according to an embodiment of the present invention. Figure 7B Based on Fig. 7A Schematic diagram of a coupler device 702 of an embodiment.

[0072] In some embodiments, Fig. 7A The phase array system 7 shown in FIG. 7 may include a plurality of coupler devices 702. For the purpose of description, 16 output signals B1 to B16 are generated by the phase array system 7, and the coupler devices 702 may be configured as a 2-stage cascade architecture, but the present invention is not limited thereto. The output signals B1 to B16 may be transmitted via respective antennas ( Fig. 7A (not shown) radiation to synthesize different beam situations.

[0073] In some embodiments, each of the coupler devices 702 may be a 1-to-4 coupler device configured to amplify the input signal A, reconfigure the power ratio, and adjust the amplitude value and / or phase of the output signal at each path to the respective amplifier 704 to generate the desired output signal to synthesize different beam conditions. The output signal at each path (e.g., A1 to A16) may be sent to the respective amplifier 704 at the output stage, and the amplified output signal at each path (e.g., B1 to B16) may be transmitted via the respective antenna ( Fig. 7A (not shown) radiation.

[0074] Figure 7B The coupler device 702 shown in FIG. 7 may include a weighting network 70 and a phase matrix network 72. The weighting network 70 may include a plurality of tunable amplifiers (TA) 7021, and the phase matrix network 72 may include a plurality of couplers 7022 to 7025. The tunable amplifier 7021 may be similar to Figure 2B The adjustable amplifier 2021 shown in FIG. 1 can also have the functions of power saving and signal amplification. The couplers 7022 to 7025 can be similar to Figure 2B The coupler 2022 shown in the figure may be a substantially 90° lossless coupler.

[0075] The couplers 7022 to 7025 may be configured into first and second stages. The first stage may include couplers 7022 and 7023, and the second stage may include couplers 7024 and 7025. The coupler 7022 may receive intermediate signals a1 and a2 at its input ports P21 and P22, and generate intermediate signals b1 and b2 at its output ports P23 and P24. The coupler 4023 may receive intermediate signals a3 and a4 at its input ports P31 and P32, and generate intermediate signals b3 and b4 at its output ports P33 and P34.

[0076] The coupler 7024 may receive intermediate signals b1 and b3 at its input ports P41 and P42, and generate output signals B and C at its output ports P43 and P44. The coupler 7025 may receive intermediate signals b2 and b4 at its input ports P51 and P52, and generate output signals D and E at its output ports P53 and P54.

[0077] Figure 8 FIG. 4 is a block diagram of a phased array system according to another embodiment of the present invention.

[0078] In some embodiments, Figure 8 The phased array system 8 shown in FIG. 8 may be similar to Figure 1 . The phase array system 1 shown in FIG. The phase array system 8 may include a power distribution network 80, a plurality of phase shifters 82, and a plurality of variable gain amplifiers 83. The power distribution network 80 may include a plurality of power dividers 81 configured in a three-stage cascade architecture. The power divider 81 may be configured to divide an input signal into two equal output signals. The output signals (e.g., A1 to A8) at each output path of the power distribution network 80 may be fed to respective phase shifters 82. Each of the phase shifters 82 may be controlled via respective control parameters CP to adjust the phase shift amount of the input signal. Each of the variable gain amplifiers 83 may be configured to amplify the phase shifted signals from the respective phase shifters 82 to generate output signals (e.g., B1 to B8).

[0079] However, each stage of the power divider 81 in the power distribution network 80 may result in a 3 dB power loss when dividing the input signal into two output signals. If eight antenna elements are used, three stages of the power divider 81 may result in an input signal S IN 3dB*3=9dB power loss.

[0080] Fig. 9 is a block diagram of a coupler device 9 according to an embodiment of the present invention.

[0081] In some embodiments, the coupler device 9 may include a weighting network 90 and a phase matrix network 92. The weighting network 90 may include a plurality of adjustable amplifiers 901 and a plurality of inverters 902. Each of the adjustable amplifiers 901 may be a 1-to-2 adjustable amplifier, similar to Figure 2B The adjustable amplifier 2021 shown in the figure can have the functions of power saving and signal amplification.

[0082] The output signal of each adjustable amplifier 901 at the third stage may be fed to the inverter 902 to invert the phase to generate an intermediate signal (eg, A1 to A8 ).

[0083] The phase matrix network 92 may be configured to convert the intermediate signals A1 to A8 into output signals B1 to B8. The phase matrix network 92 may include a plurality of couplers 9212 to 9218, 9222 to 9228, and 9232 to 9238 configured as first, second, and third stages. Each of the couplers 9212 to 9218, 9222 to 9228, and 9232 to 9238 may be similar to Figure 2B 2022 shown in FIG. 2022. For the sake of brevity, labels on the input ports and output ports of couplers 9212 to 9218, 9222 to 9228, and 9232 to 9238 are omitted here.

[0084] For example, the first stage of the phase matrix network 92 may include couplers 9212, 9214, 9216, and 9218. Couplers 9212, 9214, 9216, and 9218 may receive intermediate signals A1-A2, A3-A4, A5-A6, and A7-A8 at their input ports, respectively, and generate intermediate signals a1-a2, a3-a4, a5-a6, and a7-a8 at their output ports.

[0085] The second stage of the phase matrix network 92 may include couplers 9222, 9224, 9226, and 9228. Coupler 9222 may receive intermediate signals a1 and a3 at its two input ports, and generate intermediate signals b1 and b2 at its two output ports. Coupler 9224 may receive intermediate signals a5 and a7 at its two input ports, and generate intermediate signals b3 and b4 at its two output ports. Coupler 9226 may receive intermediate signals a2 and a4 at its two input ports, and generate intermediate signals b5 and b6 at its two output ports. Coupler 9228 may receive intermediate signals a6 and a8 at its two input ports, and generate intermediate signals b7 and b8 at its two output ports.

[0086] The third stage of the phase matrix network 92 may include couplers 9232, 9234, 9236, and 9238. Coupler 9232 may receive intermediate signals b1 and b3 at its two input ports, and generate output signals B1 and B2 at its two output ports. Coupler 9234 may receive intermediate signals b2 and b4 at its two input ports, and generate intermediate signals B3 and B4 at its two output ports. Coupler 9236 may receive intermediate signals b5 and b7 at its two input ports, and generate intermediate signals B5 and B6 at its two output ports. Coupler 9238 may receive intermediate signals b6 and b8 at its two input ports, and generate intermediate signals B6 and B8 at its two output ports.

[0087] Considering the perfect matching condition, each of the output signals B1 to B8 may be a linear combination of the input signals A1 to A8, and the coefficients of the linear combination may be the transmission coefficients from the input port to the output port of the phase matrix network 92. Specifically, the phase matrix network 92 may be configured to perform a matrix multiplication operation of the input matrix {A1, A2, ..., A8} and the phase matrix M of the phase matrix network 92 to obtain the output matrix {B1, B2, ..., B8}. The matrix multiplication operation may be expressed by the following formula (7).

[0088]

[0089] If the target output signal is determined, the input signal of the input matrix can be evaluated through an inverse matrix multiplication operation, which can be expressed by the following formula (8).

[0090]

[0091] Among them, M -1 represents the inverse matrix of the phase matrix M. If the input signals to be evaluated are in phase or out of phase with each other, the input matrix {A1, A2, ..., A8} can be expressed as Where R A1 To R A8 is a real number. If both sides of formula (8) are multiplied by Then formula (8) can be rewritten as the following formula (9).

[0092]

[0093] Since when evaluating the phase matrix M, is a constant, so the same as the array The pattern associated with the output signal of the array {B1, B2, ..., B8} may be the same as the pattern associated with the output signal of the array {R A1 ,R A2 ,…,R A8 All elements R in} A1 To R A8 are real numbers, so they can be calculated via dedicated circuits with power allocation, amplitude weighting, and sign switching. For example, the adjustable amplifier 901 can be configured to perform power allocation and amplitude weighting functions. The inverter 902 can be configured to perform the sign switching function. It should be noted that the inverter 902 can be a lossless inverter, and the amplitude of the sign-switched signal at the output terminal of each inverter 902 can be substantially the same as the amplitude of the input signal at the input terminal of each inverter 902.

[0094] In some embodiments, the phase matrix M of the phase matrix network 92 may be expressed by the following formula (10).

[0095]

[0096] Where L PMN Indicates distribution and transmission loss; e -jα represents the phase delay of the shortest path of the phase matrix network 92.

[0097] Assuming that the output signals B1 to B8 are constructed to synthesize a normal 8-element antenna beam pattern with beam angles from -90° to 90°, the elements B1 to B8 can be expressed by the following formula (11).

[0098]

[0099] where k represents the amplitude of the output signals B1 to B8. Assuming d is the antenna spacing and half wavelength λ / 2, the angle φ can be calculated using the following formula (12) via the beam angle θ d to calculate.

[0100]

[0101] In some embodiments, via Figure 7B The phase matrix M of the matrix multiplication operation performed by the phase matrix network 72 shown in can be derived in a similar manner as described above.

[0102] Fig.10 FIG. 1 is a block diagram of a phase array system according to yet another embodiment of the present invention. Figure 2B , Figure 4 , Figure 7B and Fig.10 .

[0103] In some embodiments, the phased array system 10a may include a weighting network 1000 and a plurality of amplifiers 1004. The weighting network 1000 may include a coupler device 1002 and a plurality of coupler devices 1003. The coupler device 1002 may be a 1-to-2 coupler device that may be used. Figure 2B The coupler device 202 shown in Figure 4 The coupler device 400 shown in FIG. 1003 may be a 1-to-4 coupler device that may be used. Figure 7B The coupler device 702 shown in FIG.

[0104] Specifically, the phase array system 10a can be designed for eight antennas and can generate eight output signals B1 to B8. Figure 2B The coupler device 202 shown in Figure 4 , these coupler devices can be configured into a 3-stage cascade architecture to build 8 paths. Figure 7B, the weighted network 1000 may be reconfigured into a 2-stage cascaded architecture, wherein the first stage includes a 1-to-2 coupler device (e.g., Figure 2B The coupler device 202 shown in Figure 4 ), and the second stage includes a 1-to-4 coupler device (e.g., Figure 7B Coupler device 702 shown in FIG.

[0105] In some embodiments, a 1-to-4 coupler device can be used as two stages of a 1-to-2 coupler device. Similarly, a 1-to-8 coupler device (e.g., Fig. 9 The coupler device 9 in FIG. 1 can be used as three stages of a 1-to-2 coupler device, or as one stage of a 1-to-2 coupler device plus one stage of a 1-to-4 coupler device. In addition, combinations of 1-to-2 coupler devices, 1-to-4 coupler devices, 1-to-8 coupler devices, and the like can be used to generate the number of output signals of the phased array system.

[0106] The scope of the present invention is not intended to be limited to the specific embodiments of the procedures, machines, manufactures, and material components, means, methods, steps, and operations described in the specification. Those skilled in the art will readily understand from the disclosure of the present invention that currently existing or later developed procedures, machines, manufactures, material components, means, methods, steps, or operations that perform substantially the same functions as the corresponding embodiments described herein or achieve substantially the same results as the corresponding embodiments described herein may be utilized according to the present invention. Therefore, the accompanying invention claims are intended to include procedures, machines, manufactures, and material components, means, methods, steps, or operations within the scope of the same. In addition, each claim constitutes a separate embodiment, and the combination of various claims and embodiments is within the scope of the present invention.

[0107] The methods, procedures or operations according to embodiments of the present invention may also be implemented on a programmed processor. However, the controller, flow chart and modules may also be implemented on a general or special purpose computer, a programmed microprocessor or microcontroller and peripheral integrated circuit components, an integrated circuit, a hardware electronic or logic circuit (such as a discrete component circuit), a programmable logic device or the like. In general, any device capable of implementing a finite state machine of the flow chart shown in the figure may be used to implement the processor functions of the present invention.

[0108] An alternative embodiment preferably implements the method, program or operation according to an embodiment of the present invention on a non-transitory computer-readable storage medium storing computer programmable instructions. The instructions are preferably executed by a computer executable component that is preferably integrated with a network security system. The non-transitory computer-readable storage medium can be stored on any suitable computer-readable medium, such as RAM, ROM, flash memory, EEPROM, optical storage device (CD or DVD), hard drive, floppy disk drive or any suitable device. The computer executable component is preferably a processor, but the instructions may alternatively or additionally be executed by any suitable dedicated hardware device. For example, an embodiment of the present invention provides a non-transitory computer-readable storage medium having computer programmable instructions stored therein.

[0109] Although the present invention has been described using specific embodiments of the present invention, it is apparent that many alternatives, modifications, and variations will be apparent to those skilled in the art. For example, various components of the embodiments may be interchanged, added, or replaced in other embodiments. Moreover, all components of the various figures are not necessary for the operation of the disclosed embodiments. For example, by simply adopting the components of the independent claims, a person of ordinary skill will be able to make and use the teachings of the present invention. Therefore, the embodiments of the present invention as described herein are intended to be illustrative, not restrictive. Various changes may be made without departing from the spirit and scope of the present invention.

[0110] Even though many characteristics and advantages of the present invention have been described in the foregoing description, as well as details of the structure and function of the present invention, the present invention is only illustrative. Within the principles of the invention, changes may be made to the details (especially with respect to the shape, size and arrangement of parts) to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.

[0111] Explanation of symbols

[0112] 1: Phased Array System

[0113] 2: Phased Array System

[0114] 7: Phased Array System

[0115] 8: Phased Array System

[0116] 9: Coupler device

[0117] 10: Power distribution network

[0118] 10a: Phased Array System

[0119] 12: Power divider

[0120] 21: Phase Shifter

[0121] 22: Variable Gain Amplifier

[0122] 23: Amplifier

[0123] 70: Weighted Network

[0124] 71: Phase Inverter

[0125] 72: Phase Matrix Network

[0126] 80: Power distribution network

[0127] 81: Power divider

[0128] 82: Phase Shifter

[0129] 83:Variable Gain Amplifier

[0130] 90: Weighted Network

[0131] 92: Phase Matrix Network

[0132] 200: Weighted Network

[0133] 202: Coupler device

[0134] 203: Phase Inverter

[0135] 204: Amplifier

[0136] 210: Input matching network

[0137] 220A: Output matching network

[0138] 220B: Output matching network

[0139] 230: Source Network

[0140] 240A: Load network

[0141] 240B: Load Network

[0142] 300: Coupler device

[0143] 302: Power distributor

[0144] 304: Variable gain amplifier

[0145] 306: variable gain amplifier

[0146] 308: Coupler

[0147] 400: Coupler device

[0148] 402: Power distributor

[0149] 404: Balun

[0150] 406: Switch

[0151] 408:Variable Gain Amplifier

[0152] 410: Coupler

[0153] 412: Amplifier

[0154] 500a:T junction power divider

[0155] 500b: Wilkinson power divider

[0156] 502: Microstrip line

[0157] 504: Microstrip line

[0158] 506: Microstrip line

[0159] 512: Microstrip line

[0160] 514:Microstrip line

[0161] 516:Microstrip line

[0162] 518:Microstrip line

[0163] 520: Microstrip line

[0164] 600: Marchand balun

[0165] 602: Coupled line

[0166] 604: Coupled Line

[0167] 606: Coupled Line

[0168] 608: Coupled Line

[0169] 702: Coupler device

[0170] 704: Amplifier

[0171] 901:Adjustable Amplifier

[0172] 902: Inverter

[0173] 1000: Weighted Network

[0174] 1002: Coupler device

[0175] 1003: Coupler device

[0176] 1004:Amplifier

[0177] 2021: Adjustable Amplifiers

[0178] 2022: Coupler

[0179] 7021: Adjustable Amplifier

[0180] 7022: Coupler

[0181] 7023: Coupler

[0182] 7024: Coupler

[0183] 7025: Coupler

[0184] 9212: Coupler

[0185] 9214: Coupler

[0186] 9216: Coupler

[0187] 9218: Coupler

[0188] 9222: Coupler

[0189] 9224: Coupler

[0190] 9226: Coupler

[0191] 9228: Coupler

[0192] 9232: Coupler

[0193] 9234: Coupler

[0194] 9236: Coupler

[0195] 9238: Coupler

[0196] P1: Input port

[0197] P2: Input port

[0198] P3: Output port

[0199] P4: Output port

[0200] P21: Input port

[0201] P22: Input port

[0202] P23: Output port

[0203] P24: Output port

[0204] P31: Input port

[0205] P32: Input port

[0206] P33: Output port

[0207] P34: Output port

[0208] P41: Input port

[0209] P42: Input port

[0210] P43: Output port

[0211] P44: Output port

[0212] P51: Input port

[0213] P52: Input port

[0214] P53: Output port

[0215] P54: Output port

Claims

1. A coupler device for use in a phased array system, the coupler device comprising: A weighting network comprising: a plurality of adjustable amplifiers arranged in two stages, wherein the plurality of adjustable amplifiers are configured to convert an input signal into a first amplified signal, a second amplified signal, a third amplified signal, and a fourth amplified signal; and A phase matrix network is coupled to the weighting network, wherein the phase matrix network is configured to generate a first output signal, a second output signal, a third output signal, and a fourth output signal based on the first amplified signal, the second amplified signal, the third amplified signal, and the fourth amplified signal.

2. The coupler device of claim 1 , wherein each of the adjustable amplifiers is configured as a 1-to-2 adjustable amplifier that converts a first signal into a second signal and a third signal, and a first phase difference between a first phase of the second signal and a second phase of the third signal is a fixed phase angle.

3. The coupler device of claim 2, wherein each of the adjustable amplifiers is further configured to adjust a first gain of the second signal and a second gain of the third signal in order to adjust the fixed phase angle.

4. The coupler device of claim 1 , wherein each of the adjustable amplifiers comprises: A first bipolar junction transistor having a base controlled by a first control voltage, a collector connected to an input port of a first output matching network, and an emitter connected to ground; and a second bipolar junction transistor having a base controlled by a second control voltage, a collector connected to the input port of the second output matching network, and an emitter connected to ground; The first bipolar junction transistor and the second bipolar junction transistor are connected in parallel.

5. The coupler device of claim 4, wherein each of the adjustable amplifiers further comprises an input matching network configured to match an impedance of the first and second bipolar junction transistors to a system impedance.

6. The coupler device of claim 4 , wherein the first output matching network and the second output matching network are substantially identical, and the first output matching network is configured to match a first output impedance of the first bipolar junction transistor to a system impedance, and the second output matching network is configured to match a second output impedance of the second bipolar junction transistor to the system impedance.

7. The coupler device according to claim 1, wherein each of the adjustable amplifiers has functions of power saving and signal amplification.

8. The coupler device of claim 1, wherein the phase matrix network comprises a first stage and a second stage, The first stage includes a first coupler and a second coupler, and the first coupler generates a first intermediate signal and a second intermediate signal based on the first amplified signal and the second amplified signal, and the second coupler generates a third intermediate signal and a fourth intermediate signal based on the third amplified signal and the fourth amplified signal.

9. The coupler device of claim 8 , wherein the second stage comprises a third coupler and a fourth coupler, and the third coupler generates the first output signal and the second output signal based on the first intermediate signal and the third intermediate signal, and the fourth coupler generates the third output signal and the fourth output signal based on the second intermediate signal and the fourth intermediate signal.

10. The coupler device of claim 9, wherein the first coupler, the second coupler, the third coupler, and the fourth coupler are 90 degree hybrid couplers.

11. A coupler device for use in a phased array system, the coupler device comprising: a weighting network configured to transform and amplify the input signal to obtain eight intermediate amplified signals; and a phase matrix network coupled to the weighting network, wherein the phase matrix network is configured to generate eight output signals based on the eight intermediate amplified signals, wherein the output array of eight output signals is obtained by performing a matrix multiplication of the array of eight intermediate amplified signals with a phase matrix of the phase matrix network.

12. The coupler device of claim 11 , wherein the weighting network comprises a plurality of adjustable amplifiers configured as a first stage, a second stage, and a third stage configured in a cascaded architecture, and each of the adjustable amplifiers is configured as a 1-to-2 adjustable amplifier that converts a first signal into a second signal and a third signal, and a first phase difference between a first phase of the second signal and a second phase of the third signal is a fixed phase angle.

13. The coupler device of claim 12, wherein the first stage comprises a first adjustable amplifier configured to convert and amplify the input signal to obtain a first signal and a second signal, The second stage includes a second adjustable amplifier and a third adjustable amplifier, and the second adjustable amplifier is configured to convert and amplify the first signal to obtain a fourth signal and a fifth signal, and the third adjustable amplifier is configured to convert and amplify the second signal to obtain a sixth signal and a seventh signal.

14. The coupler device of claim 13, wherein the third stage comprises a fourth adjustable amplifier, a fifth adjustable amplifier, a sixth adjustable amplifier, and a seventh adjustable amplifier, wherein the fourth adjustable amplifier is configured to convert and amplify the fourth signal to obtain a first amplified signal and a second amplified signal, and the fifth adjustable amplifier is configured to convert and amplify the fifth signal to obtain a third amplified signal and a fourth amplified signal, The sixth adjustable amplifier is configured to convert and amplify the sixth signal to obtain a fifth amplified signal and a sixth amplified signal, and the seventh adjustable amplifier is configured to convert and amplify the seventh signal to obtain a seventh amplified signal and an eighth amplified signal.

15. The coupler device of claim 14 , wherein the weighting network further comprises a plurality of inverters configured to invert the phases of the first amplified signal, the second amplified signal, the third amplified signal, the fourth amplified signal, the fifth amplified signal, the sixth amplified signal, the seventh amplified signal, and the eighth amplified signal to obtain a first intermediate amplified signal, a second intermediate amplified signal, a third intermediate amplified signal, a fourth intermediate amplified signal, a fifth intermediate amplified signal, a sixth intermediate amplified signal, a seventh intermediate amplified signal, and an eighth intermediate amplified signal.

16. The coupler device of claim 12, wherein each of the adjustable amplifiers is further configured to adjust a first gain of the second signal and a second gain of the third signal in order to adjust the fixed phase angle.

17. The coupler device of claim 12, wherein each of the adjustable amplifiers has functions of power saving and signal amplification.

18. The coupler device of claim 15, wherein the phase matrix network comprises a first coupler stage, a second coupler stage, and a third coupler stage, wherein the first coupler stage includes a first coupler, a second coupler, a third coupler and a fourth coupler, and the first coupler generates a first intermediate signal and a second intermediate signal based on the first intermediate amplified signal and the second intermediate amplified signal, and the second coupler generates a third intermediate signal and a fourth intermediate signal based on the third intermediate amplified signal and the fourth intermediate amplified signal, The third coupler generates a fifth intermediate signal and a sixth intermediate signal based on the fifth intermediate amplified signal and the sixth intermediate amplified signal, and the fourth coupler generates a seventh intermediate signal and an eighth intermediate signal based on the seventh intermediate amplified signal and the eighth intermediate amplified signal.

19. The coupler device of claim 18 , wherein the second coupler stage comprises a fifth coupler, a sixth coupler, a seventh coupler, and an eighth coupler, and the fifth coupler generates a ninth intermediate signal and a tenth intermediate signal based on the first intermediate signal and the second intermediate signal, and the sixth coupler generates an eleventh intermediate signal and a twelfth intermediate signal based on the fifth intermediate signal and the seventh intermediate signal, The seventh coupler generates a thirteenth intermediate signal and a fourteenth intermediate signal based on the second intermediate signal and the fourth intermediate signal, and the eighth coupler generates a fifteenth intermediate signal and a sixteenth intermediate signal based on the sixth intermediate signal and the eighth intermediate signal.

20. The coupler device of claim 19, wherein the third coupler stage comprises a ninth coupler, a tenth coupler, an eleventh coupler, and a twelfth coupler, and the ninth coupler generates a first output signal and a second output signal based on the ninth intermediate signal and the eleventh intermediate signal, and the tenth coupler generates a third output signal and a fourth output signal based on the tenth intermediate signal and the twelfth intermediate signal, The eleventh coupler generates a fifth output signal and a sixth output signal based on the thirteenth intermediate signal and the fifteenth intermediate signal, and the twelfth coupler generates a seventh output signal and an eighth output signal based on the fourteenth intermediate signal and the sixteenth intermediate signal.

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