Display panel and display device

Abstract

The invention relates to the technical field of display, and relates to a display panel and a display device. The display panel comprises a display area and a first area surrounding the bottom of the display area, the display panel comprises a substrate and a multi-layer film layer structure, and the multi-layer film layer structure comprises a first metal layer, a first flat layer, a first electrode layer, a pixel definition layer and a second electrode layer which are sequentially arranged; a first sub-part of the first flat layer is provided with a first channel penetrating in a first direction; the first sub-part of the first electrode layer is electrically connected with the part of the first sub-part of the first metal layer, which is used as a negative power supply voltage wire, through a first channel; the first sub-part of the pixel definition layer is provided with a second channel penetrating in the first direction; the polarity of the second electrode layer is opposite to that of the first electrode layer, and the first sub-part of the second electrode layer is electrically connected with the first sub-part of the first electrode layer through the second channel. According to the display panel, VSS line impedance can be effectively reduced under the condition that the width of the frame is not increased, and meanwhile the problem of highlight burn is solved.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] With the rapid development of OLED (Organic Light Emitting Diode) display technology, its application in smart phones, TVs, smart wearable devices and other fields is becoming more and more extensive. OLED display panels have gradually become the mainstream choice of display technology with their advantages such as high contrast, wide color gamut, fast response time and bendability. However, as consumers' requirements for the appearance design of display devices continue to increase, the narrowing of the bottom frame of OLED display panels has become an industry trend. Although this narrow frame design improves the aesthetics and portability of the product, it also brings new technical challenges.

[0003] In OLED display panels, the VSS (Voltage Source Supply, negative power supply voltage) circuit is an important part of the display panel circuit design, which is used to provide a stable reference level for the display panel. With the narrowing of the lower frame, the design space of the VSS circuit is increasingly limited. This leads to an increase in the impedance of the VSS circuit, especially when the current is too large during high-brightness display, which can easily cause high-brightness burns. High-brightness burns not only affect the display effect of the display panel, but also shorten its service life.

[0004] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present disclosure, and therefore may include information that does not constitute relevant technology known to ordinary technicians in the field. Summary of the invention

[0005] The purpose of the present disclosure is to overcome the deficiencies of the above-mentioned related technologies and to provide a display panel and a display device.

[0006] According to one aspect of the present disclosure, the present disclosure provides a display panel, comprising: a display area and a first area surrounding the bottom of the display area, the display panel comprising a base substrate and a multi-layer film layer structure located on the same side of the base substrate along a first direction, wherein the multi-layer film layer structure comprises:

[0007] A first metal layer, located on a side of the substrate substrate facing away from the substrate substrate, includes a first sub-portion located in the first area, at least a portion of the first sub-portion being used as a negative power supply voltage trace;

[0008] A first flat layer, located on a side of the first metal layer away from the substrate, comprising a first sub-portion located in the first area; the first sub-portion of the first flat layer is provided with a first channel penetrating the first flat layer in the first direction;

[0009] A first electrode layer, located on a side of the first flat layer away from the substrate, includes a first sub-portion located in the first area; the first sub-portion of the first electrode layer is electrically connected to a portion of the first sub-portion of the first metal layer used as a negative power supply voltage routing line through the first channel;

[0010] A pixel definition layer, located on a side of the first electrode layer away from the base substrate, comprising a first sub-portion located in the first area, wherein the first sub-portion of the pixel definition layer is provided with a second channel penetrating the pixel definition layer in the first direction;

[0011] The second electrode layer is located on the side of the pixel definition layer away from the substrate, has opposite polarity to the first electrode layer, and includes a first sub-portion located in the first area. The first sub-portion of the second electrode layer is electrically connected to the first sub-portion of the first electrode layer through the second channel.

[0012] Optionally, the multi-layer film structure in the first area is provided with a first barrier groove and a second barrier groove, and the second barrier groove is located on the side of the first barrier groove facing the display area; and in the orthographic projection of the base substrate, the material of each film structure in the multi-layer film structure located in the orthographic projection coverage area of ​​the base substrate of the first barrier groove is inorganic, and the material of each film structure in the multi-layer film structure located in the orthographic projection coverage area of ​​the base substrate of the second barrier groove is inorganic;

[0013] The portion of the multi-layer film structure located between the first barrier groove and the second barrier groove forms a first barrier portion; the first barrier portion is arranged around the bottom edge of the display area.

[0014] Optionally, the second electrode layer is a negative electrode layer, wherein:

[0015] The orthographic projection of the edge of the first sub-portion of the second electrode layer away from the display area on the base substrate contacts the boundary line of the orthographic projection of the first blocking portion on the base substrate toward the display area;

[0016] Alternatively, the orthographic projection of an edge of a side of the first sub-portion of the second electrode layer away from the display area on the base substrate is located within the orthographic projection of the first blocking portion on the base substrate;

[0017] Alternatively, the orthographic projection of an edge of a side of the first sub-portion of the second electrode layer away from the display area on the base substrate is located on a side of the orthographic projection of the first blocking portion on the base substrate away from the display area.

[0018] Optionally, the multi-layer film structure in the first area is provided with a third barrier groove, the third barrier groove is located on the side of the second barrier groove facing the display area and is spaced apart from the second barrier groove; the portion of the multi-layer film structure located between the second barrier groove and one of the third barrier grooves forms a second barrier portion; the second barrier portion is arranged around at least a portion of the bottom edge of the display area; wherein:

[0019] The second channel in the pixel definition layer forms the third blocking groove;

[0020] Alternatively, the orthographic projection of the first channel in the first planar layer on the base substrate covers the orthographic projection of the second channel in the pixel definition layer on the base substrate, so as to cooperate with the second channel in the pixel definition layer to form the third blocking groove.

[0021] Optionally, the multilayer film structure in the first area is provided with at least two third barrier grooves, the third barrier grooves are located on the side of the second barrier groove facing the display area and are spaced apart from the second barrier grooves, and at least two of the third barrier grooves are spaced apart in the arrangement direction of the first area and the display area; the portion of the multilayer film structure located between the second barrier groove and one of the third barrier grooves forms a second barrier portion, and the portion of the multilayer film structure located between adjacent third barrier grooves forms a second barrier portion; the second barrier portion is arranged around at least a portion of the bottom edge of the display area; wherein:

[0022] The second channel in the pixel definition layer forms the third blocking groove;

[0023] Alternatively, the orthographic projection of the first channel in the first planar layer on the base substrate covers the orthographic projection of the second channel in the pixel definition layer on the base substrate, so as to cooperate with the second channel in the pixel definition layer to form the third blocking groove.

[0024] Optionally, the display panel further includes a second area, the second area is connected to the first area to form a peripheral area, and the peripheral area is arranged around the display area. In the display panel:

[0025] The first blocking portion is disposed around the display area;

[0026] And / or, the second blocking portion is arranged around the display area.

[0027] Optionally, the first sub-portion of the first electrode layer is provided with a first vent that penetrates the first sub-portion in the first direction, and an orthographic projection of the first vent on the base substrate is located within an orthographic projection of the second blocking portion on the base substrate.

[0028] Optionally, the orthographic projection of the first vent on the base substrate is a rectangle.

[0029] Optionally, the multi-layer film structure further comprises:

[0030] A second planar layer, located between the first metal layer and the substrate, including a first sub-portion located in the first area;

[0031] The second metal layer is located between the base substrate and the second planar layer, and includes a first sub-portion located in the first area.

[0032] Optionally, the first sub-portion of the first metal layer is provided with a second vent that penetrates the first sub-portion in the first direction, and the orthographic projection of the second vent on the base substrate is located within the orthographic projection of the second blocking portion on the base substrate.

[0033] Optionally, an orthographic projection of the second air permeable opening on the base substrate overlaps at least partially with an orthographic projection of the first air permeable opening on the base substrate.

[0034] Optionally, the orthographic projection of the second vent on the base substrate is a rectangle.

[0035] Optionally, the multi-layer film structure further comprises:

[0036] A third planar layer, located between the second metal layer and the substrate, comprising a first sub-portion located in the first area;

[0037] The third metal layer is located between the substrate and the third planar layer, and includes a first sub-portion located in the first area.

[0038] Optionally, the display panel further includes a second area, the second area is connected to the first area to form a peripheral area, and the peripheral area is arranged around the display area. In the display panel:

[0039] The first metal layer further includes a second sub-portion located in the second region;

[0040] The first flat layer further includes a second sub-portion located in the second area; the second sub-portion of the first flat layer is provided with a third channel penetrating the first flat layer in the first direction;

[0041] The first electrode layer further includes a second sub-portion located in the second area; the second sub-portion of the first electrode layer is electrically connected to the second sub-portion of the first metal layer through the third channel;

[0042] The pixel definition layer further comprises a second sub-portion located in the second area; the second sub-portion of the pixel definition layer is provided with a fourth channel penetrating the pixel definition layer in the first direction;

[0043] The second electrode layer further includes a second sub-portion located in the second area; the second sub-portion of the second electrode layer is electrically connected to the second sub-portion of the first electrode layer through the fourth channel.

[0044] According to another aspect of the present disclosure, the present disclosure provides a display device, including a display panel provided by any of the above technical solutions.

[0045] The display panel provided by the present disclosure can reduce the VSS impedance without increasing the size of the bottom of the display panel, thereby reducing the risk of high-brightness burns. Specifically, in the display panel provided by the present disclosure, the second electrode layer is opposite to the polarity of the first electrode layer, and the two are overlapped in the first area at the bottom of the display area, and connected to the first metal layer as the VSS routing, which can optimize the current transmission path. In addition, this structure can reduce the path length and contact resistance of the current during transmission, so as to effectively reduce the VSS impedance. Accordingly, when the VSS impedance is reduced, the possibility of the VSSDrop phenomenon in the display panel provided by the present disclosure can be reduced. This design can make the voltage distribution in the display panel more uniform, thereby improving the uniformity of the display brightness.

[0046] In addition, one of the first electrode layer and the second electrode layer is a negative electrode layer. Since the negative electrode layer is usually thinner, its surface resistance is larger. By overlapping and connecting to the low-resistance first metal layer in the first region, the resistance of the negative electrode layer can be combined with the low-resistance characteristics of the first metal layer, thereby reducing the overall VSS impedance.

[0047] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0048] The accompanying drawings herein are incorporated into the specification and constitute a part of the specification, illustrate embodiments consistent with the present disclosure, and together with the specification are used to explain the principles of the present disclosure. Obviously, the accompanying drawings described below are only some embodiments of the present disclosure, and for ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without creative work.

[0049] Figure 1 is a cross-sectional schematic diagram of a display panel in the related art;

[0050] Figure 2 A schematic plan view of a display panel in a first area provided by an embodiment of the present disclosure;

[0051] Figure 3 for Figure 2 The middle part shows a schematic cross-sectional view of the panel along line AA;

[0052] Figure 4 A schematic diagram of the overall structure of a display panel provided in an embodiment of the present disclosure;

[0053] Figure 5 A schematic plan view of a second electrode layer in a display panel provided by an embodiment of the present disclosure;

[0054] Figure 6 A schematic plan view of a pixel definition layer in a display panel provided by an embodiment of the present disclosure;

[0055] Figure 7 A schematic plan view of a first electrode layer and a first planar layer in a display panel provided by an embodiment of the present disclosure;

[0056] Figure 8 A schematic plan view of a first metal layer and a first planar layer in a display panel provided by an embodiment of the present disclosure;

[0057] Fig. 9 A schematic plan view of a second metal layer and a second planar layer in a display panel provided by an embodiment of the present disclosure;

[0058] Fig.10 A schematic plan view of an insulating layer and a third flat layer in a display panel provided by an embodiment of the present disclosure;

[0059] Fig.11 A schematic plan view of a third metal layer in a display panel provided in an embodiment of the present disclosure.

[0060] Reference numerals:

[0061] Related technology: 100', substrate layer; 200', cathode layer;

[0062] The present disclosure: 01, display area; 02, first area; 03, pad area; 04, second area; 100, substrate; 200, first metal layer; 210, second vent; 300, first flat layer; 310, first channel; 400, first electrode layer; 410, first vent; 500, pixel definition layer; 510, second channel; 600, second electrode layer; 700, second flat layer; 800, second metal layer; 810, VSS routing; 820, VDD routing; 900, third flat layer; 1000, third metal layer; 1010, VSS routing; 1020, VDD routing; 1100, insulating layer; G1, first blocking groove; G2, second blocking groove; G3, third blocking groove; P1, first blocking portion; P2, second blocking portion. DETAILED DESCRIPTION

[0063] Example embodiments will now be described more fully with reference to the accompanying drawings. However, the example embodiments can be implemented in a variety of forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that the present disclosure will be comprehensive and complete and fully convey the concepts of the example embodiments to those skilled in the art. The same reference numerals in the figures represent the same or similar structures, and thus their detailed description will be omitted. In addition, the drawings are only schematic illustrations of the present disclosure and are not necessarily drawn to scale.

[0064] Although relative terms such as "upper" and "lower" are used in this specification to describe the relative relationship of one component of the illustration to another component, these terms are used in this specification only for convenience, such as according to the orientation of the examples described in the drawings. It is understood that if the device of the illustration is turned upside down, the component described as "upper" will become the component "lower". When a structure is "on" other structures, it may mean that the structure is formed integrally on the other structure, or that the structure is "directly" disposed on the other structure, or that the structure is "indirectly" disposed on the other structure through another structure.

[0065] The terms "a", "an", "the", "said" and "at least one" are used to indicate the presence of one or more elements / components / etc.; the terms "including" and "having" are used to express an open-ended inclusion and mean that additional elements / components / etc. may exist in addition to the listed elements / components / etc.; the terms "first", "second" and "third" etc. are used merely as labels and are not quantitative limitations.

[0066] Figure 1 is a cross-sectional schematic diagram of a display panel in the related art, Figure 1 The structure of the display panel in the related art is exemplarily described. The display panel in the related art includes a display area and a bottom area (i.e., Figure 1 As shown in Figure 1 As shown, the display panel includes a base substrate 100 ′ and a multi-layer film layer disposed on one side of the base substrate 100 ′, wherein the cathode layer 200 ′ in the multi-layer film layer only extends from the display area to a small portion of the bottom area.

[0067] Accordingly, the coverage area of ​​the cathode layer 200 ′ in the bottom region is small, and the cathode layer 200 ′ and the anode layer are not overlapped in the bottom region, which results in an increased VSS impedance of the display panel in the bottom region, which is prone to high brightness burns.

[0068] Therefore, there is an urgent need to provide a display panel that can effectively reduce the VSS line impedance without increasing the frame width and solve the high-brightness burn-in problem.

[0069] An embodiment of the present disclosure provides a display panel. Figure 2 A schematic plan view of a display panel in a first area 02 provided by an embodiment of the present disclosure; Figure 3 for Figure 2 The middle part shows a schematic cross-sectional view of the panel along line AA; Figure 4 The overall structure of the display panel provided by the embodiment of the present disclosure is shown in FIG. Figure 2 , Figure 3 and Figure 4 As shown, the display panel includes: a display area 01 and a first area 02 surrounding the bottom of the display area 01. The display panel includes a base substrate 100 and a multi-layer film structure located on the same side of the base substrate 100 along a first direction.

[0070] It is understandable that the material of each film layer structure can be set to inorganic or organic according to needs.

[0071] In the specific implementation process, the base substrate 100 included in the display panel can be a rigid substrate or a flexible substrate, which is not limited here. When the base substrate 100 is a flexible substrate, the material of the flexible substrate can be a polyimide film (PI) or polyethylene terephthalate (PET), etc., which is not limited here. The flexible substrate can be a structure including a single-layer flexible base layer, or a structure including multiple layers of flexible base layers, such as a structure with two layers of flexible base layers, or a structure with three layers of flexible base layers, which is not limited here. In addition, a support layer (Barrier) can be set between two adjacent flexible base layers.

[0072] The multilayer film structure includes: a first metal layer 200, a first planar layer 300, a first electrode layer 400, a pixel definition layer 500 and a second electrode layer 600 arranged in sequence along a first direction. Specifically, the first metal layer 200 is located on the side of the substrate 100 away from the substrate 100, including a first sub-portion located in the first area 02, at least part of the first sub-portion is used as a negative power supply voltage line (i.e., VSS line); the first planar layer 300 is located on the side of the first metal layer 200 away from the substrate 100, including a first sub-portion located in the first area 02; the first sub-portion of the first planar layer 300 is provided with a first channel penetrating the first planar layer 300 in the first direction; the first electrode layer 400 is located on the side of the first planar layer 300 away from the substrate 100, including a first sub-portion located in the first area 02; the first sub-portion of the first electrode layer 4 ... sub-portion of the first electrode layer 400 is provided with a first channel penetrating the The pixel definition layer 500 is located on the side of the first electrode layer 400 away from the substrate 100, including a first sub-portion located in the first area 02, and the first sub-portion of the pixel definition layer 500 is provided with a second channel that penetrates the pixel definition layer 500 in a first direction; the second electrode layer 600 is located on the side of the pixel definition layer 500 away from the substrate 100, with opposite polarity to the first electrode layer 400, including a first sub-portion located in the first area 02, and the first sub-portion of the second electrode layer 600 is electrically connected to the first sub-portion of the first electrode layer 400 through the second channel.

[0073] It is understandable that a VSS line is generally provided in the low voltage area of ​​the display panel to provide a low level reference and current return path. In some designs, the VSS line will be connected to the back side or other layers of the display panel through a metal via or a conductive layer together with the VDD (Voltage Drain Drain) line to optimize resistance and wiring space. Among them, VDD usually represents a positive power supply voltage, which is used to provide power for active devices in the circuit. VSS usually represents a ground or negative power supply voltage. In the embodiment of the present disclosure, the first metal layer 200 is used as a VSS line. Of course, the VSS line in the display panel may include more than one metal layer.

[0074] It should be noted that the display panel provided by the embodiment of the present disclosure can reduce the VSS impedance without increasing the size of the bottom of the display panel, thereby reducing the risk of high-brightness burns. Specifically, in the display panel provided by the embodiment of the present disclosure, the second electrode layer 600 is opposite to the polarity of the first electrode layer 400, and the two are overlapped in the first area 02 at the bottom of the display area 01, and are connected to the first metal layer 200 as the VSS routing, which can optimize the current transmission path. In addition, this structure can reduce the path length and contact resistance of the current during transmission, so as to effectively reduce the VSS impedance. Accordingly, when the VSS impedance is reduced, the possibility of the VSS Drop phenomenon in the display panel provided by the embodiment of the present disclosure can be reduced. This design can make the voltage distribution in the display panel more uniform, thereby improving the uniformity of the display brightness.

[0075] It is understandable that VSSDrop specifically refers to the voltage increase phenomenon on the ground line, because ideally, VSS should be maintained at 0V, but due to the influence of resistance and current, voltage increase may occur.

[0076] In addition, one of the first electrode layer 400 and the second electrode layer 600 is a negative electrode layer. Since the negative electrode layer is usually thinner, its surface resistance is larger. By overlapping and connecting to the low-resistance first metal layer 200 in the first region 02, the resistance of the negative electrode layer can be combined with the low-resistance characteristic of the first metal layer 200, thereby reducing the overall VSS impedance.

[0077] It is worth noting that when preparing the display panel provided by the embodiment of the present disclosure, no new process needs to be added, and it is sufficient to be compatible with the existing process. Moreover, the display panel optimization method in the embodiment of the present disclosure can achieve performance improvement without increasing additional costs.

[0078] It is understandable that if Figure 2 As shown, the display panel further includes a pad area 03, which is located on the side of the first area 02 away from the display area 01. The overlapping position of the first electrode layer 400 and the second electrode layer 600 is located in the first area 02 between the pad area 03 and the display area 01, and will not be described in detail.

[0079] Of course, the pixel definition layer 500 also includes a portion located in the display area 01 to define the pixel opening area. Similarly, the first planar layer 300, the first electrode layer 400 and the second electrode layer 600 also include a portion located in the display area 01, and the details are not repeated here.

[0080] like Figure 3As shown, in one embodiment of the present disclosure, the multilayer film structure in the first area 02 is provided with a first blocking groove G1 and a second blocking groove G2, and the second blocking groove G2 is located on the side of the first blocking groove G1 facing the display area 01; and in the orthographic projection of the base substrate 100, the material of each film structure in the multilayer film structure located in the orthographic projection coverage area of ​​the first blocking groove G1 on the base substrate 100 is inorganic, and the material of each film structure in the multilayer film structure located in the orthographic projection coverage area of ​​the second blocking groove G2 on the base substrate 100 is inorganic; the part of the multilayer film structure located between the first blocking groove G1 and the second blocking groove G2 forms a first blocking portion P1; the first blocking portion P1 is arranged around the bottom edge of the display area 01, thereby providing protection for the display area 01. The arrangement direction of the display area 01 and the first area 02 forms a second direction, and the second direction is perpendicular to the first direction.

[0081] It is understandable that inorganic substances have good barrier properties and can effectively prevent water and oxygen penetration and material diffusion; organic substances are usually hygroscopic and easily lead to water and oxygen intrusion, thus affecting the performance and life of the display panel.

[0082] It should be noted that the display panel in the embodiment of the present disclosure is arranged as follows: the film layer structures on both sides of the first barrier portion P1 in the second direction are inorganic. In other words, the film layer structures of organic matter on both sides of the first barrier portion P1 in the second direction are dug out to cut off the water and oxygen channels, which can effectively block the intrusion of external water and oxygen and form a better packaging effect.

[0083] It is worth noting that the film structure in the first barrier portion P1 is not limited to Figure 3 As shown, the details are not repeated here.

[0084] It is understandable that, in the process of manufacturing the display panel, the negative electrode layer is generally prepared as a whole layer, and the positive electrode layer is generally patterned to form a corresponding pattern. In one embodiment of the present disclosure, the second electrode layer 600 is a negative electrode layer, and the second electrode layer 600 can extend from the display area 01 to the first area 02. The edge of the second electrode layer 600 away from the display area 01 is its cut-off edge, and there are many possible cut-off positions of the cut-off edge, at least one of the following structural forms:

[0085] Structural form 1: Figure 3 As shown, the orthographic projection of the edge of the first sub-portion of the second electrode layer 600 away from the display area 01 on the base substrate 100 contacts the boundary line of the orthographic projection of the first blocking portion P1 on the base substrate 100 facing the display area 01 . Figure 5 A schematic plan view of a second electrode layer in a display panel provided by an embodiment of the present disclosure; Figure 3 refer to Figure 5In the structure shown, the cut-off edge of the second electrode layer 600 contacts the boundary line of the first barrier portion P1 facing the display area 01 , so as to increase the coverage area of ​​the first sub-portion of the second electrode layer 600 .

[0086] Structural form 2: The orthographic projection of the edge of the first sub-portion of the second electrode layer 600 away from the display area 01 on the base substrate 100 is located within the orthographic projection of the first barrier portion P1 on the base substrate 100. That is, the cutoff edge of the second electrode layer 600 is further extended to the position corresponding to the first barrier portion P1 compared to the position in structural form 1, further increasing the coverage area of ​​the first sub-portion of the second electrode layer 600.

[0087] Structural form three: The orthographic projection of the edge of the first sub-portion of the second electrode layer 600 away from the display area 01 on the base substrate 100 is located on the side of the orthographic projection of the first barrier portion P1 on the base substrate 100 away from the display area 01. That is, compared with the position in structural form two, the cutoff edge of the second electrode layer 600 is further extended to the side of the first barrier portion P1 away from the display area 01, further increasing the coverage area of ​​the first sub-portion of the second electrode layer 600.

[0088] It should be noted that the coverage area of ​​the negative electrode layer in the display panel provided by the embodiment of the present disclosure increases, and the increase in coverage area means that the effective reaction area of ​​the electrode increases. According to Ohm's law, the impedance is inversely proportional to the cross-sectional area of ​​the current path. When the coverage area of ​​the negative electrode layer increases, the current can be distributed more evenly, thereby reducing the current density per unit area, thereby reducing the impedance. Moreover, when the coverage area of ​​the negative electrode layer increases, the overlap position of the second electrode layer 600 and the first electrode layer 400 increases, which can further reduce the VSS impedance and reduce the risk of burns.

[0089] It is worth noting that the preparation material of the pixel definition layer 500 and the first planar layer 300 can be organic. Therefore, when the preparation material of the pixel definition layer 500 is organic, the first sub-portion of the pixel definition layer 500 is dug out at the portion corresponding to the first blocking groove G1 and the second blocking groove G2; when the preparation material of the first planar layer 300 is organic, the first sub-portion of the first planar layer 300 is dug out at the portion corresponding to the first blocking groove G1 and the second blocking groove G2.

[0090] In one embodiment of the present disclosure, Figure 3As shown, the multilayer film layer structure in the first area 02 is provided with at least two third barrier grooves G3, the third barrier groove G3 is located on the side of the second barrier groove G2 facing the display area 01, and is spaced apart from the second barrier groove G2, and at least two third barrier grooves G3 are spaced apart in the arrangement direction of the first area 02 and the display area 01 (i.e., the second direction); the portion of the multilayer film layer structure located between the second barrier groove G2 and a third barrier groove G3 forms a second barrier portion P2, and the portion of the multilayer film layer structure located between adjacent third barrier grooves G3 forms a second barrier portion P2; the second barrier portion P2 is arranged around at least a portion of the bottom edge of the display area 01.

[0091] When the display panel is prepared by IJP (Ink Jet Printing) technology, the liquid luminescent material ejected from the nozzle tends to flow from the display area 01 to the first area 02. At this time, the liquid luminescent material can flow into the third blocking groove G3, and the second blocking portion P2 preliminarily blocks the liquid luminescent material.

[0092] It is worth noting that, since the number of the second blocking portions P2 in the embodiment of the present disclosure is at least two, the at least two second blocking portions P2 can sequentially block the liquid luminescent material to weaken its flow tendency.

[0093] If the liquid luminescent material continues to flow into the first blocking groove G1, the liquid luminescent material can be blocked again by the first blocking portion P1. Accordingly, the structural arrangement in this structural form can prevent the liquid luminescent material from overflowing along the first direction to a greater extent, thereby improving the yield of the display panel.

[0094] When the third blocking groove G3 is specifically provided, the second channel in the pixel definition layer 500 forms the third blocking groove G3. Figure 6 This is a schematic plan view of a pixel definition layer 500 in a display panel provided in an embodiment of the present disclosure; Figure 3 refer to Figure 6 In the structure shown, referring to the area between the display area 01 and the first second barrier portion P2, the second channel 510 of the pixel definition layer 500 is Figure 6 The pixel definition layer 500 is shown in the form of a long groove, that is, the pixel definition layer 500 corresponding to the position of the third blocking groove G3 is removed. At this time, the pixel definition layer 500 that is not removed near the second channel 510 forms a second blocking portion P2.

[0095] Alternatively, the orthographic projection of the first channel in the first planar layer 300 on the base substrate 100 covers the orthographic projection of the second channel in the pixel definition layer 500 on the base substrate 100 , so as to cooperate with the second channel in the pixel definition layer 500 to form a third blocking groove G3 . Figure 7A schematic plan view of a first electrode layer 400 and a first planar layer 300 in a display panel provided in an embodiment of the present disclosure; Figure 8 FIG. 2 is a schematic plan view of a first metal layer 200 and a first flat layer 300 in a display panel provided by an embodiment of the present disclosure. Figure 3 and Figure 6 refer to Figure 7 and Figure 8 In the structure shown, referring to the area between the two second blocking portions P2, the first channel 310 is Figure 7 as well as Figure 8 It is shown in the form of a long groove, that is, the first flat layer 300 corresponding to the position of the third blocking groove G3 is dug out. It can be understood that Figure 7 and Figure 8 The first channel 310 corresponds to Figure 6 The second channel 510 of the pixel definition layer 500 is formed between the two second blocking portions P2. At this time, the pixel definition layer 500 and the first planar layer 300 form the second blocking portion P2.

[0096] It should be noted that in the embodiment of the present disclosure, only the pixel definition layer 500 or the pixel definition layer 500 and the first flat layer 300 are removed to form the second barrier portion P2, which does not affect the metal wiring below (such as the first metal layer 200), and can shorten the distance between the second barrier portion P2 and the display area 01, which is in line with the narrow frame design trend of the display panel. In addition, the height of the second barrier portion P2 is relatively low, which can minimize the risk of remaining in the third barrier groove G3 when the TSP (Touch Screen Panel) wiring crosses the line in the subsequent preparation, and can improve the yield of the display panel.

[0097] It is understandable that the number of the second blocking portions P2 can be set according to the requirements. Of course, since the size of the first area 02 in the second direction is limited, the number of sub-blocking portions in the second blocking portion P2 cannot be set infinitely.

[0098] When the second blocking portions P2 are provided in the display panel, there are various possibilities for the number of the second blocking portions P2 to be provided.

[0099] As an example, taking the number of the second blocking portions P2 as two, at this time, the first area 02 of the display panel is provided with a total of four blocking grooves, such as one first blocking groove G1, one second blocking groove G2 and two third blocking grooves G3.

[0100] As another example, taking the number of the second blocking portions P2 as three, in this case, the first area 02 of the display panel is provided with a total of five blocking grooves, such as one first blocking groove G1, one second blocking groove G2 and three third blocking grooves G3.

[0101] It is worth noting that when there are multiple second barrier portions P2 in the first zone 02, the structures of the multiple first barrier portions P1 may be the same or different, and correspondingly, the structures of the third barrier grooves G3 may be the same or different.

[0102] In a specific embodiment, taking the number of the first blocking portions P1 in the first region 02 as two as an example, Figure 3 As shown, in this specific embodiment, only the pixel definition layer 500 is dug out in the first third blocking groove G3 close to the display area 01 to form the first second blocking portion P2. The second blocking portion P2 has a relatively low height in the first direction, has a certain effect of blocking the IJP, and does not affect the metal wiring below (such as the first metal layer 200), and can shorten the distance from the display area 01. The second blocking groove G2 digs out the pixel definition layer 500 and the first flat layer 300 to form the second second blocking portion P2, so as to control the height of the sub-blocking portion, minimize the risk of material residue in the third blocking groove G3 when preparing the TSP wiring cross-line later, and improve the yield of the display panel.

[0103] In another embodiment of the present disclosure, a third barrier groove G3 is provided in the multi-layer film layer structure in the first area 02, and the third barrier groove G3 is located on the side of the second barrier groove G2 facing the display area 01 and is spaced apart from the second barrier groove G2; the portion of the multi-layer film layer structure located between the second barrier groove G2 and a third barrier groove G3 forms a second barrier portion P2; the second barrier portion P2 is arranged around at least a portion of the bottom edge of the display area 01.

[0104] It should be noted that when the display panel is prepared by the IJP technology, the liquid luminescent material sprayed from the nozzle will have a tendency to flow from the display area 01 to the first area 02. At this time, the liquid luminescent material can flow into the third blocking groove G3, and the second blocking part P2 preliminarily blocks the liquid luminescent material. If the liquid luminescent material continues to flow into the first blocking groove G1, the liquid luminescent material can be blocked again by the first blocking part P1. Accordingly, the structural setting in this structural form can prevent the liquid luminescent material from overflowing along the first direction to a greater extent, and can improve the yield of the display panel.

[0105] In a specific embodiment, reference Figure 3 In the first third blocking groove G3 and the second blocking portion P2 close to the display area 01 , the second channel in the pixel definition layer 500 forms the third blocking groove G3 , that is, the second blocking portion P2 only includes the pixel definition layer 500 .

[0106] In another specific embodiment, referring to Figure 3The second third blocking groove G3 and the second blocking portion P2 near the display area 01, the orthographic projection of the first channel in the first flat layer 300 on the base substrate 100 covers the orthographic projection of the second channel in the pixel definition layer 500 on the base substrate 100, so as to cooperate with the second channel in the pixel definition layer 500 to form the third blocking groove G3. That is, the third blocking portion includes the pixel definition layer 500 and the first flat layer 300.

[0107] Please continue to combine Figure 3 refer to Figures 6 to 8 In the structure shown, it is worth noting that when the second channel 510 of the pixel definition layer 500 cooperates with the first channel 310 of the first planar layer 300 to form the third blocking groove G3, the first sub-portion of the second electrode layer 600 and the first sub-portion of the first electrode layer 400 have a large overlapping area, and the first sub-portion of the first electrode layer 400 and the first sub-portion of the first metal layer 200 have a large overlapping area. Moreover, the above-mentioned overlapping area is located between the second blocking portion P2 and the display area 01.

[0108] When the second channel 510 of the pixel definition layer 500 forms the third blocking groove G3, the second channel may not be set in the first flat layer 300 in the bottom area of ​​the third blocking groove G3, or a second channel in the form of a small hole may be set to achieve an overlapping relationship between the first sub-portion of the first electrode layer 400 and the first sub-portion of the first metal layer 200.

[0109] In one embodiment of the present disclosure, Figure 3 and Figure 7 As shown, the first sub-portion of the first electrode layer 400 is provided with a first vent 410 penetrating the first sub-portion in the first direction, and the orthographic projection of the first vent 410 on the base substrate 100 is located within the orthographic projection of the second blocking portion P2 on the base substrate 100. This structural arrangement enables the first planar layer 300 covered by the first electrode layer 400 to release air during the preparation process, so as to prevent the display panel from bulging in the first area 02.

[0110] In a specific embodiment, the orthographic projection of the first vent 410 on the base substrate 100 is a rectangle to reduce the difficulty of manufacturing. Of course, the first vent 410 can also be set as other shapes as needed, which will not be described in detail here.

[0111] Fig. 9 This is a schematic plan view of the second metal layer and the second flat layer in the display panel provided by the embodiment of the present disclosure. Figure 3 refer to Fig. 9 In the structure shown, in one embodiment of the present disclosure, the multi-layer film structure further includes: a second planar layer 700 and a second metal layer 800 .

[0112] The second flat layer 700 is located between the first metal layer 200 and the base substrate 100 , including a first sub-portion located in the first area 02 ; the second metal layer 800 is located between the base substrate 100 and the second flat layer 700 , including a first sub-portion located in the first area 02 .

[0113] It is understandable that when the second planar layer 700 is used as an organic layer covering the second metal layer 800 , the positions of the second planar layer 700 corresponding to the first barrier groove G1 and the second barrier groove G2 need to be removed. The first barrier portion P1 may include the second planar layer 700 .

[0114] In addition, it is worth noting that Figure 3 As shown, a portion of the first sub-portion in the second metal layer 800 is used as a VSS routing 810, and the other portion is used as a VDD routing 820. The first metal layer 200 is electrically connected to the portion of the first sub-portion in the second metal layer 800 used as the VSS routing 810 through a via provided in the second planar layer 700 to further reduce the VSS impedance.

[0115] Please combine Figure 3 refer to Figure 8 In the structure shown, in one embodiment of the present disclosure, the first sub-portion of the first metal layer 200 is provided with a second vent 210 penetrating the first sub-portion in the first direction, and the orthographic projection of the second vent 210 on the base substrate 100 is located within the orthographic projection of the second blocking portion P2 on the base substrate 100. This structural setting enables the second flat layer 700 covered by the first metal layer 200 to release air during the preparation process to prevent the display panel from bulging in the first area 02.

[0116] In one embodiment of the present disclosure, the orthographic projection of the second vent 210 on the base substrate 100 overlaps at least partially with the orthographic projection of the first vent 410 on the base substrate 100 to improve the ventilation effect.

[0117] In one embodiment of the present disclosure, the orthographic projection of the second vent 210 on the base substrate 100 is a rectangle to reduce the difficulty of preparation. Of course, the second vent 210 can also be set as other shapes as needed, which will not be described in detail here.

[0118] Fig.10 A schematic plan view of an insulating layer and a third flat layer in a display panel provided by an embodiment of the present disclosure; Fig.11 This is a schematic plan view of the third metal layer in the display panel provided by the embodiment of the present disclosure. Fig. 9 and Fig.10 refer to Figure 3In one embodiment of the present disclosure, the multilayer film structure further includes: a third flat layer 900 and a third metal layer 1000, wherein the third flat layer 900 is located between the second metal layer 800 and the base substrate 100, including a first sub-portion located in the first zone 02; the third metal layer 1000 is located between the base substrate 100 and the third flat layer 900, including a first sub-portion located in the first zone 02.

[0119] It is understandable that when the third planar layer 900 is used as an organic layer covering the third metal layer 1000 , the third planar layer 900 corresponding to the first barrier groove G1 and the second barrier groove G2 needs to be removed. The first barrier portion P1 may include the third planar layer 900 .

[0120] In addition, it is worth noting that, as shown in FIG. 3 , a portion of the first sub-portion in the third metal layer 1000 is used as a VSS routing 1010, and another portion is used as a VDD routing 1020. The second metal layer 800 is electrically connected to the portion of the first sub-portion in the third metal layer 1000 used as the VSS routing 1010 through a via provided in the third planar layer 900, so as to further reduce the VSS impedance.

[0121] like Figure 4 As shown, in one embodiment of the present disclosure, the display panel provided by the embodiment of the present disclosure further includes a second area 04, the second area 04 is connected to the first area 02 to form a peripheral area, and the peripheral area is arranged around the display area 01. In the display panel: the first barrier portion P1 is arranged around the display area 01, and the second barrier portion P2 is arranged around the display area 01 to effectively protect the display area 01 from all directions. Specifically, the second barrier portion P2 can block the liquid luminescent material from all directions to prevent it from further overflowing along the first direction, thereby improving the yield of the display panel; the first barrier portion P1 forms a barrier structure around the display area 01, which can cut off the water and oxygen transmission channels in all directions, further ensuring the stability of the display area 01.

[0122] Of course, the first barrier portion P1 may be arranged to surround a portion of the display area 01, or the second barrier portion P2 may be arranged to surround a portion of the display area 01. The details will not be described in detail.

[0123] It is worth noting that each film layer structure can also be designed accordingly in the second zone 04 .

[0124] Exemplarily, the first metal layer 200 also includes a second sub-portion located in the second area 04; the first flat layer 300 also includes a second sub-portion located in the second area 04; the second sub-portion of the first flat layer 300 is provided with a third channel penetrating the first flat layer 300 in the first direction; the first electrode layer 400 also includes a second sub-portion located in the second area 04; the second sub-portion of the first electrode layer 400 is electrically connected to the second sub-portion of the first metal layer 200 through the third channel; the pixel definition layer 500 also includes a second sub-portion located in the second area 04; the second sub-portion of the pixel definition layer 500 is provided with a fourth channel penetrating the pixel definition layer 500 in the first direction; the second electrode layer 600 also includes a second sub-portion located in the second area 04; the second sub-portion of the second electrode layer 600 is electrically connected to the second sub-portion of the first electrode layer 400 through the fourth channel.

[0125] It is worth noting that in the embodiment of the present disclosure, the first electrode layer 400 and the second electrode layer 600 are also overlapped in the second region 04, and the first electrode layer 400 is connected to the second sub-portion of the first metal layer 200 to reduce the VSS impedance.

[0126] It is worth noting that the display panel provided in the embodiment of the present disclosure may include other film layers, and thus, the film layer structures in the first barrier portion P1 and the second barrier portion P2 are not limited to those shown in the drawings. Figure 3 and Fig.10 As shown, the display panel is further provided with an insulating layer 1100 , and the insulating layer 1100 is located between the third metal layer 1000 and the third planar layer 900 .

[0127] The embodiment of the present disclosure further provides a display device, which includes a display panel provided by any of the above technical solutions.

[0128] The display panel in the display device provided by the embodiment of the present disclosure can reduce the VSS impedance without increasing the size of the bottom of the display panel, thereby reducing the risk of high-brightness burns. Specifically, the second electrode layer 600 in the display panel has opposite polarity to the first electrode layer 400. The two are overlapped in the first area 02 at the bottom of the display area 01, and are connected to the first metal layer 200 as the VSS wiring, which can optimize the transmission path of the current. In addition, this structure can reduce the path length and contact resistance of the current during transmission, so as to effectively reduce the VSS impedance. Accordingly, when the VSS impedance is reduced, the possibility of the VSSDrop phenomenon in the display panel provided by the present disclosure can be reduced. This design can make the voltage distribution in the display panel more uniform, thereby improving the uniformity of the display brightness.

[0129] In addition, one of the first electrode layer 400 and the second electrode layer 600 is a negative electrode layer. Since the negative electrode layer is usually thinner, its surface resistance is larger. By overlapping and connecting to the low-resistance first metal layer 200 in the first region 02, the resistance of the negative electrode layer can be combined with the low-resistance characteristic of the first metal layer 200, thereby reducing the overall VSS impedance.

[0130] It should be noted that, although the steps of the method for preparing a display panel in the present disclosure are described in a specific order in the accompanying drawings, this does not require or imply that the steps must be performed in this specific order, or that all the steps shown must be performed to achieve the desired results. Additionally or alternatively, some steps may be omitted, multiple steps may be combined into one step, and / or one step may be decomposed into multiple steps, etc.

[0131] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. The present disclosure is intended to cover any variations, uses or adaptations of the present disclosure, which follow the general principles of the present disclosure and include common knowledge or customary techniques in the art that are not disclosed in the present disclosure. The description and examples are intended to be exemplary only, and the true scope and spirit of the present disclosure are indicated by the appended claims.

Claims

1. A display panel, characterized in that: include: The display panel comprises a display area and a first area surrounding the bottom of the display area, wherein the display panel comprises a base substrate and a multi-layer film structure located on the same side of the base substrate along a first direction, wherein the multi-layer film structure comprises: A first metal layer, located on a side of the substrate substrate facing away from the substrate substrate, includes a first sub-portion located in the first area, at least a portion of the first sub-portion being used as a negative power supply voltage trace; A first flat layer, located on a side of the first metal layer away from the substrate, comprising a first sub-portion located in the first area; the first sub-portion of the first flat layer is provided with a first channel penetrating the first flat layer in the first direction; A first electrode layer is located on a side of the first flat layer away from the substrate, and includes a first sub-portion located in the first area; the first sub-portion of the first electrode layer is electrically connected to a portion of the first sub-portion of the first metal layer used as a negative power supply voltage routing line through the first channel; A pixel definition layer, located on a side of the first electrode layer away from the base substrate, comprising a first sub-portion located in the first area, wherein the first sub-portion of the pixel definition layer is provided with a second channel penetrating the pixel definition layer in the first direction; The second electrode layer is located on the side of the pixel definition layer away from the substrate, has opposite polarity to the first electrode layer, and includes a first sub-portion located in the first area. The first sub-portion of the second electrode layer is electrically connected to the first sub-portion of the first electrode layer through the second channel.

2. The display panel according to claim 1, characterized in that: The multi-layer film structure in the first area is provided with a first barrier groove and a second barrier groove, and the second barrier groove is located on the side of the first barrier groove facing the display area; and in the orthographic projection of the base substrate, the material of each film structure in the multi-layer film structure located in the orthographic projection coverage area of ​​the base substrate of the first barrier groove is inorganic, and the material of each film structure in the multi-layer film structure located in the orthographic projection coverage area of ​​the base substrate of the second barrier groove is inorganic; The portion of the multi-layer film structure located between the first barrier groove and the second barrier groove forms a first barrier portion; the first barrier portion is arranged around the bottom edge of the display area.

3. The display panel according to claim 2, characterized in that: The second electrode layer is a negative electrode layer, wherein: The orthographic projection of the edge of the first sub-portion of the second electrode layer away from the display area on the base substrate contacts the boundary line of the orthographic projection of the first blocking portion on the base substrate toward the display area; Alternatively, the orthographic projection of an edge of a side of the first sub-portion of the second electrode layer away from the display area on the base substrate is located within the orthographic projection of the first blocking portion on the base substrate; Alternatively, the orthographic projection of an edge of a side of the first sub-portion of the second electrode layer away from the display area on the base substrate is located on a side of the orthographic projection of the first blocking portion on the base substrate away from the display area.

4. The display panel according to claim 2, characterized in that: The multi-layer film structure in the first area is provided with a third barrier groove, the third barrier groove is located on the side of the second barrier groove facing the display area and is spaced apart from the second barrier groove; the portion of the multi-layer film structure located between the second barrier groove and one of the third barrier grooves forms a second barrier portion; the second barrier portion is arranged around at least a portion of the bottom edge of the display area; wherein: The second channel in the pixel definition layer forms the third blocking groove; Alternatively, the orthographic projection of the first channel in the first planar layer on the base substrate covers the orthographic projection of the second channel in the pixel definition layer on the base substrate, so as to cooperate with the second channel in the pixel definition layer to form the third blocking groove.

5. The display panel according to claim 2, characterized in that: The multilayer film structure in the first area is provided with at least two third barrier grooves, the third barrier grooves are located on the side of the second barrier groove facing the display area and are spaced apart from the second barrier grooves, and at least two of the third barrier grooves are spaced apart in the arrangement direction of the first area and the display area; the portion of the multilayer film structure located between the second barrier groove and one of the third barrier grooves forms a second barrier portion, and the portion of the multilayer film structure located between adjacent third barrier grooves forms a second barrier portion; the second barrier portion is arranged around at least a portion of the bottom edge of the display area; wherein: The second channel in the pixel definition layer forms the third blocking groove; Alternatively, the orthographic projection of the first channel in the first planar layer on the base substrate covers the orthographic projection of the second channel in the pixel definition layer on the base substrate, so as to cooperate with the second channel in the pixel definition layer to form the third blocking groove.

6. The display panel according to claim 4 or 5, characterized in that: The display panel further includes a second area, the second area is connected to the first area to form a peripheral area, and the peripheral area is arranged around the display area. In the display panel: The first blocking portion is disposed around the display area; And / or, the second blocking portion is arranged around the display area.

7. The display panel according to claim 4 or 5, characterized in that: The first sub-portion of the first electrode layer is provided with a first vent that penetrates the first sub-portion in the first direction, and the orthographic projection of the first vent on the base substrate is located within the orthographic projection of the second blocking portion on the base substrate.

8. The display panel according to claim 7, characterized in that: The orthographic projection of the first vent on the base substrate is a rectangle.

9. The display panel according to claim 7, characterized in that: The multi-layer film structure further comprises: A second planar layer, located between the first metal layer and the substrate, including a first sub-portion located in the first area; The second metal layer is located between the base substrate and the second planar layer, and includes a first sub-portion located in the first area.

10. The display panel according to claim 9, characterized in that: The first sub-portion of the first metal layer is provided with a second vent that penetrates the first sub-portion in the first direction, and the orthographic projection of the second vent on the base substrate is located within the orthographic projection of the second blocking portion on the base substrate.

11. The display panel according to claim 10, characterized in that: The orthographic projection of the second air permeable opening on the base substrate overlaps at least a portion of the orthographic projection of the first air permeable opening on the base substrate.

12. The display panel according to claim 10, characterized in that: The orthographic projection of the second vent on the base substrate is a rectangle.

13. The display panel according to claim 9, characterized in that: The multi-layer film structure further comprises: A third planar layer, located between the second metal layer and the substrate, comprising a first sub-portion located in the first area; The third metal layer is located between the substrate and the third planar layer, and includes a first sub-portion located in the first area.

14. The display panel according to any one of claims 1 to 5, characterized in that: The display panel further includes a second area, the second area is connected to the first area to form a peripheral area, and the peripheral area is arranged around the display area. In the display panel: The first metal layer further includes a second sub-portion located in the second region; The first flat layer further includes a second sub-portion located in the second area; the second sub-portion of the first flat layer is provided with a third channel penetrating the first flat layer in the first direction; The first electrode layer further includes a second sub-portion located in the second area; the second sub-portion of the first electrode layer is electrically connected to the second sub-portion of the first metal layer through the third channel; The pixel definition layer further comprises a second sub-portion located in the second area; the second sub-portion of the pixel definition layer is provided with a fourth channel penetrating the pixel definition layer in the first direction; The second electrode layer further includes a second sub-portion located in the second area; the second sub-portion of the second electrode layer is electrically connected to the second sub-portion of the first electrode layer through the fourth channel.

15. A display device, characterized in that: Comprising a display panel as described in any one of claims 1-14.

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