Display panel, device and detection method

Abstract

The invention provides a display panel, a display device and a detection method. Specifically, the display panel comprises a display area, an opening area, a transition area and a surrounding area, the transition area is located between the opening area and the display area; the surrounding area is located on the periphery of the display area; the display panel comprises a pixel driving circuit and a plurality of data signal lines which are arranged in an array mode. The data signal line is connected with at least one pixel driving circuit; the display panel further comprises a first metal wire, and the first metal wire is connected in series with any data signal line in the surrounding area. Wherein a part of the first metal wire is located in the transition area and surrounds the opening area. By means of the first metal wire, the technical effect of simply and conveniently representing the cutting state of the trepanning area can be achieved.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display panel, a device and a detection method. Background Art

[0002] With the rapid development of OLED display technology, a large number of new display panels have gradually entered the market. In order to obtain a higher screen-to-body ratio and provide users with a good visual experience, drilling holes in the active area (AA) has become a trend in display devices. However, laser cutting and drilling holes inevitably bring risks to the reliability of display panels, such as causing cracks in flexible display panels. Summary of the invention

[0003] In view of this, an object of the present disclosure is to provide a display panel, a device and a detection method.

[0004] Based on the above purpose, the present disclosure provides a display panel, the display panel comprising a display area, an opening area, a transition area and a peripheral area; the transition area is located between the opening area and the display area; the peripheral area is located at the periphery of the display area;

[0005] The display panel comprises a pixel driving circuit and a plurality of data signal lines arranged in an array; the data signal line is connected to at least one pixel driving circuit;

[0006] The display panel further includes a first metal line, which is connected in series with any of the data signal lines in the peripheral area; wherein a portion of the first metal line is located in the transition area and surrounds the opening area.

[0007] Based on the same inventive concept, an embodiment of the present disclosure further provides a method for detecting a display panel, wherein the display panel comprises a display area, an opening area, a transition area and a peripheral area; the transition area is located between the opening area and the display area; the peripheral area is located at the periphery of the display area;

[0008] The display panel comprises a pixel driving circuit and a plurality of data signal lines arranged in an array; the data signal line is connected to at least one pixel driving circuit;

[0009] The display panel further comprises a first metal line, wherein the first metal line is connected in series with any of the data signal lines in the peripheral area; wherein a portion of the first metal line is located in the transition area and surrounds the opening area;

[0010] The detection method comprises:

[0011] Providing a display panel that is cut to form an opening area;

[0012] Providing a control signal to each of the pixel driving circuits;

[0013] The conduction state of the first metal line is determined according to the display state of the pixel unit controlled by the data signal line connected in series to the first metal line.

[0014] Based on the same inventive concept, an embodiment of the present disclosure further provides a display device, comprising any of the display panels described above.

[0015] From the above description, it can be seen that a display panel, a device and a detection method provided by the embodiments of the present disclosure, by setting a first metal wire in the display panel, the first metal wire is connected in series with any of the data signal lines in the peripheral area; wherein part of the first metal wire is located in the transition area and surrounds the opening area, thereby after the opening area is cut to form, the display panel can be lit up to check the luminescence of the pixels connected to the data signal line, so as to determine whether the first metal wire is disconnected. If the first metal wire is disconnected, it indicates a poor cutting, and if the first metal is not disconnected, it indicates a good cutting, thereby achieving a technical effect of simply and conveniently characterizing the cutting state. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the present disclosure or related technologies, the drawings required for use in the embodiments or related technical descriptions are briefly introduced below. Obviously, the drawings described below are only embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0017] Figure 1 A schematic diagram showing the structure of a display panel provided by the related art is shown;

[0018] Figure 2A A schematic diagram showing the structure of a driving circuit of a display panel provided by the related art is shown;

[0019] Figure 2B A schematic diagram showing an equivalent circuit of a pixel driving circuit provided by the related art is shown;

[0020] Figure 3 A schematic diagram showing the structure of another display panel provided by the related art is shown;

[0021] Figure 4A A schematic diagram showing the structure of a display panel provided by an embodiment of the present disclosure is shown;

[0022] Figure 4B A schematic diagram showing the structure of another display panel provided by an embodiment of the present disclosure is shown;

[0023] Figure 5A A cross-sectional schematic diagram of a display panel provided by an embodiment of the present disclosure is shown;

[0024] Figure 5B A cross-sectional schematic diagram showing another display panel provided by an embodiment of the present disclosure;

[0025] Figure 5C A cross-sectional schematic diagram of another display panel provided by an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0026] In order to make the objectives, technical solutions and advantages of the present disclosure more clearly understood, the present disclosure is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0027] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the embodiments of the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. "Including" or "comprising" and similar words mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0028] In the present disclosure, the first electrode may be a drain electrode and the second electrode may be a source electrode, or the first electrode may be a source electrode and the second electrode may be a drain electrode. In the case of using transistors with opposite polarities or when the current direction changes during circuit operation, the functions of the "source electrode" and the "drain electrode" are sometimes interchanged. Therefore, in the present disclosure, the "source electrode" and the "drain electrode" may be interchanged, and the "source terminal" and the "drain terminal" may be interchanged. In the embodiments of the present disclosure, the gate electrode may be referred to as a control electrode.

[0029] Figure 1 FIG. 1 is a schematic diagram showing the structure of a display panel 100 provided by a related technical solution. Figure 1 As shown, the OLED display panel 100 has a display area 101 (Active Area, referred to as AA area), an opening area 103, a transition area 102 and a peripheral area 104; the display area 101 surrounds the opening area 103; the transition area 102 is located between the opening area 103 and the display area 101; and the peripheral area 104 is located on the periphery of the display area 101.

[0030] The display panel 100 may include a plurality of pixel units P arranged in a matrix manner, and at least one of the plurality of pixel units P includes a first sub-pixel P emitting a first color light.1 , a second sub-pixel P emitting a second color light 2 and a third sub-pixel P emitting a third color light 3 , the first sub-pixel P 1 , the second sub-pixel P 2 and the third sub-pixel P 3 Each includes a pixel driving circuit and a light emitting device. In an exemplary embodiment, the pixel unit P may include a red (R) sub-pixel, a green (G) sub-pixel, and a blue (B) sub-pixel. The present disclosure does not limit the shape and arrangement of the sub-pixels in the pixel unit. The first sub-pixel P 1 , the second sub-pixel P 2 and the third sub-pixel P 3 The pixel driving circuit in the first sub-pixel P is connected to the scanning signal line, the data signal line and the light emitting signal line respectively, and the pixel driving circuit is configured to receive the data voltage transmitted by the data signal line under the control of the scanning signal line and the light emitting signal line, and output the corresponding current to the light emitting device. 1 , the second sub-pixel P 2 and the third sub-pixel P 3 The light emitting devices are respectively connected to the pixel driving circuits of the sub-pixels where they are located, and the light emitting devices are configured to emit light of corresponding brightness in response to the current output by the pixel driving circuits of the sub-pixels where they are located.

[0031] Figure 2A FIG. 1 is a schematic diagram showing a driving circuit structure of a display panel provided by the related art. Figure 2A As shown, the display panel 200 may include a timing controller, a data signal driver, a scan signal driver, a light emitting signal driver and a pixel array, and the timing controller is connected to the data signal driver, the scan signal driver and the light emitting signal driver respectively. The data signal driver is connected to a plurality of data signal lines (D1 to Dn), the scan signal driver is connected to a plurality of scan signal lines (S1 to Sm), and the light emitting signal driver is connected to a plurality of light emitting signal lines (E1 to Eo). The pixel array may include a plurality of sub-pixels P xij , i and j can be natural numbers, at least one sub-pixel P xijA circuit unit and a light-emitting device connected to the circuit unit may be included, and the circuit unit may include at least one scan signal line, at least one data signal line, at least one light-emitting signal line, and a pixel driving circuit. In an exemplary embodiment, the timing controller may provide a grayscale value and a control signal suitable for the specifications of the data signal driver to the data signal driver, a clock signal suitable for the specifications of the scan signal driver, a scan start signal, etc. may be provided to the scan signal driver, and a clock signal suitable for the specifications of the light-emitting signal driver, an emission stop signal, etc. may be provided to the light-emitting signal driver. The data signal driver may generate a data voltage to be provided to the data signal lines D1, D2, D3, ... and Dn using the grayscale value and the control signal received from the timing controller. For example, the data signal driver may sample the grayscale value using the clock signal, and apply the data voltage corresponding to the grayscale value to the data signal lines D1 to Dn in units of pixel rows, and n may be a natural number. The scan signal driver may generate a scan signal to be provided to the scan signal lines S1, S2, S3, ... and Sm by receiving a clock signal, a scan start signal, etc. from the timing controller. For example, the scan signal driver may sequentially provide a scan signal having an on-level pulse to the scan signal lines S1 to Sm. For example, the scan signal driver may be constructed in the form of a shift register, and may generate a scan signal in a manner that sequentially transmits a scan start signal provided in the form of an on-level pulse to a next-level circuit under the control of a clock signal, and m may be a natural number. The light-emitting signal driver may generate an emission signal to be provided to the light-emitting signal lines E1, E2, E3, ... and Eo by receiving a clock signal, an emission stop signal, etc. from a timing controller. For example, the light-emitting signal driver may sequentially provide an emission signal having an off-level pulse to the light-emitting signal lines E1 to Eo. For example, the light-emitting driver may be constructed in the form of a shift register, and may generate an emission signal in a manner that sequentially transmits an emission stop signal provided in the form of an off-level pulse to a next-level circuit under the control of a clock signal, and o may be a natural number.

[0032] In some embodiments, the pixel driving circuit may be a 3T1C, 4T1C, 5T1C, 5T2C, 6T1C or 7T1C structure. Figure 2B FIG. 1 shows an equivalent circuit diagram of a pixel driving circuit. Figure 2BAs shown, the pixel driving circuit may include 7 transistors (first transistor T1 to seventh transistor T7) and 1 storage capacitor C1, and the pixel driving circuit may be connected to 7 signal lines (data signal line Vdata, reset signal line Reset, scan signal line Gate, light emitting signal line EM, initial signal line Initial, first power line Vdd and second power line Vss). Here, the data signal line Vdata may be selected from one or more of the aforementioned D1, D2...Dn; the reset signal line Reset and the scan signal line Gate are independently selected from one or more of the aforementioned S1, S2...Sm; the light emitting signal line EM is selected from one or more of the aforementioned E1, E2...Eo. It should be understood that the 7 signal lines of different sub-pixels may specifically correspond to different signal lines, for example, the data signal line Vdata corresponding to some sub-pixels is D1, and the data signal line Vdata corresponding to some sub-pixels is D2; the reset signal line Reset corresponding to some sub-pixels is S2, and the reset signal line Reset corresponding to some sub-pixels is S3, which are not listed again.

[0033] Exemplarily, the pixel driving circuit may include a first node N1, a second node N2, and a third node N3. The second node N2 is respectively connected to the first electrode of the third transistor T3, the second electrode of the fourth transistor T4, and the second electrode of the fifth transistor T5, the first node N1 is respectively connected to the second electrode of the first transistor T1, the second electrode of the second transistor T2, the control electrode of the third transistor T3, and the second end of the storage capacitor C1, and the third node N3 is respectively connected to the first electrode of the second transistor T2, the second electrode of the third transistor T3, and the first electrode of the sixth transistor T6.

[0034] Optionally, the first transistor T1 to the seventh transistor T7 may be a P-type transistor, or may be an N-type transistor. Using the same type of transistors in the pixel driving circuit can simplify the process flow, reduce the process difficulty of the display panel, and improve the yield of the product. In some alternative embodiments, the first transistor T1 to the seventh transistor T7 may include a P-type transistor and an N-type transistor.

[0035] In some embodiments, the light emitting device may be an organic light emitting diode (OLED), including a stacked first electrode (corresponding to an anode), an organic light emitting layer, and a second electrode (corresponding to a cathode).

[0036] In an exemplary embodiment, the operation process of the pixel driving circuit may include:

[0037] like Figure 2BAs shown, in the first stage, called the reset stage, the first transistor T1 is turned on, and the signal of the initial signal line Initial is provided to the first node N1 to initialize the storage capacitor C1 and clear the original data voltage in the storage capacitor. The second transistor T2, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6 and the seventh transistor T7 are turned off, and the OLED does not emit light in this stage.

[0038] The second stage is called the data writing stage or the threshold compensation stage. The fourth transistor T4, the third transistor T3, and the second transistor T2 are turned on, and the data signal line Vdata outputs the data voltage. The data voltage output by the data signal line Vdata is provided to the first node N1 through the second node N2, the turned-on third transistor T3, the third node N3, and the turned-on second transistor T2, and the difference between the data voltage (Vd) output by the data signal line Vdata and the threshold voltage of the third transistor T3 is charged into the storage capacitor C1. The voltage at the second end (first node N1) of the storage capacitor C1 is Vd-|Vth|, where Vd is the data voltage output by the data signal line Vdata, and Vth is the threshold voltage of the third transistor T3.

[0039] The third stage is called the light-emitting stage. The fifth transistor T5 and the sixth transistor T6 are turned on. The power supply voltage Vdd output by the first power supply line Vdd provides a driving voltage to the first electrode of the OLED through the turned-on fifth transistor T5, the third transistor T3 and the sixth transistor T6, driving the OLED to emit light. According to the current formula, the driving current of the third transistor T3 is I∝[(Vdd-Vd)] 2 , ensuring that the current between pixels is not affected by Vth, achieving the technical effect of improving display uniformity. Here, I is the driving current flowing through the third transistor T3, that is, the driving current driving the OLED.

[0040] Figure 3 FIG. 2 shows a schematic diagram of the structure of another display panel provided by the related art. Figure 3As shown, in order to electrically characterize the laser cutting of the edge of the display panel, two panel crack detection (PCD) lines 3011 and 3012 are symmetrically arranged in the peripheral area 104. By connecting the PCD lines 3011 and 3012 to a certain data signal line, such as any one of D1, D2...Dn, the edge cutting effect of the display panel can be characterized. Specifically, if the edge laser cutting causes the PCD line to be broken, the difference between the data voltage (Vd) output by the data signal line Vdata and the threshold voltage of the third transistor T3 cannot be written into the first node N1 in the second stage, and then Vd in the third stage driving circuit is zero, resulting in the light-emitting device corresponding to each pixel driving unit connected to the data signal line always remaining in the light-emitting state. In this way, the effect of laser cutting can be simply and conveniently judged.

[0041] Combination Figure 1 During the manufacturing process, it is necessary to open an opening in the display area 101 to form an opening area 103. The opening area 103 is formed in a manner including but not limited to laser cutting. At present, the laser cutting effect of the opening area 103 can only be observed manually with the aid of a microscope. This method is time-consuming and labor-intensive, and affects production efficiency. It is urgent to develop a solution for effectively characterizing the laser cutting effect of the opening area 103.

[0042] Figure 4A A schematic structural diagram of a display panel provided by an embodiment of the present disclosure is shown. Figure 4B FIG. 2 is a schematic diagram showing the structure of another display panel provided by an embodiment of the present disclosure. Figure 4A and Figure 4B As shown, the display panel includes a first metal line 401 , which is connected in series to any data signal line (eg D1 , D2 , etc.) in the peripheral area 104 ; wherein part of the first metal line, such as 4011 , is located in the transition area 102 and surrounds the opening area 103 .

[0043] By connecting the first metal line 401 to a data signal line, such as any one of D1, D2, ..., Dn, the cutting effect of the opening area 103 of the display panel is characterized. Specifically, if the laser cutting of the opening area 103 causes the first metal line 401 to be disconnected, the difference between the data voltage (Vd) output by the data signal line Vdata and the threshold voltage of the third transistor T3 cannot be written into the first node N1 in the second stage, and then Vd in the third stage driving circuit is zero, resulting in the light-emitting device corresponding to each pixel driving unit connected to the data signal line always remaining in the light-emitting state. In this way, the light-emitting device always remains in the light-emitting state for easy observation by the inspection personnel, achieving the effect of convenient and quick judgment of laser cutting.

[0044] It should be noted that if the structure of the pixel driving circuit is changed or the connection method of the first metal wire is changed (for example, the first metal wire 401 is connected to any light-emitting signal line), the light-emitting device may not emit light at all after the first metal wire 401 is cut off, thereby realizing the judgment of the laser cutting effect.

[0045] It should be understood that the data signal line is usually connected to a system on chip (SoC), and the SoC has a detection port, so that the first metal line 401 can be detected by using the detection port of the SoC.

[0046] In some embodiments, Figure 4A and Figure 4B As shown, the first metal line 401 includes a wrapping line 4011 and two connecting lines 4012 and 4013. Furthermore, the wrapping line 4011 is located in the transition area 102 and surrounds the opening area 103, which plays the role of indicating the cutting position. The two connecting lines 4012 and 4013 are respectively connected to the two ends of the wrapping line 4011, and the ends of the connecting lines 4012 and 4013 away from the wrapping line 4011 are located in the surrounding area 104. The wrapping line can be led out to the surrounding area 104 by using the connecting lines 4012 and 4013, so as to connect any data signal line without changing the layout of the data signal lines in the display area 101, thereby conveniently performing electrical characterization on the cutting effect of the opening area 103.

[0047] Combination Figure 4A and Figure 4B , the display panel is extended in a first direction (e.g., an x-axis direction) and a second direction (e.g., a y-axis direction) that intersect each other. Optionally, a plurality of data signal lines D1, D2, etc. are arranged in the first direction, and each data signal line D1, D2, etc. extends in the second direction. Based on this, the connecting lines 4012, 4013 extend in the second direction. Here, the connecting lines 4012, 4013 and the data signal lines extend in the same direction, which facilitates the first metal line 401 to be connected to the data signal line in a simple routing, thereby shortening the routing length.

[0048] In some embodiments, Figure 4A As shown, the peripheral area 104 includes a binding area 403, and the connecting lines 4012 and 4013 are arranged on one side of the opening area 103 close to the binding area 403. Such an arrangement helps to reduce the length of the first metal line 401 while ensuring that the first metal line 401 is connected to any data signal line in the peripheral area 104.

[0049] In some alternative embodiments, such as Figure 4BAs shown, the display panel also includes second metal wires 4021, 4022, which are located in the peripheral area 104 and surround the display area 103; the first metal wire 401 is connected to the second metal wires 4021, 4022 and is connected in series to any data signal line, such as D1, D2, etc. through the second metal wires 4021, 4022. It should be understood that the second metal wires 4021, 4022 can be used to electrically characterize the cutting effect of the edge of the display panel, and are connected to any data signal line. The specific connection method is not described in detail in this disclosure. With such a solution, the data signal lines are connected with the help of the second metal wires 4021, 4022, and only the connecting wires 4012, 4013 need to be extended to the peripheral area closest to the opening area 103, which helps to reduce the layout length of the first metal wire 401.

[0050] Optionally, the second metal lines 4021 and 4022 are located on a side of the peripheral area 104 away from the display area 103 , which is beneficial for characterizing the cutting effect of the display panel.

[0051] like Figure 4B As shown, the second metal wires 4021, 4022 include a first wire group 4021 and a second wire group 4022 separated from each other. Here, the first wire group 4021 and the second wire group 4022 are respectively arranged on both sides of the display panel, for example, on both sides of the symmetry axis in the x-axis direction, so as to facilitate the characterization of the cutting conditions on both sides of the display panel. Further, the first metal wire 401 is connected to any one of the first wire group 4021 and the second wire group 4022, for example, the first wire group 4021 or the second wire group 4022, and the present disclosure does not limit this.

[0052] Figure 5A to Figure 5C A cross-sectional schematic diagram of a display panel provided by an embodiment of the present disclosure is shown. Figure 5A yes Figure 4A and Figure 4B A schematic cross-sectional view of a display area 101 and a transition area 102; Figure 5B yes Figure 4A A schematic cross-sectional view of a display area 101 and a surrounding area 104; Figure 5C yes Figure 4B A schematic cross-sectional view of the display area 101 and the surrounding area 104. Figure 5A to Figure 5CAs shown, on a plane perpendicular to the display panel, that is, in a direction perpendicular to the plane where the x-axis and the y-axis are located, the display panel includes a first substrate 501, a first barrier layer (Barrier1) 502, and a second substrate 503 that are stacked. Further, a second barrier layer (Barrier2) and a buffer layer 504, a driving circuit layer 505, a flat layer 506, a light emitting structure layer 507, and an encapsulation layer 508 are provided on the side of the second substrate 503 away from the first substrate 501. In some possible implementations, the display substrate may include other film layers, such as a dielectric layer, etc., which are not limited in the present disclosure.

[0053] In some embodiments, the first substrate 501 and the second substrate 503 may be flexible substrates, or may be rigid substrates, which is not limited in the present disclosure. Exemplarily, the first substrate 501 and the second substrate 503 are flexible substrates, and the materials thereof may be polyimide (PI).

[0054] In some embodiments, a first metal line 401 is disposed between the first substrate 501 and the second substrate 503. Figure 5A As shown, the dotted line CC represents the cutting line of the opening area 103, and the transition area 102 is located between the opening area and the display area 101. The surrounding line of the first metal line 401 is only arranged in the transition area 102. Figure 5B and Figure 5C As shown, the first metal line 401 extends from the display area 101 to the peripheral area 104 .

[0055] The first metal line 401 is disposed between the first substrate 501 and the second substrate 503 , so that the frame size of the transition region 103 is not increased, which is conducive to maximizing the display area.

[0056] In some embodiments, the driving circuit layer 505 is located on a side of the second substrate 503 away from the first metal layer 401. The driving circuit layer 505 includes a plurality of transistors constituting a pixel driving circuit, such as T1, T2, T3, etc. and a storage capacitor C1. Optionally, the driving circuit layer 505 may also include Vdata, a reset signal line Reset, a scanning signal line Gate, a light emitting signal line EM, an initial signal line Initial, a first power line Vdd, and a second power line Vss, etc.

[0057] Furthermore, the driving circuit layer 505 includes a first electrode layer (not shown in the figure), such as a gate layer of a transistor, wherein the second metal wires 4021, 4022 are arranged in the same layer as the first electrode layer. Such a technical solution is helpful to reduce the manufacturing steps and improve the manufacturing efficiency.

[0058] In some embodiments, the light-emitting structure layer 507 may include an anode, a pixel definition layer, an organic light-emitting layer and a cathode. The anode is connected to the drain electrode of the driving transistor through a via, the organic light-emitting layer is connected to the anode, and the cathode is connected to the organic light-emitting layer. The organic light-emitting layer emits light of corresponding color when driven by the anode and the cathode.

[0059] In some embodiments, the encapsulation layer 508 may include a plurality of stacked encapsulation layers, such as a first encapsulation layer, a second encapsulation layer, and a third encapsulation layer. The encapsulation layer 508 can ensure that external water vapor cannot enter the light emitting structure layer 507, thereby ensuring the performance and service life of the display panel.

[0060] In some embodiments, the organic light-emitting layer may include a stacked hole injection layer (HIL), a hole transport layer (HTL), an electron blocking layer (EBL), an emitting layer (EML), a hole blocking layer (HBL), an electron transport layer (ETL) and an electron injection layer (EIL).

[0061] In some embodiments, Figure 5A As shown, the transition area 102 includes at least one crack dam 511, at least one isolation column 509 and a blocking dam 510. It should be noted that the blocking dam 510 is located on the side of the crack dam 511 away from the hole area and the isolation column 509 is close to the hole area. The crack dam 511 can prevent the crack from extending to the display area 101 to avoid poor display. The isolation column 509 provides support and protection for the film layer. The blocking dam 510 can limit the material boundary of the encapsulation layer, and can also provide certain support and protection.

[0062] In some embodiments, the distance between the crack dam 511 closest to the opening area and the opening area is greater than the distance between the first metal line 401 located in the transition area 102 and the opening area. This solution ensures that the first metal line 401 is close to the cutting line CC, which is convenient for effectively characterizing the cutting effect.

[0063] In combination with the above, the data signal line can be located in the driving circuit layer 505, that is, located on the side of the second substrate 503 away from the first substrate 501; in order to achieve conduction between the first metal line 401 and the data signal line, as Figure 5B and Figure 5CAs shown, the second substrate 503 in the peripheral area 104 is provided with a connection hole 5031, and the first metal line 401 is connected to the data signal line through the connection hole 5031. The connection hole 5031 is used to connect the first metal line 401 and the data signal line, which is simple and convenient.

[0064] It should be noted that the data signal line can be directly connected using the connection hole 5031 (refer to Figure 4A ), or indirectly connect the data signal line (reference Figure 4B , the connection hole 5031 is connected to the second metal line 4021, and then the data signal line is connected through the second metal line 4021), which is not limited in the present disclosure.

[0065] In some embodiments, the orthographic projection of the connection hole 5031 on the first substrate 501 does not overlap with the orthographic projection of the encapsulation layer 508 on the first substrate 501. In such a technical solution, the arrangement of the connection hole 5031 does not affect the encapsulation layer 508, which can minimize the impact on the stability of the display panel.

[0066] Based on the same inventive concept, corresponding to any of the above embodiments, the present disclosure also provides a display panel. Figure 4A and Figure 4B As shown, the display panel includes a display area 101, an opening area 103, a transition area 102 and a peripheral area 104; the transition area 102 is located between the opening area 103 and the display area 101; and the peripheral area 104 is located at the periphery of the display area 101;

[0067] Further, refer to Figure 2A The display panel includes a pixel driving circuit and a plurality of data signal lines D1, D2, D3, ..., Dn arranged in an array; the data signal line is connected to at least one pixel driving circuit; Figure 4A and Figure 4B The display panel further includes a first metal line 401, which is connected in series with any data signal line in the peripheral area 104; wherein part of the first metal line 401 is located in the transition area 102 and surrounds the opening area 103. With this technical solution, the cutting effect of the opening area 103 can be electrically characterized by means of the first metal line 401.

[0068] In some embodiments, Figure 4A and Figure 4B As shown, the first metal line 401 includes a wrapping line 4011 and two connecting lines 4012 and 4013; wherein the wrapping line 4011 is located in the transition area 102, the two connecting lines 4012 and 4013 respectively connect the two ends of the wrapping line 4011, and the end of the connecting lines 4012 and 4013 away from the wrapping line 4011 is located in the peripheral area 104.

[0069] In some embodiments, the peripheral region 104 includes a binding region 403 , and the connection lines 4012 , 4013 are disposed on a side of the opening region 103 close to the binding region 403 .

[0070] In some embodiments, Figure 5A As shown, the transition region 102 includes at least one crack dam 511 ; the distance between the crack dam 511 closest to the opening region 103 and the opening region 103 is greater than the distance between the first metal line 401 located in the transition region 102 and the opening region 103 .

[0071] In some embodiments, the display panel includes a first substrate 501 and a second substrate 503 ; wherein the first metal line 401 is located between the first substrate 501 and the second substrate 503 .

[0072] In some embodiments, the data signal line is located on a side of the second substrate 503 away from the first substrate 501 ; the second substrate 503 located in the peripheral area 104 is provided with a connection hole 5031 , and the first metal line 401 is conductively connected to the data signal line, such as D1 , D2 , D3 or Dn, through the connection hole 5031 .

[0073] In some embodiments, the display panel further includes an encapsulation layer 508 ; the encapsulation layer 508 is located on a side of the data signal line away from the second substrate 503 ; the orthographic projection of the connection hole 5031 on the first substrate 501 and the orthographic projection of the encapsulation layer 508 on the first substrate 501 do not overlap.

[0074] In some embodiments, the display panel further includes second metal lines 4021 , 4022 , which are located in the peripheral area 104 and surround the display area 101 ; the first metal line 401 is connected to the second metal lines 4021 , 4022 and is connected in series to any data signal line through the second metal lines 4021 , 4022 .

[0075] In some embodiments, the second metal lines 4021 and 4022 include a first line group 4021 and a second line group 4022 respectively disposed on both sides of the display panel; wherein the first metal line 401 is connected to any one of the first line group 4021 and the second line group 4022 .

[0076] In some embodiments, the display panel further includes a driving circuit layer 505; the driving circuit layer includes a first electrode layer; wherein the second metal wires 4021, 4022 and the first electrode layer are disposed in the same layer.

[0077] Based on any of the above display panels, the cutting effect of the opening area 103 can be detected. The embodiment of the present disclosure also provides a method for detecting a display panel, including:

[0078] Providing a display panel having an opening area 103 formed by cutting;

[0079] Providing control signals to each pixel driving circuit;

[0080] The conduction state of the first metal line is determined according to the display state of the pixel unit controlled by the data signal line connected in series with the first metal line. Here, the data signal line controls a column of pixel units. If the column of pixel units is always bright, it means that the driving current I of the column is kept at the maximum, and the data voltage Vdata is not written normally, indicating that the first metal line is cut and broken, and the cutting is poor. If the column of pixel units does not show different brightness, it means that the first metal line is cut normally.

[0081] The detection method of the above embodiment has the beneficial effects of the corresponding display panel embodiment, which will not be described in detail here.

[0082] Based on the same inventive concept, corresponding to any of the above embodiments, the present disclosure further provides a display device, including any of the above display panels. The display device has the beneficial effects of the corresponding display panel embodiments, which will not be described in detail here.

[0083] Those skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of the present disclosure (including the claims) is limited to these examples. Based on the concept of the present disclosure, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of the different aspects of the embodiments of the present disclosure as described above, which are not provided in detail for the sake of simplicity.

[0084] The embodiments of the present disclosure are intended to cover all such substitutions, modifications and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present disclosure should be included in the scope of protection of the present disclosure.

Claims

1. A display panel, characterized in that: The display panel comprises a display area, an opening area, a transition area and a peripheral area; the transition area is located between the opening area and the display area; the peripheral area is located at the periphery of the display area; The display panel comprises a pixel driving circuit and a plurality of data signal lines arranged in an array; the data signal line is connected to at least one pixel driving circuit; The display panel further includes a first metal line, which is connected in series with any of the data signal lines in the peripheral area; wherein a portion of the first metal line is located in the transition area and surrounds the opening area.

2. The display panel according to claim 1, characterized in that: The first metal wire includes a wrapping wire and two connecting wires; wherein, The surrounding line is located in the transition area, the two connecting lines are respectively connected to two ends of the surrounding line, and one end of the connecting line away from the surrounding line is located in the peripheral area.

3. The display panel according to claim 2, characterized in that: The peripheral area includes a binding area, and the connection line is arranged on a side of the opening area close to the binding area.

4. The display panel according to claim 1, characterized in that: The transition region includes at least one crack dam; the distance between the crack dam closest to the opening region and the opening region is greater than the distance between the first metal line located in the transition region and the opening region.

5. The display panel according to claim 1, characterized in that: The display panel includes a first substrate and a second substrate; wherein, The first metal line is located between the first substrate and the second substrate.

6. The display panel according to claim 5, characterized in that: The data signal line is located on a side of the second substrate away from the first substrate; The second substrate located in the peripheral area is provided with a connection hole, and the first metal line is conductively connected to the data signal line through the connection hole.

7. The display panel according to claim 6, characterized in that: The display panel further comprises an encapsulation layer; the encapsulation layer is located on a side of the data signal line away from the second substrate; An orthographic projection of the connection hole on the first substrate and an orthographic projection of the packaging layer on the first substrate have no overlap.

8. The display panel according to claim 1, characterized in that: The display panel further includes a second metal line, which is located in the peripheral area and surrounds the display area; the first metal line is connected to the second metal line and is connected in series to any data signal line through the second metal line.

9. The display panel according to claim 8, characterized in that: The second metal line includes a first line group and a second line group respectively disposed on both sides of the display panel; wherein the first metal line is connected to any one of the first line group and the second line group.

10. The display panel according to claim 8, characterized in that: The display panel further includes a driving circuit layer; the driving circuit layer includes a first electrode layer; wherein the second metal wire and the first electrode layer are arranged in the same layer.

11. A method for detecting a display panel, characterized in that: The display panel comprises a display area, an opening area, a transition area and a peripheral area; the transition area is located between the opening area and the display area; the peripheral area is located at the periphery of the display area; The display panel comprises a pixel driving circuit and a plurality of data signal lines arranged in an array; the data signal line is connected to at least one pixel driving circuit; The display panel further comprises a first metal line, wherein the first metal line is connected in series with any of the data signal lines in the peripheral area; wherein a portion of the first metal line is located in the transition area and surrounds the opening area; The detection method comprises: Providing a display panel that is cut to form an opening area; Providing a control signal to each of the pixel driving circuits; The conduction state of the first metal line is determined according to the display state of the pixel unit controlled by the data signal line connected in series to the first metal line.

12. A display device, characterized in that: The display panel comprises the display panel according to any one of claims 1 to 10.

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