A back-contact battery with a specific anti-reflection composite layer, its preparation and application

Abstract

The present invention belongs to the technical field of back contact batteries, and specifically relates to a back contact battery with a specific anti-reflection composite layer and its preparation and application, including a silicon wafer, a first semiconductor layer and a second semiconductor layer alternately arranged on the back of the silicon wafer, a passivation layer and an anti-reflection composite layer sequentially arranged on the front of the silicon wafer, the anti-reflection composite layer includes silicon nitride and carbon-doped silicon oxide sequentially arranged on the outer surface of the passivation layer, the corrosion rate of the carbon-doped silicon oxide in a hydrofluoric acid solution with a mass concentration of 5wt% is below 1.5Å / s, the thickness of the carbon-doped silicon oxide is 60-150nm, and the thickness ratio of silicon nitride to carbon-doped silicon oxide is 1:(0.5-2). The present invention is conducive to improving the stability and production yield of the film layer while taking into account the optical effect, increasing the short-circuit current, and improving the battery efficiency.

Description

Technical Field

[0001] The present invention belongs to the technical field of back contact batteries, and in particular relates to a back contact battery with a specific anti-reflection composite layer and a preparation method and application thereof. Background Art

[0002] The current back-contact battery process with relatively low equipment cost is as follows: S101, providing a silicon wafer with a single-sided textured and single-sided polished structure; S102, sequentially coating the first semiconductor layer and the first mask layer on the back of the silicon wafer; S103, laser or etching an opening on the back of the silicon wafer, removing the first mask layer and part of the first semiconductor layer, and forming a second semiconductor opening area; S104, cleaning the silicon wafer, and removing the first semiconductor layer in the second semiconductor opening area; S105, forming a third semiconductor layer on the front side, the third semiconductor layer comprising a front passivation layer and an anti-reflection layer, the front passivation layer comprising an intrinsic amorphous silicon layer and an N-type doped non- A crystalline or microcrystalline silicon layer, wherein the anti-reflection layer is at least one of silicon nitride, silicon oxynitride, and silicon oxide; S106, removing the back-surface coating, and cleaning to further purify the second semiconductor opening area; S107, forming a second semiconductor layer on the back of the silicon wafer; S108, laser or etching openings on the back of the silicon wafer to form first semiconductor regions alternately arranged with the second semiconductor regions; S109, depositing a conductive film on the back of the silicon wafer; S110, forming an isolation groove between the first semiconductor region and the second semiconductor region by laser or etching; S111, forming metal electrodes on the first semiconductor region and the second semiconductor region of the silicon wafer.

[0003] However, in the existing back-contact battery, after the passivation layer and the anti-reflection layer are formed on the front side, there will be a certain amount of plating layer on the back side, which needs to be removed by wet chemical cleaning. In order to ensure a good anti-reflection effect, the existing anti-reflection layer generally uses at least a nitrogen-rich silicon nitride film layer (nitrogen-rich means that the nitrogen content is relatively high, and the refractive index of nitrogen-rich silicon nitride is generally below 1.98). The nitrogen-rich silicon nitride film layer generally has poor resistance to solution corrosion. When the concentration of the solution fluctuates due to factors such as liquid replenishment or temperature, the film thickness of the anti-reflection layer will fluctuate greatly, the anti-reflection effect will be greatly reduced, the short-circuit current density of the battery will be greatly affected, and the production yield will be low.

[0004] It should be noted that this part of the present invention only provides background technology related to the present invention and does not necessarily constitute prior art or known technology. Summary of the invention

[0005] The purpose of the present invention is to overcome the defects of the prior art that the back-contact battery has poor anti-reflection effect, low short-circuit current and low production yield, and to provide a back-contact battery with a specific anti-reflection composite layer and its preparation and application, which is beneficial to taking into account the optical effect while improving the stability of the film layer and the production yield, increasing the short-circuit current and improving the battery efficiency.

[0006] To achieve the above object, in a first aspect, the present invention provides a back-contact battery having a specific anti-reflection composite layer, including a silicon wafer, a first semiconductor layer and a second semiconductor layer alternately arranged on the back surface of the silicon wafer, and a passivation layer and an anti-reflection composite layer sequentially arranged on the front surface of the silicon wafer. The anti-reflection composite layer includes silicon nitride and carbon-doped silicon oxide sequentially arranged on the outer surface of the passivation layer. The etching rate of the carbon-doped silicon oxide in a hydrofluoric acid solution with a mass concentration of 5 wt% is below 1.5 Å / s. The thickness of the carbon-doped silicon oxide is 60-150 nm, and the thickness ratio of silicon nitride to carbon-doped silicon oxide is 1:(0.5-2).

[0007] In some preferred embodiments of the present invention, the total thickness of the anti-reflection composite layer is 100-250 nm.

[0008] In some preferred embodiments of the present invention, the thickness of the silicon nitride is 50-120 nm.

[0009] In some preferred embodiments of the present invention, the refractive index of the silicon nitride is 2.0-2.2, and / or the refractive index of the carbon-doped silicon oxide is 1.3-1.6.

[0010] In some preferred embodiments of the present invention, the carbon doping concentration of the carbon-doped silicon oxide is 1×10 19 cm -3 -9×10 21 cm -3 .

[0011] In some preferred embodiments of the present invention, the carbon doping concentration of the carbon-doped silicon oxide is the same in the thickness direction.

[0012] In some preferred embodiments of the present invention, the carbon doping concentration of the carbon-doped silicon oxide gradually increases in the thickness direction away from the silicon wafer, and its carbon doping concentration ranges from 1×10 19 cm -3 -9×10 21 cm -3 within the range.

[0013] In some preferred embodiments of the present invention, the increasing amplitude of the carbon doping concentration of the carbon-doped silicon oxide satisfies: in the thickness direction, the absolute value of the difference between adjacent different carbon doping concentrations is within 5×10 19 cm -3 -1×10 21 cm -3 .

[0014] In some preferred embodiments of the present invention, the passivation layer is at least one of amorphous silicon, oxygen-doped amorphous silicon, phosphorus-doped amorphous silicon, silicon oxide and aluminum oxide film layers, and / or the thickness of the passivation layer is 1-10 nm.

[0015] In some preferred embodiments of the present invention, the passivation layer is a combination of silicon oxide and aluminum oxide.

[0016] Further preferably, the thickness ratio of silicon oxide to carbon-doped silicon oxide is 1:(40 - 150).

[0017] Further preferably, the thickness of silicon oxide is 1 - 2 nm, and the thickness of aluminum oxide is 3 - 5 nm.

[0018] In some preferred embodiments of the present invention, both ends of the second semiconductor layer extend outwardly to cover a part of the back surface of the adjacent first semiconductor layer, and a first semiconductor opening region that does not cover the second semiconductor layer is formed on the back surface of the first semiconductor layer. A second semiconductor opening region is formed between adjacent first semiconductor layers. The second semiconductor opening region and the first semiconductor opening region are arranged at intervals, and the region between them is an interval region; in the interval region, a mask layer is provided or not provided between the first semiconductor layer and the second semiconductor layer; the back contact battery further includes a metal electrode and a conductive film layer laid on the outer surfaces of the first semiconductor layer and the second semiconductor layer. An isolation groove is formed on a part of the conductive film layer located in the interval region; the metal electrode is provided on the outer surfaces of the respective corresponding conductive film layers of the second semiconductor opening region and the first semiconductor opening region.

[0019] In some preferred embodiments of the present invention, the first semiconductor layer includes a tunneling oxide layer and a first doped polysilicon layer, and the second semiconductor layer includes an intrinsic silicon layer and a second doped silicon layer.

[0020] Second, the present invention provides a method for manufacturing a back contact battery with a specific anti-reflection composite layer, including the following steps:

[0021] S1. Provide a double-sided polished silicon wafer;

[0022] S2. Sequentially form a first semiconductor layer and a mask layer on the back surface of the silicon wafer;

[0023] S3. Perform a first etching opening on the back surface obtained in S2 to form a second semiconductor opening region;

[0024] S4. Through texturing cleaning, to form a textured surface on the front surface of the silicon wafer and the second semiconductor opening region;

[0025] S5. Sequentially provide a passivation layer and an anti-reflection composite layer on the front surface of the silicon wafer. The anti-reflection composite layer includes silicon nitride and carbon-doped silicon oxide sequentially provided on the outer surface of the passivation layer. The etching rate of the carbon-doped silicon oxide in a hydrofluoric acid solution with a mass concentration of 5 wt% is below 1.5 Å / s. The thickness of the carbon-doped silicon oxide is 60 - 150 nm, and the thickness ratio of silicon nitride to carbon-doped silicon oxide is 1:(0.5 - 2);

[0026] S6. Adopt the laser edge cleaning process to remove the circumferential coating on the back edge of the silicon wafer; then use the solution etching method to clean the second semiconductor opening area;

[0027] S7. Deposit the second semiconductor layer on the back surface.

[0028] In some preferred embodiments of the present invention, the width of the laser edge cleaning in S6 is 0.5 - 2 cm, and the laser edge cleaning time t1 is 5 - 25 s.

[0029] In some preferred embodiments of the present invention, the laser edge cleaning time t1 in S6, the coating time t0 used in the front - side carbon - doped silicon oxide preparation, and the value of the methane flow rate L in sccm satisfy: t1 = a×t0 + b×L, where t1 and t0 are values in seconds, and both a and b are coefficients, a is 0.005 - 0.025, and b is 0.001 - 0.003.

[0030] In some preferred embodiments of the present invention, the laser etching depth of the laser edge cleaning in S6 is 1 - 10 nm.

[0031] In some preferred embodiments of the present invention, the conditions of the laser edge cleaning include: the laser used is ultraviolet picosecond laser or green picosecond laser, the pulse width of the laser is less than 5 ns, the laser power is 8 - 20 W, the light spot is a shaped square light spot, the side length of the light spot is 100 - 150 μm, and the light spot overlap rate is less than 30%.

[0032] In some preferred embodiments of the present invention, the solution etching method in S6 uses hydrofluoric acid solution, the mass concentration of hydrofluoric acid in the hydrofluoric acid solution is 1% - 10%, and the conditions of the solution etching method include: the treatment temperature is 20°C - 30°C, and the cleaning time is 30 - 200 s.

[0033] In some preferred embodiments of the present invention, silicon nitride and carbon - doped silicon oxide are deposited by PECVD equipment, and the deposition temperature is controlled at 350 - 600°C. Among them, the conditions for depositing silicon nitride include: introducing silane and ammonia, the flow rate of silane is 800 - 2000 sccm, the flow rate of ammonia is 6000 - 15000 sccm, the deposition pressure is 1300 - 2500 mtorr, and the power is 5 kw - 20 kw; the conditions for depositing carbon - doped silicon oxide include: introducing silane, nitrous oxide, and methane, the flow rate of silane is 100 - 1000 sccm, the flow rate of nitrous oxide is 6000 - 20000 sccm, the flow rate of methane is 500 - 5000 sccm, the deposition pressure is 1300 - 2500 mtorr, and the power is 5 kw - 20 kw.

[0034] In some preferred embodiments of the present invention, the preparation method of the back - contact battery with a specific anti - reflection composite layer further includes:

[0035] S8. Perform a second etching opening on a part of the second semiconductor layer on the back of the silicon wafer to form a first semiconductor opening region arranged at intervals with the second semiconductor opening region;

[0036] S9. Deposit a conductive film layer on the obtained back surface in S8;

[0037] S10. Perform a third etching opening on a part of the conductive film layer between the first semiconductor opening region and the second semiconductor opening region to form an isolation groove;

[0038] S11. Form metal electrodes on the outer surfaces of the corresponding conductive film layers in the regions where the first semiconductor opening region and the second semiconductor opening region are located respectively.

[0039] In a third aspect, the present invention provides a back contact battery, which is prepared by the preparation method of the back contact battery with a specific anti-reflection composite layer described in the second aspect.

[0040] In a fourth aspect, the present invention provides a photovoltaic module, which includes the back contact battery with a specific anti-reflection composite layer described in the first aspect, or includes the back contact battery described in the third aspect.

[0041] Beneficial effects:

[0042] Through the above technical solutions, especially by setting an anti-reflection composite layer including silicon nitride and a specific carbon-doped silicon oxide, the corrosion rate of the carbon-doped silicon oxide in a hydrofluoric acid solution with a mass concentration of 5wt% is below 1.5 Å / s, and it has strong resistance to chemical solutions (such as acids and alkalis), can maintain a stable film thickness and anti-reflection effect. Coupled with the combination with silicon nitride, it can take into account the passivation performance and optical effect. By controlling the appropriate film thickness ratio of silicon nitride and carbon-doped silicon oxide and the appropriate corrosion rate of carbon-doped silicon oxide, it is beneficial to improve the stability and production yield of the film layer while taking into account the optical effect, increase the short-circuit current, and improve the battery efficiency.

[0043] During the preparation, when depositing the anti-reflection layer on the front side, there will be a film layer wrapped around the edge of the back of the silicon wafer and the second semiconductor opening region. If not removed, it will affect the conductivity of the first semiconductor region and the passivation effect of the second semiconductor region, affecting the overall production yield. Because the carbon-doped silicon oxide has strong corrosion resistance, in the texturing cleaning solution, it can neither be corroded by strong alkalis nor easily corroded by strong acids, and the film layer wrapped around the back is difficult to be corroded by the solution. For this reason, in the preparation method of the present invention, in S6, a laser edge sweeping process is adopted to sweep away the wrapped film layer on the edge of the back of the silicon wafer, avoiding damage to the first semiconductor layer caused by long-term corrosion with the solution, and then the solution corrosion method is used to clean the second semiconductor opening region to remove the slight wrapped film layer in the second semiconductor opening region. Description of the drawings

[0044] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments are briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.

[0045] Figure 1 It is a schematic structural diagram of a specific embodiment of the back contact battery of the present invention.

[0046] Description of Reference Numerals

[0047] Silicon wafer 1, tunneling silicon oxide layer 2, N-type doped polysilicon layer 3, passivation layer 5, anti-reflection composite layer 6, silicon nitride 6.1, carbon-doped silicon oxide 6.2, intrinsic hydrogenated amorphous silicon layer 7, P-type doped amorphous silicon layer 8, transparent conductive film layer 9, metal electrode 10. First semiconductor opening area W1, second semiconductor opening area W2, isolation trench W3. DETAILED DESCRIPTION

[0048] In the present invention, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0049] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being "above", "above" or "above" a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being "below", "below" or "below" a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0050] The endpoints and any values of the ranges disclosed herein are not limited to the precise ranges or values, and these ranges or values should be understood to include values close to these ranges. For numerical ranges, the endpoint values of each range, the endpoint values of each range and the individual point values, and the individual point values can be combined with each other to obtain one or more new numerical ranges, which should be considered as specifically disclosed in this article. Among them, the terms "optional" and "optional" all mean that they may be included or not included (or may be present or not).

[0051] In the present invention, the side close to the silicon wafer is defined as the inner side, and the side far from the silicon wafer is defined as the outer side.

[0052] In a first aspect, the present invention provides a back-contact battery having a specific anti-reflection composite layer, including a silicon wafer, a first semiconductor layer and a second semiconductor layer alternately disposed on the back surface of the silicon wafer, a passivation layer and an anti-reflection composite layer sequentially disposed on the front surface of the silicon wafer. The anti-reflection composite layer includes silicon nitride and carbon-doped silicon oxide sequentially disposed on the outer surface of the passivation layer. The corrosion rate of the carbon-doped silicon oxide in a hydrofluoric acid solution with a mass concentration of 5 wt% is below 1.5 Å / s. The thickness of the carbon-doped silicon oxide is 60 - 150 nm, and the thickness ratio of the silicon nitride to the carbon-doped silicon oxide is 1:(0.5 - 2).

[0053] The corrosion rate of the carbon-doped silicon oxide in a hydrofluoric acid solution with a mass concentration of 5 wt% is below 1.5 Å / s. For example, it can be below 1.5 Å / s, below 1.3 Å / s, below 1.2 Å / s, below 1.1 Å / s, below 1.0 Å / s, below 0.9 Å / s, below 0.8 Å / s, below 0.7 Å / s, below 0.5 Å / s, below 0.3 Å / s or below 0.2 Å / s, preferably below 0.90 Å / s.

[0054] The thickness ratio of the silicon nitride to the carbon-doped silicon oxide is 1:(0.5 - 2). For example, it can be 1:0.5, 1:0.6, 1:0.7, 1:0.8, 1:0.9, 1:1.0, 1:1.2, 1:1.5, 1:1.7 or 1:2 and the range between any two point values, preferably 1:(0.9 - 2).

[0055] In some preferred embodiments of the present invention, the total thickness of the anti-reflection composite layer is 100 - 250 nm. For example, it can be 100 nm, 120 nm, 150 nm, 170 nm, 180 nm, 190 nm, 200 nm, 210 nm, 220 nm, 230 nm, 240 nm or 250 nm and the range between any two point values. Using an anti-reflection composite layer with an appropriate thickness is more conducive to reducing the absorption of the front film layer.

[0056] In some preferred embodiments of the present invention, the thickness of the silicon nitride is 50 - 120 nm.

[0057] In some preferred embodiments of the present invention, the refractive index of the silicon nitride is 2.0 - 2.2, and / or the refractive index of the carbon-doped silicon oxide is 1.3 - 1.6. Using silicon nitride and carbon-doped silicon oxide with appropriate refractive indices is more conducive to improving the anti-reflection effect of the composite film layer and increasing the current density of the battery.

[0058] In some preferred embodiments of the present invention, the carbon doping concentration of the carbon-doped silicon oxide is 1×10 19cm -3 -9×10 21 cm -3 Using carbon-doped silicon oxide with a suitable carbon doping concentration is more conducive to improving the corrosion resistance of carbon-doped silicon oxide.

[0059] In some preferred embodiments of the present invention, the carbon doping concentration of carbon-doped silicon oxide is the same in the thickness direction.

[0060] In some preferred embodiments of the present invention, the carbon doping concentration of carbon-doped silicon oxide gradually increases in the thickness direction along the direction away from the silicon wafer, and its carbon doping concentration ranges from 1×10 19 cm -3 -9×10 21 cm -3 Adopting this preferred solution of the present invention is more conducive to ensuring the corrosion resistance of carbon-doped silicon oxide while not increasing the optical absorption of the film layer.

[0061] In some preferred embodiments of the present invention, the increasing amplitude of the carbon doping concentration of carbon-doped silicon oxide satisfies: in the thickness direction, the absolute value of the difference between adjacent different carbon doping concentrations is within 5×10 19 cm -3 -1×10 21 cm -3 and preferably 6×10 19 cm -3 -1×10 21 cm -3 Adopting this preferred solution of the present invention, the increasing amplitude of the carbon doping concentration is appropriate, which is more conducive to adjusting the appropriate refractive index and taking into account the corrosion resistance and optical properties.

[0062] The way in which the carbon doping concentration of the carbon-doped silicon oxide of the present invention gradually increases can be a uniform increase or a non-uniform increase. The former is preferred, and a uniform increase is more conducive to ensuring the stability and uniformity of the coating.

[0063] In some preferred embodiments of the present invention, the passivation layer is at least one of amorphous silicon, oxygen-doped amorphous silicon, phosphorus-doped amorphous silicon, silicon oxide, and aluminum oxide film layers.

[0064] Preferably, the thickness of the passivation layer is 1 - 10 nm.

[0065] In some preferred embodiments of the present invention, the passivation layer is a combination of silicon oxide and aluminum oxide. Adopting this preferred solution of the present invention is more conducive to improving the passivation effect of the film layer and the reliability of the product.

[0066] Further preferably, the thickness ratio of silicon oxide to carbon-doped silicon oxide is 1:(40 - 150), more preferably 1:(60 - 150), and further preferably 1:(80 - 150), which is more conducive to improving the passivation effect and antireflection effect of the film layer.

[0067] Further preferably, the thickness of silicon oxide is 1 - 2 nm, and the thickness of aluminum oxide is 3 - 5 nm.

[0068] Preferably in the present invention, the first semiconductor layer includes a first passivation layer and a first doped silicon layer, the second semiconductor layer includes a second passivation layer and a second doped silicon layer, and the first passivation layer and the second passivation layer are independently a tunneling oxide layer or an intrinsic silicon layer. The first doped silicon layer and the second doped silicon layer are independently polysilicon, amorphous silicon or microcrystalline silicon. The second doped silicon layer can be doped amorphous silicon or microcrystalline silicon. The intrinsic silicon layer is preferably an intrinsic amorphous silicon layer (such as an intrinsic hydrogenated amorphous silicon layer). One of the first doped polysilicon layer and the second doped silicon layer is N-type, and the other is P-type.

[0069] In some preferred embodiments of the present invention, the first semiconductor layer includes a tunneling oxide layer and a first doped polysilicon layer, and the second semiconductor layer includes an intrinsic silicon layer and a second doped silicon layer. Adopting a combined passivation structure and cooperating with the specific passivation layer and antireflection composite layer of the present invention is more conducive to improving the conversion efficiency of the battery.

[0070] Further preferably, the thicknesses and corresponding doping concentrations of the tunneling oxide layer or the intrinsic silicon layer, the first doped polysilicon layer and the second doped silicon layer in the present invention can respectively refer to the ranges of the prior art and can all be used in the present invention. Exemplarily, the thickness of the tunneling oxide layer is 1 - 2 nm, and the thickness of the intrinsic silicon layer is 5 - 15 nm; the thickness of the second doped silicon layer is 7 - 45 nm, and the effective doping concentration is 2×10 18 cm -3 -3×10 20 cm -3 , the thickness of the first doped polysilicon layer is 80 - 150 nm, and the effective doping concentration is greater than 5×10 18 cm -3 .

[0071] In some preferred embodiments of the present invention, both ends of the second semiconductor layer extend outward to cover a part of the back surface of the adjacent first semiconductor layer, and a first semiconductor opening area that does not cover the second semiconductor layer is formed on the back surface of the first semiconductor layer. A second semiconductor opening area is formed between adjacent first semiconductor layers. The second semiconductor opening area and the first semiconductor opening area are arranged at intervals, and the area between them is an interval area.

[0072] Preferably, in the spacer region, a mask layer is provided or not provided between the first semiconductor layer and the second semiconductor layer. The type and thickness of the mask layer can refer to the prior art. Exemplarily, the mask layer can be at least one of silicon nitride, silicon oxide, silicon oxynitride, or nitrogen-containing polysilicon, and the thickness of the mask layer is 50-100 nm.

[0073] Preferably, the back-contact cell of the present invention further includes a metal electrode and a conductive film layer disposed on the outer surfaces of the first semiconductor layer and the second semiconductor layer. An isolation groove is formed in a part of the conductive film layer located in the spacer region; the metal electrode is disposed on the outer surfaces of the respective corresponding conductive film layers in the second semiconductor opening region and the first semiconductor opening region.

[0074] Preferably, in the present invention, a part of the silicon wafer at the position of the second semiconductor opening region is a textured surface, and a part of the silicon wafer at the position corresponding to the first semiconductor layer is a polished surface.

[0075] In a second aspect, the present invention provides a method for manufacturing a back-contact cell having a specific anti-reflection composite layer, including the following steps:

[0076] S1. Provide a double-sided polished silicon wafer;

[0077] S2. Sequentially form a first semiconductor layer and a mask layer on the back surface of the silicon wafer;

[0078] S3. Perform a first etching opening on the back surface obtained in S2 to form a second semiconductor opening region;

[0079] S4. Through texturing cleaning, form a textured surface on the front surface of the silicon wafer and in the second semiconductor opening region;

[0080] S5. Sequentially dispose a passivation layer and an anti-reflection composite layer on the front surface of the silicon wafer. The anti-reflection composite layer includes silicon nitride and carbon-doped silicon oxide sequentially disposed on the outer surface of the passivation layer. The etching rate of the carbon-doped silicon oxide in a 5 wt% hydrofluoric acid solution is below 1.5 Å / s, the thickness of the carbon-doped silicon oxide is 60-150 nm, and the thickness ratio of the silicon nitride to the carbon-doped silicon oxide is 1:(0.5-2);

[0081] S6. Adopt a laser scribing process to remove the plating around the edge of the back surface of the silicon wafer; then use a solution etching method to clean the second semiconductor opening region;

[0082] S7. Deposit a second semiconductor layer on the back surface.

[0083] In step S4 of the present invention, the texturing cleaning can refer to the corresponding process in the prior art. Exemplarily, the texturing solution used is a mixed solution of an alkali (such as potassium hydroxide or sodium hydroxide), a texturing additive, and water, where the mass percentage of the alkali is 1% - 5%, and the mass percentage of the texturing additive is 0.5% - 1%. Further, the texturing conditions can include: the texturing time is 8 - 30 min, and the texturing temperature is 75°C - 85°C. The texturing additive can be obtained commercially. The final cleaning conditions in the texturing cleaning can be adjusted according to whether it is necessary to remove the mask layer. Exemplarily, when it is necessary to remove the mask layer, the final cleaning conditions include: the cleaning solution used for the final cleaning is an acid solution such as HF, the mass percentage of HF in the HF acid solution is 0.5% - 5%, the mass percentage of deionized water contained is 95% - 99.5%, the treatment temperature is 20°C - 30°C, and the removal time is 60 - 500 s.

[0084] In the present invention, it can be understood that the bypass plating mainly bypasses from the front side to the four peripheral edges of the back side of the silicon wafer. In step S6, a laser edge cleaning process is used to remove the bypass plating layer on the back side edge of the silicon wafer, while the slightly bypass plating layer in most of the middle area of the back side, including the second semiconductor opening area, can be removed by the solution etching method.

[0085] In some preferred embodiments of the present invention, the width of the laser edge cleaning in step S6 is 0.5 - 2 cm, and the laser edge cleaning time t1 is 5 - 25 s. The laser edge cleaning time refers to the total time for the laser to remove all the bypass plating layers on the edge of a silicon wafer. Adopting an appropriate laser edge cleaning width and time is more conducive to removing the bypass plating layer while reducing the damage to the first semiconductor layer.

[0086] In some preferred embodiments of the present invention, the laser edge cleaning time t1 in step S6, the coating time t0 used in the preparation of the front - side carbon - doped silicon oxide, and the methane flow rate L in sccm satisfy: t1 = a×t0 + b×L, where t1 and t0 are in units of s, and both a and b are coefficients, with a being 0.005 - 0.025 and b being 0.001 - 0.003. In the present invention, it is preferred to determine the laser edge cleaning time t1 according to the coating time t0 of the front - side carbon - doped silicon oxide and the methane flow rate L, which can more thoroughly remove the bypass plating layer and is more conducive to improving the conversion efficiency of the battery.

[0087] In some preferred embodiments of the present invention, the laser etching depth of the laser edge cleaning in step S6 is 1 - 10 nm, which is more conducive to reducing the damage of the laser to the first semiconductor layer.

[0088] In some preferred embodiments of the present invention, the conditions of the laser edge cleaning include: the laser used is an ultraviolet picosecond laser or a green picosecond laser, the pulse width of the laser is less than 5 ns, and the laser power is 8 - 20 W. Adopting the preferred laser edge cleaning condition scheme is more conducive to reducing the damage of the laser to the back - side film layer.

[0089] Preferably, the conditions for laser edge cleaning of the present invention further include: the light spot is a shaped square light spot, the side length of the light spot is 100-150 μm, and the light spot overlap rate is less than 30%. The solution adopting the preferred laser edge cleaning conditions is more conducive to reducing the etching damage of the laser.

[0090] In some preferred embodiments of the present invention, in S6, the solution etching method uses a hydrofluoric acid solution, and the mass concentration of hydrofluoric acid in the hydrofluoric acid solution is 1%-10%.

[0091] Preferably, the conditions for the solution etching method include: the treatment temperature is 20°C-30°C, and the cleaning time is 30-200 s.

[0092] In some preferred embodiments of the present invention, silicon nitride and carbon-doped silicon oxide are deposited using a PECVD device, and the deposition temperature is controlled to be 350-600°C.

[0093] Preferably, the conditions for depositing silicon nitride include: silane and ammonia are introduced, the flow rate of silane is 800-2000 sccm, the flow rate of ammonia is 6000-15000 sccm, the deposition pressure is 1300-2500 mtorr, and the power is 5 kw-20 kw.

[0094] Preferably, the conditions for depositing carbon-doped silicon oxide include: silane, nitrous oxide, and methane are introduced, the flow rate of silane is 100-1000 sccm, the flow rate of nitrous oxide is 6000-20000 sccm, the flow rate of methane is 500-5000 sccm, the deposition pressure is 1300-2500 mtorr, and the power is 5 kw-20 kw.

[0095] Preferably, the process of cleaning and texturing in S4 of the present invention further includes the step of selecting whether to remove the mask layer outside the second semiconductor opening area on the back of the silicon wafer according to needs.

[0096] In some preferred embodiments of the present invention, the method for preparing the back contact battery with a specific anti-reflection composite layer further includes:

[0097] S8. Perform a second etching opening on a part of the second semiconductor layer on the back of the silicon wafer to form a first semiconductor opening area arranged at intervals with the second semiconductor opening area;

[0098] S9. Deposit a conductive film layer on the back obtained in S8;

[0099] S10. Perform a third etching opening on a part of the conductive film layer located between the first semiconductor opening area and the second semiconductor opening area to form an isolation groove;

[0100] S11. Form metal electrodes on the outer surfaces of the corresponding conductive film layers in the regions of the first semiconductor opening region and the second semiconductor opening region respectively.

[0101] In a third aspect, the present invention provides a back-contact battery, which is obtained by the preparation method of the back-contact battery with a specific anti-reflection composite layer described in the second aspect. The structure and performance of this back-contact battery are the same as those of the back-contact battery in the first aspect, and will not be elaborated here.

[0102] In a fourth aspect, the present invention provides a photovoltaic module, which includes the back-contact battery with a specific anti-reflection composite layer described in the first aspect, or includes the back-contact battery described in the third aspect.

[0103] The embodiments of the present invention are described in detail below. They are exemplary and are only used to explain the present invention, and should not be construed as a limitation to the present invention.

[0104] Example 1

[0105] A back-contact battery, as Figure 1 shown, is obtained by the following steps:

[0106] S1. Double-side polish a silicon wafer 1 (N-type single-crystalline silicon wafer):

[0107] S2. Form a first semiconductor layer and a mask layer on the back surface of the silicon wafer 1:

[0108] The first semiconductor layer includes a tunneling silicon oxide layer 2 and an N-type doped polysilicon layer 3. The thickness of the tunneling silicon oxide layer 2 is 1.5 nm, the thickness of the N-type doped polysilicon layer 3 is 120 nm, and the effective doping concentration is 2.5×10 20 cm -3 . The mask layer is silicon nitride, and the thickness of the mask layer is 80 nm.

[0109] S3. Etch an opening on the back surface of the silicon wafer 1 for the first time to form a second semiconductor opening region W2;

[0110] S4. Texturize and clean the front surface of the above silicon wafer 1 and the second semiconductor opening region W2 on the back surface;

[0111] The texturing solution used for texturing and cleaning is a mixed solution of potassium hydroxide, a texturing additive (commercially available), and water. The mass percentage of potassium hydroxide is 2%, and the mass percentage of the texturing additive is 0.5%. The texturing time is 10 min, and the texturing temperature is 80 °C.

[0112] During the front surface texturing process, the silicon nitride mask layer on the back surface of the silicon wafer is also removed by the final cleaning solution. The solution used to remove the mask layer is HF acid solution, the mass percentage of HF is 0.5%, the treatment temperature is 25 °C, and the removal time is 200 s;

[0113] S5. Form a passivation layer 5 and an antireflection composite layer 6 on the front side of the silicon wafer 1:

[0114] The passivation layer 5 is a combination of silicon oxide and aluminum oxide formed in sequence. The thickness of the silicon oxide is 1 nm, and the thickness of the aluminum oxide is 5 nm;

[0115] The antireflection composite layer 6 is a combination of silicon nitride 6.1 and carbon-doped silicon oxide 6.2 formed in sequence. PECVD equipment is used for deposition during deposition, and the deposition temperature is 450 °C. When depositing silicon nitride 6.1, the flow rate of silane is 1000 sccm, the flow rate of ammonia is 9500 sccm, the deposition pressure is 1700 mtorr, and the power is 10 kw;

[0116] When depositing carbon-doped silicon oxide 6.2, the flow rate of silane is 300 sccm, the flow rate of nitrous oxide is 10000 sccm, the flow rate of methane is 1000 sccm, the deposition pressure is 1600 mtorr, and the power is 10 kw; The carbon doping concentration of the carbon-doped silicon oxide is the same in the thickness direction and the carbon doping concentration is 8.5×10 19 cm -3 .

[0117] The total thickness of the antireflection composite layer 6 is 200 nm, where the thickness of the silicon nitride 6.1 is 90 nm and the refractive index is 2.03; the thickness of the carbon-doped silicon oxide 6.2 is 110 nm and the refractive index is 1.48. The etching rate of the carbon-doped silicon oxide 6.2 in a 5 wt% hydrofluoric acid solution is 0.6 Å / s. After calculation, the thickness ratio of the silicon nitride 6.1 to the carbon-doped silicon oxide 6.2 is 1:1.2. The thickness ratio of the silicon oxide to the carbon-doped silicon oxide 6.2 is 1:110.

[0118] S6. Remove the backside wrap-around plating layer and clean the second semiconductor opening area W2:

[0119] First, use the method of laser edge sweeping to remove the wrap-around plating layer within a width of 1.5 cm from the edge of the backside of the silicon wafer. The type of laser used for laser edge sweeping is ultraviolet picosecond laser, the pulse width is 2 ns, the laser power is 10 W, the width of the laser edge sweeping is 1.5 cm, the laser etching depth is 3 nm, the light spot used is a shaped square light spot, the side length of the light spot is 150 μm, the overlap rate is 15%, and the laser edge sweeping time t1 is 8 s;

[0120] The laser edge sweeping time t1 has a certain positive relationship with the plating time of the front-side carbon-doped silicon oxide t0 and the value of the methane flow rate L (unit: sccm): t1 = 0.015t0 + 0.002L, where the units of t1 and t0 are s.

[0121] Next, further cleaning is carried out using HF acid solution, where the mass percentage of HF is 2%, the balance is the mass percentage of deionized water, the treatment temperature is 25°C, and the cleaning time is 100 s;

[0122] S7. Form a second semiconductor layer on the back surface of the silicon wafer 1;

[0123] The second semiconductor layer is a stack of an intrinsic hydrogenated amorphous silicon layer 7 and a P-type doped amorphous silicon layer 8; the thickness of the intrinsic hydrogenated amorphous silicon layer 7 is 10 nm, the thickness of the P-type doped amorphous silicon layer 8 is 15 nm, and the effective doping concentration is 5.6×10 19 cm -3 ;

[0124] S8. Etch an opening on the back surface of the silicon wafer 1 for the second time to form a first semiconductor opening region W1;

[0125] S9. Deposit a transparent conductive film layer 9 on the back surface of the silicon wafer 1;

[0126] S10. Etch an opening on the back surface of the silicon wafer 1 for the third time to form an isolation groove W3; after etching, the resistance between the first semiconductor and the second semiconductor is greater than 1 kΩ.

[0127] S11. Form metal electrodes 10 on the outer surfaces of the corresponding regions of the first semiconductor opening region W1 and the second semiconductor opening region W2 on the back surface of the silicon wafer respectively.

[0128] Example 2

[0129] Refer to Example 1, the difference is that the thickness of the carbon-doped silicon oxide is adjusted to satisfy: the thickness ratio of silicon nitride to carbon-doped silicon oxide is 1:0.8.

[0130] Example 3

[0131] Refer to Example 1, the difference is that the carbon doping concentration of the carbon-doped silicon oxide is adjusted to 4.5×10 19 cm -3 . The process that needs to be adjusted to meet this condition is: reduce the methane flow rate by 40%. After testing, the corrosion rate of the carbon-doped silicon oxide in a hydrofluoric acid solution with a mass concentration of 5 wt% is 0.95 Å / s, and the refractive index of the carbon-doped silicon oxide is 1.5.

[0132] Example 4

[0133] Refer to Example 1, the difference is that the carbon doping concentration of the carbon-doped silicon oxide is adjusted to gradually increase in the thickness direction along the direction away from the silicon wafer, and its carbon doping concentration ranges from low to high as 1×10 19 cm -3 -9×10 21 cm -3, the uniformly increasing amplitude satisfies that in the thickness direction, the absolute value of the difference between adjacent carbon doping concentrations is 8×10 19 cm -3 . The process to be adjusted to meet this condition is: gradually increase the methane flow rate layer by layer to the target carbon doping concentration. After testing, the corrosion rate of carbon-doped silicon oxide in a hydrofluoric acid solution with a mass concentration of 5wt% is 0.56 Å / s, and the refractive index of carbon-doped silicon oxide is 1.45.

[0134] Example 5

[0135] Refer to Example 4, the difference is that the amplitude of the uniform increase in the carbon doping concentration of carbon-doped silicon oxide is adjusted differently. Specifically, the carbon doping concentration of the first layer is 5×10 19 cm -3 , and the carbon doping concentration of the last layer remains unchanged at 9×10 21 cm -3 , the uniformly increasing amplitude satisfies that in the thickness direction, the absolute value of the difference between adjacent carbon doping concentrations is 5×10 19 cm -3 . The process to be adjusted to meet this condition is: increase the methane flow rate layer by layer by the corresponding multiple to the target carbon doping concentration. After testing, the corrosion rate of carbon-doped silicon oxide in a hydrofluoric acid solution with a mass concentration of 5wt% is 0.31 Å / s, and the refractive index of carbon-doped silicon oxide is 1.32.

[0136] Example 6

[0137] Refer to Example 1, the difference is that the thickness of silicon oxide in the combination of silicon oxide and aluminum oxide for the passivation layer is adjusted to 2 nm, so that the thickness ratio of silicon oxide to carbon-doped silicon oxide is 1:55.

[0138] Comparative Example 1

[0139] Refer to Example 1, the difference is that the antireflection layer is silicon nitride and the carbon-doped silicon oxide is not provided.

[0140] Comparative Example 2

[0141] Refer to Example 1, the difference is that the carbon-doped silicon oxide in the antireflection layer is replaced by silicon oxide, that is, not carbon-doped, and the corrosion rate of silicon oxide in a hydrofluoric acid solution with a mass concentration of 5wt% is 15 Å / s.

[0142] Comparative Example 3

[0143] Refer to Example 1, the difference is that the antireflection layer is carbon-doped silicon oxide and the silicon nitride is not provided.

[0144] Comparative Example 4

[0145] Performed with reference to Example 1, except that the thickness of the carbon-doped silicon oxide was adjusted to satisfy: the thickness ratio of silicon nitride to carbon-doped silicon oxide was 1:0.3.

[0146] Test Example

[0147] The back-contact batteries obtained from the above examples and comparative examples were subjected to performance tests. The results are shown in Table 1. Among them, each performance index of each example and comparative example was converted with Example 1 as the reference benchmark. The data of Example 1 was the normalization benchmark 1.000, and other examples were converted based on Example 1. For example, the reflectance of Comparative Example 1 / the reflectance of Example 1 was 1.615. The optical effect index refers to the reflectance, which was obtained by testing with a UV spectrophotometer. The film layer stability index refers to the retention degree of the thickness of the antireflection layer, specifically the ratio of (the thickness of the antireflection layer before passing through a hydrofluoric acid solution with a mass concentration of 5wt% - the thickness of the antireflection layer after passing through a hydrofluoric acid solution with a mass concentration of 5wt%) / the thickness of the antireflection layer before passing through a hydrofluoric acid solution with a mass concentration of 5wt%, and the film thickness was obtained by ellipsometry. The production yield refers to the proportion of the number of qualified batteries in a batch (100 batteries).

[0148] Table 1

[0149]

[0150] From the above results, it can be seen that compared with the comparative examples, adopting the embodiment scheme of the present invention is beneficial to taking into account reducing the reflectance optical effect while improving the stability of the film layer and the production yield, increasing the short-circuit current, and improving the battery efficiency.

[0151] Furthermore, according to Example 1 and Examples 2-6, it can be seen that adopting the preferred scheme of the present invention is more conducive to increasing the short-circuit current, improving the battery efficiency and production yield.

[0152] The preferred embodiments of the present invention have been described in detail above. However, the present invention is not limited thereto. Within the technical concept scope of the present invention, various simple modifications can be made to the technical solutions of the present invention, including any other suitable combination of each technical feature. These simple modifications and combinations should also be regarded as the content disclosed by the present invention and fall within the protection scope of the present invention.

Claims

1. A back-contact battery with a specific anti-reflection composite layer, comprising a silicon wafer, a first semiconductor layer and a second semiconductor layer alternately arranged on the back surface of the silicon wafer, and a passivation layer and an anti-reflection composite layer sequentially arranged on the front surface of the silicon wafer, characterized in that, The silicon nitride and carbon-doped silicon oxide are successively arranged on the outer surface of the passivation layer in the silicon nitride and carbon-doped silicon oxide composite layer. The etching rate of the carbon-doped silicon oxide in a hydrofluoric acid solution with a mass concentration of 5 wt% is below 1.5 Å / s. The thickness of the carbon-doped silicon oxide is 60-150 nm, and the thickness ratio of the silicon nitride to the carbon-doped silicon oxide is 1:(0.5-2); the carbon doping concentration of the carbon-doped silicon oxide gradually increases in the thickness direction along the direction away from the silicon wafer, and its carbon doping concentration ranges from low to high at 1×10 19 cm -3 -9×10 21 cm -3 range.

2. The back contact battery with a specific anti-reflection composite layer according to claim 1, characterized in that The total thickness of the anti-reflection composite layer is 100 - 250 nm, and / or the thickness of the silicon nitride is 50 - 120 nm.

3. The back contact battery with a specific anti-reflection composite layer according to claim 1, characterized in that The refractive index of the silicon nitride is 2.0 - 2.

2.

4. The back contact battery with a specific anti-reflection composite layer according to claim 1, characterized in that The refractive index of the carbon-doped silicon oxide is 1.3 - 1.

6.

5. The back contact battery with a specific anti-reflection composite layer according to claim 1, characterized in that The increasing amplitude of the carbon doping concentration of carbon-doped silicon oxide satisfies that in the thickness direction, the absolute value of the difference between adjacent different carbon doping concentrations is within 5×10 19 cm -3 -1×10 21 cm -3 .

6. The back contact battery with a specific anti-reflection composite layer according to claim 1, characterized in that, The passivation layer is at least one of amorphous silicon, oxygen-doped amorphous silicon, phosphorus-doped amorphous silicon, silicon oxide, and aluminum oxide film layers, and / or the thickness of the passivation layer is 1 - 10 nm.

7. The back contact battery with a specific anti-reflection composite layer according to claim 1, characterized in that, The passivation layer is a combination of silicon oxide and aluminum oxide.

8. The back contact battery with a specific anti-reflection composite layer according to claim 7, characterized in that, The thickness ratio of the silicon oxide to the carbon-doped silicon oxide is 1:(40 - 150); and / or The thickness of the silicon oxide is 1 - 2 nm, and the thickness of the aluminum oxide is 3 - 5 nm.

9. The back contact battery with a specific anti-reflection composite layer according to claim 1, characterized in that, Both ends of the second semiconductor layer extend outward to cover part of the back surface of the adjacent first semiconductor layer respectively, and a first semiconductor opening area that does not cover the second semiconductor layer is formed on the back surface of the first semiconductor layer. A second semiconductor opening area is formed between adjacent first semiconductor layers. The second semiconductor opening area and the first semiconductor opening area are arranged at intervals, and the area between them is the interval area; in the interval area, a mask layer is provided or not provided between the first semiconductor layer and the second semiconductor layer; the back contact battery further includes a metal electrode and a conductive film layer laid on the outer surfaces of the first semiconductor layer and the second semiconductor layer. An isolation groove is formed on the part of the conductive film layer located in the interval area; the metal electrode is provided on the outer surfaces of the respective corresponding conductive film layers of the second semiconductor opening area and the first semiconductor opening area.

10. The back contact battery with a specific anti-reflection composite layer according to claim 1, characterized in that, The first semiconductor layer includes a tunneling oxide layer and a first doped polysilicon layer, and the second semiconductor layer includes an intrinsic silicon layer and a second doped silicon layer.

11. A method for preparing a back contact battery with a specific anti-reflection composite layer, characterized in that, Including the following steps: S1. Provide a double-sided polished silicon wafer. S2. Form a first semiconductor layer and a mask layer on the back surface of the silicon wafer in sequence. S3. Conduct a first etching opening on the back surface obtained in S2 to form a second semiconductor opening area. S4. Through texturing cleaning, a textured surface is formed on the front surface of the silicon wafer and the second semiconductor opening area. S5. A passivation layer and an anti-reflection composite layer are sequentially disposed on the front surface of the silicon wafer. The anti-reflection composite layer includes silicon nitride and carbon-doped silicon oxide sequentially disposed on the outer surface of the passivation layer. The etching rate of the carbon-doped silicon oxide in a hydrofluoric acid solution with a mass concentration of 5 wt% is below 1.5 Å / s. The thickness of the carbon-doped silicon oxide is 60 - 150 nm, and the thickness ratio of the silicon nitride to the carbon-doped silicon oxide is 1:(0.5 - 2); the carbon doping concentration of the carbon-doped silicon oxide gradually increases in the thickness direction along the direction away from the silicon wafer, and its carbon doping concentration ranges from 1×10 19 cm -3 -9×10 21 cm -3 ; S6. Adopt a laser edge sweeping process to remove the plating layer around the edge of the back surface of the silicon wafer; then use the solution etching method to clean the second semiconductor opening area. S7. Deposit a second semiconductor layer on the back surface.

12. The preparation method of the back contact battery with a specific anti-reflection composite layer according to claim 11, characterized in that, In S6, the width of the laser edge sweeping is 0.5 - 2 cm, and the laser edge sweeping time t1 is 5 - 25 s. and / or In S6, the laser edge sweeping time t1, the coating time t0 used in the preparation of the carbon-doped silicon oxide on the front surface, and the value of the methane flow rate L in sccm satisfy: t1 = a×t0 + b×L, where t1 and t0 are values in seconds, and both a and b are coefficients, and a is 0.005 - 0.025, and b is 0.001 - 0.

003.

13. The method for preparing a back-contact battery having a specific anti-reflection composite layer according to claim 11 or 12, characterized in that, In S6, the laser etching depth of the laser edge sweeping is 1 - 10 nm; and / or The conditions of the laser edge sweeping include: the laser used is an ultraviolet picosecond laser or a green picosecond laser, the pulse width of the laser is less than 5 ns, the laser power is 8 - 20 W, the light spot is a shaped square light spot, the side length of the light spot is 100 - 150 μm, and the light spot overlap rate is less than 30%.

14. The preparation method of the back-contact battery with a specific anti-reflection composite layer according to claim 11, characterized in that, In the solution etching method in S6, a hydrofluoric acid solution is used, and the mass concentration of hydrofluoric acid in the hydrofluoric acid solution is 1% - 10%. The conditions of the solution etching method include: the treatment temperature is 20°C - 30°C, and the cleaning time is 30 - 200 s; and / or, Silicon nitride and carbon-doped silicon oxide are deposited by a PECVD device, and the deposition temperature is controlled to be 350 - 600°C. Among them, the conditions for depositing silicon nitride include: silane and ammonia are introduced, the flow rate of silane is 800 - 2000 sccm, the flow rate of ammonia is 6000 - 15000 sccm, the deposition pressure is 1300 - 2500 mtorr, and the power is 5 kw - 20 kw; the conditions for depositing carbon-doped silicon oxide include: silane, nitrous oxide, and methane are introduced, the flow rate of silane is 100 - 1000 sccm, the flow rate of nitrous oxide is 6000 - 20000 sccm, the flow rate of methane is 500 - 5000 sccm, the deposition pressure is 1300 - 2500 mtorr, and the power is 5 kw - 20 kw.

15. The preparation method of the back contact battery with a specific anti-reflection composite layer according to claim 11, characterized in that, The preparation method of the back contact battery with a specific anti-reflection composite layer further includes: S8. Perform a second etching opening on a part of the second semiconductor layer on the back of the silicon wafer to form a first semiconductor opening area arranged at intervals with the second semiconductor opening area; S9. Deposit a conductive film layer on the back obtained in S8; S10. Perform a third etching opening on a part of the conductive film layer located between the first semiconductor opening area and the second semiconductor opening area to form an isolation groove; S11. Metal electrodes are respectively formed on the outer surfaces of the corresponding conductive film layers in the areas where the first semiconductor opening area and the second semiconductor opening area are located.

16. A back-contact battery, characterized in that, It is obtained by the preparation method of the back contact battery with a specific anti-reflection composite layer as described in any one of claims 11 - 15.

17. A photovoltaic module, characterized in that, It includes the back contact battery with a specific anti-reflection composite layer as described in any one of claims 1 - 10, or includes the back contact battery as described in claim 16.

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