Probe card for detecting electrical characteristics of object to be detected, and method for manufacturing same

Abstract

A probe card for probing electrical characteristics of a subject according to one embodiment of the present invention comprises: a plurality of probe pins having probe tips formed on one side thereof so as to be in contact with the subject and extending from the one side to the other side thereof; a wafer which is integrally coupled to the plurality of probe pins in a state in which at least a portion of the plurality of probe pins are inserted, and which is disposed so as to expose the probe tip to the outside; a thin film which is disposed such that one side thereof overlaps the wafer, and which is connected to the other side of the plurality of probe pins; and a circuit board which is disposed so that at least a part of the circuit board overlaps the other side of the thin film, and which is disposed so as to receive a probe signal from the plurality of probe pins through the thin film, the pitch between the plurality of probe pins being expanded on the other side with respect to the one side.

Description

Technical Field

[0001] The present disclosure relates to a probe card for detecting electrical characteristics of a test object and a method for manufacturing the same. Background Art

[0002] Electronic devices and integrated circuits (ICs) are equipped with multiple individual circuit elements on a circuit board. As technology develops, they are gradually designed and manufactured smaller.

[0003] Light Emitting Diode (LED) is a semiconductor device that emits light when current is applied. Micro LED refers to ultra-small LEDs with horizontal and vertical lengths of less than 100 μm. Micro LEDs shrink LED chips to tens of microns (μm), thereby solving the problem of inorganic materials breaking when bent, and transferring them to flexible substrates (Flexible Printed Circuit Boards), thereby achieving stretchable materials.

[0004] In order to commercialize this micro-LED, it is necessary to solve the accuracy and high throughput of transfer / transfer / bonding technology, as well as improve color uniformity. Color uniformity is a characteristic determined in the micro-LED wafer, and photoluminescence (PL) or electroluminescence (EL) detection is required. After that, in order to improve the production yield of micro-LED, it is necessary to develop a probe card that can correspond to the micro pitch of micro-LED.

[0005] Prior art literature

[0006] Patent Literature

[0007] Patent document 0001: Korean Patent Publication No. 2241059 Summary of the invention

[0008] Problems to be solved by the invention

[0009] Micro LED chips need to be tested for photoluminescence (PL) or electroluminescence (EL). Currently, the main test is PL testing, which has fast testing time and low cost. However, PL testing has the fatal disadvantage of low accuracy and requires repair time and cost, so EL testing is necessary. Currently, EL testing is performed on a chip-by-chip basis, so the testing time and cost are very high. The bigger problem is that multi-PARA (e.g. 64PARA, 128PARA, 256PARA, 512PARA, etc.) testing cannot be performed. In order to perform multi-PARA testing, it is necessary to solve the problem of reducing the size of micro LEDs and ensuring the pin alignment accuracy of the probe card.

[0010] An object of the present disclosure is to provide a probe card having a structure in which the intervals between a plurality of probe pins correspond to the micro pitch of a test object.

[0011] However, the technical problems to be solved by this embodiment are not limited to the technical problems described above, and there may be other technical problems.

[0012] Solutions for solving problems

[0013] A probe card for detecting electrical characteristics of an object to be detected according to an embodiment of the present disclosure comprises: a plurality of probe pins, one side of which is formed with probe tips arranged in a manner to contact the object to be detected, and the plurality of probe pins extend from the one side to the other side; a chip, which is integrated with the plurality of probe pins in a state in which at least a portion of the plurality of probe pins is inserted inside, and is configured in a manner to expose the probe tips to the outside; a film, which is configured in a manner that one side overlaps with the chip, and the film is connected to the other side of the plurality of probe pins; and a circuit substrate, which is configured in a manner that at least a portion overlaps with the other side of the film, and is configured to receive detection signals from the plurality of probe pins through the film, and the pitch between the plurality of probe pins can be extended on the other side of the plurality of probe pins relative to one side of the plurality of probe pins.

[0014] A method for manufacturing a probe card for detecting the electrical characteristics of a detected object according to an embodiment of the present disclosure may include: a step of etching a probe groove along a depth direction on one side of the above-mentioned chip; a step of plating the above-mentioned multiple probe pins in the above-mentioned etched probe groove; a step of etching a part of the above-mentioned chip in such a manner that the above-mentioned probe tip is exposed to the outside; and a step of connecting the above-mentioned chip to the above-mentioned film and the above-mentioned circuit substrate.

[0015] Effects of the Invention

[0016] In the past, in connector products manufactured by inserting pins into guides, in the case of products using pogo pins, a pin alignment accuracy of X / Y / Z = ±30μm can be ensured, and in the case of MEMS blade products with excellent precision, a pin alignment accuracy of X / Y / Z = ±8μm can also be ensured.

[0017] However, there are two pads, the P pole and the N pole, in the micro LED chip. As the size of the micro LED chip gradually decreases, the pad size is reduced to at least 4μm×4μm. As the size of the chip decreases, the pad size will also gradually decrease.

[0018] The probe card without guides of one embodiment of the present disclosure is manufactured by a micro-electromechanical system (MEMS) process, and thus can ensure a pin alignment accuracy of X / Y / Z=±0.5 μm. Therefore, for multi-PARA EL detection of micro-LEDs, the only solution currently is a guideless probe card.

[0019] According to one embodiment of the present disclosure, the intervals between multiple probe pins can be formed in a manner corresponding to the object to be detected having a micro-pitch, and for the object to be detected, multiple probe pins can be maintained above a specific angle, and the force (Force) and friction (Scrub) of the multiple probe pins on the object to be detected can be adjusted. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 An exploded perspective view of a probe card according to an embodiment of the present disclosure is shown.

[0021] Figure 2 A side view of a probe card according to an embodiment of the present disclosure is shown.

[0022] Figure 3 A bottom view of a probe card according to an embodiment of the present disclosure is shown.

[0023] Figure 4 A top view of a probe card according to an embodiment of the present disclosure is shown.

[0024] Figure 5 FIG. 1 is a bottom perspective view of a wafer incorporating a plurality of probe pins according to an embodiment of the present disclosure.

[0025] Figure 6 FIG. 1 is a bottom view of a wafer combined with a plurality of probe pins according to an embodiment of the present disclosure.

[0026] Figure 7a FIG. 4 is an enlarged view of a wafer according to an embodiment of the present disclosure.

[0027] Figure 7bFIG. 1 is a perspective view of a wafer combined with a plurality of probe pins according to an embodiment of the present disclosure.

[0028] Figure 7c FIG. 1 is a side view of a wafer incorporating a plurality of probe pins according to an embodiment of the present disclosure.

[0029] Figure 7d FIG. 4 is a perspective view of a plurality of probe pins according to an embodiment of the present disclosure.

[0030] Figure 8 FIG. 1 is a perspective view of a wafer combined with a plurality of probe pins according to another embodiment of the present disclosure.

[0031] Fig. 9 FIG. 1 is a diagram showing deformation portions of a plurality of probe pins according to an embodiment of the present disclosure.

[0032] Fig.10 FIG. 4 is an enlarged view of multiple probe pins according to an embodiment of the present disclosure.

[0033] Fig.11 It is a schematic diagram of a plurality of probe pins matching with a detected object according to an embodiment of the present disclosure.

[0034] Fig.12 FIG. 4 is a three-dimensional diagram of a film according to an embodiment of the present disclosure.

[0035] Fig.13 FIG. 4 is a circuit diagram of a plurality of signal lines formed on a thin film according to an embodiment of the present disclosure.

[0036] Fig.14 The figure is a three-dimensional diagram of a circuit substrate according to an embodiment of the present disclosure.

[0037] Fig.15 It is a three-dimensional diagram of a first shell according to an embodiment of the present disclosure.

[0038] Fig.16 It is a three-dimensional diagram of a second housing according to an embodiment of the present disclosure.

[0039] Fig.17 The present invention is a flowchart of a method for manufacturing a probe card according to an embodiment of the present invention.

[0040] Figures 18a to 18e It is a state diagram corresponding to a method for manufacturing a probe card according to an embodiment of the present disclosure.

[0041] Fig.19 It is a state diagram corresponding to a method for manufacturing a probe card according to an embodiment of the present disclosure.

[0042] Description of reference numerals:

[0043] 100: probe card;

[0044] 110: chip;

[0045] 120: probe pin;

[0046] 130: film;

[0047] 140: Circuit board;

[0048] 150: first shell;

[0049] 160: Second shell. DETAILED DESCRIPTION

[0050] Hereinafter, embodiments of the present application will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily implement them. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. In addition, in order to clearly describe the present application in the accompanying drawings, parts not related to the description are omitted, and similar reference numerals are used for similar parts throughout the present application specification.

[0051] Throughout the specification of the present application, when it is mentioned that a component is “on” another component, it includes not only the case that the one component is in contact with the other component, but also the case that other components exist between the two components.

[0052] Throughout the specification of the present application, when it is mentioned that a part “comprises” an element, unless otherwise specified, it means that other elements may also be included, rather than excluding other elements.

[0053] The terms "approximately", "substantially", etc., which express degree, as used throughout the specification of this application, are used in the sense of being equal to or close to the numerical value when presenting the manufacturing and material tolerances inherent in the said meaning, and are used to prevent unscrupulous infringers from improperly using the disclosure of precise or absolute numerical values ​​described to help understand the present application. The term "step of" or "step of" as used throughout the specification does not mean "step of".

[0054] Throughout the present specification, the term "combination(s) thereof" expressed in Markush form refers to a mixture or combination of more than one selected from the group consisting of constituent elements expressed in Markush form, which means including more than one selected from the group consisting of the above constituent elements.

[0055] Throughout the present specification, the description "A and / or B" means "A or B, or A and B".

[0056] Hereinafter, embodiments and examples of the present application will be described in detail with reference to the accompanying drawings. However, the present application may not be limited to these embodiments, examples and drawings.

[0057] Figure 1 An exploded perspective view of a probe card 100 according to an embodiment of the present disclosure is shown. Figure 2 A side view of a probe card 100 according to an embodiment of the present disclosure is shown. Figure 3 A bottom view of a probe card 100 according to an embodiment of the present disclosure is shown. Figure 4 A top view of a probe card 100 according to an embodiment of the present disclosure is shown.

[0058] Reference Figures 1 to 4 In one embodiment, a probe card 100 for detecting electrical characteristics of an object to be detected may include: a plurality of probe pins 120, which are formed with probe tips 125 arranged in contact with the object to be detected on one side and extend from the one side to the other side; a chip 110, which is integrated with the plurality of probe pins 120 in a state in which at least a portion of the plurality of probe pins 120 is inserted inside, and is configured in a manner that the probe tips 125 are exposed to the outside; a film 130, which is configured in a manner that one side overlaps with the chip 110 and is connected to the other side of the plurality of probe pins 120; and / or a circuit substrate 140, which is configured in a manner that at least a portion overlaps with the other side of the film 130 and is configured to receive detection signals from the plurality of probe pins 120 through the film 130.

[0059] The probe card 100 for detecting the electrical characteristics of the object to be detected according to one embodiment may further include: a first shell 150, which is configured to support at least a portion of the above-mentioned chip 110 at the bottom; and / or a second shell 160, which is combined with the above-mentioned first shell 150 and is configured to cover the above-mentioned chip 110 from above with the above-mentioned probe tip 125 exposed to the outside.

[0060] The plurality of probe pins 120 of one embodiment can be exposed to the outside in a state of being integrated with the wafer 110. As one embodiment, among the plurality of probe pins 120, all or part of the probe tips 125 formed on one side of the plurality of probe pins 120 in a manner of contacting the detected object can be exposed to the outside. For example, the detected object can be a micro LED chip formed in a manner of having a micro pitch.

[0061] As an embodiment, the plurality of probe pins 120 are formed so as to protrude and be exposed to the outside even when the wafer 110 is combined with the first housing 150 and / or the second housing 160 .

[0062] In one embodiment, the plurality of probe pins 120 can be tilted at a specified angle when the probe card 100 is arranged on a plane parallel to the ground. In one embodiment, in the probe card 100, the plurality of probe pins 120 can be tilted at a specified angle by the curved shape of the second housing 160.

[0063] According to the above-mentioned designated angle, the force (Force) and the friction (Scrub) of the plurality of probe pins 120 on the object to be detected can be adjusted.

[0064] As an embodiment, the plurality of probe pins 120 can be tilted at a specified angle on the object to be detected, and the object to be detected is arranged on a plane parallel to the bottom surface. For example, the specified angle can be 5 degrees to 10 degrees.

[0065] One side of the wafer 110 of an embodiment corresponding to the probe tips 125 may be etched so that the probe tips 125 included in the plurality of probe pins 120 are exposed to the outside.

[0066] The wafer 110 of one embodiment can be integrated with the plurality of probe pins 120 in a state where at least a portion of the plurality of probe pins 120 are inserted therein. As in one embodiment, the plurality of probe pins 120 are integrated with the wafer 110 in a manner of having a predetermined pitch therebetween, and can extend from the opposite end (e.g., the other side) relative to the end (e.g., one side) where the probe tips 125 are formed.

[0067] As an embodiment, the chip 110, the film 130 and / or the circuit substrate 140 may be combined with the first housing 150 and / or the second housing 160 between the first housing 150 and the second housing 160. As an embodiment, the chip 110, the film 130 and / or the circuit substrate 140 may be fixed in position between the first housing 150 and the second housing 160.

[0068] As one embodiment, the film 130 can be arranged relative to the wafer 110 in such a manner that a plurality of signal lines formed therein correspond to a plurality of probe pins 120 coupled to the wafer 110. As one embodiment, the film 130 can be arranged relative to the circuit substrate 140 in such a manner that a plurality of signal lines formed therein correspond to printed lines of the circuit substrate 140.

[0069] In one embodiment, the circuit substrate 140 may be a flexible printed circuit board (FPC) made of a flexible material. In one embodiment, the circuit substrate 140 may extend from one side connected to the film 130 to the other side, and the other end of the extension may be connected to the measuring instrument. In one embodiment, the circuit substrate 140 may be connected in a manner of sending or receiving signals with the measuring instrument.

[0070] The circuit substrate 140 of one embodiment may be composed of a plurality of substrates 143, 145, and 147. As in one embodiment, when a plurality of probe pins 120 correspond to a plurality of test objects (chips), the circuit substrate 140 may be composed of a plurality of substrates 143, 145, and 147.

[0071] In one embodiment, the number of channels can be increased corresponding to the number of detected objects (chips), and as the number of channels increases, the number of required substrates 143, 145, 147 can increase. In one embodiment, the substrates 143, 145, 147 can each include a number of channels less than a specified number (e.g., 120 to 200 channels).

[0072] As an embodiment, the plurality of substrates 143 , 145 , and 147 may be spaced apart from each other along the extending direction to be combined with the film 130 , and may be stacked and arranged in a manner of being spaced apart from each other by a certain distance (eg, 5 mm) or more along the vertical direction.

[0073] Figure 5 FIG. 1 is a bottom perspective view of a wafer 110 combined with a plurality of probe pins 120 according to an embodiment of the present disclosure. Figure 6 FIG. 1 is a bottom view of a wafer 110 combined with a plurality of probe pins 120 according to an embodiment of the present disclosure.

[0074] The plurality of probe pins 120 of one embodiment may be integrated with the wafer 110. As one embodiment, the plurality of probe pins 120 may be integrated with the wafer 110 in a state where at least a portion of the plurality of probe pins 120 is inserted into a groove formed in the wafer 110.

[0075] The plurality of probe pins 120 of one embodiment can extend from the end of the wafer 110 in such a manner that the probe tips 125 are arranged at a further outer side than the end of the wafer 110. As one embodiment, the plurality of probe pins 120 extend outward from the end of the wafer 110, and the probe tips 125 formed on one side of the probe pins 120 can be arranged at a further outer side than the end of the wafer 110.

[0076] In one embodiment, the plurality of probe pins 120 may protrude from the end of the wafer 110 by 100 μm to 200 μm along the length direction (eg, Y-axis direction).

[0077] In one embodiment, the thickness of the plurality of probe pins 120 along the thickness direction (eg, X-axis direction) may be 5 μm to 10 μm. In one embodiment, the thickness of the plurality of probe pins 120 along the height direction (eg, Z-axis direction) may be 5 μm to 10 μm.

[0078] As an example, the force and the amount of friction of the probe pins 120 on the object to be detected can be adjusted according to the length and thickness of the probe pins 120 protruding from the wafer 110 and / or the thickness of the etching grooves 113 formed in the wafer 110 .

[0079] In one embodiment, the plurality of probe pins 120 may be reduced in thickness direction (e.g., X-axis direction) at the probe tip 125. For example, the probe tip 125 gradually reduces in thickness as it approaches the end. For example, the thickness of the probe tip 125 at the position where the probe tip 125 contacts the object to be detected may be less than 2 μm.

[0080] In one embodiment, the plurality of probe pins 120 can be spaced apart from each other at intervals of a first pitch, so that one side of the plurality of probe pins 120 that contacts the object to be detected corresponds to the object to be detected. In one embodiment, the plurality of probe pins 120 can be spaced apart at intervals of a first pitch that is the same interval, and the intervals of the first pitch can correspond to the intervals of the object to be detected. For example, the first pitch can be less than 20 μm.

[0081] For example, as the thickness of the plurality of probe pins 120 at the probe tips 125 decreases, the spaced intervals between the probe tips 125 may be enlarged compared to the first pitch.

[0082] The plurality of probe pins 120 of one embodiment are arranged spaced apart from each other at intervals of the second pitch so as to correspond to the other side of the film 130 (eg, a plurality of signal lines) connected to the film 130 .

[0083] As an embodiment, the second spacing is formed to be relatively large in a manner corresponding to an external device (eg, a measuring instrument). For example, the second spacing may be relatively larger than the first spacing. For example, the first spacing may be fixed to be the same, and the second spacing may be changed to be different from each other.

[0084] In one embodiment, the plurality of probe pins 120 can be configured to be spaced from one side to the other side, with the spacing extending from the first spacing to the second spacing. In one embodiment, the plurality of probe pins 120 can be designed in a fan-out shape so as to correspond to the object to be detected and the external device, respectively. In one embodiment, the plurality of probe pins 120 can customize the line width, line length, thickness, etc. of the circuit according to the characteristics of the product and / or the signal characteristics.

[0085] The plurality of probe pins 120 of one embodiment include a probe tip 125 and may include contact portions 123 spaced apart from each other at intervals of a first pitch and pattern portions 127 connected to the contact portions 123 and configured to have intervals extending from the first pitch to a second pitch.

[0086] In one embodiment, the contact portion 123 and the pattern portion 127 of the plurality of probe pins 120 may be integrated and connected in a manner capable of transmitting signals. As one embodiment, the contact portion 123 and the pattern portion 127 may be manufactured as one piece, or may be manufactured separately and then combined with each other.

[0087] The wafer 110 of one embodiment may be made of silicon dioxide (SiO 2 ) as a silicon raw material.

[0088] As an embodiment, the plurality of probe pins 120 may be formed on the wafer 110 by a micro-electro mechanical system (MEMS) process. For example, the plurality of probe pins 120 may be formed of nickel (Ni) material.

[0089] Figure 7a FIG. 1 is an enlarged view of a chip 110 according to an embodiment of the present disclosure. Figure 7b FIG. 1 is a perspective view of a wafer 110 combined with a plurality of probe pins 120 according to an embodiment of the present disclosure. Figure 7c FIG. 1 is a side view of a wafer 110 combined with a plurality of probe pins 120 according to an embodiment of the present disclosure. Figure 7d FIG. 1 is a perspective view of a plurality of probe pins 120 according to an embodiment of the present disclosure.

[0090] Reference Figures 7a to 7d In one embodiment, the wafer 110 is etched along the depth direction on one side in a manner corresponding to at least a portion of the plurality of probe pins 120. As in one embodiment, the wafer 110 may be formed with etching grooves 113 for inserting at least a portion of the plurality of probe pins 120 in the height direction (eg, Z-axis direction).

[0091] In one embodiment, at least a portion of the plurality of probe pins 120 may be inserted into one surface of the wafer 110. In one embodiment, the plurality of probe pins 120 may be fixed to the wafer 110 by being inserted into the etching grooves 113 formed on the lower surface of the wafer 110.

[0092] In the plurality of probe pins 120 according to an embodiment, the pattern portion 127 may be arranged so that a portion having a height difference in a height direction (eg, Z-axis direction) intersecting the longitudinal direction in which the contact portion 123 extends overlaps the contact portion 123 .

[0093] In one embodiment, the contact portion 123 is inserted into the etching groove 113 formed on the lower surface of the wafer 110, and the pattern portion 127 can be arranged in a manner of forming a height difference downward on the lower surface of the contact portion 123 exposed to the outside. In one embodiment, the contact portion 123 and the pattern portion 127 are in contact with each other in a state where at least a portion overlaps each other in the extended length direction.

[0094] In one embodiment, the contact portion 123 is configured to be inserted into one side of the wafer 110, and the pattern portion 127 can be configured to protrude outward from one side of the wafer 110. For example, the wafer 110 is etched only in the area corresponding to the contact portion 123, and the area corresponding to the pattern portion 127 may not be etched (one layer pattern plating).

[0095] This has the following effects: the shapes of the wafer 110 and the plurality of probe pins 120 can be maintained, and process stability can be ensured, thereby improving the production yield of the probe card 100.

[0096] Figure 8 FIG. 1 is a perspective view of a wafer 110 combined with a plurality of probe pins 120 according to another embodiment of the present disclosure.

[0097] Reference Figure 8 In one embodiment, the plurality of probe pins 120 can be arranged in a manner that the contact portion 123 and the pattern portion 127 are inserted into the interior of the wafer 110 from one side of the wafer 110. As in one embodiment, in the plurality of probe pins 120, the contact portion 123 and the pattern portion 127 can be formed as one body.

[0098] The wafer 110 of one embodiment may have etching grooves 113 formed in the regions corresponding to the contact portions 123 and the pattern portions 127. As one embodiment, the plurality of probe pins 120 may be arranged with most of the regions extending in the longitudinal direction inserted into the etching grooves 113.

[0099] The plurality of probe pins 120 of the above embodiment can prevent damage such as breakage caused by contact with the object to be detected, and can prevent separation from the wafer 110 caused by contact with the object to be detected. Furthermore, since they are integrally configured, noise in signal transmission can be minimized.

[0100] Fig. 9 The deformed portions 900 of a plurality of probe pins 120 according to an embodiment of the present disclosure are shown.

[0101] Reference Fig. 9 In one embodiment, at least a portion of the plurality of probe pins 120 may be formed with a deformed portion 900 that is protruded or recessed in a specified form.

[0102] As an embodiment, at least a portion of the plurality of probe pins 120 may have a deformed portion 900 that is protruding or recessed in a specified shape. For example, the deformed portion 900 may be in a specific graphic shape. Fig. 9 As shown in (a), the deformation portion 900 may be at least one circle. Fig. 9 As shown in (b), the deformation portion 900 can be at least a rectangle.

[0103] As an embodiment, different deformation portions 900 may be formed in a portion of the plurality of probe pins 120 .

[0104] According to the shape, size, protrusion or depression depth of the deformation portion 900, the force (Force) and friction (Scrub) of the plurality of probe pins 120 on the object to be detected can be adjusted.

[0105] Fig.10 FIG. 1 is an enlarged view of a plurality of probe pins 120 according to an embodiment of the present disclosure. Fig.11 FIG. 1 is a schematic diagram of a plurality of probe pins 120 matched with a detected object S according to an embodiment of the present disclosure.

[0106] Reference Figure 10 to Figure 11 In one embodiment, the plurality of probe pins 120 may include a plurality of pin groups P in pairs. In one embodiment, the plurality of probe pins 120 may include a plurality of pin groups P consisting of two pairs.

[0107] In one embodiment, the pin groups P formed in pairs among the plurality of probe pins 120 may contact and connect with the same object to be detected S (eg, micro LED chip (μLED_chip)).

[0108] In one embodiment, the plurality of pin groups P formed in pairs in the plurality of probe pins 120 may be spaced apart from each other in a manner corresponding to the interval of the object S to be detected or a multiple of the interval of the object S to be detected.

[0109] As an embodiment, Fig.11 As shown in (a), the plurality of pin groups P formed in pairs may be arranged in a 1:1 manner corresponding to the intervals of the objects S to be detected. For example, the intervals between the plurality of pin groups P may be consistent with the intervals between the objects S to be detected.

[0110] As an embodiment, the plurality of pin groups P formed in pairs may be spaced apart in a manner corresponding to a multiple (n, where n is a natural number) of the interval of the object S to be detected.

[0111] As an embodiment, Fig.11 As shown in (b), the plurality of pin groups P can be spaced at intervals twice the intervals between the detected bodies S. Thus, the plurality of pin groups P can skip one detected body S disposed between the detected bodies S corresponding to the plurality of pin groups P according to the spacing intervals. For example, the plurality of pin groups P can move the same distance as the interval between the detected bodies S (e.g., 1 / 2 of the interval between the plurality of pin groups P) and generate a detection signal.

[0112] As an embodiment, Fig.11 As shown in (c), the plurality of pin groups P can be spaced at intervals three times the interval between the detected objects S. Thus, the plurality of pin groups P can skip two detected objects S arranged between the detected objects S corresponding to the plurality of pin groups P according to the spacing intervals. For example, the plurality of pin groups P can move the same distance as the interval between the detected objects S (e.g., 1 / 3 of the interval between the plurality of pin groups P) and generate a detection signal.

[0113] Fig.12 FIG. 1 is a three-dimensional diagram of a film 130 according to an embodiment of the present disclosure. Fig.13FIG. 4 is a circuit diagram of a plurality of signal lines formed on the thin film 130 according to an embodiment of the present disclosure. Fig.14 FIG. 1 is a three-dimensional diagram of a circuit substrate 140 according to an embodiment of the present disclosure.

[0114] Reference Figure 12 to Figure 14 In one embodiment, the thin film 130 may be formed with a plurality of signal lines 1200 extending from one side to the other side.

[0115] In one embodiment, the spacing between the plurality of signal lines 1200 is expanded on one side relative to the other side. As one embodiment, the spacing between the plurality of signal lines 1200 may be expanded between one side connected to the plurality of probe pins 120 and the other side connected to the circuit substrate 140 .

[0116] As an embodiment, the plurality of signal lines 1200 may be composed of a first portion 1210 , a second portion 1220 and a third portion 1230 .

[0117] As an embodiment, in the first portion 1210 , the intervals between the plurality of signal lines 1200 may correspond to the intervals (eg, the second interval) on the other side of the plurality of probe pins 120 .

[0118] As an embodiment, in the second portion 1220 , the intervals between the plurality of signal lines 1200 may be gradually expanded.

[0119] As an example, in the third portion 1230 , the intervals between the plurality of signal lines 1200 may correspond to a third interval that is extended relative to the second interval. The third interval may be the interval between printed lines of the circuit substrate 140 and / or the interval of a measuring instrument connected to the circuit substrate 140 .

[0120] As an example, the intervals between the plurality of probe pins 120 can be expanded once. As an example, the intervals between the plurality of signal lines 1200 can be expanded twice. Thus, the lines for connecting the detection signals transmitted to the circuit substrate can be expanded once and twice in correspondence with the micro pitch between the objects to be detected.

[0121] The circuit substrate 140 of one embodiment may extend along the length direction from one side connected to the film 130 to the other side. As one embodiment, the circuit substrate 140 may be a flexible printed circuit (FPC) formed of a flexible material and may be curved along a specific direction.

[0122] As an example, the film 130 and the circuit substrate 140 can be made of polyimide (PI) material. As an example, the film 130 and the circuit substrate 140 can be combined by bonding.

[0123] Fig.15FIG. 1 is a perspective view of a first housing 150 according to an embodiment of the present disclosure. Fig.16 FIG. 1 is a perspective view of a second housing 160 according to an embodiment of the present disclosure.

[0124] Reference Figures 14 to 16 In one embodiment, the first housing 150 and the second housing 160 may be configured to cover and support the chip 110, the film 130, and the circuit substrate 140. In one embodiment, the first housing 150 and the second housing 160 may be made of metal material, for example, aluminum material.

[0125] In one embodiment, the first housing 150 can be configured to support the wafer 110 in a state where the probe tip 125 is tilted downward. In one embodiment, the lower surface of the first housing 150 can be formed with an inclined surface extending obliquely, so that at least a portion of the lower surface of the first housing 150 is supported by the bottom surface.

[0126] In one embodiment, the first housing 150 may be provided with an elastic body 1510, which is configured in a manner of contacting the wafer 110 and configured to be compressed by the combination of the first housing 150 and the second housing 160. As in one embodiment, an insertion groove 155 into which the elastic body 1510 can be inserted is formed at the upper portion of the first housing 150, and the elastic body 1510 can be inserted into the inside of the insertion groove 155. As in one embodiment, the elastic body 1510 can pressurize the wafer 110 in a state of being compressed by the combination of the first housing 150 and the second housing 160.

[0127] As an embodiment, the first housing 150 and the second housing 160 may be fixedly coupled by bolts.

[0128] Fig.17 FIG17 is a flow chart ( 1700 ) of a method for manufacturing the probe card 100 according to an embodiment of the present disclosure. Figures 18a to 18e It is a state diagram corresponding to the manufacturing method of the probe card 100 according to an embodiment of the present disclosure. Fig.19 It is a state diagram corresponding to the manufacturing method of the probe card 100 according to an embodiment of the present disclosure.

[0129] Reference Fig.17 , Figures 18a to 18e and Fig.19 , a method for manufacturing the probe card 100 of one embodiment may include: step 1710, etching a probe groove along a depth direction on one side of the above-mentioned chip 110; step 1730, plating and forming the above-mentioned multiple probe pins 120 in the above-mentioned etched probe groove; step 1750, etching a part of the above-mentioned chip 110 in a manner that the above-mentioned probe tip 125 is exposed to the outside; and / or step 1770, connecting the above-mentioned chip 110 to the above-mentioned film 130 and the above-mentioned circuit substrate 140.

[0130] In a method for manufacturing the probe card 100 according to an embodiment, Fig.18a As shown, a wafer 110 may be prepared. For example, the wafer 110 may be a high resistance substrate (HRS) wafer 110 .

[0131] In the manufacturing method of the probe card 100 of one embodiment, in step 1710, a probe groove may be etched along a depth direction on one side of the wafer 110. For example, the probe groove may be etched along a depth direction on one side of the wafer 110 by inductively coupled plasma (ICP) etching.

[0132] As one embodiment, the probe groove may be etched along the depth direction on one side of the wafer 110 by exposure. As one embodiment, a honing process may be used to etch a portion of the probe groove corresponding to the probe tip 125. As one embodiment, the honing process may be used to etch the entire probe groove.

[0133] In a method for manufacturing the probe card 100 according to an embodiment, a SiO 2 insulating film may be formed on the wafer 110 , and titanium (Ti) and copper (Cu) may be deposited (sputtered) on the wafer 110 .

[0134] In a method for manufacturing the probe card 100 according to an embodiment, Fig.18b and Fig.18c As shown, in step 1730, a plurality of probe pins 120 may be formed by plating in the etched probe grooves. For example, the plurality of probe pins 120 may be made of nickel (Ni) or nickel alloy (Ni-X).

[0135] As an embodiment, a plurality of probe pins 120 may be formed by plating along the probe grooves etched in the wafer 110. The intervals between the plurality of probe pins 120 may be expanded from one side to the other side.

[0136] As an embodiment, the plurality of probe pins 120 include probe tips 125 and may include contact portions 123 spaced apart from each other at a first pitch and pattern portions 127 connected to the contact portions 123 and configured to extend from the first pitch to a second pitch.

[0137] As an embodiment, the contact portion 123 is formed by plating along the probe groove etched in the wafer 110 , and the pattern portion 127 overlaps at least a portion of the contact portion 123 in the extended length direction, and can be formed by plating separately on the upper portion to form a height difference.

[0138] As another embodiment, the contact portion 123 and the pattern portion 127 may be plated and formed as one body along the etched probe groove of the wafer 110 .

[0139] In a method for manufacturing the probe card 100 according to an embodiment, Fig.18d As shown, in step 1750, a portion 115 of the wafer 110 can be etched in such a manner that the probe tip 125 is exposed to the outside.

[0140] As an embodiment, the wafer 110 may be etched (HRS etching) a portion 115 of the wafer 110 in a manner that the probe tips 125 of the plurality of probe pins 120 are exposed to the outside on one side of the wafer 110 where the probe tips 125 are formed. Thus, a portion of the plurality of probe pins 120 including the probe tips 125 may be exposed to the outside from the wafer 110.

[0141] In a method for manufacturing the probe card 100 according to an embodiment, Fig.19 As shown, in step 1770 , the chip 110 may be connected to the film 130 and the circuit substrate 140 .

[0142] As one embodiment, the wafer 110, the film 130, and the circuit substrate 140 integrated with the plurality of probe pins 120 may be integrated between the first housing 150 and the second housing 160. As one embodiment, the wafer 110, the film 130, and / or the circuit substrate 140 may be temporarily fixed to the first housing 150 or the second housing 160 while aligning the signal connection lines of the wafer 110, the film 130, and / or the circuit substrate 140, and the first housing 150 may be combined with the second housing 160. Thus, the relative positions of the wafer 110, the film 130, and the circuit substrate 140 may be fixed.

[0143] The foregoing description of the present disclosure is for illustration, and a person skilled in the art of the present disclosure should understand that the present disclosure can be easily modified into other specific forms without changing the technical ideas or essential features of the present disclosure. Therefore, it should be understood that the embodiments described above are exemplary in all respects and not restrictive. For example, each component element described as a single type can be implemented in a dispersed manner, and the components described as dispersed can also be implemented in a combined form.

[0144] The scope of the present disclosure is indicated by the claims rather than the detailed description above, and should be interpreted as the meaning and scope of the claims and all changes or modified forms derived from their equivalent concepts are included in the scope of the present disclosure.

Claims

1. A probe card for detecting electrical characteristics of a test object, characterized in that: include: a plurality of probe pins, one side of which is formed with a probe tip disposed in a manner of contacting the object to be detected, and the plurality of probe pins extend from the one side to the other side; a wafer integrally combined with the plurality of probe pins in a state where at least a part of the plurality of probe pins is inserted inside, and configured in a manner that the probe tips are exposed to the outside; a thin film which is arranged in such a manner that one side overlaps with the wafer and the thin film is connected to the other side of the plurality of probe pins; and a circuit substrate arranged in such a manner that at least a portion overlaps with the other side of the film and arranged to receive the probe signals from the plurality of probe pins through the film, The intervals between the plurality of probe pins expand at the other side of the plurality of probe pins relative to the one side of the plurality of probe pins.

2. The probe card according to claim 1, wherein: The plurality of probe pins extend from an end portion of the wafer such that the probe tips are disposed further outward than the end portion of the wafer.

3. The probe card according to claim 1, wherein: One side of the wafer corresponding to the probe tips is etched so that the probe tips included in the plurality of probe pins are exposed to the outside.

4. The probe card according to claim 1, wherein: The wafer is etched along a depth direction on one side of the wafer in a manner corresponding to the at least a portion of the plurality of probe pins, At least a portion of the plurality of probe pins is inserted and arranged inside the one surface of the wafer.

5. The probe card according to claim 1, wherein: The plurality of probe pins are spaced apart from each other at intervals of a first spacing on one side of the plurality of probe pins in correspondence with the object to be detected, and are spaced apart from each other at intervals of a second spacing on the other side of the plurality of probe pins in correspondence with the film, and are configured so that the spacing extends from the first spacing to the second spacing between one side of the plurality of probe pins and the other side of the plurality of probe pins.

6. The probe card according to claim 5, characterized in that: The plurality of probe pins include the probe tip, and include contact portions spaced apart from each other at intervals of the first interval, and pattern portions connected to the contact portions and configured to have intervals extending from the first interval to the second interval.

7. The probe card according to claim 6, wherein: The pattern portion is arranged so that a portion thereof having a height difference formed along a height direction intersecting a longitudinal direction in which the contact portion extends overlaps the contact portion.

8. The probe card according to claim 6, wherein: The contact portion is arranged so as to be inserted into one side of the wafer. The pattern portion is arranged such that at least a portion thereof protrudes outward from the one surface of the wafer.

9. The probe card according to claim 1, wherein: The plurality of probe pins include a plurality of pin groups formed in pairs, The plurality of pin groups are spaced apart from each other in a manner corresponding to the interval between the objects to be detected or a multiple of the interval between the objects to be detected.

10. The probe card according to claim 1, wherein: A deformed portion that is protruded or recessed in a predetermined form is formed on at least a portion of the plurality of probe pins.

11. The probe card according to claim 1, wherein: A plurality of signal lines extending from one side of the film to the other side of the film are formed on the film, The intervals between the plurality of signal lines are expanded on the other side of the film relative to the one side of the film.

12. The probe card according to claim 1, wherein: Also includes: a first housing configured to support at least a portion of the wafer from below; as well as The second housing is combined with the first housing and is configured to cover the wafer from above in a state where the probe tip is exposed to the outside.

13. The probe card according to claim 12, wherein: The first housing is provided with an elastic body, the elastic body is arranged to be in contact with the wafer, and is arranged to be compressed by the connection between the first housing and the second housing.

14. The probe card according to claim 12, wherein: The first housing is configured to support the wafer in a state where the probe tip is tilted downward.

15. A method for manufacturing the probe card according to claim 1, characterized in that: include: A step of etching a probe groove along a depth direction on one side of the wafer; The step of forming the plurality of probe pins by plating in the etched probe groove; a step of etching a portion of the wafer in such a manner that the probe tip is exposed to the outside; as well as The step of connecting the chip to the film and the circuit substrate.

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