FC four-node distributed simulation monitoring equipment control circuit and method

Abstract

The invention relates to an FC four-node distributed simulation monitoring equipment control circuit and method.The circuit comprises a power circuit, a PCIe host interface, an FC four-node independent control unit and an FC four-node bus interface, and the power circuit is responsible for supplying power to the FC four-node independent control unit; the FC four-node independent control unit comprises an embedded processor, a first FC photoelectric module, a second FC photoelectric module, a third FC photoelectric module, a fourth FC photoelectric module and an FPGA (Field Programmable Gate Array), and the FC four-node bus interface is respectively connected with the first FC photoelectric module, the second FC photoelectric module, the third FC photoelectric module and the fourth FC photoelectric module; the FPGA comprises a multiplexing unit, a first-path FC protocol processing unit, a second-path FC protocol processing unit, a third-path FC protocol processing unit and a fourth-path FC protocol processing unit, and the multiplexing unit is respectively connected with the first-path FC protocol processing unit, the second-path FC protocol processing unit, the third-path FC protocol processing unit and the fourth-path FC protocol processing unit. And the multiplexing unit is connected with the PCIe host interface. According to the invention, the defect that the traditional FC multi-node networking simulation monitoring function is usually realized by using a multi-product form can be overcome, guarantee is provided for building an airborne FC network platform, the production use can be effectively reduced, and meanwhile, the integration of equipment is improved.

Description

Technical Field

[0001] The present invention belongs to FC bus multi-node technology, relates to the fields of aviation, navigation and industrial control, and in particular to a FC four-node distributed simulation monitoring equipment control circuit and method. Background Art

[0002] FC simulation monitoring circuits are widely used in aviation, navigation, industrial control and other fields. Due to the need for multi-node networking in FC systems, existing FC products are at most dual-node and multi-node distributed simulation monitoring products. Limited by existing products on the market, traditional FC multi-node networking simulation monitoring functions are usually implemented in the form of multiple products, which will reduce the integration of corresponding equipment and increase production and use costs. Summary of the invention

[0003] In order to solve the above-mentioned technical problems existing in the background technology, the present invention provides a FC four-node distributed simulation monitoring equipment control circuit and method, which can solve the disadvantage that the traditional FC multi-node networking simulation monitoring function is usually implemented in the form of multiple products, provide guarantee for building an airborne FC network platform, effectively reduce production use, and improve the integration of the equipment.

[0004] The technical solution of the present invention is: the present invention is a FC four-node distributed simulation monitoring device control circuit, which is special in that: the FC four-node distributed simulation monitoring device control circuit includes a power supply circuit, a PCIe host interface, a FC four-node independent control unit and a FC four-node bus interface, the power supply circuit is responsible for supplying power to the FC four-node independent control unit, the FC four-node independent control unit includes an embedded processor, a first FC optoelectronic module, a second FC optoelectronic module, a third FC optoelectronic module, a fourth FC optoelectronic module and an FPGA, the FC four-node bus interface is respectively connected to the first FC optoelectronic module, the second FC optoelectronic module, the third FC optoelectronic module and the fourth FC optoelectronic module, the FPGA includes a multiplexing unit, a first FC protocol processing unit, a second FC protocol processing unit, and a third FC protocol processing unit. FC protocol processing unit, a third FC protocol processing unit and a fourth FC protocol processing unit, the first FC protocol processing unit is connected to the first FC optoelectronic module, the second FC protocol processing unit is connected to the second FC optoelectronic module, the third FC protocol processing unit is connected to the third FC optoelectronic module, the fourth FC protocol processing unit is connected to the fourth FC optoelectronic module, the embedded processor is respectively connected to the first FC protocol processing unit, the second FC protocol processing unit, the third FC protocol processing unit and the fourth FC protocol processing unit, the multiplexing unit is respectively connected to the first FC protocol processing unit, the second FC protocol processing unit, the third FC protocol processing unit and the fourth FC protocol processing unit, and the multiplexing unit is connected to the PCIe host interface.

[0005] Furthermore, the embedded processor is connected to configuration circuits such as clock and storage.

[0006] A method for implementing the above-mentioned FC four-node distributed simulation monitoring device control circuit is special in that the method comprises the following steps:

[0007] 1) The upper layer application outputs the corresponding node sending instruction through the PCIe host interface, and the multiplexing unit inputs it. The multiplexing unit parses and analyzes the input instruction information, and specifies the corresponding FC node channel for data transmission according to the analysis result. The corresponding unit in the FC protocol processing unit outputs the corresponding data, which is input into the corresponding FC four-node bus interface;

[0008] 2) After receiving the corresponding FC bus data, the FC four-node bus interface outputs the data to the corresponding FC protocol processing unit. The FC protocol processing unit inputs and then outputs the interrupt signal of the corresponding node to the multiplexing unit. The multiplexing unit performs fair polling and reception of the data of the corresponding node in the order of 1, 2, 3, and 4 of the first FC protocol processing unit, the second FC protocol processing unit, the third FC protocol processing unit, and the fourth FC protocol processing unit according to the input interrupt signal, and then outputs it to the PCIe host interface, and uploads the FC bus data to the application layer for reception through the PCIe host interface.

[0009] Furthermore, the first FC protocol processing unit, the second FC protocol processing unit, the third FC protocol processing unit and the fourth FC protocol processing unit all use the same FC protocol processing unit, and the FC protocol processing unit includes a sending DMA channel control module, a sending scheduling control module, an FC-MAC sending control module, a receiving DMA channel control module, an FC-MAC receiving control module and an FC-MAC module. The FC four-node independent sending logic of the FC protocol processing unit is as follows: after the PCIe host is initialized and configured, the memory address is calculated by querying the register value of the current buffer unit, and ASM message data is prepared in the host memory according to the ASM message frame format. The sending DMA channel control module queries the sending control information queue, and the sending scheduling control module queries the sending circular buffer to start the sending scheduling. After the scheduling is completed, the sending control information is passed to the FC-MAC sending control module; the sending DMA channel control module has a transparent forwarding function. When the transparent forwarding function is started, other FC port messages are passed to the FC-MAC module; the FC protocol The FC four-node independent receiving logic of the processing unit is as follows: after the FC four-node bus interface receives the corresponding FC bus data, it receives the FC-2 frame data through the FC-MAC receiving control module, and the receiving DMA channel control module starts DMA according to the receiving control information, extracts the FC-ASM message header and data payload from the receiving on-chip circular buffer and transmits them to the host memory. The receiving DMA channel control module has a transparent forwarding function. When the transparent forwarding function is started, the buffer message is passed to other FC ports; the four-node simulation monitoring card has a simulation mode and a monitoring mode, wherein the simulation mode is divided into large queue management and small queue management; in the large queue mode, a linked list is created with the queue number as the index, and the large queue number corresponding to the message is written to the receiving completion message queue flag to send an interrupt to the host; in the small queue mode, a linked list is created with the small queue number as the index, and the large queue number and small queue number corresponding to the message are written to the receiving completion message queue flag to send an interrupt to the host; in the monitoring mode, the FC-MAC module receives the FC-2 frame data and transmits it to the host memory to realize the monitoring function.

[0010] Furthermore, the independent sending logic of the FC four nodes is as follows: after the PCIe host is initialized and configured, the memory address is calculated by querying the register value of the current buffer unit, and the ASM message data is prepared in the host memory according to the ASM message frame format. The sending DMA channel control module queries the sending control information queue, and the sending scheduling control module queries the sending circular buffer to start the sending scheduling. After the scheduling is completed, the sending control information is passed to the FC-MAC sending control module; the sending DMA channel control module has a transparent forwarding function. When the transparent forwarding function is started, other FC port messages are passed to the FC-MAC module.

[0011] Furthermore, the independent receiving logic of the FC four nodes is as follows: after the FC four-node bus interface receives the corresponding FC bus data, it receives the FC-2 frame data through the FC-MAC receiving control module, and the receiving DMA channel control module starts DMA according to the receiving control information, extracts the FC-ASM message header and data payload from the receiving on-chip circular buffer and transmits them to the host memory. The receiving DMA channel control module has a transparent forwarding function. When the transparent forwarding function is started, the buffer message is passed to other FC ports; the four-node simulation monitoring card has a simulation mode and a monitoring mode, wherein the simulation mode is divided into large queue management and small queue management; in the large queue mode, a linked list is created for each with the queue number as the index, and the large queue number corresponding to the message is written to the receiving completion message queue flag to send an interrupt to the host; in the small queue mode, a linked list is created for each with the small queue number as the index, and the large queue number and small queue number corresponding to the message are written to the receiving completion message queue flag to send an interrupt to the host; in the monitoring mode, the FC-MAC module receives the FC-2 frame data and transmits it to the host memory to realize the monitoring function.

[0012] In order to solve the problem that the traditional FC multi-node networking simulation monitoring function is usually implemented in the form of multiple products in a multi-node FC application environment, the present invention provides a guarantee for building an airborne FC network platform, effectively reduces production use, and improves the integration of equipment. A FC four-node distributed simulation monitoring equipment control circuit and method are proposed. The circuit includes a four-node FC bus interface, a host interface and a four-node independent control unit, which can simultaneously realize the parsing and processing of four-way independent FC-AE-ASM protocol data, and provide a guarantee for building an airborne FC network application environment in the application scenario of a multi-node FC bus. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 It is a circuit structure diagram of the present invention;

[0014] Figure 2 It is the internal logic structure diagram of the present invention;

[0015] Figure 3 It is a sending logic structure diagram of the present invention;

[0016] Figure 4 It is a receiving logic structure diagram of the present invention. DETAILED DESCRIPTION

[0017] The present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0018] See also Figure 1 , 2The structure of a specific embodiment of a FC four-node distributed simulation monitoring device control circuit of the present invention includes a power supply circuit, a PCIe host interface, a FC four-node independent control unit and a FC four-node bus interface; the power supply circuit is responsible for supplying power to the FC four-node independent control unit, the FC four-node independent control unit includes an embedded processor, a first FC optoelectronic module, a second FC optoelectronic module, a third FC optoelectronic module, a fourth FC optoelectronic module and an FPGA, the FC four-node bus interface is respectively connected to the first FC optoelectronic module, the second FC optoelectronic module, the third FC optoelectronic module and the fourth FC optoelectronic module, the FPGA includes a multiplexing unit, a first FC protocol processing unit, a second FC protocol processing unit, a third FC protocol The first FC protocol processing unit is connected to the first FC optoelectronic module, the second FC protocol processing unit is connected to the second FC optoelectronic module, the third FC protocol processing unit is connected to the third FC optoelectronic module, and the fourth FC protocol processing unit is connected to the fourth FC optoelectronic module. The embedded processor is respectively connected to the first FC protocol processing unit, the second FC protocol processing unit, the third FC protocol processing unit, and the fourth FC protocol processing unit. The multiplexing unit is respectively connected to the first FC protocol processing unit, the second FC protocol processing unit, the third FC protocol processing unit, and the fourth FC protocol processing unit. The multiplexing unit is connected to the PCIe host interface. The embedded processor is connected to configuration circuits such as clock and storage.

[0019] The FC four-node independent control unit realizes the simulation monitoring of four independent FC nodes through the internal multiplexer and the external FC four-node bus interface.

[0020] The first FC protocol processing unit, the second FC protocol processing unit, the third FC protocol processing unit and the fourth FC protocol processing unit all use the same FC protocol processing unit. The FC protocol processing unit includes a sending DMA channel control module, a sending scheduling control module, an FC-MAC sending control module, a receiving DMA channel control module, an FC-MAC receiving control module and an FC-MAC module. The FC four-node independent sending logic of the FC protocol processing unit is as follows: after the PCIe host is initialized and configured, the memory address is calculated by querying the register value of the current buffer unit, and the ASM message data is prepared in the host memory according to the ASM message frame format. The sending DMA channel control module queries the sending control information queue, and the sending scheduling control module queries the sending circular buffer to start the sending scheduling. After the scheduling is completed, the sending control information is passed to the FC-MAC sending control module; the sending DMA channel control module has a transparent forwarding function. When the transparent forwarding function is started, other FC port messages are passed to the FC-MAC module; the FC protocol processing The FC four-node independent receiving logic of the unit is as follows: after the FC four-node bus interface receives the corresponding FC bus data, it receives the FC-2 frame data through the FC-MAC receiving control module, and the receiving DMA channel control module starts DMA according to the receiving control information, extracts the FC-ASM message header and data payload from the receiving on-chip circular buffer and transmits them to the host memory. The receiving DMA channel control module has a transparent forwarding function. When the transparent forwarding function is started, the buffer message is passed to other FC ports; the four-node simulation monitoring card has a simulation mode and a monitoring mode, wherein the simulation mode is divided into large queue management and small queue management; in the large queue mode, a linked list is created for each with the queue number as the index, and the large queue number corresponding to the message is written to the receiving completion message queue flag to send an interrupt to the host; in the small queue mode, a linked list is created for each with the small queue number as the index, and the large queue number and small queue number corresponding to the message are written to the receiving completion message queue flag to send an interrupt to the host; in the monitoring mode, the FC-MAC module receives the FC-2 frame data and transmits it to the host memory to realize the monitoring function.

[0021] The specific embodiment of the method of receiving and sending data of the FC four-node distributed simulation monitoring device control circuit is as follows:

[0022] 1) The upper layer application outputs the corresponding node sending instruction through the PCIe host interface, and the multiplexing unit inputs it. The multiplexing unit parses and analyzes the input instruction information, and specifies the corresponding FC node channel for data transmission according to the analysis result. The corresponding unit in the FC protocol processing unit outputs the corresponding data, which is input into the corresponding FC four-node bus interface;

[0023] 2) After receiving the corresponding FC bus data, the FC four-node bus interface outputs the data to the corresponding FC protocol processing unit. The FC protocol processing unit inputs and then outputs the interrupt signal of the corresponding node to the multiplexing unit. The multiplexing unit performs fair polling and reception of the data of the corresponding node in the order of 1, 2, 3, and 4 of the first FC protocol processing unit, the second FC protocol processing unit, the third FC protocol processing unit, and the fourth FC protocol processing unit according to the input interrupt signal, and then outputs it to the PCIe host interface, and uploads the FC bus data to the application layer for reception through the PCIe host interface.

[0024] See also Figure 3 ,The independent sending logic of the FC four nodes is as follows: After the PCIe host is initialized and configured, the memory address is calculated by querying the register value of the current buffer unit, and the ASM message data is prepared in the host memory according to the ASM message frame format. The sending DMA channel control module queries the sending control information queue, and the sending scheduling control module queries the sending circular buffer to start the sending scheduling. After the scheduling is completed, the sending control information is passed to the FC-MAC sending control module; the sending module has a transparent forwarding function. When the transparent forwarding function is started, other FC port messages are passed to the FC-MAC module.

[0025] See also Figure 4 , the independent receiving logic of the FC four nodes is: after the FC four-node bus interface receives the corresponding FC bus data, it receives the FC-2 frame data through the FC-MAC receiving control module, and the receiving DMA channel control module starts DMA according to the receiving control information, extracts the FC-ASM message header and data payload from the receiving on-chip circular buffer and transmits them to the host memory. The receiving module has a transparent forwarding function. When the transparent forwarding function is started, the buffer message is passed to other FC ports. The four-node simulation monitoring card in the present invention has a simulation mode and a monitoring mode, wherein the simulation mode is divided into large queue management and small queue management. In the large queue mode, each creates a linked list with the queue number as the index, and the large queue number corresponding to the message is written to the reception completion message queue flag to send an interrupt to the host; in the small queue mode, each creates a linked list with the small queue number as the index, and the large queue number and small queue number corresponding to the message are written to the reception completion message queue flag to send an interrupt to the host. In the monitoring mode, the FC-MAC receives the FC-2 frame data and transmits it to the host memory to realize the monitoring function.

[0026] The above are only specific embodiments disclosed in the present invention, but the protection scope of the present invention is not limited thereto. The protection scope of the present invention shall be based on the protection scope of the claims.

[0027] The content of the present invention and the technical content not specifically described in the above embodiments are the same as the prior art.

[0028] The present invention is not limited to the above embodiments, and all of the contents of the present invention can be implemented and have the above good effects.

Claims

1. A FC four-node distributed simulation monitoring device control circuit, characterized in that: The FC four-node distributed simulation monitoring device control circuit includes a power supply circuit, a PCIe host interface, a FC four-node independent control unit and a FC four-node bus interface. The power supply circuit is responsible for supplying power to the FC four-node independent control unit. The FC four-node independent control unit includes an embedded processor, a first FC optoelectronic module, a second FC optoelectronic module, a third FC optoelectronic module, a fourth FC optoelectronic module and an FPGA. The FC four-node bus interface is respectively connected to the first FC optoelectronic module, the second FC optoelectronic module, the third FC optoelectronic module and the fourth FC optoelectronic module. The FPGA includes a multiplexing unit, a first FC protocol processing unit, a second FC protocol processing unit, a third FC protocol processing unit and a fourth FC protocol processing unit. The first FC protocol processing unit is connected to a first FC optoelectronic module, the second FC protocol processing unit is connected to a second FC optoelectronic module, the third FC protocol processing unit is connected to a third FC optoelectronic module, and the fourth FC protocol processing unit is connected to a fourth FC optoelectronic module. The embedded processor is respectively connected to the first FC protocol processing unit, the second FC protocol processing unit, the third FC protocol processing unit, and the fourth FC protocol processing unit. The multiplexing unit is respectively connected to the first FC protocol processing unit, the second FC protocol processing unit, the third FC protocol processing unit, and the fourth FC protocol processing unit. The multiplexing unit is connected to a PCIe host interface.

2. The FC four-node distributed simulation monitoring device control circuit according to claim 1 is characterized in that: The embedded processor is connected to a clock and a storage configuration circuit.

3. The FC four-node distributed simulation monitoring device control circuit according to claim 2 is characterized in that: The first FC protocol processing unit, the second FC protocol processing unit, the third FC protocol processing unit and the fourth FC protocol processing unit all use the same FC protocol processing unit, the FC protocol processing unit includes a sending DMA channel control module, a sending scheduling control module, an FC-MAC sending control module, a receiving DMA channel control module, an FC-MAC receiving control module and an FC-MAC module, and the FC four-node independent sending logic of the FC protocol processing unit is: after the PCIe host performs initialization configuration, the memory address is calculated by querying the register value of the current buffer unit, and ASM message data is prepared in the host memory according to the ASM message frame format, the sending DMA channel control module queries the sending control information queue, and the sending scheduling control module queries the sending circular buffer to start the sending scheduling. After the scheduling is completed, the sending control information The FC-2 frame data is received by the FC-MAC receiving control module after the FC-2 frame data is received by the FC-2 frame data ... In the large queue mode, a linked list is created with the queue number as the index, and the large queue number corresponding to the message is written to the receive completion message queue flag to send an interrupt to the host; in the small queue mode, a linked list is created with the small queue number as the index, and the large queue number and small queue number corresponding to the message are written to the receive completion message queue flag to send an interrupt to the host; in the monitoring mode, the FC-MAC module receives the FC-2 frame data and transmits it to the host memory to realize the monitoring function.

4. A method for implementing the FC four-node distributed simulation monitoring device control circuit of claim 1, characterized in that: The method comprises the following steps: 1) The upper layer application outputs the corresponding node sending instruction through the PCIe host interface, and the multiplexing unit inputs it. The multiplexing unit parses and analyzes the input instruction information, and specifies the corresponding FC node channel for data transmission according to the analysis result. The corresponding unit in the FC protocol processing unit outputs the corresponding data, which is input into the corresponding FC four-node bus interface; 2) After receiving the corresponding FC bus data, the FC four-node bus interface outputs the data to the corresponding FC protocol processing unit. The FC protocol processing unit inputs and then outputs the interrupt signal of the corresponding node to the multiplexing unit. The multiplexing unit performs fair polling and reception of the data of the corresponding node in the order of 1, 2, 3, and 4 of the first FC protocol processing unit, the second FC protocol processing unit, the third FC protocol processing unit, and the fourth FC protocol processing unit according to the input interrupt signal, and then outputs it to the PCIe host interface, and uploads the FC bus data to the application layer for reception through the PCIe host interface.

5. The FC four-node distributed simulation monitoring device control method according to claim 4 is characterized in that: The independent sending logic of the FC four nodes is as follows: after the PCIe host is initialized and configured, the memory address is calculated by querying the register value of the current buffer unit, and the ASM message data is prepared in the host memory according to the ASM message frame format. The sending DMA channel control module queries the sending control information queue, and the sending scheduling control module queries the sending circular buffer to start the sending scheduling. After the scheduling is completed, the sending control information is passed to the FC-MAC sending control module; the sending DMA channel control module has a transparent forwarding function. When the transparent forwarding function is started, other FC port messages are passed to the FC-MAC module.

6. The FC four-node distributed simulation monitoring device control method according to claim 5 is characterized in that: The independent receiving logic of the FC four-node is as follows: after the FC four-node bus interface receives the corresponding FC bus data, it receives the FC-2 frame data through the FC-MAC receiving control module. The receiving DMA channel control module starts DMA according to the receiving control information, extracts the FC-ASM message header and data payload from the receiving on-chip circular buffer and transmits them to the host memory. The receiving DMA channel control module has a transparent forwarding function. When the transparent forwarding function is started, the buffer message is passed to other FC ports. The four-node simulation monitoring card has simulation mode and monitoring mode. The simulation mode is divided into large queue management and small queue management. In the large queue mode, a linked list is created with the queue number as the index, and the large queue number corresponding to the message is written to the receive completion message queue flag to send an interrupt to the host; in the small queue mode, a linked list is created with the small queue number as the index, and the large queue number and small queue number corresponding to the message are written to the receive completion message queue flag to send an interrupt to the host; in the monitoring mode, the FC-MAC module receives the FC-2 frame data and transmits it to the host memory to realize the monitoring function.

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