Test terminal and test system based on FPGA (Field Programmable Gate Array)

Abstract

The invention provides a test terminal and a test system based on an FPGA (Field Programmable Gate Array). The test terminal based on the FPGA comprises a communication module, a configuration data analysis module, a test vector generation module, a driving module and a receiving module, the communication module obtains configuration data of the test function; the configuration data analysis module analyzes the configuration data to obtain to-be-tested signal setting, hardware interface configuration and a test vector function; the test vector generation module generates a test vector according to a test vector function; the driving module generates a test excitation electric signal according to the test vector, and sends the test excitation electric signal to an external test device; the receiving module receives a test signal sent by a test device and converts the test signal into a digital measurement value. Through the advanced FPGA technology, the real-time processing capability, intelligent data analysis and automatic calibration functions can be realized, the efficiency of the test process and the quality of the test result are improved, and the fault pre-judgment capability and the maintenance management level are enhanced.

Description

Technical Field

[0001] The present disclosure relates to the technical field of nuclear power equipment testing, and in particular to a test terminal and a test system based on FPGA. Background Art

[0002] The existing test system for nuclear power equipment uses fixed circuits for testing. The circuit configuration cannot be changed and the entire circuit can only be replaced. It is time-consuming, has poor flexibility, low performance, and low testing efficiency. Summary of the invention

[0003] The technical problem to be solved by the present disclosure is to overcome the defects in the prior art that the circuit configuration cannot be changed and only the entire circuit can be replaced, which is time-consuming, has poor flexibility, low performance and low testing efficiency, and to provide a test terminal and test system based on FPGA.

[0004] The present invention solves the above technical problems through the following technical solutions:

[0005] The present disclosure provides a test terminal based on FPGA, the test terminal is implemented based on FPGA, and the test terminal includes: a communication module, a configuration data parsing module, a test vector generation module, a driving module and a receiving module;

[0006] The communication module is used to obtain configuration data of the test function;

[0007] The configuration data parsing module is used to parse the configuration data to obtain the signal setting to be tested, the hardware interface configuration and the test vector function; wherein the test vector function is composed of several basic function blocks;

[0008] The test vector generation module is used to generate a test vector according to the test vector function;

[0009] The driving module is used to generate a test excitation electrical signal according to the test vector, and send the test excitation electrical signal to an external test device;

[0010] The receiving module is used to receive the test signal sent by the test device and convert the test signal into a digital measurement value.

[0011] Optionally, the test terminal further includes: a calibration signal generating module;

[0012] The communication module is also used to obtain calibration signal requirements;

[0013] The calibration signal generating module is used to generate a calibration vector according to the calibration signal requirement;

[0014] The driving module is further used to generate a calibration excitation electrical signal according to the calibration vector, and send the calibration excitation electrical signal to the test device to be calibrated;

[0015] The receiving module is also used to receive a calibration signal sent by the test device to be calibrated, and convert the calibration signal into a digital measurement value.

[0016] Optionally, the test terminal further includes: an analysis and diagnosis module;

[0017] The analysis and diagnosis module is used to generate a functional function of the test vector; wherein the functional function is composed of basic functions of the basic functional blocks;

[0018] The analysis and diagnosis module is also used to analyze and diagnose the test signal according to the local analysis and diagnosis mathematical model and generate analysis and diagnosis results.

[0019] Optionally, the driving module is further used to generate a corresponding driving circuit according to the signal setting to be tested, the hardware interface configuration and the test vector function to send a signal to the test device;

[0020] The receiving module is also used to generate a corresponding receiving circuit according to the signal setting to be tested and the hardware interface configuration to receive the signal sent by the test equipment.

[0021] Optionally, the communication module is also used to obtain calibration parameters;

[0022] The driving module is also used to adjust the driving circuit according to the calibration parameters;

[0023] The receiving module is further configured to adjust the receiving circuit according to the calibration parameters.

[0024] Optionally, the test terminal further includes: a storage module;

[0025] The storage module is used to store data; wherein the data includes the configuration data, the test vector, the test signal, the calibration vector and the calibration signal.

[0026] Optionally, the test terminal further includes: a display module;

[0027] The display module is used to display the data during the test according to the screen configuration, and to display the analysis and diagnosis results;

[0028] and / or,

[0029] The communication module is also used to communicate with external devices to transmit data.

[0030] The present disclosure also provides a test system based on FPGA, the test system comprising: a design terminal and at least one of the aforementioned test terminals based on FPGA;

[0031] The design terminal is communicatively connected with each of the test terminals;

[0032] The design terminal is used to construct a functional function of a test function using a basic function, generate configuration data of the test function according to the functional function, and send the configuration data to the test terminal;

[0033] The test terminal is used to parse the configuration data to obtain the signal setting to be tested, the hardware interface configuration and the test vector function;

[0034] The test terminal is also used to generate a test vector according to the configuration data;

[0035] The test terminal is also used to generate a test stimulus electrical signal according to the test vector, and send the test stimulus electrical signal to an external test device;

[0036] The test terminal is also used to receive the test signal sent by the test device and convert the test signal into a digital measurement value;

[0037] The test terminal is also used to send the test signal to the design terminal.

[0038] Optionally, the design terminal is further used to generate a calibration signal requirement based on the connection relationship between each of the test terminals and the external test equipment, and send the calibration signal requirement to the corresponding test terminal;

[0039] The test terminal is also used to generate a calibration vector according to the calibration signal requirement;

[0040] The test terminal is also used to generate a calibration excitation electrical signal according to the calibration vector, and send the calibration excitation electrical signal to the test device to be calibrated;

[0041] The test terminal is also used to receive a calibration signal sent by the test device to be calibrated, and convert the calibration signal into a digital measurement value;

[0042] The test terminal is also used to generate a calibration result when the calibration signal falls within a preset accuracy range or when the calibration times are greater than a preset times threshold, and send the calibration result to the design terminal.

[0043] Optionally, the test terminal is further used to calculate a new drive calibration vector using a fitting algorithm when the calibration signal falls outside the preset accuracy range and the calibration number is less than or equal to the preset number threshold, and perform the next calibration measurement;

[0044] and / or,

[0045] In response to a calibration result generated when the calibration number is greater than the preset number threshold and the calibration signal falls outside the preset accuracy range, the design terminal is further used to generate a calibration parameter and send the calibration parameter to the test terminal;

[0046] The test terminal is also used to adjust the driving circuit and the receiving circuit according to the calibration parameters;

[0047] and / or,

[0048] The design terminal is also used to analyze and diagnose the test signals sent by one or more test terminals according to the analysis and diagnosis mathematical model and generate a server-side analysis and diagnosis result.

[0049] On the basis of being in accordance with the common sense in the art, the above-mentioned preferred conditions can be arbitrarily combined to obtain the preferred embodiments of the present disclosure.

[0050] The positive progressive effects of the present disclosure are: the circuit and test system of the test terminal realized by advanced FPGA technology can send test excitation signals to external test equipment and receive test signals returned by the test equipment, and can also send calibration excitation signals to the test equipment and receive calibration signals returned by the test equipment to obtain calibration parameters to adjust the circuit of the test terminal, and can realize real-time input and output signal and data processing capabilities, intelligent data analysis and automatic calibration functions, and through an efficient, flexible, accurate and reliable test system, the efficiency of the test process and the quality of the test results are significantly improved, while the system's fault prediction capabilities and maintenance management level are enhanced. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] Figure 1 A module schematic diagram of a FPGA-based test terminal provided in Embodiment 1 of the present disclosure;

[0052] Figure 2 A module schematic diagram of an FPGA-based test system provided in Example 2 of the present disclosure. DETAILED DESCRIPTION

[0053] The present disclosure is further described below by way of examples, but the present disclosure is not limited to the scope of the examples.

[0054] Prefixes such as "first" and "second" are used in the embodiments of the present disclosure only to distinguish different description objects, and have no limiting effect on the position, order, priority, quantity or content of the described objects. The use of prefixes such as ordinal numbers to distinguish description objects in the embodiments of the present disclosure does not constitute a limitation on the described objects. For the statement of the described objects, please refer to the description in the context of the claims or embodiments, and no unnecessary limitation should be constituted due to the use of such prefixes. In addition, in the description of the present embodiment, unless otherwise specified, the meaning of "plurality" is two or more.

[0055] Example 1

[0056] Figure 1 A module schematic diagram of a test terminal based on FPGA is provided for an exemplary embodiment of the present disclosure. In the figure, arrows indicate signal flow, solid lines indicate signal connections within the test terminal, and dotted lines indicate signal connections between the test terminal and external devices. The test terminal is implemented based on FPGA, and the test terminal includes: a communication module 1, a configuration data parsing module 2, a test vector generation module 3, a driving module 4 and a receiving module 5.

[0057] The communication module 1 is used to obtain the configuration data of the test function. Among them, the test function configuration is a crucial part of the test system, which can greatly improve the flexibility, efficiency and accuracy of the test system. The test function configuration includes configuration definition and configuration verification. Configuration definition refers to defining the functions and behaviors of different test terminals through configuration and settings in the test system. This includes selecting test vector function blocks, setting signals to be tested, configuring hardware interfaces, etc. The configuration definition is operated through the functional configuration software interface, so that testers can easily make various settings. Configuration verification refers to checking and verifying the correctness and validity of the configuration after the configuration is completed. Configuration verification can include: parameter checking, checking whether the parameters are within a reasonable range; functional testing, performing simple functional tests to ensure that the configuration can work properly; consistency checking, ensuring the consistency of the configuration configuration with the actual hardware configuration. The test function configuration ensures the flexibility and customizability of the test process, so that the test system can adapt to different test requirements and environments.

[0058] The configuration data analysis module 2 is used to analyze the configuration data to obtain the signal setting to be tested, the hardware interface configuration and the test vector function. Among them, the test vector function is composed of several basic function blocks. The test vector function corresponds to a function function F(t).

[0059] The test vector generation module 3 is used to generate a test vector according to the test vector function.

[0060] The driving module 4 is used to generate a test excitation electrical signal according to the test vector, and send the test excitation electrical signal to an external test device. For example, the excitation electrical signal can be a current and voltage signal of various magnitudes.

[0061] The receiving module 5 is used to receive the test signal sent by the test equipment and convert the test signal into a digital measurement value. The test signal sent by the test equipment can be a current and voltage signal of various sizes, which needs to be digitized.

[0062] Among them, FPGA (field programmable gate array) is a highly flexible programmable logic device that can be programmed through hardware description languages ​​(HDL) such as VHDL or Verilog to implement specific logic functions. The high parallel processing capability and precise timing control characteristics of FPGA give it significant advantages in implementing complex test sequences and high-precision measurements:

[0063] (1) Generate test vectors through hardware circuits. FPGAs provide hardware-level parallel processing capabilities and can execute multiple operations simultaneously within one clock cycle. This is in stark contrast to the serial execution mode of traditional CPUs. In FPGAs, the hardware circuits that generate test vectors can be executed completely in parallel. The test vector generation module can be designed as multiple parallel logic units, each of which is responsible for generating a specific type of test vector. These logic units can run simultaneously without interfering with each other, thereby achieving fast and large-scale test vector generation.

[0064] In addition, since the behavior of the FPGA is determined by the logic circuits directly described by the hardware description language (such as VHDL or Verilog), the time to generate the test vector is deterministic and will not be affected by factors such as operating system scheduling.

[0065] (2) Hardware circuit analysis of test results. The parallel processing characteristics of FPGA enable it to process multiple data streams simultaneously when analyzing test results. This parallel processing significantly reduces the latency of data processing. Multiple analysis circuits can work simultaneously, with each circuit responsible for analyzing different test result data. In this way, FPGA can process multiple test results at the same time, improving the analysis speed.

[0066] (3) Hardware circuit display test process. FPGA can directly drive the display or other display devices to achieve real-time display through hardware circuits, avoiding the intermediate processing steps of traditional CPU and operating system. FPGA can directly transmit test data to the display device through high-speed I / O interface (such as LVDS, HDMI, etc.) to achieve real-time display.

[0067] In terms of hardware and software co-design, FPGA-based test terminals and test systems require close coordination between hardware and software. The hardware part is designed using HDL, while the software part uses C / C++ development configuration tools to control and manage the FPGA workflow. This co-design method can optimize system performance and improve test efficiency.

[0068] In terms of standardized interfaces and protocols, FPGA-based test terminals usually need to communicate with external test equipment or other external devices. Each test terminal can be connected to multiple external test equipment, so various standardized interfaces and protocols are necessary. These interfaces and protocols ensure the compatibility and scalability of the test system containing the test terminal.

[0069] FPGA-based test terminals and test systems combine a variety of advanced technologies, have flexibility, high performance and reconfigurability, and have good application prospects in electronic test and measurement systems.

[0070] By utilizing the high parallel processing capability of FPGA, the test system can generate test vectors in real time, ensuring the immediacy of the test process. FPGA can also quickly process and analyze test data, provide real-time feedback, and greatly improve test efficiency. Test results (analysis and diagnosis results) can be generated directly at the test terminal, reducing transmission delays and data processing time, ensuring immediacy and accuracy.

[0071] A test data storage module can be set between the receiving module and the storage module. The test data storage module receives the digitized measurement value of the electrical signal from the receiving module (one-way connection), and then sends the measurement value (i.e., the digitized test signal) to the storage module for storage (two-way connection).

[0072] In this embodiment, the circuit and test system of the test terminal are implemented through advanced FPGA technology, which sends a test excitation signal to an external test device and receives a test signal returned by the test device. It can also send a calibration excitation signal to the test device and receive a calibration signal returned by the test device to obtain calibration parameters to adjust the circuit of the test terminal. It can realize real-time input and output signal and data processing capabilities, intelligent data analysis and automatic calibration functions. Through an efficient, flexible, accurate and reliable test system, the efficiency of the test process and the quality of the test results are significantly improved, while the system's fault prediction capability and maintenance management level are enhanced.

[0073] In one embodiment, the test terminal further includes: a calibration signal generating module 6 .

[0074] The communication module 1 is also used to obtain calibration signal requirements.

[0075] The calibration signal generating module 6 is used to generate a calibration vector according to the calibration signal requirement.

[0076] The driving module 4 is further used to generate a calibration excitation electrical signal according to the calibration vector, and send the calibration excitation electrical signal to the test device to be calibrated.

[0077] The receiving module 5 is also used to receive the calibration signal sent by the test device to be calibrated, and convert the calibration signal into a digital measurement value.

[0078] In one embodiment, the test terminal further includes: an analysis and diagnosis module 7 .

[0079] The analysis and diagnosis module 7 is used to generate a functional function of a test vector, wherein the functional function is composed of basic functions of basic function blocks.

[0080] The analysis and diagnosis module 7 is also used to analyze and diagnose the test signal according to the local analysis and diagnosis mathematical model and generate analysis and diagnosis results.

[0081] In one embodiment, the driving module 4 is further used to generate a corresponding driving circuit according to the setting of the signal to be tested, the hardware interface configuration and the test vector function to send a signal to the test equipment.

[0082] The receiving module 5 is also used to generate a corresponding receiving circuit according to the setting of the signal to be tested and the hardware interface configuration to receive the signal sent by the test equipment.

[0083] In one embodiment, the communication module 1 is further used to obtain calibration parameters.

[0084] The driving module 4 is also used to adjust the driving circuit according to the calibration parameters.

[0085] The receiving module 5 is further used to adjust the receiving circuit according to the calibration parameters.

[0086] In one embodiment, the test terminal further includes: a storage module 8 .

[0087] The storage module 8 is used to store data, including configuration data, test vectors, test signals, calibration vectors and calibration signals.

[0088] The test terminal can store test data for a long time, ensuring that the data is still safely stored in the event of a network outage or other communication interruption. The test terminal also stores some intermediate data during the test process.

[0089] The storage module may include two types of storage units. One storage unit is a storage medium that does not lose data when power is off and is used to store configuration data and various configuration data. The other storage unit is a high-speed storage medium that loses data when power is off and is used to store intermediate data.

[0090] In one embodiment, the test terminal further includes: a display module 9 .

[0091] The display module 9 is used to display the data in the test process according to the screen configuration, and to display the analysis and diagnosis results.

[0092] The graphical user interface (GUI) can be used to configure and manage the display and control elements of the test process to perform test system screen configuration operations, thereby improving the intuitiveness and efficiency of the operation and making the test process more convenient and controllable.

[0093] The test system screen configuration includes five aspects: user interface design, control configuration, dynamic display, interactive function and simulation and emulation.

[0094] Specifically, user interface design is the core of screen configuration, aiming to provide an intuitive and easy-to-use operating environment. Key elements include:

[0095] (1) Layout: Arrange various controls and information display areas reasonably to ensure that users can easily find the functions they need.

[0096] (2) Navigation: Design a clear navigation structure so that users can quickly switch between different functional modules.

[0097] (3) Consistency: Maintain consistency in interface style and operation methods to improve user experience.

[0098] Control configuration refers to adding and setting various controls in the screen, such as buttons, text boxes, charts, etc., to achieve user operations and information display. Common controls include:

[0099] (1) Button: used to start or stop testing, load configuration, etc.

[0100] (2) Text box: used to input and display test parameters.

[0101] (3) Charts: used to display test data in real time, such as waveform charts, bar charts, etc.

[0102] (4) Indicator light: used to display system status or alarm information.

[0103] Dynamic display refers to updating the displayed content on the screen according to the real-time data during the test. Dynamic display includes:

[0104] (1) Real-time data update: such as real-time display of voltage, current, temperature and other measurement values.

[0105] (2) Alarm display: When the test parameters exceed the preset range, an alarm is automatically triggered and displayed on the interface.

[0106] (3) Trend chart: Dynamically draw a trend chart of test data to facilitate users to observe data change trends.

[0107] Interactive functions refer to the user's operation and control of the test system through the interface. Interactive functions include:

[0108] (1) Parameter setting: Users can enter and modify test parameters through the interface.

[0109] (2) Test control: Provides control buttons for starting, pausing, and stopping the test.

[0110] (3) Data export: Supports exporting test data as files for subsequent analysis.

[0111] (4) Log viewing: Provides log viewing function to record important events and operation records during the test.

[0112] Simulation and emulation refer to the simulation and exercise of the test process through screen configuration before testing. This can help users become familiar with the operation process and verify the correctness and effectiveness of the configuration.

[0113] Test system screen configuration is an important means to improve test efficiency and user experience. Reasonable interface design and control configuration allow users to easily perform test operations and view data. Dynamic display and interactive functions make the test process more intuitive and controllable.

[0114] In one embodiment, the communication module 1 is also used to communicate with an external device to transmit data.

[0115] Among them, for a single test terminal, it can communicate with other test terminals through the communication module, and can also communicate with other external devices (such as test equipment, design terminals, servers, etc.).

[0116] Example 2

[0117] Figure 2 A module diagram of a FPGA-based test system provided as an exemplary embodiment of the present disclosure, the test system comprises: a design terminal and at least one of the aforementioned FPGA-based test terminals.

[0118] The design terminal is communicatively connected to each test terminal.

[0119] The design terminal is used to build a functional function of the test function using the basic function, generate configuration data of the test function according to the functional function, and send the configuration data to the test terminal.

[0120] The test terminal is used to parse the configuration data to obtain the signal settings to be tested, the hardware interface configuration and the test vector functions.

[0121] The test terminal is also used to generate test vectors according to the configuration data.

[0122] The test terminal is also used to generate a test stimulus electrical signal according to the test vector, and send the test stimulus electrical signal to an external test device.

[0123] The test terminal is also used to receive the test signal sent by the test equipment and convert the test signal into a digital measurement value.

[0124] The test terminal is also used to send a test signal to the design terminal.

[0125] The design terminal can be implemented based on a PC, and the test terminal based on an FPGA can be installed at any location of the system under test.

[0126] When the test system includes only one test terminal, the design terminal is connected to the test terminal point-to-point. When the test system includes multiple test terminals, the test terminals can form a ring network, and the design terminal is connected to one of the test terminals point-to-point. The design terminal communicates with other test terminals through this test terminal, and various data of the design terminal enter the ring network through the connected test terminals to achieve communication with all test terminals; the design terminal can also be connected to any test terminal point-to-point.

[0127] The FPGA-based test system integrates efficient communication routing technology, allowing test terminals to be flexibly installed in different geographical locations to meet distributed testing needs. This flexibility allows test terminals to be installed and placed over long distances according to actual needs, improving the applicability and scalability of the system.

[0128] Through a reliable communication protocol, the test terminal can transmit data to the design terminal as the server, making it convenient for the design terminal to conduct comprehensive analysis and realize centralized management and data backup.

[0129] The design terminal system can establish various data models based on the collected test data to help analyze and understand the test results.

[0130] Through in-depth analysis of the test results, the design terminal can predict the operating status of the system under test, identify potential faults and diagnose them, and provide preventive maintenance recommendations.

[0131] Using advanced configuration software, testers can easily configure the test system, including customization of test functions and display interface, to improve the usability and flexibility of the system. Human-computer interaction can be carried out through a user-friendly interface. Configuration technology makes the operating interface of the test system more intuitive, making it easier for testers to operate and monitor.

[0132] By interconnecting and communicating with external test equipment (standard instruments) through the test terminal, the test system can be automatically calibrated to ensure the accuracy and reliability of the system.

[0133] Through the configuration software, testers can easily configure the calibration process, automatically calibrate the system, and improve calibration efficiency.

[0134] Testers can configure configuration data and calibration processes on the design terminal. Among them, test function configuration is a crucial part of the test system, which can greatly improve the flexibility, efficiency and accuracy of the test system. Test function configuration includes configuration definition and configuration verification. Configuration definition refers to defining the functions and behaviors of different test terminals through configuration and settings in the test system. This includes selecting test vector function blocks, setting signals to be tested, configuring hardware interfaces, etc. Configuration definition is operated through the functional configuration software interface, allowing testers to easily make various settings. Configuration verification refers to checking and verifying the correctness and validity of the configuration after the configuration is completed. Configuration verification can include: parameter checking, checking whether the parameters are within a reasonable range; functional testing, performing simple functional tests to ensure that the configuration can work properly; consistency checking, ensuring the consistency of the configuration configuration with the actual hardware configuration. Test function configuration ensures the flexibility and customizability of the test process, allowing the test system to adapt to different test needs and environments.

[0135] The display and control elements of the test process can be configured and managed through the Graphical User Interface (GUI) to perform test system screen configuration operations, improve the intuitiveness and efficiency of operations, and make the test process more convenient and controllable.

[0136] The test system screen configuration includes five aspects: user interface design, control configuration, dynamic display, interactive function and simulation and emulation.

[0137] Specifically, user interface design is the core of screen configuration, aiming to provide an intuitive and easy-to-use operating environment. Key elements include:

[0138] (1) Layout: Arrange various controls and information display areas reasonably to ensure that users can easily find the functions they need.

[0139] (2) Navigation: Design a clear navigation structure so that users can quickly switch between different functional modules.

[0140] (3) Consistency: Maintain consistency in interface style and operation methods to improve user experience.

[0141] Control configuration refers to adding and setting various controls in the screen, such as buttons, text boxes, charts, etc., to achieve user operations and information display. Common controls include:

[0142] (1) Button: used to start or stop testing, load configuration, etc.

[0143] (2) Text box: used to input and display test parameters.

[0144] (3) Charts: used to display test data in real time, such as waveform charts, bar charts, etc.

[0145] (4) Indicator light: used to display system status or alarm information.

[0146] Dynamic display refers to updating the displayed content on the screen according to the real-time data during the test. Dynamic display includes:

[0147] (1) Real-time data update: such as real-time display of voltage, current, temperature and other measurement values.

[0148] (2) Alarm display: When the test parameters exceed the preset range, an alarm is automatically triggered and displayed on the interface.

[0149] (3) Trend chart: Dynamically draw a trend chart of test data to facilitate users to observe data change trends.

[0150] Interactive functions refer to the user's operation and control of the test system through the interface. Interactive functions include:

[0151] (1) Parameter setting: Users can enter and modify test parameters through the interface.

[0152] (2) Test control: Provides control buttons for starting, pausing, and stopping the test.

[0153] (3) Data export: Supports exporting test data as files for subsequent analysis.

[0154] (4) Log viewing: Provides log viewing function to record important events and operation records during the test.

[0155] Simulation and emulation refer to the simulation and exercise of the test process through screen configuration before testing. This can help users become familiar with the operation process and verify the correctness and effectiveness of the configuration.

[0156] Test system screen configuration is an important means to improve test efficiency and user experience. Reasonable interface design and control configuration allow users to easily perform test operations and view data. Dynamic display and interactive functions make the test process more intuitive and controllable.

[0157] The FPGA-based test system provides a high-performance, high-flexibility and high-reliability test solution by combining advanced hardware and software technologies. Its distributed architecture, high-real-time data processing, long-term data storage and transmission, fault diagnosis, configuration management and automatic calibration functions make the system have broad application prospects and powerful capabilities in the field of electronic testing.

[0158] In this embodiment, the circuit and test system of the test terminal are implemented through advanced FPGA technology, which sends a test excitation signal to an external test device and receives a test signal returned by the test device. It can also send a calibration excitation signal to the test device and receive a calibration signal returned by the test device to obtain calibration parameters to adjust the circuit of the test terminal. It can realize real-time input and output signal and data processing capabilities, intelligent data analysis and automatic calibration functions. Through an efficient, flexible, accurate and reliable test system, the efficiency of the test process and the quality of the test results are significantly improved, while the system's fault prediction capability and maintenance management level are enhanced.

[0159] In one embodiment, the design terminal is also used to generate a calibration signal requirement for the connection relationship between each test terminal and the external test device, and send the calibration signal requirement to the corresponding test terminal. The design terminal configures the hardware interface of the test terminal according to the test device to be tested, and the calibration signal requirement includes the hardware interface configuration.

[0160] The test terminal is also used to generate a calibration vector according to calibration signal requirements.

[0161] The test terminal is also used to generate a calibration excitation electrical signal according to the calibration vector, and send the calibration excitation electrical signal to the test device to be calibrated.

[0162] The test terminal is also used to receive a calibration signal sent by the test equipment to be calibrated, and convert the calibration signal into a digital measurement value.

[0163] The test terminal is also used to generate a calibration result when the calibration signal falls within a preset accuracy range or when the calibration times are greater than a preset times threshold, and send the calibration result to the design terminal.

[0164] Among them, the design terminal can send a calibration signal request to the test terminal in the form of a command. The driver module of the test terminal sets the calibration parameters (signal type and value range, for example: 4.5-5.5 volt voltage signal, 0.1-0.3 amp current signal, etc.) for the output signal to output the calibration excitation electrical signal. The driver module also sets the output value. According to the fitting algorithm, it is necessary to set at least a predetermined number (i.e., a preset number of thresholds, usually five) of typical values ​​across the entire measurement range.

[0165] When the test terminal is connected to an external signal source (driving instrument), the test terminal sets the output value of the external signal source through a universal instrument interface. According to the fitting algorithm, at least a predetermined number (usually five) of typical values ​​spanning the entire measurement range need to be set.

[0166] The receiving module of the test terminal sets calibration parameters (signal type and value range, for example: 2.8-3.3 volt voltage signal, 0.2-0.5 amp current signal, etc.) according to the input signal to input the calibration signal.

[0167] The test terminal compares the set value and the measured value (i.e., the calibration signal). When the data to be calibrated is an input signal (the test device is an external signal source), the set value of the test device (measuring instrument) and the actual test value are compared, that is, whether the calibration signal falls within the preset accuracy range related to the set value of the test device is detected. When the data to be calibrated is an output signal, the set value of the test terminal and the measured value of the measuring device (measuring instrument) are compared, that is, whether the calibration signal falls within the preset accuracy range related to the set value of the test terminal is detected. If the difference between the set value and the measured value is within the accuracy range, that is, the calibration signal falls within the preset accuracy range, the calibration is successfully completed. If the difference does not meet the accuracy requirements, the parameters of the signal driving unit and the signal receiving unit are adjusted according to the fitting algorithm, and the next calibration is performed again. When the difference does not meet the accuracy requirements all the time, the calibration fails.

[0168] After the calibration is completed, the test end uploads the data of successful and failed calibration to the design terminal, including set values, test values, errors, accuracy and other data.

[0169] Set the preset accuracy range and preset number threshold according to actual conditions.

[0170] In one embodiment, the test terminal is also used to calculate a new drive calibration vector using a fitting algorithm when the calibration signal falls outside a preset accuracy range and the calibration number is less than or equal to a preset number threshold, and perform the next calibration measurement, that is, reset the calibration parameters of the drive module according to the new calibration vector to generate a calibration excitation electrical signal, and receive the calibration signal sent by the test equipment to be calibrated.

[0171] In one embodiment, in response to a calibration result generated when the calibration times are greater than a preset times threshold and the calibration signal falls outside a preset accuracy range, the design terminal is further used to generate calibration parameters and send the calibration parameters to the test terminal.

[0172] The test terminal is also used to adjust the driving circuit and the receiving circuit according to the calibration parameters.

[0173] In one embodiment, the design terminal is further used to analyze and diagnose the test signals sent by one or more test terminals according to the analysis and diagnosis mathematical model and generate a server-side analysis and diagnosis result.

[0174] Although the specific embodiments of the present disclosure are described above, those skilled in the art should understand that this is only an example, and the protection scope of the present disclosure is defined by the appended claims. Those skilled in the art may make various changes or modifications to these embodiments without departing from the principles and essence of the present disclosure, but these changes and modifications all fall within the protection scope of the present disclosure.

Claims

1. A test terminal based on FPGA, characterized in that: The test terminal is implemented based on FPGA, and includes: a communication module, a configuration data parsing module, a test vector generation module, a driving module and a receiving module; The communication module is used to obtain configuration data of the test function; The configuration data parsing module is used to parse the configuration data to obtain the signal setting to be tested, the hardware interface configuration and the test vector function; wherein the test vector function is composed of several basic function blocks; The test vector generation module is used to generate a test vector according to the test vector function; The driving module is used to generate a test excitation electrical signal according to the test vector, and send the test excitation electrical signal to an external test device; The receiving module is used to receive the test signal sent by the test device and convert the test signal into a digital measurement value.

2. The FPGA-based test terminal according to claim 1, characterized in that: The test terminal also includes: a calibration signal generating module; The communication module is also used to obtain calibration signal requirements; The calibration signal generating module is used to generate a calibration vector according to the calibration signal requirement; The driving module is further used to generate a calibration excitation electrical signal according to the calibration vector, and send the calibration excitation electrical signal to the test device to be calibrated; The receiving module is also used to receive a calibration signal sent by the test device to be calibrated, and convert the calibration signal into a digital measurement value.

3. The FPGA-based test terminal according to claim 2, characterized in that: The test terminal also includes: an analysis and diagnosis module; The analysis and diagnosis module is used to generate a functional function of the test vector; wherein the functional function is composed of basic functions of the basic functional blocks; The analysis and diagnosis module is also used to analyze and diagnose the test signal according to the local analysis and diagnosis mathematical model and generate analysis and diagnosis results.

4. The FPGA-based test terminal according to claim 3, characterized in that: The driving module is also used to generate a corresponding driving circuit according to the signal setting to be tested, the hardware interface configuration and the test vector function to send a signal to the test device; The receiving module is also used to generate a corresponding receiving circuit according to the signal setting to be tested and the hardware interface configuration to receive the signal sent by the test equipment.

5. The FPGA-based test terminal according to claim 4, characterized in that: The communication module is also used to obtain calibration parameters; The driving module is also used to adjust the driving circuit according to the calibration parameters; The receiving module is further configured to adjust the receiving circuit according to the calibration parameters.

6. The FPGA-based test terminal according to claim 3, characterized in that: The test terminal also includes: a storage module; The storage module is used to store data; wherein the data includes the configuration data, the test vector, the test signal, the calibration vector and the calibration signal.

7. The FPGA-based test terminal according to claim 3, characterized in that: The test terminal also includes: a display module; The display module is used to display the data during the test according to the screen configuration, and to display the analysis and diagnosis results; and / or, The communication module is also used to communicate with external devices to transmit data.

8. A test system based on FPGA, characterized in that: The test system comprises: a design terminal and at least one FPGA-based test terminal according to any one of claims 1 to 7; The design terminal is communicatively connected with each of the test terminals; The design terminal is used to construct a functional function of a test function using a basic function, generate configuration data of the test function according to the functional function, and send the configuration data to the test terminal; The test terminal is used to parse the configuration data to obtain the signal setting to be tested, the hardware interface configuration and the test vector function; The test terminal is also used to generate a test vector according to the configuration data; The test terminal is also used to generate a test stimulus electrical signal according to the test vector, and send the test stimulus electrical signal to an external test device; The test terminal is also used to receive the test signal sent by the test device and convert the test signal into a digital measurement value; The test terminal is also used to send the test signal to the design terminal.

9. The FPGA-based test system according to claim 8, wherein: The design terminal is also used to generate a calibration signal requirement based on the connection relationship between each test terminal and the external test equipment, and send the calibration signal requirement to the corresponding test terminal; The test terminal is also used to generate a calibration vector according to the calibration signal requirement; The test terminal is also used to generate a calibration excitation electrical signal according to the calibration vector, and send the calibration excitation electrical signal to the test device to be calibrated; The test terminal is also used to receive a calibration signal sent by the test device to be calibrated, and convert the calibration signal into a digital measurement value; The test terminal is also used to generate a calibration result when the calibration signal falls within a preset accuracy range or when the calibration times are greater than a preset times threshold, and send the calibration result to the design terminal.

10. The FPGA-based test system according to claim 9, wherein: The test terminal is further used to calculate a new drive calibration vector using a fitting algorithm when the calibration signal falls outside the preset accuracy range and the calibration times are less than or equal to the preset times threshold, and perform the next calibration measurement; and / or, In response to a calibration result generated when the calibration number is greater than the preset number threshold and the calibration signal falls outside the preset accuracy range, the design terminal is further used to generate a calibration parameter and send the calibration parameter to the test terminal; The test terminal is also used to adjust the driving circuit and the receiving circuit according to the calibration parameters; and / or, The design terminal is also used to analyze and diagnose the test signals sent by one or more test terminals according to the analysis and diagnosis mathematical model and generate a server-side analysis and diagnosis result.

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