Scheduling task processing method and device, electronic equipment and storage medium

Abstract

The embodiment of the invention provides a scheduling task processing method and device, electronic equipment and a storage medium, and relates to the technical field of task scheduling, and the method comprises the steps: obtaining a DAG task, a node layer number corresponding to the DAG task, and a task number corresponding to sub-tasks in the DAG task; calculating according to the number of node layers and the number of tasks to obtain parallel factors corresponding to the DAG tasks; determining an adjustment threshold corresponding to the parallel factor; obtaining execution time information corresponding to each subtask, and performing calculation according to the execution time information to obtain an execution time difference corresponding to the subtasks; performing time adjustment on the DAG task according to the execution time difference and an adjustment threshold, and determining a target deadline corresponding to the DAG task; the processors are screened according to the target deadline, the target processor used for executing the DAG task is obtained, the DAG task is executed through the target processor, and the scheduling success rate and the execution efficiency are improved.

Description

Technical Field

[0001] The present invention relates to the technical field of task scheduling, and in particular to a method for processing a scheduling task, a device for processing a scheduling task, an electronic device, and a computer-readable storage medium. Background Art

[0002] At present, the research on DAG (Directed Acyclic Graph) scheduling in cloud environments focuses more on optimizing the overall completion time, optimizing costs and multi-objective optimization, and tends to consider optimization problems from the user's perspective. From the perspective of cloud service providers, resource utilization and scheduling success rate are two service qualities that are closely related to benefits. There are a large number of computing, storage and network resources in the cloud environment. Its pay-as-you-go method means that improving resource utilization can generate more economic benefits. Improving the scheduling success rate can not only improve user service satisfaction and improve the service competitiveness of cloud service providers, but also provide services to more users and generate more benefits. However, in the task scheduling process in the cloud environment, the front tasks cannot be executed as soon as they are ready, and the back tasks are prone to exceed the execution deadline, resulting in the failure of the entire task scheduling and the long execution time of the scheduling algorithm. Summary of the invention

[0003] The embodiments of the present invention provide a method, device, electronic device and computer-readable storage medium for processing scheduling tasks to solve or partially solve the problem of low scheduling success rate and long execution time in the task scheduling process of the cloud environment.

[0004] The embodiment of the present invention discloses a method for processing a scheduling task, comprising:

[0005] Obtaining a DAG task, a number of node layers corresponding to the DAG task, and a number of tasks corresponding to subtasks in the DAG task, wherein the number of node layers represents a hierarchical structure of the DAG task;

[0006] Calculate according to the number of node layers and the number of tasks to obtain a parallel factor corresponding to the DAG task, where the parallel factor is used to measure the degree of parallelism of the DAG task;

[0007] determining an adjustment threshold corresponding to the parallel factor;

[0008] Obtaining execution time information corresponding to each of the subtasks, and performing calculations based on the execution time information to obtain execution time differences corresponding to the subtasks;

[0009] Adjust the time of the DAG task according to the execution time difference and the adjustment threshold, and determine the target deadline corresponding to the DAG task;

[0010] Processors are screened according to the target deadline to obtain a target processor for executing the DAG task, and the DAG task is executed by the target processor.

[0011] In some feasible implementations, the calculating according to the number of node layers and the number of tasks to obtain a parallel factor corresponding to the DAG task includes:

[0012] Obtain the number of processors corresponding to the processors used to execute the DAG task;

[0013] The number of node layers, the number of tasks, and the number of processors are used to perform calculations to obtain a parallel factor corresponding to the DAG task.

[0014] In some feasible implementations, the calculation using the number of node layers, the number of tasks, and the number of processors to obtain the parallel factor corresponding to the DAG task is implemented by the following formula:

[0015]

[0016] Wherein, m is the number of processors, n is the number of subtasks in the DAG task, and ML is the number of node layers corresponding to the DAG task.

[0017] In some feasible implementations, the determining an adjustment threshold corresponding to the parallel factor includes:

[0018] Obtaining the transmission duration corresponding to each of the subtasks;

[0019] Calculate the total transmission duration corresponding to the DAG task based on the transmission duration of the subtask;

[0020] The total transmission duration and the parallel factor are used to perform calculation to obtain a corresponding adjustment threshold, where the adjustment threshold is used to adjust the deadline of the DAG task.

[0021] In some feasible implementations, the execution time information includes at least the sub-deadline corresponding to the subtask, the execution duration, and the transmission duration between the subtask and the DAG task. The calculation based on the execution time information to obtain the execution time difference corresponding to the subtask is implemented by the following formula:

[0022] temp=TDL j -w j -c i,j , v j ∈succ(v i )

[0023] Wherein, the temp is the execution time difference, the TDL j is the sub-cutoff time, the w j is the execution time, the c i,j is the transmission duration, the succ(v i ) represents a subtask in the DAG task.

[0024] In some feasible implementations, adjusting the time of the DAG task according to the execution time difference and the adjustment threshold to determine the target deadline corresponding to the DAG task includes:

[0025] The subtask with the smallest execution time difference is taken as the target subtask;

[0026] If the target transmission duration between the target subtask and the DAG task is greater than the adjustment threshold, the target execution time difference corresponding to the target subtask and the target transmission duration are used for calculation to obtain the first deadline corresponding to the DAG task;

[0027] If the target transmission duration between the target subtask and the DAG task is less than the adjustment threshold, the target execution time difference corresponding to the target subtask is used as the second deadline corresponding to the DAG task.

[0028] In some feasible implementations, screening processors according to the target deadline to obtain a target processor for executing the DAG task, and executing the DAG task through the target processor includes:

[0029] Obtain the gaps corresponding to each processor, as well as the start time and end time corresponding to the gaps;

[0030] Obtaining the ready time and execution time corresponding to the DAG task on each of the processors;

[0031] A target processor for executing the DAG task is selected from the processors, and the target processor meets the following conditions:

[0032] ①The length of slot |slot| is not less than v i The execution time w i ;

[0033] ②The start time sst and end time sft of the slot can cover v i The execution time of the actual execution is less than v i Target Deadline TDL i , that is, it satisfies formula (1) and formula (2).

[0034] avail(v i ,r p )>sst∩avail(v i ,r p ) and w i ≤sft∩avail(v i ,r p ) and w i ≤TDL i (1)

[0035] avail(v i ,r p )≤sst∩sst and w i ≤sst and w i ∩sft≤TDL i (2)

[0036] Wherein, the slot is the gap, the v i For the DAG task, the avail(v i ,r p ) is the DAG task on processor r p Ready time on.

[0037] The embodiment of the present invention further discloses a processing device for scheduling tasks, including:

[0038] A data acquisition module, used to acquire a DAG task, a node layer number corresponding to the DAG task, and a task number corresponding to subtasks in the DAG task, wherein the node layer number represents a hierarchical structure of the DAG task;

[0039] A factor calculation module, used to calculate according to the number of node layers and the number of tasks to obtain a parallel factor corresponding to the DAG task, wherein the parallel factor is used to measure the degree of parallelism of the DAG task;

[0040] A threshold determination module, used to determine an adjustment threshold corresponding to the parallel factor;

[0041] A time difference calculation module, used to obtain the execution time information corresponding to each of the subtasks, and perform calculations based on the execution time information to obtain the execution time difference corresponding to the subtasks;

[0042] A time adjustment module, configured to adjust the time of the DAG task according to the execution time difference and the adjustment threshold, and determine a target deadline corresponding to the DAG task;

[0043] An execution module is used to screen processors according to the target deadline, obtain a target processor for executing the DAG task, and execute the DAG task through the target processor.

[0044] In some feasible implementations, the factor calculation module is specifically used to:

[0045] Obtain the number of processors corresponding to the processors used to execute the DAG task;

[0046] The number of node layers, the number of tasks, and the number of processors are used to perform calculations to obtain a parallel factor corresponding to the DAG task.

[0047] In some feasible implementations, the factor calculation module is specifically used to implement the following formula:

[0048]

[0049] Wherein, m is the number of processors, n is the number of subtasks in the DAG task, and ML is the number of node layers corresponding to the DAG task.

[0050] In some feasible implementations, the threshold determination module is specifically used to:

[0051] Obtaining the transmission duration corresponding to each of the subtasks;

[0052] Calculate the total transmission duration corresponding to the DAG task based on the transmission duration of the subtask;

[0053] The total transmission duration and the parallel factor are used to perform calculation to obtain a corresponding adjustment threshold, where the adjustment threshold is used to adjust the deadline of the DAG task.

[0054] In some feasible implementations, the execution time information includes at least the sub-deadline corresponding to the subtask, the execution duration, and the transmission duration between the subtask and the DAG task, and the time difference calculation module is specifically used to implement it through the following formula:

[0055] temp=TDL j -w j -c i，j , v j ∈succ(v i )

[0056] Wherein, the temp is the execution time difference, the TDL j is the sub-cutoff time, the w j is the execution time, the c i,jis the transmission duration, the succ(v i ) represents a subtask in the DAG task.

[0057] In some feasible implementations, the adjustment module is specifically used to:

[0058] The subtask with the smallest execution time difference is taken as the target subtask;

[0059] If the target transmission duration between the target subtask and the DAG task is greater than the adjustment threshold, the target execution time difference corresponding to the target subtask and the target transmission duration are used for calculation to obtain the first deadline corresponding to the DAG task;

[0060] If the target transmission duration between the target subtask and the DAG task is less than the adjustment threshold, the target execution time difference corresponding to the target subtask is used as the second deadline corresponding to the DAG task.

[0061] In some feasible implementations, the execution module is specifically used to:

[0062] Obtain the gaps corresponding to each processor, as well as the start time and end time corresponding to the gaps;

[0063] Obtaining the ready time and execution time corresponding to the DAG task on each of the processors;

[0064] A target processor for executing the DAG task is selected from the processors, and the target processor meets the following conditions:

[0065] ①The length of slot |slot| is not less than v i The execution time w i ;

[0066] ②The start time sst and end time sft of the slot can cover v i The execution time of the actual execution is less than v i Target Deadline TDL i , that is, it satisfies formula (1) and formula (2).

[0067] avail(v i ,r p )>sst∩avail(v i ,r p ) and w i ≤sft∩avail(v i ,r p ) and wi≤TDL i (1)

[0068] avail(v i ,r p )≤sst∩sst and w i ≤sst and w i ∩sft≤TDL i (2)

[0069] Wherein, the slot is the gap, the v i For the DAG task, the avail(v i ,r p ) is the DAG task on processor r p Ready time on.

[0070] The embodiment of the present invention further discloses an electronic device, comprising a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory communicate with each other via the communication bus;

[0071] The memory is used to store computer programs;

[0072] The processor is used to implement the method described in the embodiment of the present invention when executing the program stored in the memory.

[0073] The embodiment of the present invention further discloses a computer-readable storage medium having instructions stored thereon, which, when executed by one or more processors, enables the processors to execute the method described in the embodiment of the present invention.

[0074] The embodiments of the present invention include the following advantages:

[0075] In the embodiment of the present invention, in the process of processing the scheduling task, by obtaining the DAG task, the number of node layers corresponding to the DAG task and the number of tasks corresponding to the subtasks in the DAG task, the number of node layers represents the hierarchical structure of the DAG task, and then the parallel factor corresponding to the DAG task is obtained according to the number of node layers and the number of tasks. The parallel factor is used to measure the parallel degree of the DAG task, and the adjustment threshold corresponding to the parallel factor is determined. Then, the execution time information corresponding to each subtask is obtained, and the execution time difference corresponding to the subtask is obtained according to the execution time information. Then, the DAG task is adjusted according to the execution time difference and the adjustment threshold. The execution time is adjusted to determine the target deadline corresponding to the DAG task. The deadline of the DAG task is relaxed by calculating the corresponding adjustment threshold and parallel factor, which is conducive to allocating the scheduled tasks to the same processor for execution, improving the success rate of task scheduling, and saving the execution time of the algorithm. At the same time, the processor is screened based on the adjusted target deadline to obtain the target processor for executing the DAG task, and the DAG task is executed through the target processor, which can effectively solve the problem that the front tasks in the DAG scheduling cannot be executed as soon as possible after they are ready, and the back tasks have a high probability of exceeding the deadline, thereby ensuring the success rate of DAG scheduling. BRIEF DESCRIPTION OF THE DRAWINGS

[0076] Figure 1 is a flowchart of a method for processing a scheduling task provided in an embodiment of the present invention;

[0077] Figure 2 is a structural block diagram of a processing device for scheduling tasks provided in an embodiment of the present invention;

[0078] Figure 3 It is a block diagram of an electronic device provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0079] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0080] In order to enable those skilled in the art to better understand the technical solutions in the embodiments of the present invention, some technical features involved in the embodiments of the present invention are explained and illustrated below:

[0081] SDWS (Subtasks Deadlines Workflow Scheduling), subtask deadline workflow scheduling algorithm.

[0082] DAG (Directed Acyclic Graph): refers to a directed graph without loops. In graph theory, if a directed graph cannot start from a node, pass through several nodes and then return to the initial node, it is called a directed acyclic graph.

[0083] FCFS (First Come First Serve) algorithm: a single DAG workflow scheduling algorithm that processes related tasks in order from smallest to largest according to their arrival time.

[0084] HEFT (Heterogeneous Earliest Finish time) algorithm: Another single-DAG workflow scheduling algorithm. In each step, the task with the highest upward ranking value is selected and assigned to the processor.

[0085] PW (Processor Weight): One of the reference standards for selecting a processor for a task.

[0086] TDL (time deadlines, child deadlines): the latest end time of an export task calculated from the bottom up starting from a parent task of the export task.

[0087] As an example, based on the summary of workflow scheduling methods with deadline constraints, the list scheduling algorithm can achieve better results with lower complexity and is one of the important methods for studying workflow scheduling problems. In related technologies, the list scheduling algorithms mainly include:

[0088] The main idea of ​​the FCFS algorithm is first come first served. Once a task is ready, it will be added to the ready queue. The algorithm gives priority to the task that joins the ready queue the earliest, calculates the earliest start time of the task on each processor, and schedules it to the processor with the smallest task start time. The algorithm is simple to implement, and its core idea of ​​"first come first served" is often used to solve various problems.

[0089] HEFT algorithm is an important algorithm in single DAG scheduling problem, which mainly includes two steps: task priority sorting and processor allocation. First, the upward weight Rank of the task is calculated. u To determine the task priority, Rank u The larger the value, the higher the task priority. u The calculation method is shown in formula (4-1), where It is task v i The average execution time across all processors, For task v i and v jThe average data transmission time between It is highly correlated with the communication startup time of the processor and the data transmission time between processors. Rank is calculated using a bottom-up approach u .

[0090]

[0091] After calculating the Rank corresponding to each task u Then, Rank u The tasks are arranged into a task priority queue as the basis for task scheduling, the earliest end execution time of the current task on each processor is calculated, and the task is scheduled to the corresponding processor with the smallest earliest end execution time.

[0092] The main steps of the Min-Min algorithm are to calculate the earliest end execution time eft of all ready tasks on each processor, and prioritize scheduling tasks with the smallest eft to their corresponding processors. After scheduling is completed, the ready queue is updated and the eft of the ready tasks is recalculated.

[0093] The Max-Min algorithm is similar to the Min-Min algorithm, and also calculates the eft of all ready tasks on each processor first. The difference is that the Max-Min algorithm prioritizes the task with the largest eft to its corresponding processor. After the scheduling is completed, the ready queue is updated and the eft of the ready task is recalculated.

[0094] In workflow scheduling, users often only give the deadline of DAG, but do not clearly give the sub-deadline of each task. However, if only the deadline of DAG is considered as the sub-deadline of each task during scheduling, it is easy for the tasks at the front of DAG to not be executed as soon as they are ready, and the tasks at the back are likely to exceed the deadline, resulting in DAG scheduling failure. Such scheduling algorithm has extremely poor effect.

[0095] In this regard, in the present invention, by calculating the sub-deadlines of each task, the gaps after the deadline are not considered. This can not only ensure that the ready tasks are executed as early as possible and improve the scheduling success rate, but also avoid scanning useless gaps and determining whether the DAG scheduling has failed as soon as possible, saving the execution time of the algorithm. Specifically, in the process of processing the scheduling task, by obtaining the DAG task, the number of node layers corresponding to the DAG task, and the number of tasks corresponding to the subtasks in the DAG task, the number of node layers represents the hierarchical structure of the DAG task, and then the node layer number and the number of tasks are calculated to obtain the parallel factor corresponding to the DAG task. The parallel factor is used to measure the degree of parallelism of the DAG task and determine the adjustment threshold corresponding to the parallel factor. Then, the execution time information corresponding to each subtask is obtained, and the execution time information is calculated to obtain the execution time difference corresponding to the subtask. Then, the DAG task is timed according to the execution time difference and the adjustment threshold. Adjustment, determine the target deadline corresponding to the DAG task, and relax the deadline of the DAG task by calculating the corresponding adjustment threshold and parallel factor, which is conducive to allocating the scheduled tasks to the same processor for execution, improving the success rate of task scheduling, and saving the execution time of the algorithm. At the same time, based on the adjusted target deadline, the processor is screened to obtain the target processor for executing the DAG task, and the DAG task is executed through the target processor, which can effectively solve the problem that the front tasks in the DAG scheduling cannot be executed as soon as possible after they are ready, and the back tasks have a high probability of exceeding the deadline, thereby ensuring the success rate of DAG scheduling.

[0096] Reference Figure 1 , shows a flowchart of a method for processing a scheduling task provided in an embodiment of the present invention, which may specifically include the following steps:

[0097] Step 101, obtaining a DAG task, a node layer number corresponding to the DAG task, and a task quantity corresponding to subtasks in the DAG task, wherein the node layer number represents a hierarchical structure of the DAG task;

[0098] In an embodiment of the present invention, a DAG task may be a task flow composed of a "directed acyclic graph", which may include several nodes, each node corresponding to a subtask, and different subtasks may be composed of directed edges (dependencies). The number of node layers may characterize the hierarchical structure of the DAG task, and the number of node layers may be determined by determining the starting node, and traversing downward along the directed edges from the starting node, and adding 1 to the number of layers for each node passed, and recording the corresponding number of layers for each node, thereby determining the node level corresponding to the DAG task.

[0099] Step 102, performing calculation according to the number of node layers and the number of tasks to obtain a parallel factor corresponding to the DAG task, wherein the parallel factor is used to measure the degree of parallelism of the DAG task;

[0100] In an embodiment of the present invention, after the number of node layers and the number of tasks are determined, the corresponding parallel factor can be calculated, and the parallel degree of the DAG task can be measured by the parallel factor. The larger the parallel factor, the higher the parallel degree of the DAG task. Conversely, the smaller the parallel factor, the lower the parallel degree of the DAG task.

[0101] In some feasible implementations, the parallel factor corresponding to the DAG task can be obtained by obtaining the number of processors corresponding to the processors used to execute the DAG task and then calculating using the number of node layers, the number of tasks, and the number of processors.

[0102] In the specific implementation, the parallel factor can be calculated by the following formula:

[0103]

[0104] Wherein, m is the number of processors, n is the number of subtasks in the DAG task, and ML is the number of node layers corresponding to the DAG task.

[0105] Step 103, determining an adjustment threshold corresponding to the parallel factor;

[0106] After the parallel factor is determined, the adjustment threshold for adjusting the deadline of the DAG task can be further calculated. The deadline of the DAG task can be relaxed through the adjustment threshold, which is conducive to allocating the scheduled tasks to the same processor for execution, improving the success rate of task scheduling, and saving the execution time of the algorithm.

[0107] In some feasible implementations, the transmission duration corresponding to each subtask can be obtained first, and then the total transmission duration corresponding to the DAG task can be calculated based on the transmission duration of the subtask, and then the total transmission duration and the parallel factor are used to calculate to obtain the corresponding adjustment threshold, which is used to adjust the deadline of the DAG task. The transmission duration can be the data transmission duration corresponding to the subtask, and the total transmission duration corresponding to the DAG task can be obtained by adding the transmission duration corresponding to each subtask.

[0108] In one example, by calculating the maximum number of layers ML and the parallel factor η corresponding to the DAG task, the parallel factor η is used to measure the parallel degree of the DAG structure, which is calculated as follows: As shown in the figure, m is the number of processors, n is the number of DAG tasks, and ML is the number of DAG layers.

[0109] After obtaining the parallel factor, we can use the formula And the formula threshould(v i )=c out (v i )×(1-η) calculate v i The total transmission time c out And threshold threshold, so that after calculating the corresponding total transmission time, the adjustment threshold for adjusting the deadline of the DAG task can be further calculated in combination with the parallel factor, so that the overall deadline of the DAG task can be relaxed by adjusting the threshold, so that the scheduled tasks can be assigned to the same processor for execution, thereby improving the success rate of task scheduling and saving the execution time of the algorithm.

[0110] Step 104, obtaining the execution time information corresponding to each of the subtasks, and performing calculations based on the execution time information to obtain the execution time differences corresponding to the subtasks;

[0111] After calculating the corresponding adjustment threshold, for each subtask involved in the DAG task, you can further obtain the execution time information corresponding to the subtask, and then calculate based on the execution time information to determine the execution time difference corresponding to each subtask, so as to determine what method to use to adjust the deadline of the DAG task based on the execution time difference.

[0112] The execution time information includes at least the sub-deadline time corresponding to the sub-task, the execution time, and the transmission time between the sub-task and the DAG task, which can be achieved by the following formula:

[0113] temp=TDL j -w j -c i,j , v j ∈succ(v i )

[0114] Among them, temp is the execution time difference, TDL j is the sub-deadline time, w j is the execution time, c i,j is the transmission time, succ(v i ) represents the subtasks in a DAG task.

[0115] Step 105, adjusting the time of the DAG task according to the execution time difference and the adjustment threshold, and determining the target deadline corresponding to the DAG task;

[0116] In an embodiment of the present invention, after calculating the execution time difference, the subtask with the smallest execution time difference can be used as the target subtask, and then the transmission time between each subtask and the DAG task is determined, and the execution time difference is compared with the transmission time. If the target transmission time between the target subtask and the DAG task is greater than the adjustment threshold, the target execution time difference and the target transmission time corresponding to the target subtask are used for calculation to obtain the first deadline corresponding to the DAG task; if the target transmission time between the target subtask and the DAG task is less than the adjustment threshold, the target execution time difference corresponding to the target subtask is used as the second deadline corresponding to the DAG task, so that the deadline of the DAG task is relaxed by calculating the corresponding adjustment threshold and parallel factor, which is conducive to allocating the scheduled tasks to the same processor for execution, improving the success rate of task scheduling, and saving the execution time of the algorithm.

[0117] In one example, for a DAG task v i All subtasks v in J , according to the formula:

[0118] temp=TDL j -w j -c i，j , v j ∈succ(v i )

[0119] Calculate the intermediate value temp corresponding to each subtask in turn, and then record the minimum intermediate value temp min Subtask v min , if v i and v min Data transmission time c i,min If it is greater than the threshold, TDL i For temp min +c i,j ; Otherwise TDL i =temp min , thus the deadline of the DAG task can be relaxed by calculating the corresponding adjustment threshold and parallel factor, which is conducive to allocating the scheduling tasks to the same processor for execution, improving the success rate of task scheduling and saving the execution time of the algorithm.

[0120] In one example, the relaxation of the sub-deadline of a DAG task may be performed as shown in the following code:

[0121]

[0122]

[0123] For the above algorithm process, the corresponding algorithm explanation content is:

[0124] 1. Initialization:

[0125] DL is the deadline of the entire DAG, n is the total number of tasks, TDL exit It is the latest end time of the export task, initialized to DL.

[0126] 2. Calculate the maximum number of layers and η value:

[0127] ML is the maximum number of layers in the DAG, indicating the hierarchical structure of tasks.

[0128] W exit Is the execution time of the export task.

[0129] formula Calculate the η value.

[0130] 3. Topological sorting:

[0131] Perform topological sorting on the tasks in the DAG to obtain TopoTaskList. Topological sorting ensures that tasks are arranged in the order of dependencies. exit It's the last mission.

[0132] 4. Calculate the latest end time from bottom to top:

[0133] Starting from the second to last task in TopoTaskList, traverse each task v forward i .

[0134] succ is v i The subtask set of v i subsequent tasks.

[0135] according to Calculate c out .

[0136] Initialize temp min is the maximum value and c is -1.

[0137] 5. Traverse subtasks:

[0138] For v i Each subtask v j , calculate temp←TDL j -w j -c i,j , indicating v j The latest end time minus v j The execution time and v i With v j The communication time between them.

[0139] If temp is less than tempmin , then update temp min to temp, and update c to c i,j .

[0140] 6. Adjust the latest end time:

[0141] If c>c out ×(1-η), then temp min Increasing c means that extra time is needed to handle communication delays.

[0142] Update TDL i For temp min , indicating v i The latest end time.

[0143] Step 106 , screening processors according to the target deadline, obtaining a target processor for executing the DAG task, and executing the DAG task through the target processor.

[0144] In the embodiment of the present invention, after the deadline of the DAG task is relaxed, the DAG task can be allocated to a suitable processor for execution according to the adjusted deadline.

[0145] It should be noted that in the process of screening processors, the overhead (execution time + output time) other than task execution and data transmission can be ignored, such as calculation startup, communication startup and other overheads, and it is assumed that the data transmission time between tasks is unrelated to the execution time of the tasks, and the execution process and data transmission process of the processor do not affect each other, that is, the processor can execute tasks while transmitting data to other processors.

[0146] In a specific implementation, the gaps corresponding to each processor, the start time and the end time corresponding to the gaps can be obtained, and the ready time and the execution time corresponding to the DAG task on each processor can be obtained. Then, based on the determined parameters, a target processor for executing the DAG task can be selected from the processors, wherein the target processor meets the following conditions:

[0147] ①The length of slot |slot| is not less than v i The execution time w i ;

[0148] ②The start time sst and end time sft of the slot can cover v i The execution time of the actual execution is less than v i Target Deadline TDL i , that is, it satisfies formula (1) and formula (2).

[0149] avail(v i ,r p )>sst∩avail(v i ,r p ) and w i ≤sft∩avail(v i ,r p ) and w i ≤TDL i (1)

[0150] avail(v i ,r p )≤sst∩sst and w i ≤sst and w i ∩sft≤tDL i (2)

[0151] Among them, slot is a gap, v i For DAG tasks, avail(v i ,r p ) is the DAG task in processor r p Ready time on.

[0152] Optionally, the DAG task v i When allocating processors, only processors with suitable gaps for insertion are considered. If they are forcibly allocated to inappropriate processors, there is a high possibility that the scheduling will exceed the deadline. Even if the current processor has the lowest power, it will not be considered as long as there is no suitable gap. Therefore, processors are screened based on the adjusted target deadline to obtain the target processor for executing DAG tasks, and DAG tasks are executed through the target processor. This can effectively solve the problem that the front tasks in DAG scheduling cannot be executed as soon as possible after they are ready, and the back tasks have a high probability of exceeding the deadline, thereby ensuring the success rate of DAG scheduling.

[0153] It should be noted that the embodiments of the present invention include but are not limited to the above examples. It is understandable that those skilled in the art can also make settings according to actual needs under the guidance of the ideas of the embodiments of the present invention, and the present invention is not limited to this.

[0154] In the embodiment of the present invention, in the process of processing the scheduling task, by obtaining the DAG task, the number of node layers corresponding to the DAG task and the number of tasks corresponding to the subtasks in the DAG task, the number of node layers represents the hierarchical structure of the DAG task, and then the parallel factor corresponding to the DAG task is obtained according to the number of node layers and the number of tasks. The parallel factor is used to measure the parallel degree of the DAG task, and the adjustment threshold corresponding to the parallel factor is determined. Then, the execution time information corresponding to each subtask is obtained, and the execution time difference corresponding to the subtask is obtained according to the execution time information. Then, the DAG task is adjusted according to the execution time difference and the adjustment threshold. The execution time is adjusted to determine the target deadline corresponding to the DAG task. The deadline of the DAG task is relaxed by calculating the corresponding adjustment threshold and parallel factor, which is conducive to allocating the scheduled tasks to the same processor for execution, improving the success rate of task scheduling, and saving the execution time of the algorithm. At the same time, the processor is screened based on the adjusted target deadline to obtain the target processor for executing the DAG task, and the DAG task is executed through the target processor, which can effectively solve the problem that the front tasks in the DAG scheduling cannot be executed as soon as possible after they are ready, and the back tasks have a high probability of exceeding the deadline, thereby ensuring the success rate of DAG scheduling.

[0155] It should be noted that, for the sake of simplicity, the method embodiments are described as a series of action combinations, but those skilled in the art should be aware that the embodiments of the present invention are not limited by the order of the actions described, because according to the embodiments of the present invention, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily required by the embodiments of the present invention.

[0156] Reference Figure 2 , shows a structural block diagram of a processing device for scheduling tasks provided in an embodiment of the present invention, which may specifically include the following modules:

[0157] The data acquisition module 201 is used to acquire a DAG task, a node layer number corresponding to the DAG task, and a task number corresponding to subtasks in the DAG task, wherein the node layer number represents a hierarchical structure of the DAG task;

[0158] A factor calculation module 202, configured to calculate according to the number of node layers and the number of tasks to obtain a parallel factor corresponding to the DAG task, wherein the parallel factor is used to measure the degree of parallelism of the DAG task;

[0159] A threshold determination module 203, used to determine an adjustment threshold corresponding to the parallel factor;

[0160] The time difference calculation module 204 is used to obtain the execution time information corresponding to each of the subtasks, and perform calculations based on the execution time information to obtain the execution time differences corresponding to the subtasks;

[0161] A time adjustment module 205, configured to adjust the time of the DAG task according to the execution time difference and the adjustment threshold, and determine a target deadline corresponding to the DAG task;

[0162] The execution module 206 is used to filter the processors according to the target deadline, obtain the target processor for executing the DAG task, and execute the DAG task through the target processor.

[0163] In some feasible implementations, the factor calculation module 202 is specifically used to:

[0164] Obtain the number of processors corresponding to the processors used to execute the DAG task;

[0165] The number of node layers, the number of tasks, and the number of processors are used to perform calculations to obtain a parallel factor corresponding to the DAG task.

[0166] In some feasible implementations, the factor calculation module 202 is specifically used to implement the following formula:

[0167]

[0168] Wherein, m is the number of processors, n is the number of subtasks in the DAG task, and ML is the number of node layers corresponding to the DAG task.

[0169] In some feasible implementations, the threshold determination module 203 is specifically used to:

[0170] Obtaining the transmission duration corresponding to each of the subtasks;

[0171] Calculate the total transmission duration corresponding to the DAG task based on the transmission duration of the subtask;

[0172] The total transmission duration and the parallel factor are used to perform calculation to obtain a corresponding adjustment threshold, where the adjustment threshold is used to adjust the deadline of the DAG task.

[0173] In some feasible implementations, the execution time information includes at least the sub-deadline corresponding to the subtask, the execution duration, and the transmission duration between the subtask and the DAG task, and the time difference calculation module 204 is specifically used to implement it through the following formula:

[0174] temp=TDLj -w j -c i,j , v j ∈succ(v i )

[0175] Wherein, the temp is the execution time difference, the TDL j is the sub-cutoff time, the w j is the execution time, the c i,j is the transmission duration, the succ(v i ) represents a subtask in the DAG task.

[0176] In some feasible implementations, the adjustment module is specifically used to:

[0177] The subtask with the smallest execution time difference is taken as the target subtask;

[0178] If the target transmission duration between the target subtask and the DAG task is greater than the adjustment threshold, the target execution time difference corresponding to the target subtask and the target transmission duration are used for calculation to obtain the first deadline corresponding to the DAG task;

[0179] If the target transmission duration between the target subtask and the DAG task is less than the adjustment threshold, the target execution time difference corresponding to the target subtask is used as the second deadline corresponding to the DAG task.

[0180] In some feasible implementations, the execution module 206 is specifically used to:

[0181] Obtain the gaps corresponding to each processor, as well as the start time and end time corresponding to the gaps;

[0182] Obtaining the ready time and execution time corresponding to the DAG task on each of the processors;

[0183] A target processor for executing the DAG task is selected from the processors, and the target processor meets the following conditions:

[0184] ①The length of slot |slot| is not less than v i The execution time w i ;

[0185] ②The start time sst and end time sft of the slot can cover v i The execution time of the actual execution is less than v i Target Deadline TDL i , that is, it satisfies formula (1) and formula (2).

[0186] avail(v i ,r p )>sst∩avail(v i ,r p ) and w i ≤sft∩avail(v i ,r p ) and w i ≤TDL i (1)

[0187] avail(v i ,r p )≤sst∩sst and w i ≤sst and w i ∩sft≤TDL i (2)

[0188] Wherein, the slot is the gap, the v i For the DAG task, the avail(v i ,r p ) is the DAG task on processor r p Ready time on.

[0189] As for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0190] In addition, an embodiment of the present invention further provides an electronic device, comprising: a processor, a memory, and a computer program stored in the memory and executable on the processor. When the computer program is executed by the processor, the various processes of the above-mentioned scheduling task processing method embodiment are implemented, and the same technical effect can be achieved. To avoid repetition, it will not be described here.

[0191] The embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, each process of the above-mentioned scheduling task processing method embodiment is implemented, and the same technical effect can be achieved. To avoid repetition, it is not repeated here. The computer-readable storage medium is, for example, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0192] Figure 3 A schematic diagram of the hardware structure of an electronic device for implementing various embodiments of the present invention.

[0193] The electronic device 300 includes but is not limited to: a radio frequency unit 301, a network module 302, an audio output unit 303, an input unit 304, a sensor 305, a display unit 306, a user input unit 307, an interface unit 308, a memory 309, a processor 310, and a power supply 311. Those skilled in the art will appreciate that the electronic device structure involved in the embodiments of the present invention does not constitute a limitation on the electronic device, and the electronic device may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently. In the embodiments of the present invention, the electronic device includes but is not limited to a mobile phone, a tablet computer, a laptop computer, a PDA, a vehicle-mounted terminal, a wearable device, and a pedometer.

[0194] It should be understood that in the embodiment of the present invention, the radio frequency unit 301 can be used for receiving and sending signals during information transmission or communication. Specifically, after receiving downlink data from the base station, it is sent to the processor 310 for processing; in addition, uplink data is sent to the base station. Generally, the radio frequency unit 301 includes but is not limited to an antenna, at least one amplifier, a transceiver, a coupler, a low noise amplifier, a duplexer, etc. In addition, the radio frequency unit 301 can also communicate with the network and other devices through a wireless communication system.

[0195] The electronic device provides users with wireless broadband Internet access through the network module 302, such as helping users to send and receive emails, browse web pages, and access streaming media.

[0196] The audio output unit 303 can convert the audio data received by the RF unit 301 or the network module 302 or stored in the memory 309 into an audio signal and output it as sound. Moreover, the audio output unit 303 can also provide audio output related to a specific function performed by the electronic device 300 (for example, a call signal reception sound, a message reception sound, etc.). The audio output unit 303 includes a speaker, a buzzer, a receiver, etc.

[0197] The input unit 304 is used to receive audio or video signals. The input unit 304 may include a graphics processor (GPU) 3041 and a microphone 3042, and the graphics processor 3041 processes the image data of a static picture or video obtained by an image capture device (such as a camera) in a video capture mode or an image capture mode. The processed image frame can be displayed on the display unit 306. The image frame processed by the graphics processor 3041 can be stored in the memory 309 (or other storage medium) or sent via the radio frequency unit 301 or the network module 302. The microphone 3042 can receive sound and can process such sound into audio data. The processed audio data can be converted into a format output that can be sent to a mobile communication base station via the radio frequency unit 301 in the case of a telephone call mode.

[0198] The electronic device 300 also includes at least one sensor 305, such as a light sensor, a motion sensor, and other sensors. Specifically, the light sensor includes an ambient light sensor and a proximity sensor, wherein the ambient light sensor can adjust the brightness of the display panel 3061 according to the brightness of the ambient light, and the proximity sensor can turn off the display panel 3061 and / or the backlight when the electronic device 300 is moved to the ear. As a type of motion sensor, the accelerometer sensor can detect the magnitude of acceleration in each direction (generally three axes), and can detect the magnitude and direction of gravity when stationary, which can be used to identify the posture of the electronic device (such as horizontal and vertical screen switching, related games, magnetometer posture calibration), vibration recognition related functions (such as pedometer, tapping), etc.; the sensor 305 can also include a fingerprint sensor, a pressure sensor, an iris sensor, a molecular sensor, a gyroscope, a barometer, a hygrometer, a thermometer, an infrared sensor, etc., which will not be repeated here.

[0199] The display unit 306 is used to display information input by the user or information provided to the user. The display unit 306 may include a display panel 3061, which may be configured in the form of a liquid crystal display (LCD), an organic light-emitting diode (OLED), or the like.

[0200] The user input unit 307 can be used to receive input digital or character information, and to generate key signal input related to user settings and function control of the electronic device. Specifically, the user input unit 307 includes a touch panel 3071 and other input devices 3072. The touch panel 3071, also known as a touch screen, can collect the user's touch operation on or near it (such as the user's operation on the touch panel 3071 or near the touch panel 3071 using any suitable object or accessory such as a finger, stylus, etc.). The touch panel 3071 may include two parts: a touch detection device and a touch controller. Among them, the touch detection device detects the user's touch orientation, detects the signal brought by the touch operation, and transmits the signal to the touch controller; the touch controller receives the touch information from the touch detection device, converts it into the contact point coordinates, and then sends it to the processor 310, receives the command sent by the processor 310 and executes it. In addition, the touch panel 3071 can be implemented using multiple types such as resistive, capacitive, infrared and surface acoustic waves. In addition to the touch panel 3071, the user input unit 307 may also include other input devices 3072. Specifically, other input devices 3072 may include but are not limited to a physical keyboard, function keys (such as volume control keys, switch keys, etc.), a trackball, a mouse, and a joystick, which are not described in detail here.

[0201] Further, the touch panel 3071 may be covered on the display panel 3061. When the touch panel 3071 detects a touch operation on or near it, it is transmitted to the processor 310 to determine the type of the touch event, and then the processor 310 provides a corresponding visual output on the display panel 3061 according to the type of the touch event. It can be understood that in one embodiment, the touch panel 3071 and the display panel 3061 are used as two independent components to implement the input and output functions of the electronic device, but in some embodiments, the touch panel 3071 and the display panel 3061 can be integrated to implement the input and output functions of the electronic device, which is not limited here.

[0202] The interface unit 308 is an interface for connecting an external device to the electronic device 300. For example, the external device may include a wired or wireless headset port, an external power supply (or battery charger) port, a wired or wireless data port, a memory card port, a port for connecting a device with an identification module, an audio input / output (I / O) port, a video I / O port, a headphone port, etc. The interface unit 308 may be used to receive input (e.g., data information, power, etc.) from an external device and transmit the received input to one or more elements within the electronic device 300 or may be used to transmit data between the electronic device 300 and an external device.

[0203] The memory 309 can be used to store software programs and various data. The memory 309 can mainly include a program storage area and a data storage area, wherein the program storage area can store an operating system, at least one application required for a function (such as a sound playback function, an image playback function, etc.), etc.; the data storage area can store data created according to the use of the mobile phone (such as audio data, a phone book, etc.), etc. In addition, the memory 309 can include a high-speed random access memory, and can also include a non-volatile memory, such as at least one disk storage device, a flash memory device, or other volatile solid-state storage devices.

[0204] The processor 310 is the control center of the electronic device. It uses various interfaces and lines to connect various parts of the entire electronic device. By running or executing software programs and / or modules stored in the memory 309 and calling data stored in the memory 309, it performs various functions of the electronic device and processes data, thereby monitoring the electronic device as a whole. The processor 310 may include one or more processing units; preferably, the processor 310 may integrate an application processor and a modem processor, wherein the application processor mainly processes the operating system, user interface, and application programs, and the modem processor mainly processes wireless communications. It is understandable that the above-mentioned modem processor may not be integrated into the processor 310.

[0205] The electronic device 300 may also include a power supply 311 (such as a battery) for supplying power to each component. Preferably, the power supply 311 may be logically connected to the processor 310 through a power management system, thereby implementing functions such as charging, discharging, and power consumption management through the power management system.

[0206] In addition, the electronic device 300 includes some functional modules not shown, which will not be described in detail here.

[0207] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0208] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present invention, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, a magnetic disk, or an optical disk), and includes a number of instructions for enabling a terminal (which can be a mobile phone, a computer, a server, an air conditioner, or a network device, etc.) to execute the methods described in each embodiment of the present invention.

[0209] The embodiments of the present invention are described above in conjunction with the accompanying drawings, but the present invention is not limited to the above-mentioned specific implementation modes, which are merely illustrative rather than restrictive. Under the guidance of the present invention, ordinary technicians in this field can also make many forms without departing from the scope of protection of the present invention and the claims, all of which are within the protection of the present invention.

[0210] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed in the embodiments of the present invention can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0211] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0212] In the embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0213] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0214] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0215] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: various media that can store program codes, such as USB flash drives, mobile hard disks, ROM, RAM, magnetic disks, or optical disks.

[0216] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims

1. A method for processing a scheduling task, characterized in that: include: Obtaining a DAG task, a number of node layers corresponding to the DAG task, and a number of tasks corresponding to subtasks in the DAG task, wherein the number of node layers represents a hierarchical structure of the DAG task; Calculate according to the number of node layers and the number of tasks to obtain a parallel factor corresponding to the DAG task, where the parallel factor is used to measure the degree of parallelism of the DAG task; determining an adjustment threshold corresponding to the parallel factor; Obtaining execution time information corresponding to each of the subtasks, and performing calculations based on the execution time information to obtain execution time differences corresponding to the subtasks; Adjust the time of the DAG task according to the execution time difference and the adjustment threshold, and determine the target deadline corresponding to the DAG task; Processors are screened according to the target deadline to obtain a target processor for executing the DAG task, and the DAG task is executed by the target processor.

2. The method according to claim 1, characterized in that The calculating according to the number of node layers and the number of tasks to obtain a parallel factor corresponding to the DAG task includes: Obtain the number of processors corresponding to the processors used to execute the DAG task; The number of node layers, the number of tasks, and the number of processors are used to perform calculations to obtain a parallel factor corresponding to the DAG task.

3. The method according to claim 2, characterized in that The calculation using the number of node layers, the number of tasks, and the number of processors to obtain the parallel factor corresponding to the DAG task is implemented by the following formula: Wherein, m is the number of processors, n is the number of subtasks in the DAG task, and ML is the number of node layers corresponding to the DAG task.

4. The method according to claim 1, characterized in that The determining of the adjustment threshold corresponding to the parallel factor includes: Obtaining the transmission duration corresponding to each of the subtasks; Calculate the total transmission duration corresponding to the DAG task based on the transmission duration of the subtask; The total transmission duration and the parallel factor are used to perform calculation to obtain a corresponding adjustment threshold, where the adjustment threshold is used to adjust the deadline of the DAG task.

5. The method according to claim 1, characterized in that The execution time information at least includes the sub-deadline corresponding to the subtask, the execution duration, and the transmission duration between the subtask and the DAG task. The calculation based on the execution time information to obtain the execution time difference corresponding to the subtask is implemented by the following formula: temp=TDL j -w j -c i,j ,v j ∈succ(v i ) Wherein, the temp is the execution time difference, the TDL j is the sub-cutoff time, the w j is the execution time, the c i,j is the transmission duration, the succ(v i ) represents a subtask in the DAG task.

6. The method according to claim 1 or 5, characterized in that: The step of adjusting the time of the DAG task according to the execution time difference and the adjustment threshold to determine the target deadline corresponding to the DAG task includes: The subtask with the smallest execution time difference is taken as the target subtask; If the target transmission duration between the target subtask and the DAG task is greater than the adjustment threshold, the target execution time difference corresponding to the target subtask and the target transmission duration are used for calculation to obtain the first deadline corresponding to the DAG task; If the target transmission duration between the target subtask and the DAG task is less than the adjustment threshold, the target execution time difference corresponding to the target subtask is used as the second deadline corresponding to the DAG task.

7. The method according to claim 1, characterized in that The screening of processors according to the target deadline to obtain a target processor for executing the DAG task, and executing the DAG task by the target processor includes: Obtain the gaps corresponding to each processor, as well as the start time and end time corresponding to the gaps; Obtaining the ready time and execution time corresponding to the DAG task on each of the processors; A target processor for executing the DAG task is selected from the processors, and the target processor meets the following conditions: ①The length of slot |slot| is not less than v i The execution time w i ; ②The start time sst and end time sft of the slot can cover v i The execution time of the actual execution is less than v i Target Deadline TDL i , that is, it satisfies formula (1) and formula (2). avail(v i ,r p )>sst∩avail(v i ,r p ) and w i ≤sft∩avail(v i ,r p ) and w i ≤TDL i (1) avail(v i ,r p )≤sst∩sst and w i ≤sst and w i ∩sft≤tDL i (2) Wherein, the slot is the gap, the v i For the DAG task, the avail(v i ,r p ) is the DAG task on processor r p Ready time on.

8. A processing device for scheduling tasks, characterized in that: include: A data acquisition module, used to acquire a DAG task, a node layer number corresponding to the DAG task, and a task number corresponding to subtasks in the DAG task, wherein the node layer number represents a hierarchical structure of the DAG task; A factor calculation module, used to calculate according to the number of node layers and the number of tasks to obtain a parallel factor corresponding to the DAG task, wherein the parallel factor is used to measure the degree of parallelism of the DAG task; A threshold determination module, used to determine an adjustment threshold corresponding to the parallel factor; A time difference calculation module, used to obtain the execution time information corresponding to each of the subtasks, and perform calculations based on the execution time information to obtain the execution time difference corresponding to the subtasks; A time adjustment module, configured to adjust the time of the DAG task according to the execution time difference and the adjustment threshold, and determine a target deadline corresponding to the DAG task; An execution module is used to screen processors according to the target deadline, obtain a target processor for executing the DAG task, and execute the DAG task through the target processor.

9. An electronic device, characterized in that: It includes a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory communicate with each other through the communication bus; The memory is used to store computer programs; The processor is used to implement the method according to any one of claims 1 to 7 when executing the program stored in the memory.

10. A computer-readable storage medium having instructions stored thereon, which, when executed by one or more processors, cause the processors to perform the method according to any one of claims 1 to 7.

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