Jitter analysis method and system for high-speed serial signal

Abstract

The invention belongs to the technical field of signal processing, and particularly relates to a jitter analysis method and system for a high-speed serial signal, and the method comprises the steps: recognizing and separating a data jitter sequence DDJ in a total jitter sequence TIE in the high-speed serial signal, and obtaining a first jitter sequence containing random jitter data RJ; the first frequency spectrum is obtained by performing frequency spectrum conversion on the first jitter sequence, the first power spectrum is obtained by calculating the first frequency spectrum, and the total power and the root-mean-square value of the random jitter are obtained by calculating partial segments of the first power spectrum, so that the root-mean-square value of the random jitter in the high-speed serial system is estimated, and the accuracy is improved. The method is suitable for various signals with different code patterns; by performing selective accumulation calculation on the power spectrum fragments, stable random jitter estimation is realized, the estimation complexity is reduced, and system resources are saved.

Description

Technical Field

[0001] The invention belongs to the technical field of signal processing, and in particular relates to a jitter analysis method and system for high-speed serial signals. Background Art

[0002] Jitter refers to how early or late a signal actually changes relative to the time it should change. In electronic devices, jitter is usually caused by factors such as the instability of the clock source, noise interference in signal transmission, and nonlinearity of circuit components. In high-speed serial systems, time interval error (TIE) is usually used to measure jitter. TIE represents a direct measurement of jitter and includes all types of jitter components. By separating the random jitter in TIE and characterizing the random jitter of the measured signal through an oscilloscope, the quality of the high-speed serial signal during transmission can be evaluated, thereby ensuring the reliability of data transmission.

[0003] Traditional jitter methods for high-speed serial signals usually rely on setting a fixed threshold value to distinguish between periodic jitter and random jitter. The basic idea of ​​this method is to compare the jitter components in the TIE data with the set threshold value. The jitter components greater than the threshold value are considered to be periodic jitter, while the jitter components less than the threshold value are considered to be random jitter. However, this method has some problems in practical applications.

[0004] First, the threshold value acquisition is relatively complex. In actual systems, due to the influence of various factors, such as system noise, signal transmission loss, etc., the determination of the threshold value needs to take into account a variety of factors, which makes the acquisition of the threshold value relatively complex.

[0005] Secondly, the size of the threshold value is easily affected by the size of the periodic jitter. When the periodic jitter is large, the threshold value may need to be increased accordingly to avoid misjudging too much periodic jitter as random jitter; and when the periodic jitter is small, the threshold value needs to be reduced accordingly to avoid misjudging too much random jitter as periodic jitter. This reliance on the threshold value makes the RMS value estimation result of random jitter easily affected by the size of the periodic jitter, resulting in inaccurate estimation results.

[0006] Therefore, the traditional random jitter RMS value estimation method has certain limitations in practical applications. In order to solve these problems, a more accurate and reliable random jitter RMS value estimation method is needed to achieve accurate measurement and analysis of random jitter. Summary of the invention

[0007] The object of the present invention is to provide a jitter analysis method and system for a high-speed serial signal, so as to solve at least one problem existing in the background technology.

[0008] To achieve the above object, the present invention provides a high-speed serial signal jitter analysis method and system.

[0009] In a first aspect, an embodiment of the present application provides a jitter analysis method for a high-speed serial signal, which is used for a high-speed serial interface tester to analyze a high-speed serial signal. The high-speed serial interface tester includes a signal generator and a digital oscilloscope. The digital oscilloscope includes a signal recovery module, a jitter analysis module and a display module. The jitter analysis module includes a TIE data storage module, a jitter separation module, a spectrum conversion module, a power spectrum selection module and a power spectrum calculation module. The signal generator generates an input signal to a device under test, and the device under test outputs a measured signal to the signal recovery module. The method includes the following steps:

[0010] The signal recovery module obtains a total jitter sequence TIE according to the time interval error of the measured signal, and sends the total jitter sequence TIE to the TIE data storage module, wherein the total jitter sequence TIE includes a deterministic jitter sequence DJ and a random jitter sequence RJ, and the deterministic jitter sequence DJ includes a data-dependent jitter sequence DDJ and a periodic jitter PJ;

[0011] The jitter separation module separates the data-dependent jitter sequence DDJ in the total jitter sequence TIE to obtain a first jitter sequence, and sends the first jitter sequence to the spectrum conversion module, where the first jitter sequence includes the random jitter sequence RJ and the periodic jitter PJ;

[0012] The spectrum conversion module calculates and acquires a first spectrum according to the first jitter sequence, where the first spectrum includes amplitudes of the random jitter sequence RJ and the periodic jitter PJ in the frequency domain;

[0013] The spectrum conversion module calculates and obtains a first power spectrum according to the first spectrum and sends the first power spectrum to the jitter power calculation module;

[0014] The power spectrum selection module intercepts and selects the first power spectrum according to a first preset rule to obtain a first power spectrum segment, and sends the first power spectrum segment to the power spectrum calculation module, where the first power spectrum segment includes the amplitude of the random jitter sequence RJ on the power spectrum;

[0015] The power spectrum calculation module performs cumulative calculation on the first power spectrum segments to obtain the total power and the root mean square value of the random jitter sequence RJ, and outputs the total power and the root mean square value to the display module.

[0016] In combination with the first aspect, in some implementations, the power spectrum selection module intercepts any spectrum segment within 3 / 4 to 1 of the first power spectrum.

[0017] In some implementations, the signal recovery module obtains the total jitter sequence TIE, whose length is L, by performing clock recovery calculation on the measured signal with a symbol period of N bits.

[0018] In some implementations, the signal recovery module is further configured to operate according to the following method steps:

[0019] Obtain an actual edge of the measured signal with a symbol period of N bits, obtain an ideal edge established by clock recovery, and subtract the ideal edge from the actual edge of the measured signal with a symbol period of N bits to obtain a total jitter sequence TIE;

[0020] The clock recovery method is a phase-locked loop clock recovery method.

[0021] In some implementations, separating the data-dependent jitter sequence DDJ in the total jitter sequence TIE to obtain a first jitter sequence further includes: dividing the total jitter sequence TIE into a plurality of groups according to a symbol period Nbit, each group comprising a TIE sequence with the same symbol sequence number;

[0022] Extract the TIE sequence of the same symbol number contained in each group to obtain the jitter sequence of each Nbit as TIE i , i = 1, 2, ..., N bits, length is Where i represents the serial number of the code element, and TIE1 represents the jitter sequence composed of the first jitter sequence in each code element period;

[0023] The jitter sequence of each N bit is averaged and calculated to obtain a data dependent jitter sequence DDJ.

[0024] In some implementations, the further method includes: the jitter separation module concatenating the data-dependent jitter sequence DDJ into a length that is the same as the total jitter sequence TIE.

[0025] In some implementations, the spectrum conversion module performs a discrete Fourier transform on the first jitter sequence to obtain the first spectrum, where the first spectrum is used to represent changes of the measured signal in the frequency domain.

[0026] In some implementations, the spectrum conversion module calculates and obtains a first power spectrum based on the first spectrum, and further includes: the spectrum conversion module obtains a single-sided power spectrum for the first power spectrum.

[0027] In a second aspect, the present application also provides a jitter analysis system for a high-speed serial signal, comprising a signal recovery module, a jitter analysis module and a display module, wherein the jitter analysis module comprises a TIE data storage module, a jitter separation module, a spectrum conversion module, a power spectrum selection module and a power spectrum calculation module, and when the jitter analysis system executes the program or the instruction, it implements a jitter analysis method for a high-speed serial signal as described in any of the aforementioned embodiments.

[0028] In a third aspect, the present application further provides a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed, the jitter analysis method for a high-speed serial signal described in any one of the aforementioned embodiments can be implemented.

[0029] The present application provides a jitter analysis method and system for a high-speed serial signal, which identifies and separates a data jitter sequence DDJ in a total jitter sequence TIE in a high-speed serial signal to obtain a first jitter sequence containing random jitter data RJ, performs spectrum conversion on the first jitter sequence to obtain a first spectrum, obtains a first power spectrum through the first spectrum calculation, obtains the total power and the root mean square value of the random jitter by calculating partial fragments of the first power spectrum, and realizes the estimation of the root mean square value of the random jitter in the high-speed serial system, thereby improving the accuracy; and realizes the estimation of stable random jitter by selectively accumulating the power spectrum fragments, thereby reducing the complexity of the estimation and saving system resources. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 It is a flow chart of a jitter analysis method of a high-speed serial signal provided by an embodiment of the first aspect of the present invention;

[0031] Figure 2 It is a principle block diagram provided by an embodiment of the first aspect of the present invention;

[0032] Figure 3 is a power spectrum diagram provided by an embodiment of the present invention;

[0033] Figure 4 is a flow chart of a method provided by another embodiment of the first aspect of the present invention;

[0034] Figure 5 It is a method flow chart provided by another embodiment of the first aspect of the present invention. DETAILED DESCRIPTION

[0035] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0036] Traditional random jitter RMS value estimation methods usually rely on setting a fixed threshold value to distinguish between periodic jitter and random jitter. However, the threshold value acquisition is complex and the size of the threshold value is easily affected by the size of the periodic jitter.

[0037] Furthermore, the present application provides a jitter analysis method and system for a high-speed serial signal.

[0038] The technical solutions in the embodiments of the present application will be described below in conjunction with the accompanying drawings.

[0039] The terms "component", "unit", "system", etc. used in this specification are used to represent computer-related entities, hardware, firmware, a combination of hardware and software, software, or software in execution. For example, a component can be, but is not limited to, a process running on a processor, a processor, an object, an executable file, an execution thread, a program and / or a computer. By way of illustration, both applications running on a computing device and a computing device can be components. One or more components can reside in a process and / or an execution thread, and a component can be located on a computer and / or distributed between two or more computers. In addition, these components can be executed from various computer-readable media having various data structures stored thereon. Components can, for example, communicate through local and / or remote processes according to signals having one or more data packets (e.g., data from two components interacting with another component between a local system, a distributed system and / or a network, such as the Internet interacting with other systems through signals).

[0040] To facilitate understanding of the embodiments of the present application, the following first briefly introduces the terms involved in the embodiments of the present application.

[0041] In the process of sending and receiving signals, noise is always a natural process. Any signal that is unexpectedly superimposed on an ideal signal can be collectively referred to as noise. The deviation of a noisy signal from the ideal state can be analyzed from two aspects: timing offset and amplitude offset. The content of the present invention is related to timing offset. Timing offset is also called timing jitter, which affects system performance at the moment when the signal edge jumps. In electronic devices, jitter is usually caused by factors such as the instability of the clock source, noise interference in signal transmission, and nonlinearity of circuit elements. In order to evaluate the performance stability and signal quality of a communication system, it is crucial to perform jitter testing on the communication system. The principle of jitter testing is to capture and analyze the time variation of a signal through an oscilloscope. In jitter testing, the oscilloscope samples and records the time variation of a signal, and then calculates and displays the jitter parameters of the signal, such as jitter amplitude, jitter period, and jitter spectrum, through mathematical algorithms.

[0042] 1. Jitter Measurement

[0043] Jitter is defined as the short-term variation of a signal relative to its ideal time position. It is an important parameter for evaluating signal quality from the time domain. Jitter can be divided into three types when measuring: Time Interval Error (TIE), Period Jitter (PJ) and Cycle to Cycle Jitter (CCJ). These three measurement results are essentially equivalent. Time Interval Error represents the deviation between each actual clock edge and the ideal clock edge. Period Jitter represents the deviation between each actual clock cycle and the ideal clock cycle, and can also be expressed as the result of differentiating the Time Interval Error. Cycle to Cycle Jitter represents the difference between the current cycle of the actual clock and the previous cycle of the actual clock.

[0044] 2. Classification of jitter

[0045] Total jitter (TJ) can be divided into deterministic jitter (DJ) and random jitter (RJ).

[0046] Deterministic jitter includes all jitter components with bounded probability density functions, which are described by peak to peak values. According to the different generation mechanisms, deterministic jitter can be further divided into data-dependent jitter (DDJ) and bounded-uncorrelated jitter (BUJ). Data-dependent jitter mainly consists of duty-cycle-distortion jitter (DCD) and intersymbol interference (ISI). Bounded uncorrelated jitter is bounded but unrelated to the transmitted data, caused by crosstalk between adjacent channels, and can be further divided into periodic jitter (PJ) and non-periodic jitter.

[0047] Random jitter includes all jitter components whose probability density distribution function is unbounded, which means that their range will grow infinitely as the number of jitter samples measured increases. In electronic systems, random jitter is generated by the electronic noise of the device (thermal noise, flicker noise, and shot noise), which appears as a Gaussian distribution and is described by the root-mean-square (rms) value.

[0048] 3. Decomposition of jitter

[0049] In order to understand the root cause of jitter, it is necessary to separate and identify each jitter component. The present invention mainly introduces the identification and estimation of random jitter in high-speed serial signals during jitter decomposition.

[0050] The specific embodiments are as follows:

[0051] Example 1

[0052] This embodiment provides a jitter analysis method for a high-speed serial signal, which is used for a digital oscilloscope in a high-speed serial interface tester, or other devices with signal analysis functions, such as a spectrum analyzer, a data acquisition system, etc.

[0053] In this embodiment, the total jitter sequence TIE of the measured signal includes two jitter components, namely, the deterministic jitter sequence DJ and the random jitter sequence RJ, based on two assumptions. First, it is assumed that the random jitter RJ is Gaussian, characterized in that its spectrum is wide and distributed over all frequencies; second, the deterministic jitter DJ is composed of one or more jitter components, and the width of each jitter component characterized in the spectrum is limited, presents periodic changes, and has corresponding peaks.

[0054] Figure 1It is a flow chart of a jitter analysis method for a high-speed serial signal provided by an embodiment of the first aspect of the present invention.

[0055] Figure 2 It is a principle block diagram provided by an embodiment of the first aspect of the present invention.

[0056] like Figure 2 As shown, the high-speed serial interface tester includes a signal generator and a digital oscilloscope. The digital oscilloscope includes a signal recovery module 100, a jitter analysis module 200 and a display module 300. The jitter analysis module 200 includes a TIE data storage module 210, a jitter separation module 220, a spectrum conversion module 230, a power spectrum selection module 240 and a power spectrum calculation module 250. Figure 1 As shown, the method comprises the following steps:

[0057] Step S1, the signal recovery module 100 obtains a total jitter sequence TIE according to the time interval error of the measured signal, and sends the total jitter sequence TIE to the TIE data storage module 210, the total jitter sequence TIE includes a deterministic jitter sequence DJ and a random jitter sequence RJ, the deterministic jitter sequence DJ includes a data-dependent jitter sequence DDJ and a periodic jitter PJ;

[0058] Step S2, the jitter separation module 220 separates the data-dependent jitter sequence DDJ in the total jitter sequence TIE to obtain a first jitter sequence, and sends the first jitter sequence to the spectrum conversion module 230, where the first jitter sequence includes a random jitter sequence RJ and a periodic jitter PJ;

[0059] Step S3, the spectrum conversion module 230 calculates and obtains a first spectrum according to the first jitter sequence, where the first spectrum includes amplitudes of the random jitter sequence RJ and the periodic jitter PJ in the frequency domain;

[0060] Step S4, the spectrum conversion module 230 obtains a first power spectrum according to the first spectrum calculation and sends it to the power spectrum selection module 240;

[0061] Step S5: the power spectrum selection module 240 intercepts and selects the first power spectrum according to the first preset rule to obtain a first power spectrum segment, and sends the first power spectrum segment to the power spectrum calculation module 250, where the first power spectrum segment includes the amplitude of the random jitter sequence RJ on the power spectrum;

[0062] Step S6 : the power spectrum calculation module 250 performs cumulative calculation on the first power spectrum segments to obtain the total power and the root mean square value of the random jitter sequence RJ, and outputs the result to the display module 300 .

[0063] In this embodiment, the data jitter sequence DDJ in the total jitter sequence TIE is first separated to obtain a first jitter sequence including a random jitter sequence RJ, and the spectrum of the first jitter sequence is transformed to obtain a power spectrum including the random jitter RJ and the periodic jitter PJ. The first power spectrum fragment including only the random jitter RJ is accumulated and calculated through the power spectrum characteristics, and then the total power and the root mean square value of the random jitter sequence RJ are estimated. The estimation accuracy is higher and the test performance of the high-speed serial interface tester is improved without being affected by the size of the periodic jitter.

[0064] In this embodiment, before separating the data-dependent jitter sequence DDJ in the total jitter sequence TIE, the jitter separation module 220 further includes splicing the data-dependent jitter sequence DDJ into the same length as the total jitter sequence TIE for subsequent calculation.

[0065] Specifically, the length of the data-dependent jitter DDJ is N bits, which is concatenated to the same length as TIE. DDJs are combined into a vector to obtain the combined data-dependent jitter sequence DDJ expand ,DDJ expand =[DDJ1,DDJ2,DDJ3,…,DDJ Nbit ]. Separate the data-dependent jitter DDJ in the total jitter sequence TIE, that is, DDJ expand , the specific calculation formula is as follows:

[0066]

[0067] in, Indicates the first jitter sequence.

[0068] In this embodiment, the spectrum conversion module 230 performs a discrete Fourier transform on the first jitter sequence to obtain a first spectrum, wherein the first spectrum is used to represent the change of the measured signal in the frequency domain, and the first spectrum includes the amplitudes of the random jitter RJ and the periodic jitter PJ in the frequency domain. The specific calculation formula is as follows:

[0069]

[0070] Where F(m) represents the first spectrum, represents the first jitter sequence, l is the sequence number of the time domain sequence, and m is the sequence number of the frequency domain sequence.

[0071] It should also be understood that it is also feasible to use other frequency domain conversion algorithms, such as Fourier transform and fast Fourier transform, to obtain the first spectrum, and this application does not limit this.

[0072] In this embodiment, the spectrum conversion module 230 calculates and obtains the first power spectrum according to the first spectrum. The specific calculation formula is as follows:

[0073] P(m)=|F(m)| 2 (1-3);

[0074] Wherein, P(m) represents the first power spectrum;

[0075] The spectrum conversion module 230 calculates and obtains a unilateral power spectrum according to the first power spectrum. The specific calculation formula is as follows:

[0076]

[0077] Among them, S(m) represents the one-sided power spectrum, and its length is

[0078] In this embodiment, the use of a single-sided power spectrum can focus on the positive frequency part only, simplify the calculation process and thus improve the calculation efficiency, significantly reduce the required storage space, and also make it easier to identify and analyze the frequency components and intensities in the signal.

[0079] Figure 3 It is a power spectrum diagram provided by an embodiment of the present invention.

[0080] In this embodiment, the power spectrum selection module 240 cuts off any spectrum segment within 3 / 4 to 1 of the first power spectrum. Figure 3 As shown, taking the last 1 / 4 position of the first power spectrum as an example, since the frequency of this position is relatively high and periodic jitter will not occur, and this position is a certain distance away from periodic jitter, the influence of spectrum leakage of periodic jitter is also small, so the last 1 / 4 position of the first power spectrum is taken to estimate random jitter. The power spectrum calculation module 250 then accumulates the last 1 / 4 position of the unilateral power spectrum, and the specific calculation formula is as follows:

[0081]

[0082] Among them, σ 2 is the total power of random jitter over the entire power spectrum bandwidth;

[0083] Then calculate the root mean square value of random jitter. The specific calculation formula is as follows:

[0084]

[0085] Where σ is the RMS value of random jitter.

[0086] The power spectrum calculation module 250 outputs the calculation result to the display module 300 .

[0087] A jitter analysis method for a high-speed serial signal provided in this embodiment obtains a first jitter sequence including a random jitter sequence RJ by separating a data jitter sequence DDJ in a total jitter sequence TIE, obtains a first spectrum by performing spectrum conversion on the first jitter sequence, and then obtains a first power spectrum, and performs accumulation calculation on some fragments of the first power spectrum to obtain the total power and the root mean square value of the random jitter sequence RJ, thereby realizing the estimation of the root mean square value of the random jitter in the high-speed serial system; realizes the estimation of stable random jitter by selectively performing accumulation calculation on the power spectrum fragments, reduces the complexity of the estimation, and saves system resources; improves the accuracy of the estimation by first separating the components of the total jitter sequence TIE and then performing spectrum conversion.

[0088] Example 2

[0089] Figure 4 A flowchart is provided for an embodiment of the first aspect of the present invention.

[0090] In this embodiment, if Figure 4 As shown, the signal recovery module 100 obtains the total jitter sequence TIE by performing clock recovery calculation on the N-bit measured signal with a symbol period of L, and the specific steps are as follows;

[0091] Step S11, respectively obtaining the actual edge of the measured signal with a symbol period of N bits and the ideal edge established by clock recovery;

[0092] Step S12: Subtract the ideal edge from the actual edge of the measured signal with a symbol period of N bits to obtain a total jitter sequence TIE.

[0093] In this embodiment, an ideal clock edge is provided by clock recovery. Specifically, this example uses a phase-locked loop (PLL) to perform clock recovery. It is understandable that the present application may also use other methods such as a digital phase-locked loop (DPLL) and direct digital synthesis (DDS) to perform clock recovery, and the present application does not limit this.

[0094] Example 3

[0095] Figure 5 It is a flow chart provided by another embodiment of the first aspect of the present invention.

[0096] like Figure 5 As shown, in this embodiment, the jitter separation module 220 separates the data-dependent jitter sequence DDJ in the total jitter sequence TIE to obtain a first jitter sequence, and further includes:

[0097] Step S21, dividing the total jitter sequence TIE into multiple groups according to the symbol period Nbit, each group containing TIE sequences with the same symbol number;

[0098] Step S22, extract the TIE sequence of the same symbol number contained in each group to obtain

[0099] TIE1=[TIE(1), TIE(1+Nbit), TIE(1+2*Nbit)…TIE(1+L-Nbit)],

[0100] TIE2=[TIE(2), TIE(2+Nbit), TIE(2+2*Nbit)…TIE(2+L-Nbit)],

[0101] TIE3=[TIE(3), TIE(3+Nbit), TIE(3+2*Nbit)…TIE(3+L-Nbit)]

[0102] …

[0103] TIENbit=[TIE(Nbit),TIE(Nbit+Nbit),TIE(Nbit+2*Nbit)…TIE(L)],

[0104] Get the jitter sequence of each Nbit as TIE i , i = 1, 2, ..., N bits, length is Where i represents the serial number of the code element, and TIE1 represents the jitter sequence composed of the first jitter sequence in each code element period;

[0105] Step S23, taking the average value of each N-bit jitter sequence to obtain the data-dependent jitter sequence DDJ. The specific calculation formula is as follows:

[0106]

[0107] Among them, DDJ (i) The length of is N bits, and n represents the jitter sequence number in each N bit.

[0108] This embodiment simplifies the jitter separation process and improves the efficiency of data processing by extracting and grouping the jitter sequence of each code element period and then calculating the average value of the jitter sequence of each code element period. At the same time, it has higher accuracy.

[0109] Example 4

[0110] The present application also provides a jitter analysis system for a high-speed serial signal, comprising a signal recovery module 100, a jitter analysis module 200 and a display module 300. The jitter analysis module 200 comprises a TIE data storage module 210, a jitter separation module 220, a spectrum conversion module 230, a power spectrum selection module 240 and a power spectrum calculation module 250. When the jitter analysis system executes the program or the instruction, a jitter analysis method for a high-speed serial signal described in any of the above embodiments is implemented.

[0111] Example 5

[0112] The present application also provides a computer storage medium, in which a computer program is stored. When the computer program is run, the steps of a high-speed serial signal jitter analysis method described in any of the above embodiments are implemented during execution.

[0113] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer instruction is loaded and executed on a computer, the process or function according to the embodiment of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network or other programmable device. The computer instruction can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instruction is transmitted from a website site, a computer, a server or a data center by wired (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (such as infrared, microwave, etc.) mode to another website site, computer, server or data center. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server, a data center, etc. that contains one or more available media integration. The available medium can be a magnetic medium (such as a floppy disk, a hard disk, a tape, etc.), an optical medium (such as a DVD) or a semiconductor medium (such as a solid-state hard disk), etc.

[0114] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A jitter analysis method for high-speed serial signals, characterized in that: A high-speed serial interface tester is used to analyze a high-speed serial signal. The high-speed serial interface tester includes a signal generator and a digital oscilloscope. The digital oscilloscope includes a signal recovery module, a jitter analysis module and a display module. The jitter analysis module includes a TIE data storage module, a jitter separation module, a spectrum conversion module, a power spectrum selection module and a power spectrum calculation module. The signal generator generates an input signal to a device under test, and the device under test outputs a measured signal to the signal recovery module. The measured signal includes a clock signal. The method includes the following steps: The signal recovery module obtains a total jitter sequence TIE according to the time interval error of the measured signal, and sends the total jitter sequence TIE to the TIE data storage module, wherein the total jitter sequence TIE includes a deterministic jitter sequence DJ and a random jitter sequence RJ, and the deterministic jitter sequence DJ includes a data-dependent jitter sequence DDJ and a periodic jitter PJ; The jitter separation module separates the data-dependent jitter sequence DDJ in the total jitter sequence TIE to obtain a first jitter sequence, and sends the first jitter sequence to the spectrum conversion module, where the first jitter sequence includes the random jitter sequence RJ and the periodic jitter PJ; The spectrum conversion module calculates and acquires a first spectrum according to the first jitter sequence, where the first spectrum includes amplitudes of the random jitter sequence RJ and the periodic jitter PJ in the frequency domain; The spectrum conversion module calculates and obtains a first power spectrum according to the first spectrum and sends the first power spectrum to the jitter power calculation module; The power spectrum selection module intercepts and selects the first power spectrum to obtain a first power spectrum segment, and sends the first power spectrum segment to the power spectrum calculation module, where the first power spectrum segment includes the amplitude of the random jitter sequence RJ on the power spectrum; The power spectrum calculation module performs cumulative calculation on the first power spectrum segments to obtain the total power and the root mean square value of the random jitter sequence RJ, and outputs the total power and the root mean square value to the display module.

2. The jitter analysis method of a high-speed serial signal according to claim 1, characterized in that: The power spectrum selection module intercepts any spectrum segment within 3 / 4 to 1 of the first power spectrum.

3. The jitter analysis method of a high-speed serial signal according to claim 1, characterized in that: The signal recovery module obtains the total jitter sequence TIE, whose length is L, by performing clock recovery calculation on the measured signal with a symbol period of N bits.

4. The jitter analysis method of a high-speed serial signal according to claim 3, characterized in that: The signal recovery module is operated according to the following steps: Obtain the actual edge of the measured signal with a symbol period of N bits, and obtain the ideal edge established by clock recovery; Subtract the ideal edge from the actual edge of the measured signal with the symbol period of N bits to obtain a total jitter sequence TIE; The clock recovery method is a phase-locked loop clock recovery method.

5. The jitter analysis method of a high-speed serial signal according to claim 3, characterized in that: The jitter separation module separates the data-dependent jitter sequence DDJ in the total jitter sequence TIE to obtain a first jitter sequence, and further includes: Divide the total jitter sequence TIE into multiple groups according to the symbol period Nbit, each group containing TIE sequences with the same symbol number; Extract the TIE sequence of the same symbol number contained in each group to obtain the jitter sequence of each Nbit as TIE i , i = 1, 2, ..., N bits, length is Where i represents the serial number of the code element, and TIE1 represents the jitter sequence composed of the first jitter sequence in each code element period; The jitter sequence of each N bit is averaged and calculated to obtain a data dependent jitter sequence DDJ.

6. The jitter analysis method of a high-speed serial signal according to claim 1, characterized in that: Also includes: The jitter separation module concatenates the data-dependent jitter sequence DDJ into a length that is the same as the total jitter sequence TIE.

7. The jitter analysis method of a high-speed serial signal according to claim 1, characterized in that: The spectrum conversion module performs discrete Fourier transform on the first jitter sequence to obtain the first spectrum, where the first spectrum is used to represent changes of the measured signal in the frequency domain.

8. The jitter analysis method of a high-speed serial signal according to claim 1, characterized in that: The spectrum conversion module calculates and obtains a first power spectrum according to the first spectrum, and further includes: the spectrum conversion module obtains a single-sided power spectrum for the first power spectrum.

9. A jitter analysis system for high-speed serial signals, characterized in that: It includes a signal recovery module, a jitter analysis module, and a display module. The jitter analysis module includes a TIE data storage module, a jitter separation module, a spectrum conversion module, a power spectrum selection module, and a power spectrum calculation module. When the jitter analysis system executes the program or the instruction, it implements a jitter analysis method for a high-speed serial signal as described in any one of claims 1 to 8.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed, it can implement a jitter analysis method for a high-speed serial signal according to any one of claims 1 to 8.

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