Neural network training quantification method and system adaptive to in-memory calculation accumulative error

Abstract

The invention provides a neural network training quantification method and system adaptive to in-memory calculation accumulative errors. The method comprises the following steps: acquiring a neural network model of an in-memory calculation chip; normalizing and adjusting the output data distribution of the recurrent neural network layer of the neural network model according to the data features needing to be processed to obtain a preliminarily trained neural network model; performing fine tuning based on the preliminarily trained neural network model to obtain a fine tuning neural network model, and performing model deployment and reasoning test on a chip based on the fine tuning neural network model to obtain a reasoning result; comparing the reasoning result with a pre-obtained software simulation result to generate an error analysis result; and performing fine tuning on the fine-tuning neural network model again according to the error analysis result to obtain a new reasoning result, and completing training quantization of the neural network model through multiple times of iterative loop fine tuning until the error analysis result meets a preset condition. The problem that the application scale is limited by instability and random errors of existing in-memory calculation is solved.

Description

Technical Field

[0001] The present invention relates to the field of collaborative optimization technology, and in particular to a neural network training quantization method and system that are adaptable to in-memory calculation cumulative errors. Background Art

[0002] Computing in memory (CIM) is an innovative computing architecture designed to solve the "storage wall" bottleneck. In traditional computing architectures, the processor and memory are separated, and data needs to be frequently transferred between the two. This data transfer is often a bottleneck for computing performance, especially when processing large-scale data or performing complex computing tasks. Computing in memory integrates computing power into memory to reduce the latency and energy consumption caused by data transmission between memory and processor.

[0003] In-memory computing can significantly reduce the latency and energy consumption caused by the frequent interaction of data between the memory and the processor, thereby increasing computing speed and reducing power consumption. The high integration of in-memory computing is conducive to lightweight and miniaturized embedded devices, such as wearable devices and IoT nodes.

[0004] There are many types of hardware implementations for in-memory computing. The resistance value of the storage cell of resistive random access memory (RRAM) is easily affected by factors such as temperature, time, and the number of writes, resulting in drift, which leads to unstable calculation results. Its current value is in the microampere range, the voltage range is generally 0.1V~1V, and the typical error range is about 5%-10%. Flash and DRAM are memories based on charge changes. Since the charge will leak slowly over time, repeated programming and erasing will also cause the threshold of the write voltage to drift, thereby reducing the storage accuracy. At the same time, the charge interference between adjacent cells will also cause the calculation accuracy to decrease. Its voltage range is generally 1V-5V, and the typical error range is about 1%-5%. Therefore, although in-memory computing has the advantages of low power consumption and high parallelism, the instability and random errors introduced by the device limit its large-scale application. Summary of the invention

[0005] The present invention provides a neural network training quantization method and system adapting to the accumulated error of in-memory calculation, so as to solve the problem that the instability of existing in-memory calculation and random error limit the application scale.

[0006] The present invention provides a neural network training quantization method adapted to the accumulated error of in-memory calculation, comprising: Obtain the neural network model of the in-memory computing chip; Normalizing and adjusting the output data distribution of the recurrent neural network layer of the neural network model according to the data features to be processed, and obtaining a preliminarily trained neural network model; Fine-tune the neural network model based on the preliminary training to obtain a fine-tuned neural network model, and perform model deployment and reasoning testing on the chip based on the fine-tuned neural network model to obtain reasoning results; Comparing the inference result with the pre-acquired software simulation result to generate an error analysis result; The fine-tuning neural network model is fine-tuned again according to the error analysis result to obtain a new inference result. After multiple iterations of fine-tuning process, the error analysis result meets the preset conditions, and the training quantization of the neural network model is completed.

[0007] According to a neural network training quantization method adapted to the accumulated error of in-memory calculation provided by the present invention, the output data distribution of the recurrent neural network layer of the neural network model is normalized and adjusted according to the data features to be processed to obtain a preliminarily trained neural network model, specifically comprising: Get the minimum and maximum values ​​of the output distribution of the recurrent neural network layer of the neural network model; Based on the minimum and maximum values, the output of the recurrent neural network layer is adjusted according to the preset formula, the maximum value is truncated to the set value, and the adjusted output of the recurrent neural network layer is distributed within the new range to obtain a preliminary trained neural network model.

[0008] According to a neural network training quantization method adapted to in-memory calculation accumulated errors provided by the present invention, the neural network model based on the preliminary training is fine-tuned to obtain a fine-tuned neural network model, specifically comprising: Solidifying the minimum and maximum values ​​of the output distribution of the recurrent neural network layer based on the initially trained neural network model; The output of the recurrent neural network layer is adjusted according to a preset formula to complete fine-tuning of the neural network model and obtain a fine-tuned neural network model.

[0009] According to a neural network training quantization method adapted to in-memory calculation accumulated errors provided by the present invention, the model deployment and inference test on the chip are performed based on the fine-tuning neural network model to obtain the inference result, specifically including: quantizing the fine-tuned neural network model; After quantization is completed, the model is deployed and inference tested on the chip to obtain hardware inference results.

[0010] According to a neural network training quantization method adapted to in-memory calculation cumulative errors provided by the present invention, the inference result is compared with the pre-acquired software simulation result to generate an error analysis result, specifically including: After comparing the inference result with the pre-acquired software simulation result, the average value is obtained by multiple runs to obtain the statistical distribution of the error and generate the error analysis result.

[0011] According to a neural network training quantization method adapted to the accumulated error of in-memory calculation provided by the present invention, the fine-tuning neural network model is fine-tuned again according to the error analysis result to obtain a new inference result, and the fine-tuning process is repeated for multiple iterations until the error analysis result meets the preset conditions, and the training quantization of the neural network model is completed, which specifically includes: The error analysis result is multiplied by a preset weight factor to introduce an error term for error calibration training, and the hardware offset information is integrated into the model fine-tuning link for further fine-tuning; Get the fine-tuned model again and quantify it for deployment and inference testing; After multiple iterations of fine-tuning, the error analysis results meet the preset conditions and the training and quantization of the neural network model is completed.

[0012] The present invention also provides a neural network training quantization system that adapts to the accumulated error of in-memory calculation, the system comprising: A model acquisition module is used to acquire the neural network model of the in-memory computing chip; A preliminary training module, used to normalize and adjust the output data distribution of the recurrent neural network layer of the neural network model according to the data features to be processed, so as to obtain a preliminary trained neural network model; A fine-tuning module, used to perform fine-tuning based on the preliminarily trained neural network model to obtain a fine-tuned neural network model, perform model deployment and reasoning test on the chip based on the fine-tuned neural network model, and obtain reasoning results; An error analysis module, used to compare the inference result with the pre-acquired software simulation result to generate an error analysis result; The iterative loop module is used to fine-tune the fine-tuning neural network model again according to the error analysis result to obtain a new inference result. After multiple iterative loop fine-tuning processes, until the error analysis result meets the preset conditions, the training quantization of the neural network model is completed.

[0013] The present invention also provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the processor implements any one of the above-described neural network training and quantization methods that adapt to the accumulated error of in-memory calculations.

[0014] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements any of the above-described neural network training and quantization methods that adapt to the accumulated error of in-memory calculations.

[0015] The present invention also provides a computer program product, comprising a computer program, which, when executed by a processor, implements any of the above-mentioned neural network training quantization methods that adapt to the accumulated error of in-memory calculation.

[0016] The present invention provides a neural network training quantization method and system that adapts to the accumulated errors of in-memory calculations. By introducing random errors of in-memory calculation chips of analog devices during the training process and adjusting the weights of the deep network layers and the distribution characteristics of feature map data, the errors caused by random errors when the neural network model is deployed on hardware are effectively reduced, thereby effectively improving the accuracy of the model. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0018] Figure 1 The present invention provides a flowchart of a neural network training quantization method that is adapted to in-memory calculation cumulative errors.

[0019] Figure 2 It is a schematic diagram of the training process of the in-memory computing fault-tolerant algorithm provided by the present invention.

[0020] Figure 3 It is a schematic diagram of hardware offset error calibration provided by the present invention.

[0021] Figure 4 The present invention provides a schematic diagram of module connections of a neural network training quantization system that is adaptable to in-memory calculation of accumulated errors.

[0022] Figure 5 It is a structural schematic diagram of the electronic device provided by the present invention.

[0023] Figure numerals: 110: model acquisition module; 120: preliminary training module; 130: fine-tuning module; 140: error analysis module; 150: iterative loop module; 510: processor; 520: communication interface; 530: memory; 540: communication bus. DETAILED DESCRIPTION

[0024] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0025] Combine the following Figure 1 The present invention describes a neural network training quantization method that is adaptable to the accumulated error of in-memory calculation, including: step 100, obtaining a neural network model of an in-memory calculation chip.

[0026] In the present invention, based on the hardware implementation characteristics of the in-memory computing neural network accelerator of analog devices and the error analysis results, the model is enabled to ignore the random errors caused by the in-memory computing of analog devices, especially the cumulative error effect of the LSTM operator, by changing the algorithm training mode and process, thereby improving the accuracy of model deployment reasoning.

[0027] The LSTM (Long Short-Term Memory) layer is a special recurrent neural network (RNN) layer that is designed to solve the gradient vanishing or gradient exploding problems encountered by traditional RNNs when dealing with long-term dependencies. LSTM effectively learns and remembers long-term dependencies by introducing a gating mechanism to control the flow of information.

[0028] Step 200: Normalize and adjust the output data distribution of the recurrent neural network layer of the neural network model according to the data features to be processed, so as to obtain a preliminarily trained neural network model.

[0029] Specifically, obtaining the minimum and maximum values ​​of the output distribution of the recurrent neural network layer of the neural network model; Based on the minimum and maximum values, the output of the recurrent neural network layer is adjusted according to the preset formula, the maximum value is truncated to the set value, and the adjusted output of the recurrent neural network layer is distributed within the new range to obtain a preliminary trained neural network model.

[0030] In the present invention, reference is made to Figure 2 During the initial model training, the data distribution of the LSTM layer presents a zero-mean distribution feature, which is not friendly to the underlying hardware. Smaller weights and output values ​​are greatly affected by errors. In order to meet the computing requirements of the underlying hardware, it is necessary to normalize and adjust the output data distribution of the LSTM layer according to the data features. Get the minimum value a and the maximum value b of the LSTM layer output distribution respectively, adjust the output of this layer according to the following formula, and truncate the maximum value to 2. After adjustment, the output data of the LSTM layer is distributed in [0,2], and continue training.

[0031] .

[0032] Step 300: fine-tune the neural network model based on the preliminary training to obtain a fine-tuned neural network model, and perform model deployment and inference testing on the chip based on the fine-tuned neural network model to obtain inference results.

[0033] Specifically, the minimum and maximum values ​​of the output distribution of the recurrent neural network layer are solidified based on the preliminarily trained neural network model; The output of the recurrent neural network layer is adjusted according to a preset formula to complete fine-tuning of the neural network model and obtain a fine-tuned neural network model.

[0034] Among them, based on the fine-tuned neural network model, model deployment and reasoning test are performed on the chip to obtain reasoning results, specifically including: quantizing the fine-tuned neural network model; After quantization is completed, the model is deployed and inference tested on the chip to obtain hardware inference results.

[0035] In the present invention, after obtaining a trained model, the minimum value a and the maximum value b parameters are fixed in the model fine-tuning stage for fine-tuning. Specifically, the minimum value and maximum value The minimum value a and the maximum value b are obtained by inference batch by batch on the test set and then averaged. Then adjust the output of LSTM according to the following formula, and truncate the maximum value to 4. After adjustment, the output data of LSTM layer is distributed in [0,4], and continue fine-tuning.

[0036] .

[0037] Step 400: Compare the inference result with the pre-acquired software simulation result to generate an error analysis result.

[0038] In the present invention, the fine-tuned model is quantized, and then the model is deployed and inference tested on the chip to obtain the inference result. The difference between the hardware inference result and the software simulation result is compared on the benchmark test data set, and the error is statistically analyzed.

[0039] Step 500: fine-tune the fine-tuning neural network model again according to the error analysis result to obtain a new inference result, and repeat the fine-tuning process for multiple iterations until the error analysis result meets the preset conditions, thereby completing the training quantization of the neural network model.

[0040] Specifically, the error analysis result is multiplied by a preset weight factor, an error term is introduced to perform error calibration training, and the hardware offset information is integrated into the model fine-tuning link for further fine-tuning; Get the fine-tuned model again and quantify it for deployment and inference testing; After multiple iterations of fine-tuning, the error analysis results meet the preset conditions and the training and quantization of the neural network model is completed.

[0041] In the present invention, It is the result of inference on the software. This is the result of inference on the hardware with the same input. After running multiple times and averaging, we can get the statistical distribution of the error. .Will Multiply by the weight factor Then, the error term is introduced for error calibration training, and the hardware offset information is integrated into the model fine-tuning phase. Re-finetune is performed to obtain the fine-tuned model and quantify it for deployment and inference testing. The hardware offset fine-tuning is as follows: Figure 3 This iterative form is used to adapt to the influence of random errors of CIM hardware.

[0042] Through experiments, the algorithm deployment test was carried out on the WTM2101 in-memory computing chip to verify the test accuracy. In the actual test, the input is a set of 1*24*5 sensor data, and the output is a 1*1*1 predicted temperature value. The LSTM model was used for training on the temperature prediction data set. Compared with the direct training and deployment results, the average prediction accuracy was improved by more than 35%.

[0043] A neural network training quantization method that adapts to the accumulated errors of in-memory calculations provided by the present invention effectively reduces the errors caused by random errors when the neural network model is deployed on hardware by introducing random errors of the analog device in-memory calculation chips during the training process and adjusting the weights of the deep network layers and the data distribution characteristics of the feature graphs at the same time, thereby effectively improving the accuracy of the model.

[0044] refer to Figure 4 The present invention also discloses a neural network training quantization system adapted to the accumulated error of in-memory calculation, the system comprising: A model acquisition module 110 is used to acquire a neural network model of an in-memory computing chip; A preliminary training module 120, for normalizing and adjusting the output data distribution of the recurrent neural network layer of the neural network model according to the data features to be processed, to obtain a preliminary trained neural network model; A fine-tuning module 130 is used to perform fine-tuning based on the preliminarily trained neural network model to obtain a fine-tuned neural network model, perform model deployment and reasoning test on a chip based on the fine-tuned neural network model, and obtain reasoning results; An error analysis module 140 is used to compare the inference result with the pre-acquired software simulation result to generate an error analysis result; The iterative loop module 150 is used to fine-tune the fine-tuned neural network model again according to the error analysis result to obtain a new inference result, and to complete the training quantization of the neural network model through multiple iterative loop fine-tuning processes until the error analysis result meets the preset conditions.

[0045] Among them, the output data distribution of the recurrent neural network layer of the neural network model is adjusted according to the data features to be processed to obtain a preliminary trained neural network model, which specifically includes: Get the minimum and maximum values ​​of the output distribution of the recurrent neural network layer of the neural network model; Based on the minimum and maximum values, the output of the recurrent neural network layer is adjusted according to the preset formula, the maximum value is truncated to the set value, and the adjusted output of the recurrent neural network layer is distributed within the new range to obtain a preliminary trained neural network model.

[0046] Fine-tuning the neural network model based on the preliminary training to obtain a fine-tuned neural network model specifically includes: Solidifying the minimum and maximum values ​​of the output distribution of the recurrent neural network layer based on the initially trained neural network model; The output of the recurrent neural network layer is adjusted according to a preset formula to complete fine-tuning of the neural network model and obtain a fine-tuned neural network model.

[0047] Based on the fine-tuned neural network model, the model is deployed on the chip and the reasoning test is performed to obtain the reasoning result, which specifically includes: quantizing the fine-tuned neural network model; After quantization is completed, the model is deployed and inference tested on the chip to obtain hardware inference results.

[0048] The inference result is compared with the pre-acquired software simulation result to generate an error analysis result, which specifically includes: After comparing the inference result with the pre-acquired software simulation result, the average value is obtained by multiple runs to obtain the statistical distribution of the error and generate the error analysis result.

[0049] The fine-tuning neural network model is fine-tuned again according to the error analysis result to obtain a new inference result, and the fine-tuning process is repeated for multiple iterations until the error analysis result meets the preset conditions, and the training quantization of the neural network model is completed, which specifically includes: The error analysis result is multiplied by a preset weight factor to introduce an error term for error calibration training, and the hardware offset information is integrated into the model fine-tuning link for further fine-tuning; Get the fine-tuned model again and quantify it for deployment and inference testing; After multiple iterations of fine-tuning, the error analysis results meet the preset conditions and the training and quantization of the neural network model is completed.

[0050] A neural network training quantization system that adapts to the accumulated errors of in-memory calculations provided by the present invention effectively reduces the errors caused by random errors when the neural network model is deployed on hardware by introducing random errors of the in-memory calculation chips of analog devices during the training process and adjusting the weights of the deep network layers and the distribution characteristics of the feature map data, thereby effectively improving the accuracy of the model.

[0051] Figure 5 An example of a physical structure diagram of an electronic device is shown in FIG. Figure 5 As shown, the electronic device may include: a processor 510, a communication interface 520, a memory 530 and a communication bus 540, wherein the processor 510, the communication interface 520 and the memory 530 communicate with each other through the communication bus 540. The processor 510 may call the logic instructions in the memory 530 to execute a neural network training quantization method adapted to the accumulated error of in-memory calculation, the method comprising: obtaining a neural network model of an in-memory calculation chip; adjusting the output data distribution of the recurrent neural network layer of the neural network model according to the data features to be processed to obtain a preliminary trained neural network model; fine-tuning the preliminary trained neural network model to obtain a fine-tuned neural network model, performing model deployment and reasoning test on the chip based on the fine-tuned neural network model to obtain reasoning results; comparing the reasoning results with the pre-acquired software simulation results to generate error analysis results; fine-tuning the fine-tuned neural network model again according to the error analysis results to obtain new reasoning results, and completing the training quantization of the neural network model after multiple iterations of the fine-tuning process until the error analysis results meet the preset conditions.

[0052] In addition, the logic instructions in the above-mentioned memory 530 can be implemented in the form of a software functional unit and can be stored in a computer-readable storage medium when it is sold or used as an independent product. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc. Various media that can store program codes.

[0053] On the other hand, the present invention also provides a computer program product, which includes a computer program, which can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute a neural network training and quantization method that adapts to the accumulated errors of in-memory calculations provided by the above methods, the method including: obtaining a neural network model of an in-memory computing chip; normalizing and adjusting the output data distribution of the recurrent neural network layer of the neural network model according to the data features to be processed to obtain a preliminary trained neural network model; fine-tuning based on the preliminary trained neural network model to obtain a fine-tuned neural network model, performing model deployment and inference testing on the chip based on the fine-tuned neural network model to obtain inference results; comparing the inference results with the pre-acquired software simulation results to generate error analysis results; fine-tuning the fine-tuned neural network model again according to the error analysis results to obtain new inference results, and completing the training and quantization of the neural network model after multiple iterative cycles of fine-tuning until the error analysis results meet the preset conditions.

[0054] On the other hand, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, is implemented to execute a neural network training and quantization method adapted to the accumulated errors of in-memory calculations provided by the above-mentioned methods, the method comprising: obtaining a neural network model of an in-memory computing chip; normalizing and adjusting the output data distribution of the recurrent neural network layer of the neural network model according to the data features to be processed, to obtain a preliminary trained neural network model; fine-tuning the preliminary trained neural network model to obtain a fine-tuned neural network model, performing model deployment and inference testing on the chip based on the fine-tuned neural network model, and obtaining an inference result; comparing the inference result with the pre-acquired software simulation result to generate an error analysis result; fine-tuning the fine-tuned neural network model again according to the error analysis result to obtain a new inference result, and completing the training and quantization of the neural network model after multiple iterative cycles of fine-tuning until the error analysis result meets the preset conditions.

[0055] The device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Ordinary technicians in this field can understand and implement it without paying creative labor.

[0056] Through the description of the above implementation methods, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus a necessary general hardware platform, and of course, can also be implemented by hardware. Based on this understanding, the above technical solution is essentially or the part that contributes to the prior art can be embodied in the form of a software product, and the computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a disk, an optical disk, etc., including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.

[0057] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A neural network training quantization method adapted to the accumulated error of in-memory calculation, characterized in that: include: Obtain the neural network model of the in-memory computing chip; Normalizing and adjusting the output data distribution of the recurrent neural network layer of the neural network model according to the data features to be processed, and obtaining a preliminarily trained neural network model; Fine-tune the neural network model based on the preliminary training to obtain a fine-tuned neural network model, and perform model deployment and reasoning testing on the chip based on the fine-tuned neural network model to obtain reasoning results; Comparing the inference result with the pre-acquired software simulation result to generate an error analysis result; The fine-tuning neural network model is fine-tuned again according to the error analysis result to obtain a new inference result. After multiple iterations of fine-tuning process, the error analysis result meets the preset conditions, and the training quantization of the neural network model is completed.

2. The neural network training quantization method adapted to in-memory calculation cumulative error according to claim 1, characterized in that: The step of normalizing and adjusting the output data distribution of the recurrent neural network layer of the neural network model according to the data features to be processed to obtain a preliminarily trained neural network model specifically includes: Get the minimum and maximum values ​​of the output distribution of the recurrent neural network layer of the neural network model; Based on the minimum and maximum values, the output of the recurrent neural network layer is adjusted according to the preset formula, the maximum value is truncated to the set value, and the adjusted output of the recurrent neural network layer is distributed within the new range to obtain a preliminary trained neural network model.

3. The neural network training quantization method adapted to in-memory calculation cumulative error according to claim 1, characterized in that: The fine-tuning of the neural network model based on the preliminary training to obtain the fine-tuned neural network model specifically includes: Solidifying the minimum and maximum values ​​of the output distribution of the recurrent neural network layer based on the initially trained neural network model; The output of the recurrent neural network layer is adjusted according to a preset formula to complete fine-tuning of the neural network model and obtain a fine-tuned neural network model.

4. The neural network training quantization method according to claim 1, characterized in that: The performing of model deployment and reasoning test on the chip based on the fine-tuned neural network model to obtain reasoning results specifically includes: quantizing the fine-tuned neural network model; After quantization is completed, the model is deployed and inference tested on the chip to obtain hardware inference results.

5. The neural network training quantization method adapted to in-memory calculation cumulative error according to claim 1, characterized in that: The comparing the inference result with the pre-acquired software simulation result to generate an error analysis result specifically includes: After comparing the inference result with the pre-acquired software simulation result, the average value is obtained by multiple runs to obtain the statistical distribution of the error and generate the error analysis result.

6. The neural network training quantization method according to claim 1, characterized in that: The fine-tuning of the fine-tuning neural network model is performed again according to the error analysis result to obtain a new inference result, and the fine-tuning process is repeated for multiple iterations until the error analysis result meets the preset conditions, thereby completing the training quantization of the neural network model. Specifically, the fine-tuning process includes: The error analysis result is multiplied by a preset weight factor to introduce an error term for error calibration training, and the hardware offset information is integrated into the model fine-tuning link for further fine-tuning; Get the fine-tuned model again and quantify it for deployment and inference testing; After multiple iterations of fine-tuning, the error analysis results meet the preset conditions and the training and quantization of the neural network model is completed.

7. A neural network training quantization system adapted to in-memory calculation cumulative error, characterized in that: The system comprises: A model acquisition module is used to acquire the neural network model of the in-memory computing chip; A preliminary training module, used to normalize and adjust the output data distribution of the recurrent neural network layer of the neural network model according to the data features to be processed, so as to obtain a preliminary trained neural network model; A fine-tuning module, used to perform fine-tuning based on the preliminarily trained neural network model to obtain a fine-tuned neural network model, perform model deployment and reasoning test on the chip based on the fine-tuned neural network model, and obtain reasoning results; An error analysis module, used to compare the inference result with the pre-acquired software simulation result to generate an error analysis result; The iterative loop module is used to fine-tune the fine-tuning neural network model again according to the error analysis result to obtain a new inference result. After multiple iterative loop fine-tuning processes, until the error analysis result meets the preset conditions, the training quantization of the neural network model is completed.

8. An electronic device comprising a memory, a processor, and a computer program stored in the memory and running on the processor, characterized in that: When the processor executes the computer program, the neural network training quantization method that adapts to the in-memory calculation accumulated error as described in any one of claims 1 to 6 is implemented.

9. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the neural network training quantization method that adapts to the accumulated error of in-memory calculation as claimed in any one of claims 1 to 6 is implemented.

10. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the neural network training quantization method that adapts to the accumulated error of in-memory calculation as claimed in any one of claims 1 to 6 is implemented.

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