Signal transmitting circuit, method and equipment

Abstract

The invention discloses a signal transmitting circuit, a signal transmitting method and signal transmitting equipment. The signal transmitting circuit comprises a power amplifier and an envelope tracker, the envelope tracker is used for adjusting power supply voltage applied to the power amplifier; a first link is arranged between the power amplifier and the envelope tracker, and the first link is used for transmitting an MIPI signal; one end, close to the envelope tracker, of the first link comprises a filter, the filter filters a first MIPI signal output by the power amplifier so as to filter out an interference signal in the first MIPI signal, and a second MIPI signal is obtained; and the filter is used for outputting the second MIPI signal to the envelope tracker.

Description

Technical Field

[0001] The present application relates to signal processing technology, and in particular to a signal transmission circuit, method and device. Background Art

[0002] When designing the mobile phone RF architecture, due to the platform and MIPI Mobile Industry Processor Interface (MIPI) rules, the power amplifier (PA) and envelope tracker (ET) on the same transmit chain (TX chain) need to be assigned to the same set of MIPI (data (DATA) / clock (CLK)) channels.

[0003] When the isolation between the PA's TX link and the MIPI link is insufficient, the PA has no power output or the power is too low in a certain frequency band. Summary of the invention

[0004] The embodiments of the present application provide a signal transmission circuit, method, and device, which can improve the power control accuracy of a PA.

[0005] The technical solution of the embodiment of the present application is implemented as follows:

[0006] The embodiment of the present application provides a signal transmission circuit, the signal transmission circuit comprising: a power amplifier and an envelope tracker;

[0007] The envelope tracker is used to adjust the power supply voltage applied to the power amplifier;

[0008] A first link is included between the power amplifier and the envelope tracker, and the first link is used to transmit a MIPI signal;

[0009] A filter is included at one end of the first link close to the envelope tracker, and the filter filters the first MIPI signal output by the power amplifier to filter out the interference signal in the first MIPI signal to obtain a second MIPI signal;

[0010] The filter outputs the second MIPI signal to the envelope tracker.

[0011] The embodiment of the present application provides a signal processing method, which is applied to a signal transmission circuit, wherein the signal transmission circuit includes: a power amplifier and an envelope tracker; the envelope tracker is used to adjust the power supply voltage applied to the power amplifier; a first link is included between the power amplifier and the envelope tracker, and the first link is used to transmit a MIPI signal; a filter is included at one end of the first link close to the envelope tracker; the method includes:

[0012] The filter filters the first MIPI signal output by the power amplifier to filter out an interference signal in the first MIPI signal to obtain a second MIPI signal;

[0013] The filter outputs the second MIPI signal to the envelope tracker.

[0014] The chip provided in the embodiment of the present application includes the above-mentioned signal transmission circuit.

[0015] The signal transmission circuit, method and device provided in the embodiments of the present application have a filter connected to one end of the envelope tracker close to the power amplifier, so that the interference signal in the MIPI signal transmitted by the envelope tracker on the first path of the power amplifier is filtered before entering the envelope tracker, thereby eliminating the interference signal entering the envelope tracker and preventing the interference signal from entering the envelope tracker, thereby ensuring the normal operation of the envelope tracker, thereby effectively controlling the power of the PA, improving the power control accuracy of the PA, and improving the reliability of the PA. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 is an optional structural diagram of a signal transmission circuit provided in an embodiment of the present application;

[0017] Figure 2 is an optional flowchart of the signal processing method provided in the embodiment of the present application;

[0018] Figure 3 is an optional structural diagram of a signal transmission circuit provided in an embodiment of the present application;

[0019] Figure 4 is an optional structural diagram of a signal transmission circuit provided in an embodiment of the present application;

[0020] Figure 5 is an optional structural diagram of a signal transmission circuit provided in an embodiment of the present application;

[0021] Figure 6 is an optional structural diagram of a signal transmission circuit provided in an embodiment of the present application;

[0022] Figure 7 is an optional structural diagram of a signal transmission circuit provided in an embodiment of the present application;

[0023] Figure 8 is an optional structural diagram of a signal transmission circuit provided in an embodiment of the present application;

[0024] Fig. 9 is an optional structural diagram of a signal transmission circuit provided in an embodiment of the present application;

[0025] Fig.10 is an optional structural diagram of a signal transmission circuit provided in an embodiment of the present application;

[0026] Fig.11 is an optional structural diagram of a signal transmission circuit provided in an embodiment of the present application;

[0027] Fig.12 is an optional structural diagram of a signal transmission circuit provided in an embodiment of the present application;

[0028] Fig.13 is an optional structural diagram of a signal transmission circuit provided in an embodiment of the present application;

[0029] Fig.14 is an optional structural diagram of an electronic chip provided in an embodiment of the present application;

[0030] Fig.15 is an optional structural diagram of an electronic device provided in an embodiment of the present application;

[0031] Fig.16 It is an optional schematic structural diagram of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0032] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings. The described embodiments should not be regarded as limiting the present application. All other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of this application.

[0033] The following describes various embodiments of the signal transmission circuit and its signal processing method and device provided in the embodiments of the present application.

[0034] The signal transmission circuit provided in the embodiment of the present application can be Figure 1As shown, the signal transmission circuit includes: a power amplifier 101 and an envelope tracker 102, the envelope tracker 102 is used to adjust the power supply voltage applied to the power amplifier 101; a first link is included between the power amplifier 101 and the envelope tracker 102, and the first link is used to transmit a MIPI signal; a filter 103 is included at one end of the first link close to the envelope tracker, and the filter 103 filters the first MIPI signal output by the power amplifier 101 to filter out the interference signal in the first MIPI signal to obtain a second MIPI signal; the filter 103 outputs the second MIPI signal to the envelope tracker 102.

[0035] based on Figure 1 The signal transmitting circuit shown in the figure, the embodiment of the present application provides a signal processing method, such as Figure 2 As shown, including:

[0036] S201. The filter filters the first MIPI signal output by the power amplifier to filter out an interference signal in the first MIPI signal to obtain a second MIPI signal.

[0037] S202. The filter outputs the second MIPI signal to the envelope tracker.

[0038] In an embodiment of the present application, the envelope tracker provides a power signal VCC to the power amplifier, and controls the output power of the PA by adjusting the size of VCC, that is, by dynamically changing the power supply, to ensure that the power amplifier operates at peak efficiency under a given instantaneous output power requirement.

[0039] The link between the envelope tracker and the power amplifier includes a first link, which is used to transmit the MIPI signal output by the power amplifier to the envelope tracker, wherein the first link may also be referred to as a MIPI link. The MIPI signal transmitted by the first link may include one or more of a MIPI data signal and a MIPI clock signal. In an embodiment of the present application, the MIPI signal output by the power amplifier is referred to as a first MIPI signal.

[0040] A filter 103 is provided near the envelope tracker on the first link. It is understandable that the filter 103 is connected to one end of the envelope tracker near the power amplifier. The filter 103 is used to filter the first MIPI signal transmitted to the envelope tracker on the first link, filter out the interference signal contained in the first MIPI, and obtain the second MIPI signal. It is understandable that the second MIPI signal and the interference signal constitute the first MIPI signal. The filter 103 outputs the second MIPI signal obtained after filtering to the envelope tracker.

[0041] It can be understood that the second MIPI signal and the interference signal in the first MIPI signal are signals of different frequencies.

[0042] In some embodiments, Figure 3 As shown, the signal transmitting circuit further includes: a signal receiver 104;

[0043] A second link is included between the signal receiver 104 and the power amplifier 101, and the second link is used to transmit the transmission signal output by the power amplifier; wherein the interference signal is a signal of the transmission signal coupled to the first link.

[0044] The second link may also be referred to as a transmit (TX) link, and is used to transmit a transmit signal obtained after power amplification by a power amplifier.

[0045] In the embodiment of the present application, the power amplifier 101 and the envelope tracker 102 use the same MIPI network.

[0046] The power amplifier sends a transmission signal to the signal receiver through the second link. Based on the coupling of the signals, the transmission signal of the first link is coupled to the second link, and the signal coupled to the second link constitutes an interference signal of the MIPI signal transmitted by the second link. Here, the coupling of the transmission signal to the second link can be understood as the leakage of the transmission signal to the second link or the leakage of the transmission signal to the MIPI network.

[0047] In the signal processing method provided in an embodiment of the present application, the power amplifier outputs a transmission signal, and the output transmission signal is transmitted to a signal receiver via a second link; wherein the transmission signal transmitted on the second link is coupled to the first link, forming an interference signal on the first link, and the filter 103 attenuates the interference signal, thereby filtering out the interference signal sent to the envelope tracker 103.

[0048] In the embodiment of the present application, the filter 103 can also filter out and suppress the power supply interference signal. The power supply interference signal can be understood as a signal that interferes with the power supply signal sent by the PA 101 to the envelope tracker 102 .

[0049] In some embodiments, Figure 4 As shown, the filter 103 includes: a first resistor 1031 and a first capacitor 1032,

[0050] A first end of the first resistor 1031 is connected to the power amplifier 101 , a second end of the first resistor 1031 is connected to a first end of the first capacitor 1032 and the envelope tracker 102 , and a second end of the first capacitor 1032 is grounded.

[0051] The first end of the first resistor is connected to PA, and the second end of the first resistor is connected to the first end of the first capacitor, so that the first resistor and the first capacitor are connected in series, and the end of the first capacitor not connected to the first resistor, i.e. the second end, is grounded, and the envelope tracker is connected between the first resistor and the first capacitor.

[0052] In the embodiment of the present application, the first resistor and the first capacitor form a filter network to attenuate the interference signal, which can also improve the MIPI waveform quality. The first resistor can also change the impedance and improve the MIPI overshoot problem, and the first capacitor can also improve the MIPI up and down shoot time.

[0053] In some embodiments, Figure 5 As shown, the filter 103 includes: a second resistor 1033 and a first inductor 1034 .

[0054] The second resistor and the first inductor form a filter network to attenuate the interference signal coupled to the first link by the transmission signal, thereby filtering out the interference signal.

[0055] In the embodiment of the present application, the filter Figure 4 , Figure 5 In addition to the structure shown, other structures may also be included. The embodiments of the present application do not impose any limitation on the specific structure of the filter.

[0056] In some embodiments, Figure 6 As shown, the signal transmission circuit further includes: a first switch 105 and a second switch 106;

[0057] The first switch 105 is located between the filter 103 and the power amplifier 101, and is used to control the connection or disconnection between the end of the filter 103 close to the power amplifier 101 and the power amplifier;

[0058] The second switch 106 is located between the filter 103 and the envelope tracker 102 , and is used to control the connection or disconnection between the end of the filter 103 close to the envelope tracker 102 and the envelope tracker 102 .

[0059] In the signal processing method provided in an embodiment of the present application, the first switch controls the connection or disconnection between one end of the filter 103 close to the power amplifier 101 and the power amplifier, and the second switch controls the connection or disconnection between one end of the filter 103 close to the envelope tracker 102 and the envelope tracker 102.

[0060] In the embodiment of the present application, whether the first link includes a filter is controlled by controlling the first switch and the second switch.

[0061] In some embodiments, when the first switch controls the end of the filter close to the power amplifier to be disconnected from the power amplifier and the second switch controls the end of the filter close to the envelope tracker to be disconnected from the envelope tracker, as Figure 7 As shown, the power amplifier 101 and the envelope tracker 102 are directly connected via the first switch 105 and the second switch 106. At this time, no filter is included between the first link of the power amplifier and the envelope tracker.

[0062] In some embodiments, when the first switch controls the end of the filter close to the power amplifier to be connected to the power amplifier and the second switch controls the end of the filter close to the envelope tracker to be connected to the envelope tracker, the power amplifier 101 and the envelope tracker 102 are connected through the first switch 105, the filter 103 and the second switch 106. At this time, a filter is included in the first link.

[0063] The first switch controls the end of the filter close to the power amplifier to be connected to the power amplifier when a MIPI RF front-end communication error occurs, and controls the end of the filter close to the power amplifier to be disconnected from the power amplifier when there is no MIPI RF front-end communication error.

[0064] When there is a MIPI RF front-end communication error, the second switch controls the end of the filter close to the envelope tracker to be connected to the envelope tracker, and when there is no error in the MIPI RF front-end communication, the second switch controls the end of the filter close to the envelope tracker to be disconnected from the envelope tracker.

[0065] In an embodiment of the present application, in the event of a MIPI RF front-end communication error, the first switch controls the end of the filter close to the power amplifier to be connected to the power amplifier, and the second switch controls the end of the filter close to the envelope tracker to be connected to the envelope tracker, that is, in the event of a MIPI RF front-end communication error, the first link includes a filter; in the event of a MIPI RF front-end communication error, the first switch controls the end of the filter close to the power amplifier to be disconnected from the power amplifier, and the second switch controls the end of the filter close to the envelope tracker to be disconnected from the envelope tracker, that is, in the event of a MIPI RF front-end communication error, the first link does not include a filter.

[0066] In practical applications, the signal transmission circuit includes a controller, which is used to control the first switch and the second switch to connect or disconnect the end of the filter close to the power amplifier and the power amplifier, and connect or disconnect the end of the filter close to the power amplifier and the envelope tracker. The controller can control the first switch and the second switch according to whether there is an error in the MIPI RF front-end communication.

[0067] In some embodiments, Figure 8 As shown, the signal transmission circuit further includes: a modem 107;

[0068] The modem 107 reads first information in the envelope tracker 102, where the first information is used to determine whether there is an error in the MIPI RF front-end communication.

[0069] In the signal processing method provided in the embodiment of the present application, the modem reads the first information in the envelope tracker and determines whether there is an error in the MIPI RF front-end communication based on the first information.

[0070] In an embodiment of the present application, the modem determines whether there is an error in the MIPI RF front-end communication based on the first information, and controls the first switch and the second switch based on the determination result. The determination result may also be sent to the controller so that the controller controls the first switch and the second switch.

[0071] In some embodiments, the modem reads first information of a first register in the envelope tracker, and a value of the first register is related to a MIPI working state of the envelope tracker.

[0072] The envelope tracker has a first register, and the information in the first register is first information. The value of the first information is related to the MIPI working state of the envelope tracker.

[0073] In the embodiment of the present application, the MIPI RF front end refers to the MIPI control signal of the RF device used by the RF front end. The MIPI control signal used by the RF front end device and the MIPI signal of the envelope tracker are the same. The MIPI working status of the envelope tracker can reflect whether there is an error in the MIPI RF front end communication.

[0074] A calibration file may be provided in the modem, and the calibration file has a first register readback function node, so as to read back the first register and read the first information of the first register. The first information may include status indication information indicating whether the communication status of the envelope tracker is normal, wherein the communication status of the envelope tracker includes a linear status and a switch status, the status indication information of the linear status is the first status indication information, and the status indication information of the switch status is the second status indication information, then the first information includes the first status indication information and the second status indication information, if the first status indication information and the second status indication information include information with the first value, then the first information indicates a MIPI RF front-end communication error.

[0075] In an example, if the first value is 0, then one of the first status indication information and the second status indication information is 0, indicating a MIPI RF front-end communication error.

[0076] The linear status and switcher status are the power supply modes used by the envelope tracker in the current RF band. The linear status is the APT mode and the switcher status is the ET mode. The values ​​of the first status indication information and the second status indication information do not represent the working mode of the envelope tracker, but only represent whether the MIPI signal of the current envelope tracker has errors.

[0077] In some embodiments, Fig. 9 As shown, the signal transmission circuit also includes: a power detector 108, which is used to detect the power of the transmission signal on the first link, and the power of the transmission signal detected by the power detector is used to determine whether there is an error in the MIPI RF front-end communication.

[0078] Here, the power detector detects the power of the transmission signal on the MIPI link to determine whether there is a coupled transmission signal on the first link.

[0079] In the embodiment of the present application, the frequencies of the transmission signal and the MIPI signal are different, and therefore, the power detector detects the power of the transmission signal based on the detection of the signal of the frequency of the transmission signal.

[0080] It can be understood that the MIPI signal is a small signal with a smaller frequency, and the transmitted signal is the frequency of the currently transmitted RF band. The frequency of the MIPI signal is related to the platform of the electronic device, and the frequency may include one of the following: 32KHz, 26MHz, 52MHz, 38.4MHz, 76.8MHz.

[0081] The power detector can directly determine the power size of the detected transmitting signal to determine whether there is an error in the MIPI RF front-end communication, and control the first switch and the second switch according to the determination result. It can also send the power size of the detected transmitting signal to the controller, and the controller directly determines the power size of the detected transmitting signal to determine whether there is an error in the MIPI RF front-end communication, and controls the first switch and the second switch according to the determination result. It can also directly determine the power size of the detected transmitting signal to determine whether there is an error in the MIPI RF front-end communication, and send the determination result to the controller, and the controller controls the first switch and the second switch according to the received determination result.

[0082] In some embodiments, if the power of the transmitted signal detected by the power detector is greater than or equal to a set power threshold, the power size of the transmitted signal is used to determine a MIPI RF front-end communication error; if the power of the transmitted signal detected by the power detector is less than the set power threshold, the power size of the transmitted signal is used to determine that there is no error in the MIPI RF front-end communication.

[0083] The size of the set power threshold can be set according to actual needs. In one example, the set power threshold is -30dB. If the power of the transmitted signal detected by the power detector is -35dB, which is less than -30dB, it is considered that there is no error in the MIPI RF front-end communication. If the power of the transmitted signal detected by the power detector is -25dB, which is greater than -30dB, it is considered that there is an error in the MIPI RF front-end communication.

[0084] Below, taking the electronic device as a mobile phone as an example, the signal transmission circuit and the signal processing method thereof provided in the embodiments of the present application are further explained.

[0085] When designing the mobile phone RF architecture, due to the platform and MIPI mobile industry processor interface (MIPI) rules, the power amplifier (PA) (for example, QAM77052) low-band power amplifier (LB PA) and QET power supply (QET7100, Envelope Tracking, i.e. broadband envelope tracker) on the same transmit link (TX chain) need to be assigned to the same group of MIPI (DATA / CLK) channels. Fig.10As shown, the same MIPI channel is included between PA1001 and QET1002, wherein the MIPI channel includes MIPI data link 1003 and MIPI clock link 1004. Among them, VPHBOOST is the normal working voltage of PA and QET, and VIO is the MIPI control voltage of PA and QET. The battery voltage supplies power to QET, and QET forms an adjustable VCC voltage through VPH boost and ET mode to PA for output power control of PA.

[0086] When the isolation between the PA TX link and the MIPI link is insufficient, the TX signal on the TX link leaks to the MIPI link. After the leaked TX signal interferes with the QET through the MIPI link, it will cause the MIPI signal of the QET to be disordered, the voltage control to be abnormal, and the QET to be shut down or the internal device to be damaged. The phenomenon manifested is that there is no power output or the power is low in a certain frequency band of the PA.

[0087] When QET is normal or abnormal, the power values ​​obtained by PA calibration are different. When the target power is 27, if QET is normal, the PA power value is 26.9, and if QET is abnormal, the PA power value is 25.2.

[0088] In the embodiment of the present application, an RC network is added at the QET end to attenuate the signal strength leaked from TX to MIPI, thereby reducing interference to the normal working state of the QET. Fig.11 As shown, when the PA module 1101 sends the PA wireless RF output signal to the software defined radio (Software Defined Radio, SDR) receiver 1102, the wireless RF output signal output by the PA module 1101 is coupled to the MIPI radio frequency front end (RFFE) bus (BUS), causing the QET module 1103 to have a MIPI RF FE communication error. Fig.12 As shown, a filter network 1104 is connected to one end of the QET module 1103 connected to the PA module 1101, and the filter network 1104 can prevent the QET module 1103 from having MIPI RF FE communication errors. The PA wireless RF output signal sent to the QET 1103 is filtered out by the filter network 1104. The filter network can be understood as a filter.

[0089] In the embodiment of the present application, a 0x24 status register readback function node is added to the calibration file of the modulation and demodulation module when MIPI is disordered, the calibration log outputs the MIPI status of the RFFE device, and detects two communication states: linear status and switch status. When the value of the status identifier displayed on the log is 0, it means that there is a MIPI error. If the value of the status identifier is 1, it means that MIPI is normal. The time point of log printing is after the calibration of each frequency band is completed and before the calibration parameters are written, the calibration module reads the MIPI status register information related to QET. Among them, Linear status means that QET works in APT mode, and switcher status means that QET works in ET mode. When working in both states, MIPI working abnormalities are judged by 0 and 1. 0 and 1 have no meaning, but are used to represent 0 means MIPI ERR OR, and there is a MIPI working abnormality at this time. 1 means that MIPI is working normally.

[0090] The function of the QET-related MIPI status register is to detect and read back whether the current MIPI working status of the QET is normal. The status register is the register of the QET device itself and is only related to the QET device itself.

[0091] In the embodiment of the present application, for different communication states, there are corresponding status identifiers. In one example, the value of linear status is 0, and the value of switcher status is 1, indicating that there is a MIPI error.

[0092] The presence of interference signals in the path and the reliability of the PA device can be determined through the MIPI error detection value.

[0093] In the embodiment of the present application, an RC network is added at the QET end to attenuate the signal strength leaked from the TX link to the MIPI link, thereby reducing interference to the normal working state of the QET.

[0094] At the same time, the 0x24 status register readback function node is added to the calibration file when MIPI is disordered. The calibration log (log) outputs the MIPI status of the RFFE device and detects two communication states: a linear status and a switcher status. When the log shows 0, it means there is a MIPI error, and 1 means MIPI is normal. The time point for log printing is to read the QET-related MIPI register information after each frequency band is calibrated and before the calibration parameters are written.

[0095] In the embodiment of the present application, the size of the TX interference signal can also be detected. By setting the standard of the interference signal size, if the TX signal is detected to exceed the standard, a MIPI error will also be reported. In one example, the standard is set to -35dB, and the TX interference signal cannot exceed the -35dB threshold. If the spectrum analyzer test result is greater than -35dB, a MIPI error will be reported. If the spectrum analyzer test result is less than -35dB, it means that there is no problem with the MIPI path and it is not interfered by the TX signal. The circuit diagram is as follows Fig.13 As shown, a power detector 1303 is connected to the MIPI link between PA 1301 and QET 1302. The power detector 1303 is used to detect the size of the signal on the MIPI link. In some embodiments, the power detector 1303 may be a spectrum analyzer.

[0096] The present application embodiment provides an electronic chip, such as Fig.14 As shown, the electronic chip 1400 includes a signal transmitting circuit 1401, wherein the structure of the signal transmitting circuit 1401 can be Figure 1 , Figures 3 to 9 A signal transmitting circuit of any structure in the invention. The signal transmitting circuit can process the signal.

[0097] The present application also provides an electronic device, such as Fig.15 As shown, the electronic device 1500 includes a signal transmitting circuit 1501, wherein the structure of the signal transmitting circuit 1501 can be Figure 1 , Figures 3 to 9 A signal transmitting circuit of any structure in the invention. The signal transmitting circuit can process the signal.

[0098] Those skilled in the art should understand that the relevant description of the above-mentioned electronic device in the embodiments of the present application can be understood by referring to the relevant description of the signal transmission circuit or the signal processing method in the embodiments of the present application.

[0099] An embodiment of the present application provides a schematic structural diagram of an electronic device 1600. Fig.16 The electronic device 1600 shown includes a processor 1610 .

[0100] In the embodiment of the present application, the processor 1610 can call and run a computer program from the memory.

[0101] Alternatively, if Fig.16 As shown, the electronic device 1600 may further include a memory 1620 . The processor 1610 may call and run a computer program from the memory 1620 .

[0102] The memory 1620 may be a separate device independent of the processor 1610 , or may be integrated into the processor 1610 .

[0103] Alternatively, if Fig.16 As shown, the electronic device 1600 may further include a transceiver 1630, and the processor 1610 may control the transceiver 1630 to communicate with other devices, specifically, to receive signals sent by other devices. Here, the transceiver may include at least two antennas.

[0104] It is understandable that the transceiver may include the signal transmission circuit provided in the present application, and can implement the signal processing method implemented by the signal transmission circuit.

[0105] It is understandable that the transceiver includes multiple physical paths for receiving or transmitting signals, and the physical elements on one or more physical paths for transmitting signals constitute a transmitter, wherein the MPR values ​​of each physical path in the transmitter are independent.

[0106] Optionally, the electronic device 1600 can implement the corresponding processes implemented by the electronic device in each method of the embodiment of the present application, and for the sake of brevity, it will not be repeated here. It should be understood that the processor of the embodiment of the present application may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method embodiment can be completed by the hardware integrated logic circuit or software instructions in the processor. The above processor can be a general processor, a digital signal processor (Digital Signal Processor, DSP), an application specific integrated circuit (Application Specific Integrated Circuit, ASIC), a field programmable gate array (Field Programmable Gate Arra y, FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components. The methods, steps and logic block diagrams disclosed in the embodiments of the present application can be implemented or executed. The general processor can be a microprocessor or the processor can also be any conventional processor, etc. The steps of the method disclosed in the embodiment of the present application can be directly embodied as a hardware decoding processor to execute, or the hardware and software modules in the decoding processor are combined to execute. The software module can be located in a storage medium mature in the art such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory, or an electrically erasable programmable memory, a register, etc. The storage medium is located in the memory, and the processor reads the information in the memory and completes the steps of the above method in combination with its hardware.

[0107] It can be understood that the memory in the embodiments of the present application can be a volatile memory or a non-volatile memory, or can include both volatile and non-volatile memories. Among them, the non-volatile memory can be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory can be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM), and direct memory bus random access memory (DR RAM). It should be noted that the memory of the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0108] It should be understood that the above-mentioned memory is exemplary but not restrictive. For example, the memory in the embodiments of the present application may also be static random access memory (static RAM, SRAM), dynamic random access memory (dynamic RAM, DRAM), synchronous dynamic random access memory (synchronous DRAM, SDRAM), double data rate synchronous dynamic random access memory (double data rate SDRAM, DDR SDRAM), enhanced synchronous dynamic random access memory (enhanced SDRAM, ESDRAM), synchronous link dynamic random access memory (synch link DRAM, SLDRAM) and direct RAM bus random access memory (Direct RAM, DR RAM), etc. That is to say, the memory in the embodiments of the present application is intended to include but not limited to these and any other suitable types of memory.

[0109] An embodiment of the present application also provides a computer-readable storage medium for storing a computer program.

[0110] Optionally, the computer-readable storage medium can be applied to the electronic device in the embodiments of the present application, and the computer program enables the computer to execute the corresponding processes implemented by the electronic device in the various methods of the embodiments of the present application. For the sake of brevity, they are not repeated here.

[0111] An embodiment of the present application also provides a computer program product, including computer program instructions.

[0112] Optionally, the computer program can be applied to the electronic device in the embodiments of the present application. When the computer program runs on a computer, the computer executes the corresponding processes implemented by the electronic device in the various methods of the embodiments of the present application. For the sake of brevity, they are not described here.

[0113] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0114] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0115] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0116] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0117] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0118] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0119] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A signal transmitting circuit, characterized in that: The signal transmission circuit includes: a power amplifier and an envelope tracker; The envelope tracker is used to adjust the power supply voltage applied to the power amplifier; A first link is included between the power amplifier and the envelope tracker, and the first link is used to transmit a MIPI signal; A filter is included at one end of the first link close to the envelope tracker, and the filter filters the first MIPI signal output by the power amplifier to filter out the interference signal in the first MIPI signal to obtain a second MIPI signal; The filter outputs the second MIPI signal to the envelope tracker.

2. The circuit according to claim 1, characterized in that The signal transmitting circuit further includes: a signal receiver; A second link is included between the signal receiver and the power amplifier, and the second link is used to transmit the transmission signal output by the power amplifier; wherein the interference signal is a signal obtained by coupling the transmission signal to the first link.

3. The circuit according to claim 1, characterized in that The filter comprises: a first resistor and a first capacitor, A first end of the first resistor is connected to the power amplifier, a second end of the first resistor is connected to a first end of the first capacitor and the envelope tracker, and a second end of the first capacitor is grounded.

4. The circuit according to claim 1, characterized in that The signal transmission circuit further includes: a first switch and a second switch; The first switch is located between the filter and the power amplifier, and is used to control the connection or disconnection between the end of the filter close to the power amplifier and the power amplifier; The second switch is located between the filter and the envelope tracker, and is used to control the connection or disconnection between the end of the filter close to the envelope tracker and the envelope tracker.

5. The circuit according to claim 4, characterized in that When the first switch controls the end of the filter close to the power amplifier to be disconnected from the power amplifier and the second switch controls the end of the filter close to the envelope tracker to be disconnected from the envelope tracker, the power amplifier and the envelope tracker are directly connected through the first switch and the second switch.

6. The circuit according to claim 4 or 5, characterized in that The first switch controls the end of the filter close to the power amplifier to be connected to the power amplifier when a MIPI RF front-end communication error occurs, and controls the end of the filter close to the power amplifier to be disconnected from the power amplifier when there is no MIPI RF front-end communication error. When there is a MIPI RF front-end communication error, the second switch controls the end of the filter close to the envelope tracker to be connected to the envelope tracker, and when there is no error in the MIPI RF front-end communication, the second switch controls the end of the filter close to the envelope tracker to be disconnected from the envelope tracker.

7. The circuit according to claim 6, characterized in that The signal transmission circuit further includes: a modem; The modem reads first information in the envelope tracker, where the first information is used to determine whether there is an error in MIPI RF front-end communication.

8. The circuit according to claim 7, characterized in that The modem reads first information of a first register in the envelope tracker, where a value of the first register is related to a MIPI working state of the envelope tracker.

9. The circuit according to claim 6, characterized in that The signal transmission circuit also includes: a power detector, which is used to detect the power of the transmission signal on the first link, and the power of the transmission signal detected by the power detector is used to determine whether there is an error in the MIPI radio frequency front-end communication.

10. The circuit according to claim 9, characterized in that If the power of the transmitted signal detected by the power detector is greater than or equal to the set power threshold, the power of the transmitted signal is used to determine a MIPI RF front-end communication error; If the power of the transmission signal detected by the power detector is less than the set power threshold, the power of the transmission signal is used to determine that there is no error in the MIPI radio frequency front-end communication.

11. A signal processing method, characterized in that: Applied to a signal transmission circuit, the signal transmission circuit comprises: a power amplifier and an envelope tracker; the envelope tracker is used to adjust the power supply voltage applied to the power amplifier; a first link is included between the power amplifier and the envelope tracker, and the first link is used to transmit a MIPI signal; a filter is included at one end of the first link close to the envelope tracker; the method comprises: The filter filters the first MIPI signal output by the power amplifier to filter out an interference signal in the first MIPI signal to obtain a second MIPI signal; The filter outputs the second MIPI signal to the envelope tracker.

12. A chip, characterized in that: The signal transmitting circuit comprises the signal transmitting circuit according to any one of claims 1 to 10.

13. An electronic device, characterized in that: The signal transmitting circuit comprises the signal transmitting circuit according to any one of claims 1 to 10.

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