FEC (Forward Error Correction) code evaluation optimization method and system suitable for various application scenes

Abstract

The invention discloses an FEC (Forward Error Correction) code evaluation optimization method and system suitable for various application scenarios, and the method comprises the steps: respectively evaluating delay performance T for various FEC codes to select an optimal FEC code; wherein the evaluation of the delay performance T of the FEC code comprises the following steps: for a plurality of data blocks FEC (k, t) which are obtained after a data packet uses the FEC code and are provided with k data units and t data units capable of being corrected, calculating a loss probability # imgabs0 # after the data packet uses the FEC code in a current application scene, and calculating a packet loss probability P after the data packet uses the FEC code according to the loss probability # imgabs1 #; and calculating the delay performance T after the data packet uses the FEC code according to the packet loss rate P. The invention aims to abandon a traditional method for acquiring data by counting multiple times of full-chain simulation, and adopts an analysis method to quickly acquire a large amount of data by using direct formula calculation to obtain results under various application scenes so as to realize FEC scheme performance evaluation optimization.

Description

Technical Field

[0001] The present invention belongs to the field of communications, and in particular relates to a FEC code evaluation optimization method and system suitable for multiple application scenarios. Background Art

[0002] With the rapid development of information technologies such as cloud computing, big data, and the Internet, ultra-large-scale data centers have emerged, and the requirements for data transmission are increasing.

[0003] With the explosive development of intelligent computing such as artificial intelligence generated content (AIGC), the communication bandwidth of medium and short-distance interconnection communication within ultra-large-scale systems has also increased significantly. As the process of high-end chip granulation accelerates, the bandwidth of ultra-short-distance interconnection in the package has also grown rapidly. In this case, the data transmission rate of optical and electrical networks has been greatly improved, regardless of long distance, medium and short distance or ultra-short distance. However, optical and electrical interconnection communications are limited by various noises such as amplified spontaneous emission (ASE) and additional optoelectronic damage, and the link raw bit error rate has increased significantly, seriously affecting the reliability of communication. Forward Error Correction (FEC) coding can obtain higher error correction capabilities through redundant coding, so FEC systems with different transmission overheads, implementation complexity, coding gain, error performance, burst error correction capabilities and error lower limits have been widely used in various application scenarios.

[0004] Various existing communication protocols also recommend different error correction schemes according to their respective application requirements, such as RS (544, 514), RS (272, 257, 10) and RS (528, 514) used by Ethernet (Ethernet 802.3) protocol, BCH (320, 260); BCH (288, 260) and BCH (320, 260) used by Gen-Z specification, PCIe Gen6 proposed a near zero retransmission scheme and proposed its FEC configuration scheme. These FEC schemes usually take error correction gain as a single goal. If considering specific application scenarios such as new intelligent computing and high-performance computing, it is also necessary to comprehensively consider composite goals such as communication delay and effective bandwidth. However, there is no efficient performance evaluation method for how to select the optimal error correction code for use with retransmission in specific scenarios. Traditional solutions for studying FEC performance all assume that full-link simulations are performed on different types of channels, such as binary symmetric channels (BSC), additive white Gaussian noise channels (AWGN) and chi-square channels. Different models are used in different application scenarios, and each simulation can only obtain the results of a single specific scenario. If the algorithm involves multiple probabilistic models for exploration, it is necessary to simulate different full-chain transmission models multiple times and then statistically analyze the simulation results. This is not only time-consuming, but also difficult to evaluate the performance of the same performance in the same dimension over a large range. Summary of the invention

[0005] Technical problem to be solved by the present invention: In view of the above-mentioned problems in the prior art, a method and system for FEC code evaluation and optimization suitable for various application scenarios are provided. The present invention aims to abandon the traditional method of obtaining data by statistically analyzing multiple full-chain simulations, and adopt an analytical method using direct formula calculations to quickly obtain a large amount of data at one time, and obtain results in various application scenarios to achieve FEC scheme performance evaluation and optimization.

[0006] In order to solve the above technical problems, the technical solution adopted by the present invention is:

[0007] A method and system for evaluating and optimizing FEC codes applicable to various application scenarios, including evaluating delay performance T for various FEC codes respectively to select the optimal FEC code, wherein evaluating the delay performance T of the FEC code includes:

[0008] S1, for the data packets after using the FEC code, the data blocks FEC(k,t) with k data units and t data units that can be corrected are obtained, and the loss probability of the data packets after using the FEC code in the current application scenario is calculated.

[0009] S2, according to the loss probability Calculate the packet loss rate P after the data packet uses the FEC code;

[0010] S3, calculate the delay performance T of the data packet after using the FEC code according to the packet loss rate P.

[0011] Optionally, in step S1, the FEC code in the current application scenario adopts the DFE mechanism, and the loss probability of the data packet after using the FEC code in the current application scenario is calculated Including: for the data packet, after using the FEC code to obtain several data blocks FEC (k, t), calculate the probability p of the data unit itself being wrong l And the probability q that the previous data unit error leads to the next data unit error l ; Calculate the loss probability of data packets after using FEC code in the current application scenario according to the following formula:

[0012]

[0013]

[0014] In the above formula, S i is the inner loop approximate variable; is the binomial coefficient, which indicates the number of ways to select i+1 data units from k-t+1 data units; is the binomial coefficient, which indicates the number of ways to select i data units from i+j data units; i and j are loop variables, k is the number of data units in each data block FEC(k,t), and t is the number of data units that can be corrected for each data block FEC(k,t).

[0015] Optionally, the probability p of the calculated data unit itself being wrong l And the probability q that the previous data unit error leads to the next data unit error lr The function expression is:

[0016]

[0017]

[0018] q s =(r-1) / r, (5)

[0019] In the above formula, u is the number of bits in the data block FEC (k, t), p b is the bit error rate for each bit, q s is the probability that the previous bit causes the next bit to be wrong, s is the number of bits contained in a data unit, r is the amount of electrical energy, and i is the loop variable.

[0020] Optionally, in step S1, the FEC code in the current application scenario adopts a precoding mechanism, and the loss probability of the data packet after using the FEC code in the current application scenario is calculated. When the data block FEC (k, t) can correct an odd number of data units, according to formula (6), the loss probability of the data packet after using the FEC code is When the data block FEC (k, t) can correct an even number of data units, the probability of data packet loss after using the FEC code is:

[0021]

[0022]

[0023] In the above formula, k is the number of data units in each data block FEC (k, t), t is the number of data units that can be corrected for each data block FEC (k, t), i and j are loop variables, and u qs,i is the probability of string error data units with i data units, is the loss probability of a data block FEC(k-1-i,t-2) with k-1-i data units and capable of correcting t-2 data units, t is the number of data units that can be corrected for each data block FEC(k,t), n is a positive integer variable, is a positive integer, ρ iis the probability of a string of data units with i as the number of data units, is the loss probability of a data block FEC(ki,t-2) having ki data units and capable of correcting errors of t-2 data units.

[0024] Optionally, the probability ρ of a string of data units with i data units is i The calculation function expression is:

[0025]

[0026]

[0027] In the above formula, ρ i is the probability of a string of data units with i as the number of data units, p b is the bit error rate for each bit, q s is the probability that the previous bit causes the next bit to be wrong, and i is the number of data units.

[0028] Optionally, in step S1, the FEC code in the current application scenario adopts a general mechanism that is not a DFE mechanism and a precoding mechanism, and the loss probability of the data packet after using the FEC code in the current application scenario is calculated. The function expression is:

[0029]

[0030] In the above formula, p l is the error rate of each data unit, p b represents the bit error rate of each bit, k is the number of data units in each data block FEC (k, t), t is the number of data units that can be corrected for each data block FEC (k, t), i is the loop variable, is the binomial coefficient, which represents the number of ways to select i data units from k-t+i-1 data units, and:

[0031] p l =1-(1-p b ) s , (11)

[0032] In the above formula, s is the number of bits contained in a data unit.

[0033] Optionally, the calculation function expression of the packet loss rate P in step S2 is:

[0034]

[0035] In the above formula, is the loss probability, n is the number of bits in a data packet, and m is the number of FEC blocks in a single data packet;

[0036] The calculation function expression of the delay performance T in step S3 is:

[0037]

[0038] In the above formula, P is the packet loss rate, t0 is the time taken for the transmission distance, and t n The time required to encode the FEC code.

[0039] In addition, the present invention also provides an FEC code evaluation and optimization method and system applicable to a variety of application scenarios, including an interconnected microprocessor and a memory, wherein the microprocessor is programmed or configured to execute the FEC code evaluation and optimization method and system applicable to a variety of application scenarios.

[0040] In addition, the present invention also provides a computer-readable storage medium, which stores a computer program or instruction, and the computer program or instruction is programmed or configured to execute the FEC code evaluation optimization method and system suitable for various application scenarios through a processor.

[0041] In addition, the present invention also provides a computer program product, including a computer program or instructions, which are programmed or configured to execute the FEC code evaluation optimization method and system applicable to various application scenarios through a processor.

[0042] Compared with the prior art, the present invention has the following advantages: The present invention includes evaluating the delay performance T for multiple FEC codes respectively to select the optimal FEC code, wherein the delay performance T of the FEC code is evaluated as follows: S1, for a plurality of data blocks FEC (k, t) with k data units and capable of correcting t data units obtained after the FEC code is used for the data packet, the loss probability of the data packet after the FEC code is used in the current application scenario is calculated S2, according to the loss probability Calculate the packet loss rate P after the data packet uses the FEC code; S3, calculate the delay performance T of the data packet after using the FEC code according to the packet loss rate P. The present invention abandons the traditional method of obtaining data through statistics, and adopts an analytical method to use direct formula calculation to quickly obtain a large amount of data, and obtains the results in various application scenarios to realize the performance evaluation and optimization of the FEC solution. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 Schematic diagram of the basic flow of the method of the embodiment of the present invention. DETAILED DESCRIPTION

[0044] In view of the above problems of the prior art, especially the time-consuming nature of obtaining a large range of multi-dimensional FEC coding performance data, the present invention provides a FEC code evaluation optimization method and system suitable for a variety of application scenarios, aiming to solve the time-consuming and inefficient nature of the existing full-link simulation. Figure 1 As shown, this embodiment provides a FEC code evaluation optimization method applicable to multiple application scenarios, including evaluating the delay performance T for multiple FEC codes respectively to select the optimal FEC code, wherein evaluating the delay performance T of the FEC code includes:

[0045] S1, for the data packets after using the FEC code, the data blocks FEC(k,t) with k data units and t data units that can be corrected are obtained, and the loss probability of the data packets after using the FEC code in the current application scenario is calculated.

[0046] S2, according to the loss probability Calculate the packet loss rate P after the data packet uses the FEC code;

[0047] S3, calculate the delay performance T of the data packet after using the FEC code according to the packet loss rate P.

[0048] In this embodiment, the loss probability of data packets after using FEC code in different application scenarios is provided according to the needs of various application scenarios. These include: two special application scenarios in which the FEC code adopts the DFE mechanism (generally suitable for simulating long-distance transmission models of strong error correction FEC codes, such as Ethernet) and the FEC code adopts the precoding mechanism (generally suitable for long-distance transmission models of weak error correction FEC codes, such as the Gen-Z specification), as well as general application scenarios other than the two special application scenarios of the FEC code adopting the DFE mechanism and the FEC code adopting the precoding mechanism (generally suitable for short-distance transmission, such as AI transmission). The packet loss rate of the data packet after using the FEC code can be directly obtained according to the relationship between the data packet and the FEC block. The delay performance of the data packet after using the FEC code. According to the system, the characteristic of the data packet being retransmitted when an error occurs is obtained by considering the encoding and decoding time and data transmission time of the FEC code. In this embodiment, the simulated transmission distance is set to 0-1000 kilometers; the error rate range is set to 10 -10 ~10 -2 , which can describe a transmission system with good or poor performance; the data packet size is 4096 bits.

[0049] As an optional implementation, in the current application scenario in step S1 of this embodiment, the FEC code adopts the DFE mechanism. The data unit error rate of the FEC code under the DFE mechanism can be roughly divided into two cases because of the DFE mechanism. One is the probability p of the data unit itself being wrong. l, and the other is the probability q that the error of the previous data unit leads to the error of the next data unit l Therefore, in this embodiment, the probability of data packet loss after using FEC code in the current application scenario is calculated. Including: for the data packet, after using the FEC code to obtain several data blocks FEC (k, t), calculate the probability p of the data unit itself being wrong l And the probability q that the previous data unit error leads to the next data unit error l ; Calculate the loss probability of data packets after using FEC code in the current application scenario according to the following formula:

[0050]

[0051]

[0052] In the above formula, S i is the inner loop approximate variable; is the binomial coefficient, which indicates the number of ways to select i+1 data units from k-t+1 data units; is the binomial coefficient, which indicates the number of ways to select i data units from i+j data units; i and j are loop variables, k is the number of data units in each data block FEC(k,t), and t is the number of data units that can be corrected by each data block FEC(k,t). According to the above formula, the block failure rate calculation formula of the FEC code under the DFE mechanism in this embodiment is calculated using a recursive formula, and an approximate method is used to simplify the inner layer of the recursive formula to improve the calculation efficiency.

[0053] In this embodiment, the probability p of the data unit itself being wrong is calculated. l And the probability q that the previous data unit error leads to the next data unit error l The function expression is:

[0054]

[0055]

[0056] q s =(r-1) / r, (5)

[0057] In the above formula, u is the number of bits in the data block FEC (k, t), p b is the bit error rate for each bit, q s is the probability that the previous bit causes the next bit to be wrong, s is the number of bits contained in a data unit, r is the amount of energy, and i is the loop variable. According to the above formula, the probability q that the previous data unit causes the next data unit to be wrong under the DFE mechanism of the FEC code isl It is related to the amount of data in the data block FEC (k, t). The probability p of a data unit error due to interference under the FEC code DFE mechanism l With q l Related.

[0058] As an optional implementation, in step S1 of this embodiment, the FEC code in the current application scenario adopts a precoding mechanism, and the loss probability of the data packet after using the FEC code in the current application scenario is calculated. When the data block FEC (k, t) can correct an odd number of data units, according to formula (6), the loss probability of the data packet after using the FEC code is When the data block FEC (k, t) can correct an even number of data units, the probability of data packet loss after using the FEC code is:

[0059]

[0060] In the above formula, k is the number of data units in each data block FEC (k, t), t is the number of data units that can be corrected for each data block FEC (k, t), i and j are loop variables, and u qs,i is the probability of string error data units with i data units, is the loss probability of a data block FEC(k-1-i,t-2) with k-1-i data units and capable of correcting t-2 data units, t is the number of data units that can be corrected for each data block FEC(k,t), n is a positive integer variable, is a positive integer, ρ i is the probability of a string of data units with i as the number of data units, is the loss probability of a data block FEC (ki, t-2) with ki data units and capable of correcting t-2 data units. The formula for calculating the block failure rate of FEC code under the precoding mechanism can be quickly completed using a recursive formula based on the current range of precoding technology to reduce computing time and improve computing efficiency.

[0061] Under the precoding mechanism of FEC code, the adjacent string-like correct data units and string-like error data units generated by the DFE mechanism are called a string-like data unit group. In this embodiment, the probability of a string-like data unit group with a data unit number of i is ρ i The calculation function expression is:

[0062]

[0063]

[0064] In the above formula, ρ iis the probability of a string of data units with i as the number of data units, p b is the bit error rate for each bit, q s is the probability that the previous bit causes the next bit to be wrong, and i is the number of data units. The number and position of data unit errors under the precoding mechanism of the FEC code are consistent with the number and position of data units with string errors caused by the DFE mechanism.

[0065] As an optional implementation, in step S1 of this embodiment, the FEC code in the current application scenario adopts a general mechanism that is not a DFE mechanism and a precoding mechanism. For the characteristics of the FEC code of the general mechanism, a recursive formula is used to iteratively calculate according to the relationship between the number of data units in the FEC block and the error correction capability. Specifically, in this embodiment, the loss probability of the data packet after using the FEC code in the current application scenario is calculated. The function expression is:

[0066]

[0067] In the above formula, p l is the error rate of each data unit, p b represents the bit error rate of each bit, k is the number of data units in each data block FEC (k, t), t is the number of data units that can be corrected for each data block FEC (k, t), i is the loop variable, is a binomial coefficient, which indicates the number of methods for selecting i data units from k-t+i-1 data units. 5. The block failure rate of a general FEC code requires the error rate of each data unit to be obtained, which is related to the data aggregation method and the data transmission performance. In this embodiment, the following are available:

[0068] p l =1-(1-p b ) s , (11)

[0069] In the above formula, s is the number of bits contained in a data unit.

[0070] The calculation function expression of the packet loss rate P in step S2 of this embodiment is:

[0071]

[0072] In the above formula, is the loss probability, n is the number of bits in the data packet, and m is the number of FEC blocks in a single data packet; according to the above formula, the packet loss rate after the data packet uses the FEC code is related to the number of FEC blocks and the loss probability of each FEC. The delay performance of the data packet after using the FEC code, when the receiver does not receive the correct data packet, the system will retransmit the data packet, thereby increasing the system delay. Considering the relationship between the number of retransmissions and the packet loss rate, the calculation function expression of the delay performance T in step S3 of this embodiment is:

[0073]

[0074] In the above formula, P is the packet loss rate, t0 is the time taken for the transmission distance, and t n The time required to encode the FEC code.

[0075] In this embodiment, the loss probability shown in formula (1) is The derivation process of the calculation function expression of is as follows: Assume that under the DFE mechanism, the data block after an erroneous data unit The probability of loss It can be expressed as:

[0076]

[0077] In the above formula, p l The probability that the data unit itself is wrong, q l Q is the probability that the error of the previous data unit will lead to the error of the next data unit; i is the inner loop approximate variable; is the binomial coefficient, which indicates the number of ways to select i data units from kt-1 data units; is the binomial coefficient, which indicates the number of ways to select i data units from i+j data units; i and j are loop variables; k is the data block after an erroneous data unit The number of data units in , t is each data block The number of data units that can be corrected. When there is only one data unit and no error correction capability, there is a probability of loss. for:

[0078]

[0079] Assume data block in The loss probability is:

[0080]

[0081] In the above formula, S iis the inner loop approximate variable; A data block following an erroneous data unit The number of data units in For each data block The number of data units that can be corrected, and

[0082] By satisfying the data block The formula is derived to satisfy The probability formula for data block loss is:

[0083]

[0084] Simplifying the above formula, we have:

[0085]

[0086] For the loop variable S i and Q i , the following relationship exists:

[0087]

[0088] Substitute the simplified formula into the loop variable S i and Q i Then we have:

[0089]

[0090] Therefore, it can be proved that under the DFE mechanism, the The data block loss probability formula (1) holds. The probability of data block loss Formula (1) derives the FEC(k,t) loss probability under the DFE mechanism: The function expression is:

[0091]

[0092] In the above formula, m is the loop variable; k is the number of data units in each data block FEC (k, t), and t is the number of data units that can be corrected in each data block FEC (k, t). Simplifying the above formula, we have:

[0093]

[0094] In the above formula, is the binomial coefficient, which indicates the number of ways to select i data units from ktm-1 data units; m and i are loop variables. Use the binomial theorem to simplify the formula:

[0095]

[0096] The loss probability of data block FEC(k,t) can be proved The calculation function expression (1) is used. At the same time, it is only necessary to convert the loss probability shown in formula (1) q in the formula l Substitute it into p l , it can be obtained that the FEC code in the current application scenario in step S1 of this embodiment adopts a general mechanism that is not a DFE mechanism and a precoding mechanism, and the loss probability of the data packet after using the FEC code in the current application scenario is calculated The function expression (10) will not be elaborated here.

[0097] In summary, the key to the FEC code evaluation optimization method applicable to various application scenarios in this embodiment lies in the error rate calculation formula of the FEC code. All the error rate calculation formulas of the FEC code are mainly based on the single variable of the bit error rate, and the entire FEC code error rate calculation formula system is derived according to different mechanisms, and then the FEC code error rate model is formed according to the performance target of the system. The FEC code evaluation optimization method applicable to various application scenarios in this embodiment adopts an analytical method to obtain the formula, uses the principle of recursive iteration to obtain the expression, and uses the mathematical approximation principle to further improve the operation efficiency. Therefore, according to the correlation between the bit error rate and the FEC code error rate in a typical scenario, a fast evaluation method for FEC code performance can be provided. The traditional full-link simulation is single, and only a few FEC codes can be simulated in one scenario at a time, and the scope of the simulation is limited. It is necessary to count and organize all the data to obtain the optimal FEC code, which is very time-consuming. The mathematical analytical method used in this embodiment uses mathematical formulas to directly calculate the required data, with high operation efficiency, and can obtain a large range of multi-dimensional large amounts of FEC code data at one time, so as to quickly obtain the optimal FEC code.

[0098] In addition, this embodiment also provides an FEC code evaluation and optimization method applicable to various application scenarios, including an interconnected microprocessor and a memory, wherein the microprocessor is programmed or configured to execute the FEC code evaluation and optimization method applicable to various application scenarios.

[0099] In addition, this embodiment also provides a computer-readable storage medium, which stores a computer program or instruction, and the computer program or instruction is programmed or configured to execute the FEC code evaluation optimization method applicable to various application scenarios through a processor.

[0100] In addition, this embodiment also provides a computer program product, including a computer program or instructions, which are programmed or configured to execute the FEC code evaluation optimization method applicable to various application scenarios through a processor.

[0101] Those skilled in the art will appreciate that the technical solutions provided by the embodiments of the present application may be in the form of methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present application may adopt the form of a computer program product implemented on one or more computer-readable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes. The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the process. Figure 1 A process or multiple processes and / or boxes Figure 1 These computer program instructions can also be stored in a computer-readable memory that can guide a computer or other programmable data processing device to work in a specific way, so that the instructions stored in the computer-readable memory produce a product including an instruction device, which implements the functions specified in the process. Figure 1 A process or multiple processes and / or boxes Figure 1 These computer program instructions can also be loaded onto a computer or other programmable data processing device, so that a series of operation steps are executed on the computer or other programmable device to produce a computer-implemented process, so that the instructions executed on the computer or other programmable device provide for implementing the process in the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0102] The above is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above embodiments. All technical solutions under the concept of the present invention belong to the protection scope of the present invention. It should be pointed out that for ordinary technicians in this technical field, some improvements and modifications without departing from the principle of the present invention should also be regarded as the protection scope of the present invention.

Claims

1. A FEC code evaluation optimization method suitable for various application scenarios, characterized in that: The method includes evaluating the delay performance T for a plurality of FEC codes respectively to select an optimal FEC code, wherein evaluating the delay performance T for the FEC code includes: S1, for the data packets after using the FEC code, the data blocks FEC(k,t) with k data units and t data units that can be corrected are obtained, and the loss probability of the data packets after using the FEC code in the current application scenario is calculated. S2, according to the loss probability Calculate the packet loss rate P after the data packet uses the FEC code; S3, calculate the delay performance T of the data packet after using the FEC code according to the packet loss rate P.

2. The FEC code evaluation optimization method applicable to various application scenarios according to claim 1 is characterized in that: In step S1, the FEC code in the current application scenario adopts the DFE mechanism, and the loss probability of the data packet after using the FEC code in the current application scenario is calculated. Including: for the data packet, after using the FEC code to obtain several data blocks FEC (k, t), calculate the probability p of the data unit itself being wrong l And the probability q that the previous data unit error leads to the next data unit error l ; Calculate the loss probability of data packets after using FEC code in the current application scenario according to the following formula: In the above formula, S i is the inner loop approximate variable; is the binomial coefficient, which indicates the number of ways to select i+1 data units from kt data units; is the binomial coefficient, which indicates the number of ways to select i data units from i+j data units; i and j are loop variables; k is the number of data units in each data block FEC(k,t), and t is the number of data units that can be corrected for each data block FEC(k,t).

3. The FEC code evaluation optimization method applicable to various application scenarios according to claim 2 is characterized in that: The probability p of the calculated data unit itself being wrong l And the probability q that the previous data unit error leads to the next data unit error l The function expression is: q s ＝(r-1) / r，(5) In the above formula, u is the number of bits in the data block FEC (k, t), p b is the bit error rate for each bit, q s is the probability that the previous bit causes the next bit to be wrong, s is the number of bits contained in a data unit, r is the amount of electrical energy, and i is the loop variable.

4. The FEC code evaluation optimization method applicable to various application scenarios according to claim 2, characterized in that: In step S1, the FEC code in the current application scenario adopts a precoding mechanism, and the loss probability of the data packet after using the FEC code in the current application scenario is calculated. When the data block FEC (k, t) can correct an odd number of data units, according to formula (6), the loss probability of the data packet after using the FEC code is When the data block FEC (k, t) can correct an even number of data units, the probability of data packet loss after using the FEC code is: In the above formula, k is the number of data units in each data block FEC (k, t), t is the number of data units that can be corrected for each data block FEC (k, t), i and j are loop variables, is the probability of string error data units with i data units, is the loss probability of a data block FEC(k-1-i,t-2) with k-1-i data units and capable of correcting t-2 data units, t is the number of data units that can be corrected for each data block FEC(k,t), n is a positive integer variable, is a positive integer, ρ i is the probability of a string of data units with i as the number of data units, is the loss probability of a data block FEC(ki,t-2) having ki data units and capable of correcting errors of t-2 data units.

5. The FEC code evaluation optimization method applicable to various application scenarios according to claim 4 is characterized in that: The probability of a string of data units with i data units is ρ i The calculation function expression is: In the above formula, ρ i is the probability of a string of data units with i as the number of data units, p b is the bit error rate for each bit, q s is the probability that the previous bit causes the next bit to be wrong, and i is the number of data units.

6. The FEC code evaluation optimization method applicable to various application scenarios according to claim 4, characterized in that: In step S1, the FEC code in the current application scenario adopts a general mechanism that is not a DFE mechanism and a precoding mechanism, and calculates the loss probability of the data packet after using the FEC code in the current application scenario The function expression is: In the above formula, p l is the error rate of each data unit, p b represents the bit error rate of each bit, k is the number of data units in each data block FEC (k, t), t is the number of data units that can be corrected for each data block FEC (k, t), i is the loop variable, is the binomial coefficient, which represents the number of ways to select i data units from k-t+i-1 data units, and: p l =1-(1-p b ) s ,(11) In the above formula, s is the number of bits contained in a data unit.

7. The FEC code evaluation optimization method applicable to various application scenarios according to claim 1, characterized in that: The calculation function expression of the packet loss rate P in step S2 is: In the above formula, is the loss probability, n is the number of bits in a data packet, and m is the number of FEC blocks in a single data packet; The calculation function expression of the delay performance T in step S3 is: In the above formula, P is the packet loss rate, t0 is the time taken for the transmission distance, and t n The time required to encode the FEC code.

8. A FEC code evaluation and optimization system suitable for multiple application scenarios, comprising a microprocessor and a memory connected to each other, characterized in that: The microprocessor is programmed or configured to execute the FEC code evaluation optimization method applicable to multiple application scenarios as described in any one of claims 1 to 7.

9. A computer-readable storage medium having a computer program or instruction stored therein, characterized in that: The computer program or instruction is programmed or configured to execute, through a processor, the FEC code evaluation optimization method applicable to multiple application scenarios as described in any one of claims 1 to 7.

10. A computer program product comprising a computer program or instructions, characterized in that The computer program or instruction is programmed or configured to execute, through a processor, the FEC code evaluation optimization method applicable to multiple application scenarios as described in any one of claims 1 to 7.

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