Network transmission test method

Abstract

The invention provides a network opposite transmission test method, which belongs to the technical field of airborne network communication test, and specifically comprises the following steps of: physically connecting two tested products to enable the two tested products to form interconnection of electrical signals; the two products serve as source end products in sequence, and when one product serves as the source end product, the other product serves as a paired product; the source end product sends the opposite transmission test data to the paired product, the paired product sends the received test data to the source end product, the source end product compares the received data with the sent data, and if the two pieces of data are consistent, it is indicated that the opposite transmission performance test of the source end product is normal. Through the processing scheme provided by the invention, the performance and stability of data transmission can be accurately evaluated; and the product quality and the communication reliability are improved.

Description

Technical Field

[0001] The present application relates to the field of airborne network communication testing, and in particular to a network transmission testing method. Background Art

[0002] With the rapid development of airborne network communication technology, the data transmission quality and communication reliability requirements between network devices are increasing day by day. The traditional test fixture of FC network standard daughter card cannot guarantee the consistency of the communication clock output frequency between the FC daughter card and the whole product because the FC communication test is self-transmitting and self-receiving. It is easy to have clock deviation between the FC communication clock on different devices and the communication clock on the FC network standard daughter card, resulting in a high FC link bit error rate and occasional failures during FC network communication, which cannot meet the needs of modern network communication testing. Therefore, it is particularly important to develop an efficient and reliable network transmission test method and test fixture. Summary of the invention

[0003] In view of this, the present application provides a network transmission test method to solve the problem in the prior art that there is a deviation in the communication clock frequency output of different FC network test equipment, the FC link bit error rate is high, and thus occasional failures in FC network communication occur.

[0004] The present application provides a network transmission test method using the following technical solutions:

[0005] A network transmission test method comprises the following steps:

[0006] Physically connect the two products under test to interconnect the electrical signals of the two products under test;

[0007] The two products are used as source products in turn. When one product is used as the source product, the other product is used as the paired product.

[0008] The source product sends the transmission test data to the paired product, and the paired product sends the received test data to the source product. The source product compares the received data with the sent data. If the two data are consistent, it means that the transmission performance test of the source product is normal.

[0009] Optionally, the performance test of the product under test is implemented by a tool, and the tool includes:

[0010] The test chassis includes a chassis motherboard, on which a plurality of mounting slots are provided, connectors in the mounting slots, and electrical connectors in two mounting slots are interconnected;

[0011] An adapter board, used to install the product under test, the adapter board is electrically connected to the connector in the installation slot, and is used to introduce the electrical signal of the product into the chassis motherboard;

[0012] A host computer storing interactive software;

[0013] CPU, storing test software;

[0014] The CPU is communicatively connected to each installation slot, the host computer and the CPU exchange data via a serial port, the user selects a test item via the interactive software of the host computer, and the CPU executes the corresponding test software according to the selected test item.

[0015] Optionally, a PCIe switch is integrated on the chassis motherboard, which is used to convert a single PCIe interface introduced from the CPU module via a PCIE cable into multiple PCIe interfaces.

[0016] Optionally, the PCIe switching switch of the chassis motherboard provides the PCIE signal of the product to the CPU for interface access control, and the motherboard supports PCIe interface access and control of PCIe and discrete quantity resources of multiple products.

[0017] Optionally, the interactive software of the host computer includes an automatic test function module, a manual test function module, a PDF format report file output function module, a TXT format test data storage function module, and an XML format log configuration and output function module.

[0018] Optionally, the test software includes a user interaction layer and a function driver layer. The test software is a VxWorkes embedded system. The user interaction layer interacts with the host computer through a serial port, and the function driver layer interacts with the product through a product API. The test software performs corresponding tests on the product according to the host computer instructions and returns the test results to the host computer. The test software includes a variety of test programs.

[0019] Optionally, the test program is a Mailbox test program, an information interaction area test program, a communication configuration test program, a device interruption test program, a timer test program, a data block message wraparound test program, a bandwidth test program, a data wraparound test program in different modes, a message wraparound test program or a redundancy test program.

[0020] In summary, this application includes the following beneficial technical effects:

[0021] The traditional testing method is to perform FC self-loop on the product adapter board to achieve self-transmission and self-reception of a single module, which cannot effectively eliminate the fault caused by abnormal communication clock output frequency on the FC daughter card;

[0022] The present application method leads out the FC signal on the adapter board, and performs FC signal encirclement on the odd and even slots of the tooling motherboard, realizes the FC data transmission test between the modules by the lower computer software, and prints the transmission test result on the upper computer software, which can timely discover and eliminate the faults caused by the communication clock deviation of different products, improve the test efficiency, and complete the sending and receiving of a large amount of test data in a short time; improve the accuracy of the test result, and can accurately evaluate the performance and stability of data transmission by parsing and verifying the test data packet; improve the product quality and communication reliability, and is suitable for the transmission test of various types of FC network daughter cards, and has strong versatility and applicability. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0024] Figure 1 This is a principle block diagram of the network transmission test method of this application;

[0025] Figure 2 This is a schematic diagram of the software architecture of the device for this application;

[0026] Figure 3 This is a schematic diagram of the software testing process for this application. DETAILED DESCRIPTION

[0027] The embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0028] The following describes the implementation methods of the present application through specific examples, and those skilled in the art can easily understand other advantages and effects of the present application from the contents disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. The present application can also be implemented or applied through other different specific implementation methods, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present application. It should be noted that, in the absence of conflict, the following embodiments and the features in the embodiments can be combined with each other. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without making creative work belong to the scope of protection of the present application.

[0029] It should be noted that various aspects of the embodiments within the scope of the appended claims are described below. It should be apparent that the aspects described herein can be embodied in a wide variety of forms, and any specific structure and / or function described herein is merely illustrative. Based on the present application, it should be understood by those skilled in the art that an aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number of aspects described herein can be used to implement the device and / or practice the method. In addition, other structures and / or functionalities other than one or more of the aspects described herein can be used to implement this device and / or practice this method.

[0030] It should also be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present application. The illustrations only show the components related to the present application rather than being drawn according to the number, shape and size of the components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed at will, and the component layout may also be more complicated.

[0031] Additionally, in the following description, specific details are provided to facilitate a thorough understanding of the examples. However, it will be understood by those skilled in the art that the aspects described may be practiced without these specific details.

[0032] An embodiment of the present application provides a network transmission testing method.

[0033] A network transmission test method comprises the following steps:

[0034] Physically connect the two products under test to interconnect the electrical signals of the two products under test.

[0035] The two products serve as source products in turn. When one product serves as the source product, the other product serves as the paired product.

[0036] The source product sends the transmission test data to the paired product, and the paired product sends the received test data to the source product. The source product compares the received data with the sent data. If the two data are consistent, it means that the transmission performance test of the source product is normal. In the embodiment of the present application, the tested product is an FC daughter card.

[0037] In the embodiment of the present application, the performance test of the product under test is achieved by a tool, and the tool includes:

[0038] like Figure 1 and Figure 2As shown, the test chassis includes: a chassis motherboard, a plurality of installation slots are arranged on the chassis motherboard, connectors in the installation slots, and electrical connectors in two installation slots are interconnected; an adapter board is used to install the tested product, the adapter board is electrically connected to the connectors in the installation slots, and is used to introduce the electrical signal of the product into the chassis motherboard, so as to interconnect two products and support transmission test between two products; after the FC daughter card is installed and fixed, the daughter card number can be directly observed, the JTAG interface of the daughter card is brought out on the adapter board, and the logic can be solidified through the JTAG interface after the adapter board and the daughter card are fixed, and the routing rate of the adapter board supports 4.25Gbps, and is backward compatible with 1Gbps and 2Gbps. The working environment of the test chassis meets the working environment conditions of the FC daughter card. It uses a DC 28V power supply and is equipped with a power supply positive and negative reverse polarity protection circuit to ensure that the motherboard and the product will not be damaged if the power line is connected in reverse. A DC-DC power conversion switch is used to convert the DC 28V to DC 5V for the daughter card. The 5V power is not less than 150% of the rated power of the 8 daughter cards. The external interfaces are uniformly led to the front panel of the chassis. The front panel of the chassis has a DC +28V power input interface and a PCIe interface as well as a stress ring device for fixing the PCIe cable, which allows the single installation of 8 FC daughter card adapter boards of the same type.

[0039] The chassis motherboard leads out the FC signal and supports FC electrical interface transmission testing between odd and even installation slots. It can test 2, 4, 6, or 8 products at a time.

[0040] The installation slot in this application uses a VPX connector, and the two module connector slots that match each other are clearly marked.

[0041] The external interfaces of the test chassis are uniformly led to the front panel of the chassis, and an external "stress ring" device is used to optimize the structure, and the PCIe interface cable is fixed at any mounting hole position of the stress ring device on the front panel of the chassis.

[0042] To meet the product signal test integrity, the signal is converted into a PCIE signal for the CPU to perform interface access control. At the same time, the chassis motherboard supports PCIe interface access and controls the PCIe and discrete resources of at least 8 sub-cards. The chassis motherboard integrates a PCIe switch to convert the 1-way PCIe interface introduced from the CPU module via a PCIE cable into a multi-way PCIe interface. At the same time, a heat sink is installed on the upper part of the high-power device of the chassis motherboard to dissipate the heat through the test chassis.

[0043] The PCIe exchange switch of the chassis motherboard provides the PCIE signal of the product to the CPU for interface access control. At the same time, the motherboard supports PCIe interface access and control of PCIe and discrete quantity resources of multiple products.

[0044] The host computer stores interactive software, and the host computer software is divided into a user interaction layer and a data link layer. The interactive software of the host computer includes an automatic test function module, a manual test function module, a PDF format report file output function module, a TXT format test data storage function module, and an XML format log configuration and output function module. The user interaction layer is mainly used to graphically display the test results to the user and enter the basic information of the report. The data link layer realizes data interaction with the lower computer through RS232 and interacts with the test platform through UDP communication.

[0045] like Figure 3 As shown, the main functions of automatic test and manual test are that after the product is powered on, the user sends serial port instructions to control the host test platform to run automatic test or manual test sequence, and print and display the serial port information output by the host test platform on the software interface. The specific operations are: running the test software, serial port resource configuration, selecting the test mode, opening the serial port, powering on the product and BIT test, data recording and storage, powering off the product, producing a PDF format report and the test ends at the same time.

[0046] Among them, the PDF format report file output function module is that after each test, when the product is powered off, the software automatically generates a PDF format report file of the current test with the acceptance test items, test data qualification information, module appearance size and weight information, and module function performance test record information.

[0047] The TXT format test data storage function module is used to record the test data of the entire test process. When the software is run, when the user opens the serial port, the software background creates a TXT data file and stores the information output by the CPU during the test in the TXT file. When the user closes the serial port, the software background closes the data file to release resources and saves the relevant test data in the specified path.

[0048] The XML format log configuration and output function module is to fill in the relevant test information into the corresponding control after running the test software, click the Save button, save the XML file to the configuration file, and automatically load it the next time the software is run.

[0049] The CPU, as a lower computer, stores the test software; the CPU is communicatively connected to each installation slot, the upper computer and the CPU exchange data through the serial port, the user selects the test item through the interactive software of the upper computer, and the CPU executes the corresponding test software according to the selected test item.

[0050] The test software includes a user interaction layer and a function driver layer. Since the lower computer is a VxWorkes embedded system, the user interaction layer interacts with the upper computer through a serial port, and the function driver layer interacts with the product through a product API.

[0051] The test program is a Mailbox test program, an information exchange area test program, a communication configuration test program, a device interruption test program, a timer test program, a data block message wraparound test program, a bandwidth test program, a data wraparound test program in different modes, a message wraparound test program or a redundancy test program. Among them, the data block message wraparound test, the bandwidth test, the data wraparound test in different modes, and the message wraparound test are all transmission wraparound tests, which are the main functional test modules of the automated test and realize the core automated transmission test function.

[0052] The data block message wraparound test is divided into the data block message wraparound test in query mode and interrupt mode. In the query mode, PowerPC completes the PCIe port configuration, configures the FPGA to send and receive data blocks, PowerPC queries the flag register, reads the block data, and prints the test results; in the interrupt mode, PowerPC completes the PCIe port configuration, configures the FPGA to send and receive data blocks, and when an interrupt is triggered, PowerPC reads the block data and prints the test results.

[0053] The bandwidth test tests the bandwidth of different frame lengths. When PowerPC completes the PCIe port configuration and configures FPGA to send and receive a large number of data blocks with different frame lengths, PowerPC counts the total number of data blocks, calculates the data bandwidth, and prints the test results.

[0054] The stream data wraparound test under different modes is divided into query mode and interrupt mode. The stream data wraparound test under query mode is to configure FPGA to send and receive stream data after PowerPC completes PCIe port configuration, and PowerPC queries the flag register. When it is "1", the block data is read and the test results are printed; the stream data wraparound test under interrupt mode is to configure FPGA to send and receive stream data after PowerPC completes PCIe port configuration, and read the block data and print the test results when PowerPC is interrupted.

[0055] The message wraparound test is divided into 2-message and 8-message wraparound tests. The 2-message wraparound test is used to test whether the product transmits short messages correctly. After PowerPC completes the PCIe port configuration, configure FPGA to send 2 messages. PowerPC reads the 2 messages from the other end, compares the message content, determines whether the lengths of the sent and received message blocks are consistent, and prints the test results. The 8-message wraparound test is to send stream data messages through interrupt tasks. After PowerPC completes the PCIe port configuration, configure FPGA to send 8 messages. PowerPC reads the 8 messages from the other end, compares the lengths of the sent and received message blocks, and prints the test results.

[0056] The Mailbox test obtains the register test feedback result by calling the initialization configuration handle and calling the FC module driver software interface, which is used to test the FC mailbox register.

[0057] The information interaction area test is to obtain the sending and receiving results by calling the initialization configuration handle and the FC module driver software interface, respectively passing in the "mode and length", which is used to test whether the reading and writing functions of the information interaction area in the PC board are correct.

[0058] The communication configuration test mainly calls the FC module driver software interface and the FC communication Flash test, obtains the Flash test start time, performs the Flash test, obtains the Flash test end time, calculates the test time, feeds back the test results and prints them, which is used to test the FC communication configuration Flash.

[0059] The device interrupt test calls the FC interface test function, checks the interrupt test mark, and prints the test results to test the device interrupt function.

[0060] The timer test starts timer 0 and timer 1 in sequence, obtains the timer running status, checks the test results and prints the test information, which is used to test the FC general timer.

[0061] In the bandwidth test, different bandwidths are configured for a pair of products, and the time taken to send the same file to different products is tested. The test results are checked and the test information is printed. Under 5 different bandwidths, a pair of products are tested for sending and receiving under different bandwidths.

[0062] The redundancy test is to organize data messages, start the message sending and receiving tasks, stop the message sending and receiving tasks, query the task sending and receiving statistics, compare the sending and receiving statistics to see if they are consistent, and obtain the device sending signal TxFrameCnt and receiving signal RxFrameCnt. If the signal quantities of the sending end and the receiving end are consistent, the redundancy test is considered to be qualified.

[0063] The present application embodiment discloses a specific test operation process:

[0064] Step 1: Set the test parameters, including product information, test type, port parameters, power settings, etc.

[0065] Step 2: Start the test, module 1 generates test data packets for each BIT test item and sends them to the network, and the serial port prints and records the number of packets sent for each test item;

[0066] Step 3: The paired module receives the test data packet, parses and verifies it. When the number of received data packets is consistent with the number of sent data packets, the serial port prints and records the number of packets received for each test item. At the same time, "OK" is displayed at the test result.

[0067] Step 4: The pairing module also forwards the received test data packets to the network, and the serial port prints and records the number of packets forwarded for each test item;

[0068] Step 5: Module 1 receives the test data packet sent by the paired module, and parses and verifies it. When the number of received data packets is consistent with the number of sent data packets, the serial port prints and records the number of packets received by each test item, and at the same time, "OK" is displayed at the test result;

[0069] Step 6: After all test data transmission tests are completed, evaluate the performance and stability of data transmission based on the recorded test data and generate a test report.

[0070] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be based on the protection scope of the claims.

Claims

1. A network transmission test method, characterized in that: The steps include: Physically connect the two products under test to interconnect the electrical signals of the two products under test; The two products are used as source products in turn. When one product is used as the source product, the other product is used as the paired product. The source product sends the transmission test data to the paired product, and the paired product sends the received test data to the source product. The source product compares the received data with the sent data. If the two data are consistent, it means that the transmission performance test of the source product is normal.

2. The network transmission test method according to claim 1, characterized in that: The performance test of the product under test is achieved through the tooling, and the tooling includes: The test chassis includes a chassis motherboard, on which a plurality of mounting slots are provided, connectors in the mounting slots, and electrical connectors in two mounting slots are interconnected; An adapter board, used to install the product under test, the adapter board is electrically connected to the connector in the installation slot, and is used to introduce the electrical signal of the product into the chassis motherboard; A host computer storing interactive software; CPU, storing test software; The CPU is communicatively connected to each installation slot, the host computer and the CPU exchange data via a serial port, the user selects a test item via the interactive software of the host computer, and the CPU executes the corresponding test software according to the selected test item.

3. The network transmission test method according to claim 2, characterized in that: The chassis motherboard is integrated with a PCIe exchange switch for converting a single PCIe interface introduced from the CPU module via a PCIE cable into multiple PCIe interfaces.

4. The network transmission test method according to claim 3, characterized in that: The PCIe exchange switch of the chassis motherboard provides the PCIE signal of the product to the CPU for interface access control. At the same time, the motherboard supports PCIe interface access and control of PCIe and discrete quantity resources of multiple products.

5. The network transmission test method according to claim 3, characterized in that: The interactive software of the host computer includes an automatic test function module, a manual test function module, a PDF format report file output function module, a TXT format test data storage function module, and an XML format log configuration and output function module.

6. The network transmission test method according to claim 3, characterized in that: The test software includes a user interaction layer and a function driver layer. The test software is a VxWorkes embedded system. The user interaction layer interacts with the host computer through a serial port, and the function driver layer interacts with the product through a product API. The test software performs corresponding tests on the product according to the host computer instructions and returns the test results to the host computer. The test software includes a variety of test programs.

7. The network transmission test method according to claim 1, characterized in that: The test program is a Mailbox test program, an information interaction area test program, a communication configuration test program, a device interruption test program, a timer test program, a data block message wraparound test program, a bandwidth test program, a different mode downstream data wraparound test program, a message wraparound test program or a redundancy test program.

Images