Reduced-size light-emitting device, preparation method thereof and display panel

Abstract

The invention provides a reduced-size light-emitting device, a preparation method thereof and a display panel, and belongs to the technical field of photoelectron manufacturing. The light-emitting device comprises a carrier plate, a connecting electrode and a plurality of pixel chips, wherein the plurality of pixel chips are arranged on the plate surface of the carrier plate at intervals; the connecting electrode is located on the surface of the pixel chip and electrically connected with the pixel chip, and at least part of the connecting electrode is located on the side wall of the carrier plate. The size of the light-emitting device can be reduced, the pixel density of the display panel can be improved, and the display effect can be improved.

Description

Technical Field

[0001] The present disclosure relates to the field of optoelectronic manufacturing technology, and in particular to a light-emitting device with reduced size, a preparation method thereof, and a display panel. Background Art

[0002] In the emerging display field, Mini / Micro LED is constantly expanding the application boundaries of display screens. MIP (MicroLED in package) light-emitting devices realize the organic combination of Micro LED and discrete devices by packaging the entire large-area display panel separately.

[0003] In the related art, the light-emitting device of MIP includes a plurality of pixel chips and a carrier board. The plurality of pixel chips are arranged on the carrier board at intervals. A relatively large electrode is provided above each pixel chip. The pixel chip is electrically connected to the circuit board through the electrode.

[0004] However, after the light-emitting device is provided with electrodes of larger size, the area of ​​the light-emitting device becomes larger, making it difficult to increase the pixel density of a display panel composed of multiple light-emitting devices, thereby affecting the display effect. Summary of the invention

[0005] The embodiments of the present disclosure provide a light-emitting device with reduced size, a method for manufacturing the same, and a display panel, which can reduce the size of the light-emitting device, increase the pixel density of the display panel, and improve the display effect. The technical solution is as follows:

[0006] An embodiment of the present disclosure provides a light-emitting device, which includes: a carrier, a connecting electrode and a plurality of pixel chips, wherein the plurality of pixel chips are arranged at intervals on a surface of the carrier; the connecting electrode is located on the surface of the pixel chip and is electrically connected to the pixel chip, and at least a portion of the connecting electrode is located on the side wall of the carrier.

[0007] In another implementation of the embodiment of the present disclosure, the multiple pixel chips include: a first pixel chip, a second pixel chip and a third pixel chip, and the first pixel chip, the second pixel chip and the third pixel chip have different luminous colors; the carrier has a first side wall, a second side wall, a third side wall and a fourth side wall connected end to end in sequence, and the connecting electrode includes: a first electrode, a second electrode, a third electrode and a fourth electrode, the first electrode is connected to the first pixel chip, and at least a part of the first electrode is located on the first side wall, the second electrode is connected to the second pixel chip, and at least a part of the second electrode is located on the second side wall, the third electrode is connected to the third pixel chip, and at least a part of the third electrode is located on the third side wall; the fourth electrode is respectively connected to the first pixel chip, the second pixel chip and the third pixel chip, and at least a part of the fourth electrode is located on the fourth side wall.

[0008] In another implementation of the embodiment of the present disclosure, the fourth electrode includes an electrode plate and three electrode strips, the electrode plate is located on the fourth side wall, one end of the three electrode strips are respectively connected to the first pixel chip, the second pixel chip and the third pixel chip, and the other ends of the three electrode strips are all connected to the electrode plate.

[0009] In another implementation of the embodiment of the present disclosure, a peripheral edge of the carrier board has a receiving groove, and at least a portion of the connecting electrode is located in the receiving groove.

[0010] In another implementation of the embodiment of the present disclosure, the shortest distance from the side wall of the carrier to the pixel chip is less than or equal to 1 μm.

[0011] An embodiment of the present disclosure provides a method for preparing a light-emitting device, the method comprising: transferring a plurality of pixel chips to the surface of a carrier so that the plurality of pixel chips are arranged at intervals; making a connecting electrode on the surface of the pixel chip, the connecting electrode being electrically connected to the pixel chip, and at least a portion of the connecting electrode being located on the side wall of the carrier.

[0012] In another implementation of the embodiment of the present disclosure, making a connecting electrode on the surface of the pixel chip includes: etching a plurality of receiving grooves on the carrier to divide the carrier into a plurality of pixel areas, each of the pixel areas being arranged with a plurality of the pixel chips; forming a connecting electrode on the surface of the pixel chip so that part of the connecting electrode extends to the receiving groove.

[0013] In another implementation of the embodiment of the present disclosure, after forming the connecting electrode on the surface of the pixel chip, it also includes: cutting the carrier board along the receiving groove to obtain a plurality of sub-boards; polishing the side walls of each of the sub-boards to expose the connecting electrode located in the receiving groove to obtain a plurality of the light-emitting devices.

[0014] In another implementation of the embodiment of the present disclosure, after transferring the plurality of pixel chips to the surface of a carrier, it further includes: forming a light-shielding layer in the gap between the surface of the carrier and the plurality of pixel chips; forming a passivation layer on the surface of the light-shielding layer and the surface of the pixel chip, the passivation layer having a through hole exposing the pixel chip, the connecting electrode being located on the surface of the passivation layer and being electrically connected to the pixel chip through the through hole.

[0015] An embodiment of the present disclosure provides a display panel, which includes a circuit board and a plurality of light-emitting devices as described above; the board surface of the circuit board has mounting grooves corresponding to the light-emitting devices one by one, the side walls of the mounting grooves are provided with bonding electrodes, the light-emitting devices are located in the corresponding mounting grooves, and the connecting electrodes located on the side walls of the carrier are connected to the bonding electrodes.

[0016] The beneficial effects brought by the technical solution provided by the embodiments of the present disclosure include at least:

[0017] In the light-emitting device provided by the embodiment of the present disclosure, a plurality of pixel chips are arranged at intervals on a carrier, and at least a portion of the connecting electrode provided on the pixel chip extends to the side wall of the carrier. In this way, even if the size of the connecting electrode is too large, after a portion of the connecting electrode is folded to the side wall of the carrier, the total size of the light-emitting device will not be large; since the area of ​​the connecting electrode is reduced, the size of the light-emitting device can also be further reduced. In this way, a larger number of light-emitting devices can be arranged in a display panel of the same size, thereby increasing the pixel density of the display panel and improving the display effect of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0019] Figure 1 is a top view of a light emitting device provided by an embodiment of the present disclosure;

[0020] Figure 2 is a side view of a light emitting device provided by an embodiment of the present disclosure;

[0021] Figure 3 yes Figure 1 An AA cross-sectional view is provided;

[0022] Figure 4 yes Figure 1 A BB cross-section diagram is provided;

[0023] Figure 5 yes Figure 1 A CC cross-section diagram is provided;

[0024] Figure 6 is a flow chart of a method for preparing a light-emitting device provided by an embodiment of the present disclosure;

[0025] Figure 7 is a diagram of a preparation state of a light-emitting device provided by an embodiment of the present disclosure;

[0026] Figure 8 is a diagram of a preparation state of a light-emitting device provided by an embodiment of the present disclosure;

[0027] Fig. 9 is a cross-sectional view of a display panel provided by an embodiment of the present disclosure;

[0028] Fig.10 is a cross-sectional view of a display panel provided by an embodiment of the present disclosure.

[0029] The descriptions of the marks in the figure are as follows:

[0030] 10. Carrier board; 11. First side wall; 12. Second side wall; 13. Third side wall; 14. Fourth side wall; 15. Accommodating groove;

[0031] 20. pixel chip; 21. first pixel chip; 22. second pixel chip; 23. third pixel chip;

[0032] 30. connecting electrode; 31. first electrode; 32. second electrode; 33. third electrode; 34. fourth electrode; 341. electrode plate; 342. electrode strip;

[0033] 41. Circuit board; 42. Mounting groove; 43. Bonding electrode. DETAILED DESCRIPTION

[0034] In order to make the objectives, technical solutions and advantages of the present disclosure more clear, the embodiments of the present disclosure will be further described in detail below with reference to the accompanying drawings.

[0035] Unless otherwise defined, the technical terms or scientific terms used herein shall have the usual meanings understood by persons with ordinary skills in the field to which the present disclosure belongs. The words "first", "second", "third" and similar words used in the patent application specification and claims of the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "one" or "one" do not indicate a quantity limitation, but indicate the existence of at least one. Words such as "include" or "comprise" and similar words mean that the elements or objects appearing before "include" or "comprise" include the elements or objects listed after "include" or "comprise" and their equivalents, and do not exclude other elements or objects. Words such as "connect" or "connected" and similar words are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right", "top", "bottom" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0036] Figure 1 It is a top view of a light-emitting device provided by an embodiment of the present disclosure. Figure 2 is a side view of a light emitting device provided by an embodiment of the present disclosure. Figure 1 , 2 As shown, the light emitting device comprises: a carrier board 10 , a connecting electrode 30 and a plurality of pixel chips 20 , wherein the plurality of pixel chips 20 are arranged on the board surface of the carrier board 10 at intervals.

[0037] like Figure 1 , 2 As shown, the connection electrode 30 is located on the surface of the pixel chip 20 and is electrically connected to the pixel chip. At least a portion of the connection electrode 30 is located on the side wall of the carrier 10 .

[0038] In the light-emitting device provided by the embodiment of the present disclosure, a plurality of pixel chips 20 are arranged at intervals on a carrier 10, and at least a portion of the connection electrode 30 provided on the pixel chip extends to the side wall of the carrier 10. In this way, even if the size of the connection electrode 30 is too large, after a portion of the connection electrode 30 is folded to the side wall of the carrier 10, the total size of the light-emitting device will not be large; since the area of ​​the connection electrode 30 is reduced, the size of the light-emitting device can also be further reduced. In this way, a larger number of light-emitting devices can be arranged in a display panel of the same size, thereby increasing the pixel density of the display panel and improving the display effect of the display panel.

[0039] Optionally, the light-emitting device further includes a shading layer, which is located on the surface of the carrier 10 and in the gap between each pixel chip. The shading layer is used to connect the side walls of the pixel chip, thereby more reliably fixing the pixel chip on the carrier 10.

[0040] Exemplarily, the light shielding layer includes a silicon oxide layer and a black coating filled on the surface of the silicon oxide layer. The light shielding layer is black so that most of the light entering the light shielding layer is absorbed, thereby preventing the light from being emitted laterally to other pixel chips and causing light crosstalk.

[0041] Exemplarily, the light shielding layer may be a distributed Bragg reflector (DBR) layer, which can reflect light, thereby effectively blocking the light from being emitted laterally, avoiding the problem of light crosstalk and improving the brightness of the light emitting device.

[0042] The DBR layer includes multiple periodically alternately stacked SiO 2 Layer and TiO 2 The number of periods of the DBR layer may be between 20 and 50. For example, the number of periods of the DBR layer is 32.

[0043] Among them, SiO in the DBR layer 2 The thickness of the layer can be 800 angstroms to 1200 angstroms, TiO 2 The layer thickness may be 500 angstroms to 900 angstroms.

[0044] Optionally, the light emitting device may further include a passivation layer, which is located on the surface of the light shielding layer away from the carrier 10 and covers each pixel chip, and the passivation layer also has a through hole exposing each pixel chip. The connecting electrode 30 is located on the surface of the passivation layer away from the carrier 10, and the connecting electrode 30 is electrically connected to the pixel chip through the through hole.

[0045] By forming a passivation layer on the surface of the light-shielding layer, not only can the pixel chip be protected, but the passivation layer can also make the surface of the light-emitting device smoother, which is beneficial to the subsequent formation of the connecting electrode 30 and prevents the connecting electrode 30 from breaking.

[0046] Exemplarily, the passivation layer may be a silicon oxide layer, and the pixel chip can be stably fixed on the carrier 10 by using the silicon oxide layer.

[0047] Optionally, the surface of the passivation layer may be roughened to make the surface of the passivation layer used to form the connection electrode 30 rougher, thereby improving the connection stability between the connection electrode 30 and the passivation layer.

[0048] Exemplarily, the surface of the passivation layer away from the carrier 10 has a plurality of recessed holes arranged at intervals.

[0049] Optionally, the ratio of the thickness of the passivation layer to the depth of the concave hole is not less than 5.

[0050] In this way, the thickness of the passivation layer is much greater than the depth of the concave hole, so as to avoid the formation of a deeper concave hole on the passivation layer, which may cause the connection electrode 30 formed on the passivation layer to be unevenly laid, resulting in the connection electrode 30 being broken.

[0051] Exemplarily, the thickness of the passivation layer is 5000 angstroms, and the depth of the recessed hole is 500 angstroms.

[0052] Alternatively, if Figure 1 As shown, the plurality of pixel chips 20 include: a first pixel chip 21, a second pixel chip 22 and a third pixel chip 23, and the first pixel chip 21, the second pixel chip 22 and the third pixel chip 23 all emit light of different colors.

[0053] In the embodiment of the present disclosure, the plurality of pixel chips include a first pixel chip 21 emitting red light, a second pixel chip 22 emitting green light, and a third pixel chip 23 emitting blue light.

[0054] The difference between the first pixel chip 21 , the second pixel chip 22 and the third pixel chip 23 is that the light-emitting colors of the epitaxial layers are different.

[0055] For the first pixel chip 21, the epitaxial layer is a red epitaxial layer. For the second pixel chip 22, the epitaxial layer is a green epitaxial layer. For the third pixel chip 23, the epitaxial layer is a blue epitaxial layer.

[0056] The red light epitaxial layer includes a first p-type layer, a first light-emitting layer and a first n-type layer stacked in sequence.

[0057] In the red epitaxial layer, the first p-type layer includes a p-type AlInP layer.

[0058] The first light-emitting layer includes an AlGaInP quantum well layer and an AlGaInP quantum barrier layer grown alternately, wherein the Al content in the AlGaInP quantum well layer and the AlGaInP quantum barrier layer is different. The first light-emitting layer may include 3 to 8 periods of AlGaInP quantum well layers and AlGaInP quantum barrier layers stacked alternately.

[0059] The first n-type layer includes an n-type AlGaInP current spreading layer.

[0060] In the embodiment of the present disclosure, the green epitaxial layer includes a second p-type layer, a second light-emitting layer, and a second n-type layer stacked in sequence.

[0061] In the green epitaxial layer, the second p-type layer includes a p-type GaN layer.

[0062] The second light-emitting layer includes alternately grown InGaN quantum well layers and GaN quantum barrier layers. The second light-emitting layer may include 3 to 8 periods of alternately stacked InGaN quantum well layers and GaN quantum barrier layers.

[0063] The second n-type layer includes an n-type GaN layer.

[0064] In the disclosed embodiment, the blue light epitaxial layer includes a third p-type layer, a third light-emitting layer and a third n-type layer stacked in sequence.

[0065] In the blue epitaxial layer, the third p-type layer includes a p-type GaN layer.

[0066] The third light emitting layer may include alternately grown InGaN quantum well layers and GaN quantum barrier layers. The third light emitting layer may include 3 to 8 periods of alternately stacked InGaN quantum well layers and GaN quantum barrier layers.

[0067] The third n-type layer includes an n-type GaN layer.

[0068] Optionally, the thickness of the pixel chip is 2 μm to 10 μm.

[0069] Exemplarily, the thickness of the red epitaxial layer is 5 μm, the thickness of the green epitaxial layer is 8 μm, and the thickness of the blue epitaxial layer is 6 μm.

[0070] By way of example, the carrier 10 may be a sapphire substrate or a glass substrate.

[0071] Alternatively, if Figure 1 As shown, the carrier 10 has a first side wall 11, a second side wall 12, a third side wall 13 and a fourth side wall 14 which are connected end to end in sequence. The connecting electrode 30 includes: a first electrode 31, a second electrode 32, a third electrode 33 and a fourth electrode 34.

[0072] Figure 3 yes Figure 1 An AA cross-section diagram is provided. Figure 3 As shown, the first electrode 31 is connected to the first pixel chip 21 , and at least a portion of the first electrode 31 is located on the first side wall 11 .

[0073] By way of example, the first electrode 31 may be connected to the first p-type layer of the first pixel chip 21 .

[0074] Figure 4 yes Figure 1 A BB cross-section diagram is provided. Figure 4 As shown, the second electrode 32 is connected to the second pixel chip 22 , and at least a portion of the second electrode 32 is located on the second side wall 12 .

[0075] By way of example, the first electrode 31 may be connected to the second p-type layer of the second pixel chip 22 .

[0076] Figure 5 yes Figure 1A CC cross-section diagram is provided. Figure 5 As shown, the third electrode 33 is connected to the third pixel chip 23 , and at least a portion of the third electrode 33 is located on the third side wall 13 .

[0077] By way of example, the third electrode 33 may be connected to the third p-type layer of the third pixel chip 23 .

[0078] like Figure 2 As shown, the fourth electrode 34 is respectively connected to the first pixel chip 21 , the second pixel chip 22 and the third pixel chip 23 , and at least a portion of the fourth electrode 34 is located on the fourth side wall 14 .

[0079] Exemplarily, the fourth electrode 34 is connected to the first n-type layer, the second n-type layer, and the third n-type layer, respectively.

[0080] In this way, the fourth electrode 34 is connected to the n-type layer of each pixel chip, so that the fourth electrode 34 is used as a common electrode, thereby avoiding the need to provide more electrodes on the passivation layer, thereby reducing the size of the light-emitting device.

[0081] In the disclosed embodiment, an electrode connected to the p-type layer is separately provided for each pixel chip, and whether the pixel chip emits light can be controlled by controlling the electrode corresponding to the pixel chip to be energized.

[0082] In one implementation of the present disclosure, Figure 1 As shown, the fourth electrode 34 includes an electrode plate 341 and three electrode strips 342. The electrode plate 341 is located on the fourth side wall 14. One ends of the three electrode strips 342 are respectively connected to the first pixel chip 21, the second pixel chip 22 and the third pixel chip 23, and the other ends of the three electrode strips 342 are all connected to the electrode plate 341.

[0083] In the above implementation, the electrode plate 341 is relatively large in size, and the electrode is placed vertically on the fourth side wall 14 and fits with the fourth side wall 14, which can effectively reduce the horizontal area occupied by the electrode plate 341 on the carrier 10, making it possible to reduce the size of the light-emitting device.

[0084] At the same time, three connected and strip-shaped electrode strips 342 are set on the side of the electrode plate 341, which can reduce the area covered by the fourth electrode 34 on the pixel chip, avoid setting a larger area of ​​the fourth connection to block the light from the pixel chip, and improve the brightness of the light.

[0085] In some other implementations of the present disclosure, the fourth electrode 34 includes an electrode plate 341, the electrode plate 341 is located on the surface of the passivation layer and the pixel chip, and the electrode plate 341 extends to the second side wall 12. In this way, only the electrode plate 341 is provided, which can simplify the structure of the fourth electrode 34 and reduce the difficulty of preparing the fourth electrode 34.

[0086] Alternatively, if Figure 1 As shown, the peripheral edge of the carrier 10 has a receiving groove 15 , and at least a portion of the connecting electrode 30 is located in the receiving groove 15 .

[0087] Exemplarily, the depth of the receiving groove 15 is less than the thickness of the carrier 10, so that a step for supporting the connecting electrode 30 is formed at the peripheral edge of the carrier 10, which can make the connection more stably overlapped on the side wall of the carrier 10 and prevent the connecting electrode 30 from easily loosening from the side wall of the carrier 10.

[0088] Optionally, the ratio of the depth of the receiving groove 15 to the thickness of the carrier 10 is greater than or equal to 0.2, so as to ensure that the depth of the receiving groove 15 is large enough to carry enough connecting electrodes 30, so that fewer connecting electrodes 30 remain on the passivation layer.

[0089] Optionally, the shortest distance from the side wall of the carrier 10 to the pixel chip is less than or equal to 1 μm. Controlling the shortest distance from the side wall of the carrier 10 to the pixel chip within the above range can ensure that the size of the light-emitting device is small enough, and the portion of the connecting electrode 30 remaining on the passivation layer is small enough, so that more connecting electrodes 30 can be placed in the receiving groove 15, which is conducive to significantly reducing the size of the light-emitting device.

[0090] Figure 6 FIG. 1 is a flow chart of a method for preparing a light-emitting device provided in an embodiment of the present disclosure. Figure 6 As shown, the preparation method comprises:

[0091] Step 101: Transfer a plurality of pixel chips to the surface of a carrier board 10 so that the plurality of pixel chips are arranged at intervals.

[0092] Step 102: Making a connecting electrode 30 on the surface of the pixel chip.

[0093] The connection electrode 30 is electrically connected to the pixel chip, and at least a portion of the connection electrode 30 is located on the side wall of the carrier 10 .

[0094] In the light-emitting device prepared in the embodiment of the present disclosure, a plurality of pixel chips in the light-emitting device are arranged at intervals on the carrier 10, and at least a portion of the connecting electrode 30 disposed on the pixel chip extends to the side wall of the carrier 10. In this way, even if the size of the connecting electrode 30 is too large, after a portion of the connecting electrode 30 is folded to the side wall of the carrier 10, the total size of the light-emitting device will not be larger; since the area of ​​the connecting electrode 30 is reduced, the size of the light-emitting device can also be further reduced. In this way, more light-emitting devices can be arranged in a display panel of the same size, thereby increasing the pixel density of the display panel and improving the display effect of the display panel.

[0095] Step 101 may include the following steps:

[0096] First, inkjet printing technology is used to drop encapsulation glue on the light-emitting surface of the pixel chip.

[0097] The inkjet printing technology can effectively control the amount of the packaging glue dripping on the light-emitting surface of the pixel chip, thereby avoiding the problem of too much or too little packaging glue dripping on the light-emitting surface of the pixel chip.

[0098] Exemplarily, the packaging glue may be liquid silicone.

[0099] Next, the packaging glue is pre-cured to make the packaging glue sticky.

[0100] For example, the encapsulation glue may be pre-cured by heating or irradiation with ultraviolet light, so that the surface of the encapsulation glue has a certain viscosity, thereby bonding the pixel chip and the carrier board 10 .

[0101] Exemplarily, the duration of heating or UV light irradiation may be 2 minutes to 10 minutes.

[0102] Then, a plurality of pixel chips are arranged on the carrier 10 by mass transfer, so that the packaging glue adheres to the carrier 10 .

[0103] By way of example, the carrier 10 may be a sapphire substrate or a glass substrate.

[0104] Alternatively, if Figure 2 As shown, the plurality of pixel chips include a first pixel chip 21, a second pixel chip 22 and a third pixel chip 23, and the first pixel chip 21, the second pixel chip 22 and the third pixel chip 23 emit light of different colors.

[0105] In the embodiment of the present disclosure, the first pixel chip 21 may be a pixel chip that emits red light, the second pixel chip 22 may be a pixel chip that emits green light, and the third pixel chip 23 may be a pixel chip that emits blue light. The difference between the first pixel chip 21, the second pixel chip 22, and the third pixel chip 23 is that the light-emitting colors of the epitaxial layers are different.

[0106] For the first pixel chip 21, the epitaxial layer is a red epitaxial layer. For the second pixel chip 22, the epitaxial layer is a green epitaxial layer. For the third pixel chip 23, the epitaxial layer is a blue epitaxial layer.

[0107] The red light epitaxial layer includes a first p-type layer, a first light-emitting layer and a first n-type layer stacked in sequence.

[0108] In the red epitaxial layer, the first p-type layer includes a p-type AlInP layer.

[0109] The first light-emitting layer includes an AlGaInP quantum well layer and an AlGaInP quantum barrier layer grown alternately, wherein the Al content in the AlGaInP quantum well layer and the AlGaInP quantum barrier layer is different. The first light-emitting layer may include 3 to 8 periods of AlGaInP quantum well layers and AlGaInP quantum barrier layers stacked alternately.

[0110] The first n-type layer includes an n-type AlGaInP current spreading layer.

[0111] In the embodiment of the present disclosure, the green epitaxial layer includes a second p-type layer, a second light-emitting layer, and a second n-type layer stacked in sequence.

[0112] In the green epitaxial layer, the second p-type layer includes a p-type GaN layer.

[0113] The second light-emitting layer includes alternately grown InGaN quantum well layers and GaN quantum barrier layers. The second light-emitting layer may include 3 to 8 periods of alternately stacked InGaN quantum well layers and GaN quantum barrier layers.

[0114] The second n-type layer includes an n-type GaN layer.

[0115] In the disclosed embodiment, the blue light epitaxial layer includes a third p-type layer, a third light-emitting layer and a third n-type layer stacked in sequence.

[0116] In the blue epitaxial layer, the third p-type layer includes a p-type GaN layer.

[0117] The third light emitting layer may include alternately grown InGaN quantum well layers and GaN quantum barrier layers. The third light emitting layer may include 3 to 8 periods of alternately stacked InGaN quantum well layers and GaN quantum barrier layers.

[0118] The third n-type layer includes an n-type GaN layer.

[0119] Optionally, the thickness of the pixel chip is 2 μm to 10 μm.

[0120] Exemplarily, the thickness of the red epitaxial layer is 5 μm, the thickness of the green epitaxial layer is 8 μm, and the thickness of the blue epitaxial layer is 6 μm.

[0121] After the plurality of pixel chips are transferred onto the surface of the carrier 10 in step 101, the preparation method further comprises:

[0122] First, a light shielding layer is formed on the surface of the carrier 10 and in the gaps between the plurality of pixel chips.

[0123] The light shielding layer is used to connect the side wall of the pixel chip, so as to more reliably fix the pixel chip on the carrier board 10 .

[0124] Exemplarily, the light shielding layer includes a silicon oxide layer and a black coating filled on the surface of the silicon oxide layer. The light shielding layer is black so that most of the light entering the light shielding layer is absorbed, thereby preventing the light from being emitted laterally to other pixel chips and causing light crosstalk.

[0125] Illustratively, the light shielding layer may be a DBR layer.

[0126] Then, a passivation layer is formed on the surface of the light shielding layer and the surface of the pixel chip. The passivation layer has a through hole exposing the pixel chip. The connection electrode 30 is located on the surface of the passivation layer and is electrically connected to the pixel chip through the through hole.

[0127] Exemplarily, the passivation layer may be a silicon oxide layer, and the pixel chip can be stably fixed on the carrier 10 by using the silicon oxide layer.

[0128] Step 102 may include the following steps:

[0129] First, if Figure 7 As shown, a plurality of receiving grooves 15 are formed by etching on the carrier 10 to divide the carrier 10 into a plurality of pixel regions, each of which is arranged with a plurality of pixel chips.

[0130] Specifically, the method includes: using a laser etching method to etch the receiving grooves 15 around each group of MIP units, so that the connecting electrodes 30 that are subsequently extended can be filled into the receiving grooves 15 .

[0131] Then, if Figure 8 As shown, a connection electrode 30 is formed on the surface of the pixel chip, and a portion of the connection electrode 30 extends to the receiving groove 15 .

[0132] Specifically, after coating, exposure and development, a portion of the connecting electrode 30 is formed by evaporation on the surface of the carrier 10 and the passivation layer, and metal is filled in the receiving groove 15 by electroplating to form another portion of the connecting electrode 30 .

[0133] Optionally, the carrier 10 has a first side wall 11 , a second side wall 12 , a third side wall 13 and a fourth side wall 14 connected end to end in sequence. The connecting electrode 30 includes: a first electrode 31 , a second electrode 32 , a third electrode 33 and a fourth electrode 34 .

[0134] like Figure 3 As shown, the first electrode 31 is connected to the first pixel chip 21 , and at least a portion of the first electrode 31 is located on the first side wall 11 .

[0135] By way of example, the first electrode 31 may be connected to the first p-type layer of the first pixel chip 21 .

[0136] like Figure 4As shown, the second electrode 32 is connected to the second pixel chip 22 , and at least a portion of the second electrode 32 is located on the second side wall 12 .

[0137] By way of example, the first electrode 31 may be connected to the second p-type layer of the second pixel chip 22 .

[0138] like Figure 5 As shown, the third electrode 33 is connected to the third pixel chip 23 , and at least a portion of the third electrode 33 is located on the third side wall 13 .

[0139] By way of example, the third electrode 33 may be connected to the third p-type layer of the third pixel chip 23 .

[0140] like Figure 2 As shown, the fourth electrode 34 is respectively connected to the first pixel chip 21 , the second pixel chip 22 and the third pixel chip 23 , and at least a portion of the fourth electrode 34 is located on the fourth side wall 14 .

[0141] Exemplarily, the fourth electrode 34 is connected to the first n-type layer, the second n-type layer, and the third n-type layer, respectively.

[0142] After forming the connection electrode 30 in step 102, the preparation method may further include the following steps: cutting the carrier board 10 along the receiving groove 15 to obtain a plurality of sub-boards, grinding the sidewalls of each sub-board to expose the connection electrode 30 located in the receiving groove 15, and obtaining a plurality of light-emitting devices.

[0143] An embodiment of the present disclosure provides a display panel, which includes a circuit board 41 and the plurality of light-emitting devices described above.

[0144] Fig. 9 is a cross-sectional view of a display panel provided by an embodiment of the present disclosure. Fig. 9 It is a schematic diagram showing the connection between the second pixel chip 22 and the circuit board 41 . Fig.10 is a cross-sectional view of a display panel provided by an embodiment of the present disclosure. Fig.10 It is a schematic diagram showing the connection between the first pixel chip 21 and the third pixel chip 23 and the circuit board 41 .

[0145] like Fig. 9 , 10 As shown, the board surface of the circuit board 41 has mounting grooves 42 corresponding to the light-emitting devices one by one, and the side walls of the mounting grooves 42 are provided with bonding electrodes 43. The light-emitting devices are located in the corresponding mounting grooves 42, and the connecting electrodes 30 located on the side walls of the carrier 10 are connected to the bonding electrodes 43.

[0146] Exemplarily, at least four bonding electrodes 43 are disposed in the mounting groove 42 , and the four bonding electrodes 43 are respectively connected to the first electrode 31 , the second electrode 32 , the third electrode 33 and the fourth electrode 34 .

[0147] In the embodiment of the present disclosure, the connecting electrode 30 of the light-emitting device is arranged on the side wall and a corresponding circuit board 41 is configured. The bonding electrode 43 in the mounting groove 42 of the circuit board 41 is electrically connected to the light-emitting device to achieve the purpose of the circuit board 41 supplying power to the connecting electrode 30 of the light-emitting device.

[0148] Optionally, the display panel further includes a driver integrated circuit (IC), and the driver IC is located on the circuit board 41 .

[0149] The driver IC is electrically connected to the driving traces on the circuit board 41, and the connection electrodes 30 of the plurality of light emitting devices are also electrically connected to the driving traces on the circuit board 41 through the bonding electrodes 43. In this way, the driver IC can control each light emitting device through the driving traces.

[0150] The above does not limit the present disclosure in any form. Although the present disclosure has been disclosed as above through the embodiments, it is not used to limit the present disclosure. Any technician familiar with the profession can make some changes or modifications to equivalent embodiments of equivalent changes using the technical contents disclosed above without departing from the scope of the technical solution of the present disclosure. However, any simple modification, equivalent change and modification made to the above embodiments based on the technical essence of the present disclosure without departing from the content of the technical solution of the present disclosure still falls within the scope of the technical solution of the present disclosure.

Claims

1. A light emitting device, characterized in that: The light-emitting device comprises: a carrier board (10), a connecting electrode (30) and a plurality of pixel chips (20), wherein the plurality of pixel chips (20) are arranged at intervals on the board surface of the carrier board (10); The connecting electrode (30) is located on the surface of the pixel chip (20) and is electrically connected to the pixel chip (20); at least a portion of the connecting electrode (30) is located on the side wall of the carrier (10).

2. The light emitting device according to claim 1, characterized in that: The plurality of pixel chips comprise: a first pixel chip (21), a second pixel chip (22) and a third pixel chip (23); the first pixel chip (21), the second pixel chip (22) and the third pixel chip (23) all emit different colors of light; The carrier (10) comprises a first side wall (11), a second side wall (12), a third side wall (13) and a fourth side wall (14) which are connected end to end in sequence; the connecting electrode (30) comprises: a first electrode (31), a second electrode (32), a third electrode (33) and a fourth electrode (34); the first electrode (31) is connected to the first pixel chip (21), and at least a portion of the first electrode (31) is located on the first side wall (11); the second electrode (32) is connected to the second pixel chip (22), and at least a portion of the second electrode (32) is located on the second side wall (12); the third electrode (33) is connected to the third pixel chip (23), and at least a portion of the third electrode (33) is located on the third side wall (13); The fourth electrode (34) is respectively connected to the first pixel chip (21), the second pixel chip (22) and the third pixel chip (23), and at least a portion of the fourth electrode (34) is located on the fourth side wall (14).

3. The light emitting device according to claim 2, characterized in that: The fourth electrode (34) comprises an electrode plate (341) and three electrode strips (342); the electrode plate (341) is located on the fourth side wall (14); one end of the three electrode strips (342) are respectively connected to the first pixel chip (21), the second pixel chip (22) and the third pixel chip (23); and the other ends of the three electrode strips (342) are all connected to the electrode plate (341).

4. The light emitting device according to any one of claims 1 to 3, characterized in that: The peripheral edge of the carrier plate (10) has a receiving groove (15), and at least a portion of the connecting electrode (30) is located in the receiving groove (15).

5. The light emitting device according to any one of claims 1 to 3, characterized in that: The shortest distance from the side wall of the carrier board (10) to the pixel chip is less than or equal to 1 μm.

6. A method for preparing a light emitting device, characterized in that: The preparation method comprises: Transferring a plurality of pixel chips (20) onto the surface of a carrier board (10) so that the plurality of pixel chips (20) are arranged at intervals; A connecting electrode (30) is made on the surface of the pixel chip (20), the connecting electrode (30) is electrically connected to the pixel chip (20), and at least a portion of the connecting electrode (30) is located on the side wall of the carrier (10).

7. The preparation method according to claim 6, characterized in that: Producing a connection electrode (30) on the surface of the pixel chip comprises: Etching a plurality of receiving grooves (15) on the carrier (10) to divide the carrier (10) into a plurality of pixel areas, each of the pixel areas being arranged with a plurality of the pixel chips; A connecting electrode (30) is formed on the surface of the pixel chip, so that a portion of the connecting electrode (30) extends to the receiving groove (15).

8. The preparation method according to claim 7, characterized in that: After forming the connection electrode (30) on the surface of the pixel chip, the method further comprises: Cutting the carrier board (10) along the receiving groove (15) to obtain a plurality of sub-boards; The side walls of each sub-board are polished to expose the connecting electrode (30) located in the receiving groove (15), thereby obtaining a plurality of the light-emitting devices.

9. The preparation method according to any one of claims 6 to 8, characterized in that: After transferring the plurality of pixel chips onto the surface of the carrier (10), the method further comprises: forming a light shielding layer in the gap between the surface of the carrier board (10) and the plurality of pixel chips (20); A passivation layer is formed on the surface of the light shielding layer and the surface of the pixel chip, the passivation layer has a through hole exposing the pixel chip, and the connection electrode (30) is located on the surface of the passivation layer and is electrically connected to the pixel chip through the through hole.

10. A display panel, characterized in that: The display panel comprises a circuit board (41) and a plurality of light emitting devices according to any one of claims 1 to 5; The board surface of the circuit board (41) has mounting grooves (42) corresponding to the light-emitting devices one by one, and the side walls of the mounting grooves (42) are provided with bonding electrodes (43). The light-emitting devices are located in the corresponding mounting grooves (42), and the connecting electrodes (30) located on the side walls of the carrier board (10) are connected to the bonding electrodes (43).

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