Video memory management method and system, chip and electronic equipment

Abstract

The invention discloses a video memory management method and system, a chip and electronic equipment, and belongs to the technical field of storage. The method comprises the following steps: acquiring respective heat information of a plurality of storage units included in a first chip through a first logic unit, wherein the heat information is used for indicating use conditions of the storage units; data in at least one target storage unit is compressed through a second logic unit, and the target storage unit is determined from the multiple storage units by the second chip based on the obtained heat information of the multiple storage units; wherein the first chip is different from the second chip. According to the method, the target storage unit can be determined from the multiple storage units based on the use condition of the storage units, and the data in the target storage unit is compressed, so that the storage space occupied by the data in the video memory is reduced, and the available storage capacity of the video memory is effectively expanded.

Description

Technical Field

[0001] The present application relates to the field of storage technology, and in particular to a video memory management method, system, chip and electronic device. Background Art

[0002] Video memory is an important resource of GPU (Graphics Processing Unit). In the vGPU (Virtual GPU) environment, video memory resources are often tight, so it is very important to fully and reasonably utilize video memory resources.

[0003] In the related art, video memory is applied for when an application is started and released when an application is not running. In actual use, some applications will enter the background after being started. The application entering the background is not actually running. At this time, the operating system will swap the data in the video memory of the application entering the background to the system memory. When the application entering the background is restored to the foreground for use, the data swapped to the system memory needs to be reloaded from the system memory to the video memory.

[0004] The above method of saving video memory space by exchanging the video memory data of the application running in the background from the video memory to the system memory involves copying data across PCIE (Peripheral Component Interconnect Express). On the one hand, the PCIE bandwidth is limited. When a large amount of data needs to be exchanged and transmitted between the video memory and the system memory, it may exceed the processing capacity of the PCIE channel, resulting in data exchange failure and failure to expand the video memory space in a timely and effective manner. On the other hand, when transmitting data between the video memory and the system memory, data inconsistency may occur, resulting in data loss or errors. Summary of the invention

[0005] The embodiment of the present application provides a video memory management method, system, chip and electronic device. The technical solution provided by the embodiment of the present application includes the following aspects.

[0006] According to one aspect of an embodiment of the present application, a video memory management method is provided, the method being applied to a first chip, the first chip being configured with a first logic unit and a second logic unit; the method comprising:

[0007] Acquire, through the first logic unit, heat information of each of a plurality of storage units included in the first chip, wherein the heat information is used to indicate a usage status of the storage unit;

[0008] compressing data in at least one target storage unit by the second logic unit, where the target storage unit is determined by the second chip from the plurality of storage units based on the acquired heat information of each of the plurality of storage units;

[0009] The first chip is different from the second chip.

[0010] According to one aspect of an embodiment of the present application, a video memory management system is provided, the system comprising: a first chip and a second chip, the first chip being configured with a first logic unit and a second logic unit;

[0011] The first logic unit is used to obtain heat information of each of the plurality of storage units included in the first chip, wherein the heat information is used to indicate the usage of the storage unit;

[0012] The second chip is used to determine at least one target storage unit from the plurality of storage units based on the heat information of each of the plurality of storage units;

[0013] The second logic unit is used to compress the data in the target storage unit.

[0014] According to one aspect of an embodiment of the present application, a chip is provided, wherein the chip is configured with a first logic unit and a second logic unit;

[0015] The first logic unit is used to obtain heat information of each of the plurality of storage units included in the chip, wherein the heat information is used to indicate the usage of the storage unit;

[0016] The second logic unit is used to compress data in at least one target storage unit in the chip, and the target storage unit is determined from the multiple storage units based on the heat information of each of the multiple storage units.

[0017] According to one aspect of an embodiment of the present application, an electronic device is provided, and the electronic device includes the above-mentioned video memory management system.

[0018] According to one aspect of an embodiment of the present application, a video memory management method is provided, the method comprising:

[0019] Acquire heat information of each of a plurality of storage units included in the video memory, wherein the heat information is used to indicate the usage of the storage unit;

[0020] Determine at least one target storage unit from the plurality of storage units based on the heat information of each of the plurality of storage units;

[0021] The data in the target storage unit is compressed.

[0022] According to one aspect of an embodiment of the present application, a video memory management device is provided, the device comprising:

[0023] An acquisition module, used to acquire heat information of each of a plurality of storage units included in the video memory, wherein the heat information is used to indicate the usage of the storage unit;

[0024] A determination module, configured to determine at least one target storage unit from the plurality of storage units based on the heat information of each of the plurality of storage units;

[0025] A compression module is used to compress the data in the target storage unit.

[0026] According to one aspect of an embodiment of the present application, an electronic device is provided, the electronic device comprising a processor and a memory, the memory storing a computer program, the computer program being loaded and executed by the processor to implement the above-mentioned video memory management method.

[0027] According to one aspect of an embodiment of the present application, a computer-readable storage medium is provided, in which a computer program is stored. The computer program is loaded and executed by a processor to implement the above-mentioned video memory management method.

[0028] According to one aspect of an embodiment of the present application, a computer program product is provided. The computer program product includes a computer program. The computer program is loaded and executed by a processor to implement the above-mentioned video memory management method.

[0029] The technical solution provided by the embodiments of the present application includes at least the following beneficial effects:

[0030] Based on the usage of each storage unit in the video memory of the first chip, a target storage unit can be determined from multiple storage units, and the data in the target storage unit can be compressed, thereby reducing the storage space occupied by the data in the video memory. This method effectively expands the available storage capacity of the video memory, and the method reduces the occupation of the video memory space by directly compressing the data in the video memory, so it does not involve the data exchange process between the video memory and the system memory included in the related technology, avoiding the problem of data exchange failure caused by PCIE bandwidth limitation, and avoiding the problem of data loss or error caused by the data exchange process. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 is a flowchart of a video memory management method provided in a possible implementation of the present application;

[0032] Figure 2 is a schematic diagram of a video memory management system including a first chip and a second chip provided in a possible implementation of the present application;

[0033] Figure 3 is a flowchart of a video memory management method provided in another possible implementation of the present application;

[0034] Figure 4 is a flowchart of a video memory management method provided in another possible implementation of the present application;

[0035] Figure 5 is a flowchart of a video memory management method provided in another possible implementation of the present application;

[0036] Figure 6 is a block diagram of a video memory management device provided in a possible implementation of the present application;

[0037] Figure 7 It is a structural block diagram of an electronic device provided in a possible implementation of the present application. DETAILED DESCRIPTION

[0038] In order to make the objectives, technical solutions and advantages of the present application clearer, the implementation methods of the present application will be further described in detail below with reference to the accompanying drawings.

[0039] Before introducing and explaining the technical solution of the present application, some concepts involved in the present application are first defined and explained.

[0040] GPU is a processor specially used for processing and rendering graphics images. It has the ability of highly parallel computing and can process large amounts of data at the same time, so it is widely used in graphics rendering, game development, video processing and deep learning.

[0041] Video memory refers to a memory used to store data that the GPU needs to process. During graphics processing and rendering, video memory can be used to store graphics data (such as textures, vertex data, frame buffers, rendering targets, etc.). The GPU can directly access the data in the video memory to perform tasks such as images and calculations. The size and speed of the video memory directly affect the amount of data that the GPU can process and its processing speed. When the video memory space is insufficient, the data required to perform a task cannot be stored, which will cause the GPU to be unable to perform the corresponding task, resulting in calculation failure or performance degradation. Therefore, it is very important to expand the available space of video memory. The technical solution proposed in this application compresses the data that is not frequently used in the video memory to reduce the storage space occupied by the data in the video memory, thereby expanding the available space of the video memory.

[0042] Please refer to Figure 1, which shows a flowchart of a video memory management method provided in a possible implementation of the present application. The method is applied to a first chip, and the first chip is configured with a first logic unit and a second logic unit. The method may include at least one of the following steps 110 to 120.

[0043] Step 110: Acquire, through a first logic unit, the heat information of each of the plurality of storage units included in the first chip, where the heat information is used to indicate the usage of the storage unit.

[0044] Figure 2 It is a schematic diagram of a video memory management system including a first chip and a second chip provided in a possible implementation of the present application.

[0045] In some embodiments, the present application uses the first chip as a GPU chip for exemplary description. The first chip may also be other types of processor chips, which is not limited in the present application.

[0046] A storage unit refers to a basic unit for storing data in a video memory. Exemplarily, a storage unit of a video memory may be a video memory page. The video memory page may be divided into fixed sizes. Exemplarily, the size of a video memory page may be 4KB (KiloByte), 8KB, 16KB, etc. The specific size depends on the design of the GPU, and this application does not limit this. Exemplarily, a storage unit of a video memory may also be a joint page. A joint page refers to a collection of multiple video memory pages. Exemplarily, two consecutive video memory pages may be regarded as a joint page. The above division granularity of the storage unit of the video memory is only exemplary, and this application does not limit this.

[0047] The usage of a storage unit is used to indicate how frequently the storage unit is used, and may include the number of times the storage unit is used. The usage of a storage unit may also include the time when the storage unit was most recently accessed, the length of time it was used in the most recent period of time, etc., which is not limited in this application. The heat information is a quantitative representation of the usage of the storage unit, such as a numerical value.

[0048] In some embodiments, when a process calls the first chip 20, tag information is added to the page table of the first chip 20 through the first logic unit 21. The page table is used to record the mapping relationship between the virtual address and the physical address of the storage unit, and the tag information is used to indicate the storage unit used in the first chip 20.

[0049] In some embodiments, in the page table of the first chip 20, such as in the page table of the GPU, when a storage unit is used, a mark can be given to the storage unit, and for an unused storage unit, no mark is given to it; the number of times the storage unit is used is determined based on the mark. Specifically, each time a process needs to use the video memory of the GPU, the used storage unit in the video memory is marked, and the driver can read the mark from the page table and update the number of times each storage unit in the GPU is used, that is, the number of times the marked storage unit is used is increased by one. Exemplarily, the mark can be bit 0 or bit 1 or other marks, which is not limited in this application. In some embodiments, the driver can read the marking information in the GPU page table at fixed time intervals to update the number of times the storage unit is used, such as 5 minutes, which is not limited in this application.

[0050] The above-mentioned driver refers to the driver of the first chip (such as a GPU driver), which is used to manage the resource allocation of the GPU, perform task scheduling, process data transmission, etc., so as to realize the call and efficient use of the GPU. Among them, managing the resource allocation of the GPU includes the allocation and optimization of resources such as GPU video memory and computing core. Performing task scheduling includes instructing the GPU to perform various tasks (such as graphics rendering or computing tasks) in order and timing. The driver determines which tasks are executed first, how to allocate computing time, etc., to ensure that the tasks are completed on time and maintain the responsiveness of the system. Processing data transmission involves data transmission between the CPU and the GPU and between different components inside the GPU. For more information about the driver, please see below. In some embodiments, it can also be that each storage unit corresponds to a tag information, and different identifiers are used for the used storage unit and the unused storage unit to distinguish the usage of the storage unit. Exemplarily, as shown in Table 1 below, bit 1 can be used to indicate that the storage unit is used, and bit 0 or empty indicates that the storage unit is not used. Bit 0 can also be used to indicate that the storage unit is used, and bit 1 or empty indicates that the storage unit is not used. If bit 1 is used to indicate that the storage unit is used, and bit 0 is used to indicate that the storage unit is not used, then based on the marking information, it is determined that the number of times storage unit 1 is used is increased by 1, the number of times storage unit 2 is used does not need to be updated, and the number of times storage unit 3 is used does not need to be updated. In this example, the setting method of the marking is only exemplary, and the application does not limit the specific implementation method of marking.

[0051] Table 1

[0052] Storage Unit Virtual Address Physical Address Tag Information Storage unit 1 Virtual Address 1 Physical Address A 1 Storage Unit 2 Virtual Address 2 Physical Address A 0 Storage unit 3 Virtual Address 3 Physical Address B 0

[0053] In some embodiments, in the page table of the first chip, each storage unit may correspond to a tag information of a fixed number of bits. When the storage unit is used, the value of the tag information may be increased by 1; the value of the tag information is determined as the number of times the storage unit is used. This application does not limit the method of determining the number of times a storage unit is used based on the tag information.

[0054] The above method marks the used storage units, so that the subsequent driver can identify the usage of each storage unit based on the mark.

[0055] In some embodiments, the heat information of each of the multiple storage units can be determined based on the number of times each of the multiple storage units is used. That is, the number of times each storage unit is used is used as the value of the heat information. The number of times a storage unit is used refers to the total number of times a read or write operation is performed on the storage unit within a period of time, and is used to indicate the activity level or access frequency of the storage unit in the system. It can be understood that the more times a storage unit is used, the larger the value of the heat information is, the more active the storage unit is, that is, the first chip 20 (such as a GPU) will access the data in the storage unit more when it is running; the fewer times a storage unit is used, the smaller the value of the heat information is, the less active the storage unit is, that is, the first chip 20 (such as a GPU) will access the data in the storage unit less when it is running. The above method, by obtaining the heat information of the storage unit, can distinguish between storage units that are used more and storage units that are used less, so as to facilitate the subsequent compression of the data in the storage units that are used less.

[0056] In some embodiments, the heat information of the storage unit includes the number of times the storage unit is used, and the tag information is used to determine the number of times each of the plurality of storage units is used.

[0057] In some embodiments, a specific implementation method for determining the heat information of a storage unit may include the following steps: the first logic unit 21 reads tag information from a page table; based on the tag information, determines the number of times each of the multiple storage units is used; based on the number of times each of the multiple storage units is used, determines the heat information of each of the multiple storage units.

[0058] The above method determines the usage based on the number of times the storage unit is used (such as read operations and write operations) to distinguish between more frequently used storage units and less frequently used storage units, so as to facilitate subsequent compression of data in the less frequently used storage units.

[0059] In some embodiments, the specific determination method of the heat information can also be based on other usage of the storage unit. For example, when the usage of the storage unit represents the most recent usage time, the heat information can be a specific timestamp. For example, when the usage of the storage unit represents the usage duration, the heat information can be several seconds or several minutes. This application is not limited to this.

[0060] In some embodiments, when a process calls the first chip 20 , the added mark information in the page table of the first chip 20 is cleared through the first logic unit 21 .

[0061] In some embodiments, the first logic unit 21 is further used to clear the tag information added in the page table of the first chip 20 (such as a GPU) when a process calls the first chip 20 (such as a GPU). Clearing the tag information added in the page table of the first chip 20 (such as a GPU) means resetting the tag information, such as resetting it to empty. This method ensures that the tag information in the page table is only used by each storage unit of the current process.

[0062] In some embodiments, the added mark information in the page table of the first chip 20 (such as a GPU) can also be cleared when the system is restarted or powered off. The added mark information in the page table of the first chip 20 (such as a GPU) can also be cleared at fixed time intervals. This application does not limit this.

[0063] The above method ensures that the tag information in the page table only includes the usage of each storage unit of the current process by resetting the tag information when the process calls the first chip 20 (such as GPU).

[0064] Step 120, compressing data in at least one target storage unit by the second logic unit, where the target storage unit is determined by the second chip from the plurality of storage units based on the acquired heat information of the plurality of storage units, wherein the first chip is different from the second chip.

[0065] In some embodiments, the second chip 24 is a chip including the above-mentioned driver. This application uses the second chip as a CPU chip for illustrative purposes. The second chip may also be other types of processor chips, which is not limited in this application. In some embodiments, the processing logic of the first logic unit 21 and the second logic unit 22 is configured by the driver in the second chip 24. Through the driver in the second chip 24, the system can flexibly configure the processing logic of the first logic unit 21 and the second logic unit 22, such as configuring the first logic unit 21 to add and clear mark information in the page table of the first chip as described above, and configuring the second logic unit 22 to perform compression of data in the target storage unit as described in step 120.

[0066] In some embodiments, the heat information of the target storage unit satisfies a first condition, and the process to which the target storage unit belongs does not belong to a first process set; wherein the first condition includes at least one of the following: the heat information is less than or equal to a first threshold, the heat information is one of the smaller N heat information among the heat information of multiple storage units, where N is a positive integer; and the first process set includes at least one pre-set process.

[0067] In some embodiments, the heat information may represent the number of times used or the length of time used. Heat information less than or equal to the first threshold may mean that the number of times the storage unit is used or the length of time used is lower than a preset standard value (i.e., the first threshold). The first threshold may be set based on the historical usage of the storage unit. Specifically, the average number of times used or the average length of time used for all storage units may be calculated, and storage units less than the average value are considered to be less active, so the first threshold may be set lower than the average value. The first threshold may also be set based on the experience of the staff, and this application does not limit this.

[0068] In some embodiments, the storage units corresponding to N smaller heat information among all storage units can be determined as target storage units. Specifically, the heat information of each storage unit can be sorted from large to small, and the storage units with heat information in the last N positions can be determined as target storage units. The heat information of each storage unit can also be sorted from small to large, and the storage units with heat information in the first N positions can be determined as target storage units. This method can determine N less active storage units from multiple storage units.

[0069] In some embodiments, when the heat information is the most recent usage time, N storage units with earlier timestamps can be determined as at least one target storage unit. Specifically, the storage units can be sorted from earliest to latest according to the most recent access time of each storage unit, and the storage units with the top N access times can be determined as target storage units. This method can effectively determine the storage units that have not been accessed for a long time among multiple storage units.

[0070] In some embodiments, the pre-set process may include at least one of the following: a system process, a latency-sensitive process. A system process refers to a process that runs in an operating system and is used to manage system resources, provide basic service functions, and perform specific tasks. System processes generally have a higher priority and are critical to the stability and security of the system. Exemplarily, the system process may include an operating system kernel process, a system call processing process, a system service process, etc., wherein the operating system kernel process is used for task scheduling and management within the kernel, the system call processing process is used to process system call requests issued by user space programs, and the system service process is used for process creation, destruction, and thread management.

[0071] A delay-sensitive process is a process that is very sensitive to time delays and requires rapid response and data processing. For example, a delay-sensitive process may include a real-time control process, such as real-time control and monitoring used in industrial automation. It may also include a multimedia processing process, such as an audio and video codec process, a media player process. It may also include a user interaction process, such as a graphical user interface process, an instant messaging application, etc., which requires rapid response to user operations.

[0072] The above method determines as the target storage unit a storage unit whose heat information and the process to which the storage unit belongs meet specific conditions, thereby ensuring that the target storage unit is a storage unit with less heat information (that is, it is not frequently used), and the target storage unit does not belong to a storage unit related to a preset process (that is, a critical process). This method, on the one hand, can determine a less active storage unit from multiple storage units. On the other hand, it can fully consider the critical processes in the system, thereby ensuring that when data compression is performed, pre-set critical processes (such as system processes or delay-sensitive processes) will not be compressed. In this way, while effectively reducing the space occupied by data in the video memory, it can ensure that the normal operation of the system is not affected.

[0073] In some embodiments, compressing data in at least one target storage unit by the second logic unit 22 includes: compressing data in at least one target storage unit by the second logic unit 22 when receiving a compression instruction sent by a driver.

[0074] In some embodiments, the driver sends a compression instruction to the second logic unit 22. The second logic unit 22 is configured to compress data in at least one target storage unit in the video memory when receiving the compression instruction sent by the driver.

[0075] The driver provides the necessary software interface and control functions for the hardware device so that the operating system and application programs can correctly interact with the hardware. In some embodiments, the program code for implementing the video memory management method flow of the first chip 20 (such as a GPU) can be implemented as a driver, and the second chip 24 (such as a CPU) of the electronic device executes the driver to implement the method flow.

[0076] In some embodiments, when the driver detects that the utilization of the first chip 20 (such as a GPU) is less than or equal to a first threshold and the utilization of the video memory is greater than or equal to a second threshold, it can determine the target storage unit through the steps in the GPU video memory management method described above and then send a compression instruction to the second logic unit 22.

[0077] In some embodiments, the compression instruction includes a virtual address of at least one target storage unit, a page table of the first chip 20 (such as a GPU), and a compression algorithm, wherein the compression algorithm is used to indicate how to convert the original data into compressed data. The second logic unit 22 reads the physical address corresponding to the virtual address of the target storage unit from the page table of the first chip 20 (such as a GPU) according to the virtual address of the target storage unit; thereby accessing the data in the target storage unit based on the physical address; and compressing the data in the target storage unit based on the compression algorithm.

[0078] In the above method, after receiving the compression instruction sent by the driver, the second logic unit can compress the data in the target storage unit.

[0079] In some embodiments, based on a data compression algorithm, the data in the target storage unit is compressed. The data compression algorithm may be a lossless compression algorithm. Exemplarily, the data compression algorithm may include Huffman Coding, arithmetic coding, LZW (Lempel-Ziv-Welch) algorithm, etc., which is not limited in the present application.

[0080] Exemplarily, it is assumed that the video memory includes storage unit 1, storage unit 2 and storage unit 3. Among them, the data size in storage unit 1 is 2MB (Megabyte), that is, the video memory storage space occupied is 2MB. The data in storage unit 2 occupies 3MB of video memory storage space, and the data in storage unit 3 occupies 4MB of video memory storage space. Before compression, the storage space occupied by the data in the video memory is 9MB. If the target storage unit includes storage unit 3, after compressing the data in storage unit 3, the compressed data occupies 2MB of video memory storage space. After compression, the storage space occupied by the data in the video memory is only 7MB. At this time, by compressing the data in the target storage unit, 2MB of video memory storage space is saved. The saved 2MB of storage space is now free and is not occupied by any data. In this case, the memory management module of the operating system can reallocate this part of the free storage space to other programs or processes that need memory.

[0081] In some embodiments, the operating system can track and manage the usage of the video memory, including the allocated video memory and the free video memory, through the video memory management mechanism. When part of the storage space is saved by compressing the data, the operating system determines the specific address range of the video memory of the part of the storage space so as to mark it as available and allocate it to other programs or processes when needed. Specifically, the operating system can maintain a video memory mapping table or a similar structure, recording the usage status of each area in the video memory, such as which areas have been allocated to which process and which areas are free. After the video memory compression operation is performed, the operating system will update this mapping table, mark the video memory area originally occupied by the compressed data as unused, and record the starting address and size of these free areas. Exemplarily, in the above example, assuming that the address range of the video memory originally occupied by the storage unit 3 is from 0x100000 to 0x13FFFF (a total of 4MB), after compression, the data only occupies 2MB, then the video memory between 0x120000 and 0x13FFFF becomes free. The operating system will mark this address range as available and record it in the free video memory list. When there is a new video memory request, the video memory management module of the operating system will search for a suitable address range from the free video memory list and allocate it to the requesting process.

[0082] In some embodiments, the second logic unit 22 decompresses the data in the storage unit in a compressed state when receiving a decompression instruction sent by the driver.

[0083] In some embodiments, the driver sends a decompression instruction to the second logic unit 22. The second logic unit 22 is further configured to decompress the data in the storage unit in a compressed state when receiving the decompression instruction sent by the driver.

[0084] In some embodiments, when a process calls the first chip 20 (such as a GPU), the driver may send a decompression instruction to the second logic unit 22 when a storage unit related to the process is in a compressed state.

[0085] In some embodiments, the decompression instruction includes the virtual address of the storage unit in a compressed state, the page table of the first chip 20 (such as a GPU), and the decompression algorithm, wherein the decompression algorithm is used to indicate how to restore the compressed data to the original format. The second logic unit 22 reads the physical address corresponding to the virtual address of the storage unit in a compressed state from the page table of the first chip 20 (such as a GPU) according to the virtual address of the storage unit in a compressed state; thereby accessing the data in the storage unit in a compressed state based on the physical address; and using the decompression algorithm to decompress the data in the storage unit in a compressed state.

[0086] In the above method, after receiving the decompression instruction sent by the driver, the second logic unit can decompress the data in the storage unit in a compressed state.

[0087] In some embodiments, the first chip 20 is also configured with an MMU (Memory Management Unit) 23; the method further includes: obtaining an operation instruction sent by a driver through the MMU 23, the operation instruction including a virtual address of a first storage unit to be accessed and a page table of the first chip 20; reading a physical address corresponding to the virtual address of the first storage unit from the page table of the first chip 20 through the MMU 23 according to the virtual address of the first storage unit as a first physical address; accessing the first storage unit through the MMU 23 based on the first physical address. In some embodiments, the processing logic of the MMU 23 is configured by a driver in the second chip 24.

[0088] In some embodiments, when the driver determines that the storage units related to the first process are all in an uncompressed state, the driver may send an operation instruction to the MMU 23 .

[0089] The first storage unit refers to a storage unit associated with the first process. In the memory management unit, the first physical address refers to an actual address obtained by converting the virtual address, which is used to locate and access the first storage unit in the physical memory. Accessing the first storage unit refers to performing a read and write operation on the first storage unit based on the first physical address. Specifically, the read and write operation may include reading data from the physical memory or writing data to a corresponding location in the physical memory to complete the operation on the first storage unit.

[0090] In the vGPU environment, virtual addresses refer to the addresses used by virtual machines or applications when accessing resources of the first chip 20 (such as GPU). These addresses are virtualized video memory addresses. Virtual addresses are allocated and managed by the virtualization hypervisor or operating system. Applications and virtual machines use these virtual addresses to access video memory without knowing the specific physical video memory location. Physical addresses refer to the actual addresses in the video memory of the physical first chip 20 (such as GPU).

[0091] In some embodiments, the storage unit and the virtual address may be in a one-to-one correspondence. That is, one storage unit corresponds to one virtual address, and different storage units correspond to different virtual addresses. In some embodiments, the virtual address and the physical address may be in a many-to-one correspondence. That is, multiple virtual addresses may correspond to one physical address. Different virtual addresses may correspond to the same physical address or to different physical addresses. Exemplarily, as shown in Table 1 above, it shows an example table of a page table of a first chip 20 (such as a GPU) provided in an embodiment of the present application. Storage unit 1 and virtual address 1 are in a one-to-one correspondence, storage unit 2 and virtual address 2 are in a one-to-one correspondence, and storage unit 3 and virtual address 3 are in a one-to-one correspondence. Among them, storage unit 1, storage unit 2 and storage unit 3 are different storage units, and virtual address 1, virtual address 2 and virtual address 3 are different virtual addresses. Virtual address 1 and virtual address 2 correspond to the same physical address A, and virtual address 3 corresponds to another physical address B.

[0092] The above method, by setting the MMU, can receive the operation instruction of the driver program, and access the corresponding storage unit based on the received operation instruction, thereby realizing the read and write operation.

[0093] The technical solution provided by the embodiment of the present application can determine the target storage unit from multiple storage units based on the usage of each storage unit in the first chip, and compress the data in the target storage unit, thereby reducing the storage space occupied by the data in the first chip. This method effectively expands the available storage capacity of the first chip, and the method reduces the space occupied by the first chip by directly compressing the data in the first chip, so it does not involve the data exchange process between the first chip and the system memory included in the related technology, avoiding the problem of data exchange failure caused by PCIE bandwidth limitation, and avoiding the problem of data loss or error caused by the data exchange process.

[0094] Please refer to Figure 3 , which shows a flow chart of a video memory management method provided in a possible implementation of the present application. The execution subject of each step of the method may be an electronic device. The method may include at least one of the following steps 310 to 330.

[0095] Step 310, obtaining the heat information of each of the plurality of storage units included in the video memory, where the heat information is used to indicate the usage of the storage unit.

[0096] It should be noted that the first chip is only described as a GPU for example here, and the present application does not limit the type of the first chip.

[0097] In some embodiments, a specific implementation method for determining the number of times a storage unit is used may include the following steps: reading tag information from a page table of a first chip, the page table being used to record a mapping relationship between a virtual address and a physical address of a storage unit, the tag information being used to indicate a storage unit used in a video memory; based on the tag information, determining the number of times each of a plurality of storage units is used.

[0098] Step 320: Determine at least one target storage unit from the multiple storage units based on the heat information of each of the multiple storage units.

[0099] In some embodiments, at least one storage unit whose heat information satisfies a first condition is determined as at least one target storage unit. The first condition includes at least one of the following: the heat information is less than or equal to a first threshold, and the heat information is one of the smaller N heat information among the heat information of the plurality of storage units, where N is a positive integer.

[0100] In some embodiments, at least one storage unit whose heat information satisfies a first condition and to which the process belongs does not belong to a first process set is determined as at least one target storage unit; wherein the first condition includes at least one of the following: the heat information is less than or equal to a first threshold, the heat information is one of N smaller heat information among the heat information of multiple storage units, where N is a positive integer; and the first process set includes at least one pre-set process.

[0101] In some embodiments, the present application also provides another specific implementation method for determining the target storage unit in combination with the process to which the storage unit belongs. In some embodiments, based on the heat information of each of the multiple storage units and the processes to which the multiple storage units belong, at least one target storage unit is determined from the multiple storage units.

[0102] The process to which the storage unit belongs is used to indicate which process the storage unit is assigned to or used by. In some embodiments, a storage unit may belong to one process or multiple processes. When the storage unit belongs to multiple processes, the storage unit is a shared storage unit, allowing multiple processes to access the same data by calling the shared storage unit.

[0103] The above method combines the heat information with the process to which the storage unit belongs to determine the target storage unit. This method can fully consider the key processes in the system, thereby ensuring that when data is compressed, the pre-set key processes (such as system processes or delay-sensitive processes) will not be compressed. In this way, while effectively reducing the memory space occupied by data, the normal operation of the system can be ensured not to be affected.

[0104] Step 330: compress the data in the target storage unit.

[0105] In some embodiments, after compressing the data in the target storage unit, the information table is also updated. Specifically, the address information and compression status information of the target storage unit are updated, wherein the information table is used to store the address information and compression status information of each of the plurality of storage units, the address information is used to indicate the mapping relationship between the virtual address and the physical address of the storage unit, and the compression status information is used to indicate whether the storage unit is in a compressed state.

[0106] In some embodiments, updating the address information of the target storage unit refers to updating the physical address of the target storage unit. In some embodiments, the virtual address of the target storage unit remains unchanged, and the physical address of the target storage unit is updated. The updated physical address may be the same as or different from the physical address before the update, and this application does not limit this. In some embodiments, the updated physical address may be determined based on the memory management algorithm of the operating system. Specifically, in a paging-based memory management strategy, the virtual address space is divided into pages of fixed size, and the physical address is also divided into page frames (Page Frame). The operating system maintains the page table of the first chip 20 (such as a GPU) to manage the mapping relationship between virtual pages and physical page frames. When the data is compressed, the operating system needs to select a physical page frame for the compressed data. The operating system can execute a memory allocation algorithm (such as first adaptation, best adaptation, or worst adaptation) to select a suitable physical page frame to ensure that memory fragmentation is not caused. When a new physical page frame is allocated to the compressed data, the operating system updates the page table of the first chip 20 (such as a GPU) to record the mapping relationship between the virtual address and the updated physical address, thereby ensuring that the driver can correctly access the data. The above method of determining the updated physical address may also be based on a segmented memory management strategy, etc., which is not limited in this application.

[0107] In some embodiments, updating the compression state information of the target storage unit refers to updating the target storage unit from an uncompressed state to a compressed state. Each storage unit may correspond to a fixed number of bits of compression state information, such as 1 bit may be used to indicate the compression state information of the storage unit. Bit 1 may be used to indicate that the storage unit is in a compressed state, and bit 0 is used to indicate that the storage unit is not in a compressed state; bit 0 may also be used to indicate that the storage unit is in a compressed state, and bit 1 is used to indicate that the storage unit is not in a compressed state.

[0108] Exemplarily, as shown in the following Table 2, it shows an example table of an information table provided by an embodiment of the present application. Assuming that the target storage units are storage unit 2 and storage unit 3, the data in storage unit 2 and storage unit 3 need to be compressed. The updated physical address may be the same as the physical address before the update. Combining Table 1 and Table 2, such as storage unit 2, the updated physical address is still physical address A; the updated physical address may also be different from the physical address before the update, such as storage unit 3, the physical address before the update is physical address B, and the updated physical address is physical address A. Assuming that bit 1 is used to indicate that the storage unit is in a compressed state, the compression state information of storage unit 2 and storage unit 3 is updated from bit 0 to bit 1, and the compression state information of storage unit 1 is still bit 0.

[0109] Table 2

[0110] Storage Unit Virtual Address Physical Address Compression status information Storage unit 1 Virtual Address 1 Physical Address A 0 Storage Unit 2 Virtual Address 2 Physical Address A 1 Storage unit 3 Virtual Address 3 Physical Address A 1

[0111] In the above method, after the compression of the target storage unit is completed, the address information and compression status information of the target storage unit are made more accurate and consistent by timely updating the information table, so that in the subsequent calling process of the first process, the compression status information of the compression unit related to the first process can be conveniently determined from the information table to determine whether the target storage unit needs to be decompressed.

[0112] In some embodiments, in the information table, the hash value of the identification information related to the storage unit is used as the key, and the address information and compression status information of the storage unit are stored accordingly, wherein the identification information related to the storage unit includes at least one of the following: the identification of the process to which the storage unit belongs, and the context identification of the page table to which the storage unit belongs.

[0113] The identifier of the process to which the storage unit belongs may refer to a process identifier (Process Identifier, PID), which is used to distinguish different processes. The identifiers of processes belonging to different storage units may be the same or different.

[0114] The context identifier of the page table to which the storage unit belongs refers to the page table context identifier, which is used to distinguish different processes. That is, the context identifiers of the page tables corresponding to the same process are the same, and the context identifiers of the page tables corresponding to different processes are different. A process can correspond to one page table or multiple page tables. Among them, the process corresponds to a page table, which means that all storage units included in the page table belong to the process. In the above method, through the context identifier of the page table, the operating system can provide an independent virtual memory space for each process to ensure that they do not interfere with each other.

[0115] Exemplarily, as shown in Table 3 below, it shows an example table of a hash-based information table provided by an embodiment of the present application.

[0116] Table 3

[0117] key Virtual Address Physical Address Compression status information Hash1 Virtual Address 1 Physical Address A 0 Hash2 Virtual Address 2 Physical Address A 1 Hash3 Virtual Address 3 Physical Address A 1

[0118] Among them, Hash1 is determined based on at least one of the identifier of the process to which storage unit 1 belongs and the context identifier of the page table to which storage unit 1 belongs. Hash2 is determined based on at least one of the identifier of the process to which storage unit 2 belongs and the context identifier of the page table to which storage unit 2 belongs. Hash3 is determined based on at least one of the identifier of the process to which storage unit 3 belongs and the context identifier of the page table to which storage unit 3 belongs. The identifier of the process to which storage unit 1 belongs and the context identifier of the page table to which it belongs, the identifier of the process to which storage unit 2 belongs and the context identifier of the page table to which it belongs, and the identifier of the process to which storage unit 3 belongs and the context identifier of the page table to which it belongs may be the same or different. This application does not limit this.

[0119] In some embodiments, a hash value can be obtained based on identification information related to the storage unit using a hash algorithm. The identification information related to the storage unit includes at least one of the following: an identification of the process to which the storage unit belongs, and a context identification of the page table to which the storage unit belongs. The hash algorithm may include SHA-256 (Secure Hash Algorithm 256-bit), MD5 (Message Digest Algorithm 5), MurmurHash, etc. Taking the MD5 hash algorithm as an example, specifically, an MD5 hash operation can be performed on the process to which the storage unit belongs, or on the context identification of the page table to which the storage unit belongs, or on the sum of the identification of the process to which the storage unit belongs and the context identification of the page table to which the storage unit belongs, so as to obtain a 128-bit hash value for identifying and retrieving the storage unit. It is understandable that the hash values ​​may be the same or different. It is assumed that the hash value is determined based on the identification of the process to which the storage unit belongs. If the identifiers of the processes to which storage unit 1 and storage unit 2 belong are the same, Hash1 and Hash2 are the same; if the identifiers of the processes to which storage unit 1 and storage unit 2 belong are different, Hash1 and Hash2 are different.

[0120] The above method provides an efficient and flexible data organization and retrieval mechanism by storing the information table in the form of hash values. Using the hash value as an index, the storage unit can be quickly located, thereby improving the speed of data access. At the same time, since the hash value is determined based on at least one of the identifier of the process to which the storage unit belongs and the context identifier of the page table to which it belongs, this method can be well adapted to different storage requirements and scenarios. Whether it is multiple storage units within the same process or storage units between different processes, they can be accurately and quickly accessed through the corresponding hash value.

[0121] The technical solution provided by the embodiment of the present application can determine a target storage unit from multiple storage units based on the usage of each storage unit in the video memory of the first chip, and compress the data in the target storage unit, thereby reducing the storage space occupied by the data in the video memory. This method effectively expands the available storage capacity of the video memory, and the method reduces the occupation of the video memory space by directly compressing the data in the video memory, so it does not involve the data exchange process between the video memory and the system memory included in the related technology, avoiding the problem of data exchange failure caused by PCIE bandwidth limitation, and avoiding the problem of data loss or error caused by the data exchange process.

[0122] The specific implementation method of the decompression process is introduced below.

[0123] When the first process calls the first chip, it is determined based on the information table whether the storage units related to the first process include storage units in a compressed state; when the storage units related to the first process include storage units in a compressed state, the data in the storage units in the compressed state are decompressed.

[0124] The first process refers to a process that is currently requesting resources of the first chip 20 (such as a GPU). In this case, the process involves the use of storage units of the video memory, where these storage units may be in a compressed state. Therefore, the system needs to determine the state of these storage units through an information table, and decompress the compressed storage units when necessary to ensure that the first chip 20 (such as a GPU) can read the data in the storage units normally.

[0125] In some embodiments, decompressing data in a compressed storage unit refers to decompressing the storage unit related to the first process, that is, decompressing the storage unit related to the first process and in a compressed state. As for the storage units of other processes, even if they are also in a compressed state, they do not need to be decompressed.

[0126] In some embodiments, when the storage units related to the first process include storage units in a compressed state, the data in all the storage units in a compressed state may also be decompressed, which is not limited in the present application.

[0127] In some embodiments, a corresponding decompression algorithm can be determined according to the compression algorithm selected in the compression process to decompress the data in the storage unit in a compressed state. Exemplarily, when Huffman encoding is selected in the compression process. In the decompression process, the Huffman decoder restores the compressed data stream to the original data according to the pre-constructed Huffman tree.

[0128] In some embodiments, a specific implementation method for determining whether storage units related to a first process include storage units in a compressed state may include the following steps: calculating a first hash value based on an identifier of the first process and a context identifier of a first page table, where the first page table refers to a page table to which the first process belongs; querying compression status information of each storage unit stored corresponding to the first hash value from an information table; and determining whether storage units related to the first process include storage units in a compressed state based on the compression status information of each storage unit stored corresponding to the first hash value.

[0129] It can be understood that when the hash value in the information table is determined by the identifier of the process to which the storage unit belongs, the first hash value is determined based on the identifier of the first process; when the hash value in the information table is determined by the context identifier of the page table to which the storage unit belongs, the first hash value is determined based on the context identifier of the first page table; when the hash value in the information table is determined by the identifier of the process to which the storage unit belongs and the context identifier of the page table to which it belongs, the first hash value is determined based on the identifier of the first process and the context identifier of the first page table.

[0130] Exemplarily, as shown in Table 3 above, assuming that the first hash value is Hash1, and the storage unit 1 corresponding to Hash1 is in an uncompressed state, it is determined that the storage units related to the first process do not include storage units in a compressed state. Assuming that the first hash value is Hash2, where Hash3 is the hash value of another process, and the storage unit 2 corresponding to Hash2 is in a compressed state, it is determined that the storage units related to the first process include storage units in a compressed state. In this case, the data in storage unit 2 is decompressed. Although storage unit 3 corresponding to Hash3 is also in a compressed state, it does not belong to the first process and therefore does not need to be decompressed.

[0131] The above method can quickly and accurately determine the compression state of the storage unit in the information table based on the identifier of the first process and the context identifier of the first page table.

[0132] In some embodiments, after decompressing the data in the compressed storage unit, the page table and information table of the first chip are updated. In some embodiments, based on the physical address of the storage unit occupied by the decompressed data, the mapping relationship between the virtual address and the physical address of the storage unit recorded in the page table of the first chip is updated.

[0133] In some embodiments, the physical address of the storage unit occupied by the decompressed data may be the same as or different from the physical address of the storage unit occupied by the data in the compressed state. In some embodiments, the physical address of the storage unit occupied by the decompressed data may be the same as or different from the physical address of the storage unit occupied by the data before compression.

[0134] Exemplarily, as shown in Table 4 below, an example table of a page table of a first chip 20 (such as a GPU) after decompression is shown in one embodiment of the present application. Assuming that the storage unit related to the first process is storage unit 2, the data in the storage unit 2 is decompressed, and the physical address of the storage unit occupied by the data generated by the decompression is physical address C, where physical address C is different from physical address A.

[0135] Table 4

[0136] Storage Unit Virtual Address Physical Address Tag Information Storage unit 1 Virtual Address 1 Physical Address A 1 Storage Unit 2 Virtual Address 2 Physical Address C 0 Storage unit 3 Virtual Address 3 Physical Address A 0

[0137] In some embodiments, based on the physical address of the storage unit occupied by the data generated by decompression, the address information and compression status information of the storage unit recorded in the information table are updated.

[0138] Exemplarily, as shown in Table 5 below, it shows an example table of a decompressed information table provided by an embodiment of the present application. Assuming that the storage unit related to the first process is storage unit 2, the data in the storage unit 2 is decompressed, and the physical address of the storage unit occupied by the decompressed data is physical address C, where physical address C is different from physical address A. And the compression state information of storage unit 2 is updated to an uncompressed state, that is, bit 1 is updated to bit 0.

[0139] Table 5

[0140] Storage Unit Virtual Address Physical Address Compression status information Storage unit 1 Virtual Address 1 Physical Address A 0 Storage Unit 2 Virtual Address 2 Physical Address C 0 Storage unit 3 Virtual Address 3 Physical Address A 1

[0141] The above method can determine the compression state of the storage unit related to the first process through the compression state information in the information table. When the storage unit related to the first process is in a compressed state, the data in the storage unit in the compressed state can be decompressed, thereby ensuring the normal execution of the first process.

[0142] Furthermore, after decompressing the compressed storage unit, the page table and information table of the first chip 20 (such as a GPU) are updated to ensure the correct mapping between the virtual address and the physical address, thereby avoiding data access errors caused by improper address mapping when the first chip 20 (such as a GPU) is subsequently called.

[0143] Please refer to Figure 4 , which shows a flowchart of a video memory management method provided in another possible implementation of the present application. Before obtaining the heat information of each of the multiple storage units included in the video memory, it also includes: obtaining the utilization of the first chip and the utilization of the video memory; when the second condition is met, starting from the step of obtaining the heat information of each of the multiple storage units included in the video memory, wherein the second condition includes: the utilization of the first chip is less than or equal to the first threshold, and the utilization of the video memory is greater than or equal to the second threshold.

[0144] Taking the first chip as GPU as an example, the utilization rate of GPU refers to the proportion of GPU actually used for calculation in a certain moment or time period, usually expressed as a percentage. The utilization rate of GPU is used to indicate the degree to which the computing resources of GPU are occupied, that is, the ratio of the computing power of GPU to execute tasks to its maximum computing power. It can be understood that the greater the utilization rate of GPU, the higher the computing demand in the system, that is, the higher the workload of GPU; the smaller the utilization rate of GPU, the less computing demand in the system, that is, the GPU is relatively idle.

[0145] The utilization of video memory refers to the proportion of memory actually occupied at a certain moment or time period, usually expressed as a percentage. It represents the ratio of the current usage of video memory to the total capacity of video memory. For example, if the utilization of video memory is 75%, it means that 75% of the space in the video memory has been allocated and used, and the remaining 25% is still free.

[0146] In some embodiments, the first threshold and the second threshold may be set based on the experience of relevant technical personnel, and this application does not limit this.

[0147] In the above method, when the utilization rate of the first chip is low, it means that the first chip is in a relatively idle state. At this time, compressing the data in the storage unit will not compete for resources with the ongoing computing task, thereby avoiding negative impact on the ongoing computing task. The high utilization rate of the video memory means that the use of the video memory is close to full load. At this time, the target storage unit needs to be compressed to reduce the storage space occupied by the data in the video memory.

[0148] like Figure 3 As shown, after obtaining the utilization rate of the first chip and the utilization rate of the video memory, it is determined whether the utilization rate of the first chip is less than or equal to the first threshold, and whether the utilization rate of the video memory is greater than or equal to the second threshold. When the above conditions are met, the scheme for compressing infrequently used video memory data proposed in the present application is started. Specifically, in combination with the heat information and the process to which the storage unit belongs, it is determined whether the first condition is met. For example, when the heat information of the storage unit is small and does not belong to a preset process (such as a system process), the storage unit is determined as a target storage unit, and the data in the target storage unit is compressed. After the compression is completed, the address information and compression status information of the target storage unit in the information table can be updated. And part of the occupied video memory space is released, thereby effectively reducing the storage requirements of the video memory and expanding the available storage space of the video memory.

[0149] When the first process calls the first chip, it first determines whether there is a compressed storage unit in the storage unit related to the first process according to the information table. If so, the compressed storage unit is decompressed. The physical address and compression status information in the information table and the page table of the first chip are updated. Finally, the first chip can be called to execute the first process normally.

[0150] In the above method, when the utilization rate of the first chip is low and the utilization rate of the video memory is high, the data in the storage unit needs to be compressed. In this method, when the utilization rate of the first chip is low, the first chip is in a relatively idle state. At this time, compressing the data in the storage unit will not compete with the ongoing computing tasks for computing resources. When the utilization rate of the video memory is high, it means that the use of the video memory is close to full load. At this time, the target storage unit needs to be compressed to reduce the storage space occupied by the data in the video memory, thereby expanding the available space of the video memory.

[0151] Please refer to Figure 5 , which shows a flow chart of a video memory management method provided in another possible implementation of the present application. The method may include at least one of the following steps 510 to 530.

[0152] Step 510: Obtain, through a first logic unit, the heat information of each of the plurality of storage units included in the first chip, where the heat information is used to indicate the usage of the storage unit.

[0153] In some embodiments, a specific implementation method for determining the heat information of each of multiple storage units may include: when a process calls the first chip 20, the first logic unit 21 adds marking information to the page table of the first chip 20, the page table is used to record the mapping relationship between the virtual address and the physical address of the storage unit, and the marking information is used to indicate the storage unit used in the first chip 20.

[0154] The second chip 24 reads the tag information from the page table, determines the usage count of each of the plurality of storage units based on the tag information, and determines the heat information of each of the plurality of storage units based on the usage count of each of the plurality of storage units.

[0155] In some embodiments, when a process calls the first chip 20 , the first logic unit 21 may add marking information, such as bit 0 or bit 1, to the page table of the first chip 20 , which is not limited in the present application.

[0156] In the above method, the first logic unit 21 can track the usage of the storage unit in the first chip 20 in real time by adding marking information in the page table; the second chip 24 can count the number of times the storage unit is used by reading the marking information in the page table, and calculate the heat information of the storage unit based on the number of times it is used. In this way, the system can accurately determine the heat information of each of the multiple storage units and provide a basis for subsequent storage space optimization (i.e., compression of the target storage unit).

[0157] Step 520: Determine at least one target storage unit from the plurality of storage units by the second chip based on the heat information of each of the plurality of storage units. For the specific implementation of determining the target storage unit, please refer to the corresponding content above.

[0158] Step 530: compress the data in the target storage unit through the second logical unit.

[0159] In some embodiments, the address information and compression status information of the target storage unit are updated in the information table through the second chip 24, wherein the information table is used to store the address information and compression status information of each of the plurality of storage units, the address information is used to indicate the mapping relationship between the virtual address and the physical address of the storage unit, and the compression status information is used to indicate whether the storage unit is in a compressed state.

[0160] In some embodiments, when the physical address of the target storage unit changes, the second chip 24 updates the address information in the information table to ensure that the mapping relationship between the virtual address and the physical address is correct.

[0161] In some embodiments, when the target storage unit is compressed or decompressed, the second chip 24 updates the compression status information in the information table to reflect the current status of the storage unit.

[0162] For example, assume that the original physical address of the target storage unit is 0x1000, the virtual address is 0x2000, and it is in an uncompressed state. After compression, the physical address becomes 0x1500, the virtual address is still 0x2000, and the compression state becomes compressed. The second chip 24 updates the address information and compression state information in the information table, as follows: Address information: Virtual address 0x2000 is mapped to physical address 0x1500. Compression state information: The target storage unit is in a compressed state.

[0163] In some embodiments, in the information table, the hash value of the identification information related to the storage unit is used as the key, and the address information and compression status information of the storage unit are stored accordingly, wherein the identification information related to the storage unit includes at least one of the following: the identification of the process to which the storage unit belongs, and the context identification of the page table to which the storage unit belongs.

[0164] In some embodiments, the decompression process may include: when the first process calls the first chip 20, determining, based on the information table, whether the storage units related to the first process include storage units in a compressed state, by the second chip 24; when the storage units related to the first process include storage units in a compressed state, by the second chip 24, sending a decompression instruction to the second logic unit 22, the decompression instruction being used to decompress data in the storage units in a compressed state; and when the second logic unit 22 receives the decompression instruction, decompressing the data in the storage units in a compressed state.

[0165] In some embodiments, when the first process calls the first chip 20, the second chip 24 checks whether there are any storage units in a compressed state in the storage units related to the first process based on the information table. The information table stores the address information and compression state information of each storage unit, so the second chip 24 can quickly determine which storage units are in a compressed state by querying the information table. If the second chip 24 identifies that there are storage units in a compressed state in the storage units related to the first process, it sends a decompression instruction to the second logic unit 22. For the specific information contained in the decompression instruction, please refer to the corresponding content above.

[0166] In some embodiments, after receiving the decompression instruction, the second logic unit 22 will locate the target storage unit according to the address information in the decompression instruction. Then, the second logic unit 22 will decompress the data in the target storage unit and restore it to an uncompressed state.

[0167] In some embodiments, the second chip 24 calculates a first hash value based on an identifier of the first process and a context identifier of the first page table, where the first page table refers to a page table to which the first process belongs; the second chip 24 queries the compression status information of each storage unit stored corresponding to the first hash value from the information table; the second chip 24 determines whether the storage units related to the first process include storage units in a compressed state based on the compression status information of each storage unit stored corresponding to the first hash value.

[0168] In some embodiments, the mapping relationship between the virtual address and the physical address of the storage unit recorded in the page table of the first chip 20 is updated by the second chip 24 based on the physical address of the storage unit occupied by the decompressed data; the address information and compression status information of the storage unit recorded in the information table are updated by the second chip 24 based on the physical address of the storage unit occupied by the decompressed data.

[0169] In some embodiments, after decompression is completed, the second chip 24 will update the compression status information of the target storage unit in the information table and mark it as uncompressed. At the same time, if the decompression causes the physical address of the storage unit to change, the second chip 24 will also update the address information in the information table.

[0170] In some embodiments, before obtaining the heat information of each of the multiple storage units included in the first chip, it also includes: obtaining the utilization of the first chip 20 and the utilization of the video memory through the second chip 24; when the second condition is met, determining at least one target storage unit from the multiple storage units through the second chip 24 based on the heat information of each of the multiple storage units, wherein the second condition includes: the utilization of the first chip 20 is less than or equal to the first threshold, and the utilization of the video memory is greater than or equal to the second threshold.

[0171] In the above embodiments, for descriptions that are not explained in detail, please refer to the corresponding content above.

[0172] The following is a video memory management system of the present application. For details not disclosed in the embodiment of the video memory management system of the present application, please refer to the method embodiment of the present application above.

[0173] In some embodiments, the present application provides a video memory management system, the system comprising: a first chip and a second chip, the first chip being configured with a first logic unit and a second logic unit.

[0174] The first logic unit is used to obtain heat information of each of the multiple storage units included in the first chip, and the heat information is used to indicate the usage of the storage unit.

[0175] The second chip is used to determine at least one target storage unit from the multiple storage units based on the heat information of each of the multiple storage units.

[0176] The second logic unit is used to compress the data in the target storage unit.

[0177] In some embodiments, the first logic unit is used to add tag information to the page table of the first chip when a process calls the first chip, the page table is used to record the mapping relationship between the virtual address and the physical address of the storage unit, and the tag information is used to indicate the storage unit used in the first chip. The second chip is used to read the tag information from the page table, determine the number of times each of the multiple storage units is used based on the tag information, and determine the heat information of each of the multiple storage units based on the number of times each of the multiple storage units is used.

[0178] In some embodiments, the second chip is also used to update the address information and compression status information of the target storage unit in an information table, wherein the information table is used to store the address information and compression status information of each of the multiple storage units, the address information is used to indicate the mapping relationship between the virtual address and the physical address of the storage unit, and the compression status information is used to indicate whether the storage unit is in a compressed state.

[0179] In some embodiments, in the information table, the hash value of the identification information related to the storage unit is used as the key, and the address information and compression status information of the storage unit are stored accordingly, wherein the identification information related to the storage unit includes at least one of the following: the identification of the process to which the storage unit belongs, and the context identification of the page table to which the storage unit belongs.

[0180] In some embodiments, the second chip is further used to determine, based on the information table, whether the storage units related to the first process include storage units in the compressed state when the first process calls the first chip; if the storage units related to the first process include storage units in the compressed state, send a decompression instruction to the second logic unit, and the decompression instruction is used to decompress the data in the storage units in the compressed state; the second logic unit is further used to decompress the data in the storage units in the compressed state when receiving the decompression instruction.

[0181] In some embodiments, the second chip is used to: calculate a first hash value based on the identifier of the first process and the context identifier of the first page table, where the first page table refers to the page table to which the first process belongs; query the compression status information of each storage unit stored corresponding to the first hash value from the information table; and determine whether the storage units related to the first process include storage units in the compressed state based on the compression status information of each storage unit stored corresponding to the first hash value.

[0182] In some embodiments, the second chip is further used to: update the mapping relationship between the virtual address and the physical address of the storage unit recorded in the page table of the first chip based on the physical address of the storage unit occupied by the data generated by decompression; and update the address information and compression status information of the storage unit recorded in the information table based on the physical address of the storage unit occupied by the data generated by decompression.

[0183] In some embodiments, the second chip is further used to: obtain the utilization of the first chip and the utilization of the video memory; and determine the at least one target storage unit from the multiple storage units based on the heat information of each of the multiple storage units when a second condition is met, wherein the second condition includes: the utilization of the first chip is less than or equal to a first threshold, and the utilization of the video memory is greater than or equal to a second threshold.

[0184] The following is an embodiment of the device of the present application, which can be used to execute the embodiment of the method of the present application. For details not disclosed in the embodiment of the device of the present application, please refer to the embodiment of the method of the present application.

[0185] Please refer to Figure 6 , which shows a block diagram of a video memory management device provided in a possible implementation of the present application. The device has the function of implementing the above-mentioned video memory management method, and the function can be implemented by hardware, or by hardware executing corresponding software. The device can be an electronic device, or can be set in an electronic device. The device 600 can include: an acquisition module 610, a determination module 620 and a compression module 630.

[0186] The acquisition module 610 is used to acquire the heat information of each of the multiple storage units included in the video memory, where the heat information is used to indicate the usage of the storage unit.

[0187] The determination module 620 is used to determine at least one target storage unit from the multiple storage units based on the heat information of each of the multiple storage units.

[0188] The compression module 630 is used to compress the data in the target storage unit.

[0189] In some embodiments, the acquisition module 610 is used to determine the heat information of each of the plurality of storage units based on the number of times each of the plurality of storage units is used.

[0190] In some embodiments, the acquisition module 610 is used to read tag information from a page table of the first chip, the page table is used to record a mapping relationship between a virtual address and a physical address of the storage unit, and the tag information is used to indicate a storage unit used in the video memory; based on the tag information, the number of times each of the multiple storage units is used is determined.

[0191] In some embodiments, the determination module 620 is used to determine the at least one target storage unit from the multiple storage units based on the heat information of each of the multiple storage units and the processes to which each of the multiple storage units belongs.

[0192] In some embodiments, the determination module 620 is used to determine at least one storage unit whose heat information satisfies a first condition and to which the process belongs does not belong to a first process set as the at least one target storage unit; wherein the first condition includes at least one of the following: the heat information is less than or equal to a first threshold, the heat information is one of the smaller N heat information among the heat information of each of the multiple storage units, where N is a positive integer; and the first process set includes at least one pre-set process.

[0193] In some embodiments, the apparatus 600 further includes: a first update module ( Figure 6 not shown).

[0194] The first update module is used to update the address information and compression status information of the target storage unit in the information table, wherein the information table is used to store the address information and compression status information of each of the multiple storage units, the address information is used to indicate the mapping relationship between the virtual address and the physical address of the storage unit, and the compression status information is used to indicate whether the storage unit is in a compressed state.

[0195] In some embodiments, the first update module is used to store address information and compression status information of the storage unit in the information table using a hash value of identification information related to the storage unit as a key, wherein the identification information related to the storage unit includes at least one of the following: an identification of the process to which the storage unit belongs, and a context identification of a page table to which the storage unit belongs.

[0196] In some embodiments, the device 600 further includes: a decompression module ( Figure 6 not shown).

[0197] A decompression module is used to determine, based on the information table, whether the storage units related to the first process include storage units in the compressed state when the first process calls the first chip; and to decompress data in the storage units in the compressed state when the storage units related to the first process include storage units in the compressed state.

[0198] In some embodiments, the decompression module is used to calculate a first hash value based on an identifier of the first process and a context identifier of a first page table, where the first page table refers to a page table to which the first process belongs; query the compression status information of each storage unit stored corresponding to the first hash value from the information table; and determine, based on the compression status information of each storage unit stored corresponding to the first hash value, whether the storage units related to the first process include storage units in the compressed state.

[0199] In some embodiments, the apparatus 600 further includes: a second update module ( Figure 6 not shown).

[0200] The second update module is used to update the mapping relationship between the virtual address and the physical address of the storage unit recorded in the page table of the first chip based on the physical address of the storage unit occupied by the decompressed data; based on the physical address of the storage unit occupied by the decompressed data, update the address information and compression status information of the storage unit recorded in the information table.

[0201] In some embodiments, the device 600 further includes: an execution module ( Figure 6 not shown).

[0202] An execution module is used to obtain the utilization rate of the first chip and the utilization rate of the video memory; when a second condition is met, execution starts from the step of obtaining the thermal information of each of the multiple storage units included in the video memory, wherein the second condition includes: the utilization rate of the first chip is less than or equal to a first threshold, and the utilization rate of the video memory is greater than or equal to a second threshold.

[0203] It should be noted that the device provided in the above embodiment, when implementing its functions, is only illustrated by the division of the above functional modules. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above. In addition, the device and method embodiments provided in the above embodiment belong to the same concept, and the specific implementation process is detailed in the method embodiment, which will not be repeated here.

[0204] Please refer to Figure 7 , which shows a structural block diagram of an electronic device 700 provided in a possible implementation of the present application.

[0205] Typically, the electronic device 700 includes a processor 710 and a memory 720 .

[0206] The processor 710 may include one or more processing cores, such as a 4-core processor, an 8-core processor, etc. The processor 710 may be implemented in at least one hardware form of DSP (Digital Signal Processing), FPGA (Field Programmable Gate Array), and PLA (Programmable Logic Array). The processor 710 may also include a main processor and a coprocessor. The main processor is a processor for processing data in an awake state, also known as a CPU (Central Processing Unit); the coprocessor is a low-power processor for processing data in a standby state. In some embodiments, the processor 510 may be integrated with a GPU (Graphics Processing Unit), which is responsible for rendering and drawing the content to be displayed on the display screen. In some embodiments, the processor 510 may also include an AI processor, which is used to process computing operations related to machine learning.

[0207] The memory 720 may include one or more computer-readable storage media, which may be non-transitory. The memory 720 may also include high-speed random access memory and non-volatile memory, such as one or more disk storage devices and flash memory storage devices. In some embodiments, the non-transitory computer-readable storage medium in the memory 720 is used to store a computer program, which is configured to be executed by one or more processors to implement the above-mentioned video memory management method.

[0208] Those skilled in the art will understand that Figure 7 The structure shown in the figure does not constitute a limitation on the electronic device 700, and may include more or less components than those shown in the figure, or combine some components, or adopt a different component arrangement.

[0209] In some embodiments, a computer-readable storage medium is further provided, wherein a computer program is stored in the storage medium, and the computer program is loaded and executed by a processor to implement the above-mentioned video memory management method.

[0210] Optionally, the computer readable storage medium may include: ROM (Read-Only Memory), RAM (Random-Access Memory), SSD (Solid State Drives) or optical disks, etc. Among them, the random access memory may include ReRAM (Resistance Random Access Memory) and DRAM (Dynamic Random Access Memory).

[0211] In some embodiments, a computer program product is also provided, the computer program product comprising a computer program, the computer program is stored in a computer-readable storage medium, and the processor reads and executes the computer program from the computer-readable storage medium to implement the above-mentioned video memory management method.

[0212] It should be understood that the "multiple" mentioned in this article refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the objects associated before and after are in an "or" relationship. "Greater than or equal to" mentioned in this article may mean greater than or equal to or greater than, and "less than or equal to" may mean less than or equal to or less than. In addition, the step numbers described in this article only illustrate a possible execution sequence between the steps. In some other embodiments, the above steps may not be executed in the order of the numbers, such as two steps with different numbers are executed at the same time, or two steps with different numbers are executed in the opposite order to the diagram. The embodiments of the present application are not limited to this.

[0213] The above description is only an exemplary embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A video memory management method, characterized in that: The method is applied to a first chip, wherein the first chip is configured with a first logic unit and a second logic unit; the method comprises: Acquire, through the first logic unit, heat information of each of a plurality of storage units included in the first chip, wherein the heat information is used to indicate a usage status of the storage unit; compressing data in at least one target storage unit by the second logic unit, where the target storage unit is determined by the second chip from the plurality of storage units based on the acquired heat information of each of the plurality of storage units; The first chip is different from the second chip.

2. The method according to claim 1, characterized in that The method comprises: When a process calls the first chip, tag information is added to the page table of the first chip through the first logic unit, and the page table is used to record the mapping relationship between the virtual address and the physical address of the storage unit, and the tag information is used to indicate the storage unit used in the first chip.

3. The method according to claim 2, characterized in that The heat information of the storage unit includes the number of times the storage unit is used, and the tag information is used to determine the number of times each of the plurality of storage units is used.

4. The method according to claim 2, characterized in that: The method further comprises: When a process calls the first chip, the mark information added to the page table of the first chip is cleared through the first logic unit.

5. The method according to claim 1, characterized in that The heat information of the target storage unit meets the first condition, and the process to which the target storage unit belongs does not belong to the first process set; Among them, the first condition includes at least one of the following: the heat information is less than or equal to a first threshold, the heat information is one of N smaller heat information among the heat information of each of the multiple storage units, and N is a positive integer; the first process set includes at least one pre-set process.

6. The method according to claim 1, characterized in that The compressing data in at least one target storage unit by the second logic unit includes: The second logic unit compresses the data in the at least one target storage unit when receiving the compression instruction sent by the driver.

7. The method according to claim 1, characterized in that The method further comprises: When receiving a decompression instruction sent by the driver, the second logic unit decompresses the data in the storage unit in a compressed state.

8. The method according to claim 1, characterized in that The first chip is also configured with a memory management unit MMU; the method further includes: Acquire, through the MMU, an operation instruction sent by a driver, wherein the operation instruction includes a virtual address of a first storage unit to be accessed and a page table of the first chip; Reading, by the MMU, a physical address corresponding to the virtual address of the first storage unit from a page table of the first chip according to the virtual address of the first storage unit as a first physical address; The first storage unit is accessed through the MMU based on the first physical address.

9. A video memory management system, characterized in that: The system includes: a first chip and a second chip, wherein the first chip is configured with a first logic unit and a second logic unit; The first logic unit is used to obtain heat information of each of the plurality of storage units included in the first chip, wherein the heat information is used to indicate the usage of the storage unit; The second chip is used to determine at least one target storage unit from the plurality of storage units based on the heat information of each of the plurality of storage units; The second logic unit is used to compress the data in the target storage unit.

10. The system according to claim 9, characterized in that The first logic unit is used to add marking information to a page table of the first chip when a process calls the first chip, the page table is used to record a mapping relationship between a virtual address and a physical address of the storage unit, and the marking information is used to indicate a storage unit used in the first chip; The second chip is used to read the tag information from the page table, determine the number of times each of the multiple storage units is used based on the tag information, and determine the heat information of each of the multiple storage units based on the number of times each of the multiple storage units is used.

11. The system according to claim 9, characterized in that The second chip is also used to update the address information and compression status information of the target storage unit in an information table, wherein the information table is used to store the address information and compression status information of each of the multiple storage units, the address information is used to indicate the mapping relationship between the virtual address and the physical address of the storage unit, and the compression status information is used to indicate whether the storage unit is in a compressed state.

12. The system according to claim 11, characterized in that In the information table, the address information and compression status information of the storage unit are stored correspondingly using the hash value of the identification information related to the storage unit as the key, wherein the identification information related to the storage unit includes at least one of the following: the identification of the process to which the storage unit belongs, and the context identification of the page table to which the storage unit belongs.

13. The system according to claim 11, characterized in that The second chip is further used to determine, based on the information table, whether the storage units related to the first process include the storage units in the compressed state when the first process calls the first chip; if the storage units related to the first process include the storage units in the compressed state, send a decompression instruction to the second logic unit, wherein the decompression instruction is used to decompress the data in the storage units in the compressed state; The second logic unit is further used to decompress the data in the storage unit in a compressed state when receiving the decompression instruction.

14. The system according to claim 13, characterized in that The second chip is used for: Calculate a first hash value according to the identifier of the first process and the context identifier of a first page table, where the first page table refers to a page table to which the first process belongs; Querying, from the information table, compression status information of each storage unit stored corresponding to the first hash value; According to the compression state information of each storage unit stored corresponding to the first hash value, it is determined whether the storage units related to the first process include a storage unit in the compression state.

15. The system according to claim 13, characterized in that The second chip is further used for: Based on the physical address of the storage unit occupied by the decompressed data, updating the mapping relationship between the virtual address and the physical address of the storage unit recorded in the page table of the first chip; Based on the physical address of the storage unit occupied by the decompressed data, the address information and compression status information of the storage unit recorded in the information table are updated.

16. The system according to any one of claims 9 to 15, characterized in that The second chip is further used for: Obtaining a utilization rate of the first chip and a utilization rate of the video memory; When the second condition is met, the at least one target storage unit is determined from the multiple storage units based on the heat information of each of the multiple storage units, wherein the second condition includes: the utilization rate of the first chip is less than or equal to a first threshold, and the utilization rate of the video memory is greater than or equal to a second threshold.

17. A chip, characterized in that: The chip is configured with a first logic unit and a second logic unit; The first logic unit is used to obtain heat information of each of the plurality of storage units included in the chip, wherein the heat information is used to indicate the usage of the storage unit; The second logic unit is used to compress data in at least one target storage unit in the chip, and the target storage unit is determined from the multiple storage units based on the heat information of each of the multiple storage units.

18. An electronic device, characterized in that: The electronic device comprises a video memory management system as claimed in any one of claims 9 to 16.

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