Lossless compression circuit, chip and equipment for pulse waveform data

Abstract

The invention discloses a lossless compression circuit, chip and equipment for pulse waveform data, and the lossless compression circuit comprises an input flow control module which is used for receiving an input data flow and achieving flow control; the division module is used for dividing an input data stream into data blocks; the LZ77 compressor is used for realizing data compression of an LZ77 compression algorithm; the conversion module is used for converting the compression result into a Huffman coded symbol; the checking module is used for calculating the length len and the cyclic redundancy check code of the whole data stream; the Huffman encoder is used for realizing Huffman encoding algorithm encoding; and the output flow control module is used for outputting the data according to a specified compression format. The invention aims to realize lossless compression of electroencephalogram signals by utilizing a Deflate algorithm in combination with an LZ77 compression algorithm and a Huffman coding algorithm on the basis of hardware, so that the processing efficiency of pulse waveform data of the electroencephalogram signals is improved.

Description

Technical Field

[0001] The present invention relates to signal compression technology in the field of brain-computer interface, and in particular to a lossless compression circuit, chip and device for pulse waveform data. Background Art

[0002] Brain Computer Interface (BCI) refers to a technology that achieves information interaction and functional integration between the nervous system and external devices by establishing a direct connection pathway between human brain nerves and external devices with high biocompatibility. Invasive wireless brain-computer interface is a highly invasive and technically complex BCI technology. It records and controls brain activity by implanting electrodes or sensors into the brain and transmitting and receiving signals through wireless communication technology. Signal compression is a process that reduces signal representation by reducing the amount of data or utilizing redundant information in the data while retaining enough information for subsequent analysis and diagnosis. The amount of data collected by multiple electrodes of invasive wireless brain-computer interface at a high sampling rate at the same time is extremely large, but its power consumption budget, transmission bandwidth are limited, and real-time response requirements are high. Signal compression is an effective solution to the above problems.

[0003] The Deflate algorithm is a lossless data compression technology that is widely used in formats such as ZIP, gzip, and PNG. The Deflate algorithm combines the LZ77 algorithm and Huffman coding (1) Huffman coding) to achieve compression through two main stages: first, the LZ77 algorithm is used to detect and replace repeated data sequences, and second, Huffman coding is used to further compress the data. Implementations of the Deflate algorithm are widely available, and many programming languages ​​have corresponding libraries that can be used. For example, C language programs usually use the zlib library to implement Deflate compression. However, how to apply the Deflate algorithm to the pulse waveform data compression of signals in the field of brain-computer interfaces, especially how to improve the execution efficiency of the Deflate algorithm for high-throughput EEG signals, has become a key technical problem that needs to be solved urgently. Summary of the invention

[0004] Technical problem to be solved by the present invention: In view of the above-mentioned problems in the prior art, a lossless compression circuit, chip and device for pulse waveform data are provided. The present invention aims to realize lossless compression of EEG signals based on hardware by using the Deflate algorithm combined with the LZ77 compression algorithm and the Huffman coding algorithm, so as to improve the processing efficiency of EEG signal pulse waveform data.

[0005] In order to solve the above technical problems, the technical solution adopted by the present invention is: A lossless compression circuit for pulse waveform data, comprising: Input flow control module, used to receive input data stream and implement flow control; A partitioning module, used for partitioning the input data stream into data blocks of fixed size; LZ77 compressor, used to implement the LZ77 compression algorithm in the Deflate algorithm to compress data blocks; A conversion module, used for converting the output of the LZ77 compression algorithm into Huffman coded symbols; A check module is used to receive an input data stream and calculate the length len and cyclic redundancy check code of the entire data stream; Huffman encoder, used to implement the Huffman coding algorithm in the Deflate algorithm, and encode and output the data compressed by the LZ77 compression algorithm; The output flow control module is used to organize the encoded output according to the specified compression format specification and then output it; The input flow control module, the division module, and the LZ77 compressor are connected in sequence, the LZ77 compressor is respectively connected to the input ends of the conversion module and the verification module, the output ends of the conversion module and the verification module are respectively connected to the input end of the Huffman encoder, the output end of the Huffman encoder is connected to the input end of the output flow control module, and the lossless compression circuit adopts a pipeline design, wherein the input flow control module constitutes the first stage of the pipeline, the division module constitutes the second stage of the pipeline, the LZ77 compressor constitutes the third stage of the pipeline, the conversion module and the verification module both constitute the fourth stage of the pipeline, the Huffman encoder constitutes the fifth stage of the pipeline, and the output flow control module constitutes the sixth stage of the pipeline.

[0006] Optionally, the input flow control module includes two 8-bit buffers for receiving data input in AXI-Stream format and implementing flow control, and the two 8-bit buffers are used to receive data input in AXI-Stream format in turn.

[0007] Optionally, the partitioning module includes a counter and a comparator, the counter is used to count according to the data received in AXI-Stream format, the output end of the counter and a preset threshold BLK_MIN are used as inputs of the comparator, and the comparator is used to take out data of a preset threshold BLK_MIN size from the input flow control module as a data block when the count value of the counter is equal to the preset threshold BLK_MIN.

[0008] Optionally, the LZ77 compressor adopts a pipeline design, and the stages of the pipeline design include: The receiving data phase A is used to receive the input signal and determine whether it is in the data block and whether the pipeline should be started; Delay processing stage B is used to introduce delays to balance the speed differences of different operations and ensure the synchronization of data in the pipeline; Hash calculation phase C, used to calculate the hash value of the current data block for fast matching in subsequent phases; Hash table read and write phase D is used to write the information of the current position into the hash table and read the possible matching position from the hash table based on the hash value; Matching phase E is used to prepare the data required for matching search; The search phase F is used to perform the actual match check, including searching the hash table through a sliding window based on the hash value, determining whether there are repeated strings in the sliding window and matching them; if there are multiple identical strings, select the string with the longest matching length L and the closest distance, calculate the distance D between the starting positions of the two, and finally use the index composed of (byte, L, D) to represent the content of the repeated string, where byte is the original character of the current data block; The matching decision stage G is used to make a decision based on the matching search result to determine whether to output the original character in the case of non-matching or output the index information in the case of matching; The original character encoding stages H and J are used to prepare the original characters for output in case of non-matching; The final output stage K is used to integrate the non-matching situation and the matching situation, using the type signal nlz to distinguish between the original character and the index information and generate the final output signal.

[0009] Optionally, when searching in the hash table through a sliding window based on the hash value, the sliding window size used is 16384, the hash value size is 4096, the hash value width is 14 bits, the search distance of the search is 16383 to cover the entire data block, and four buffers BUFFER are used to store the lower 2 bits of the storage address of the data for searching.

[0010] Optionally, the conversion module converts the output of the LZ77 compression algorithm into Huffman coded symbols, including merging the original character and the matching length len into the symbol [8:0]symbol, and determining the additional number of bits required to encode these symbols based on a preset matching length partition comparison table; or merging the distance D in the index with the matching length len of the matching check to use a distance dist, and determining the additional number of bits required to encode these symbols based on a preset matching length partition comparison table, to form two data streams of distance [8:0]dist and symbol [8:0]symbol.

[0011] Optionally, the Huffman encoder is used to perform Huffman encoding according to the two data streams of distance [8:0]dist and symbol [8:0]symbol output by the conversion module, and the length len and cyclic redundancy check code of the data stream output by the check module, and output a compressed data stream with a data width of 4 bytes and a total of 32 bits according to the GZIP format requirements. The Huffman encoder uses a finite state machine FSM to manage the data compression process, and the finite state machine FSM includes: Idle state R_IDLE: used to receive data and write into the data buffer buffer_data. If the length len of the data stream exceeds the preset threshold MIN_LEN, the dynamic Huffman flag is set to wait for the end EOB of the block input and start constructing the dynamic Huffman tree r_dynamic until the construction is completed huffman_ed. At this time, the read and write addresses are different and the preparation state R_PREPARE is entered. Preparation state R_PREPARE: used to prepare the GIZP header. If the data stream is a new data stream r_l_sos, it is first initialized to the GIZP header, initializes the first stage of the output stream pipeline, and then jumps to the GZIP header output state R_GZIP_HEADER_2~3; if it is not the latest data stream, first use the output stream pipeline to output a 3-bit data block start identifier, and if the dynamic Huffman method r_dynamic is used, jump to the dynamic Huffman tree header output state R_DYN_HEADER_1~3; if the static Huffman method is used, jump to the dynamic Huffman tree output state R_DYN_OUTTREE; the output stream pipeline is used to output the encoding result in a pipeline manner; GZIP header output state R_GZIP_HEADER_2~3: used to output the header information required by the GZIP file format. If the dynamic Huffman method is used, it jumps to the dynamic Huffman tree header output state R_DYN_HEADER_1~3, otherwise it jumps to the dynamic Huffman tree output state R_DYN_OUTTREE; Dynamic Huffman tree head output state R_DYN_HEADER_1~3: used to output the description information of the Huffman tree, and after output, jump to the dynamic Huffman tree output state R_DYN_OUTTREE:; Dynamic Huffman tree output state R_DYN_OUTTREE: used to output the constructed Huffman tree, and jump to the Huffman coding output state R_HUFFMAN_OUT after output; Huffman coding output state R_HUFFMAN_OUT: used to read the data buffer buffer_data, take out the LZ77 coded data, convert it into Huffman coding, and output it to the buffer. After output, jump to the end block symbol output state R_EOB_SYMBOL; End block symbol output state R_EOB_SYMBOL: used to output the block end symbol EOB indicating the end of the data block in LZ77 compression, and jump to the post-processing state R_POST_PARE after output; Post-processing state R_POST_PARE: used to adjust the read and write pointers to prepare for the next compression. If the output block ends, it jumps to the GZIP tail output state R_GZIP_FOOTER_1~3, otherwise it jumps to the idle state R_IDLE; GZIP footer output state R_GZIP_FOOTER_1~3: used to output the footer information required by the GZIP file format, including CRC checksum and original data length, and jump to the idle state R_IDLE after output; The output stream pipeline includes the following stages: Initial processing stage A, reads the raw data from the buffer and performs preliminary processing according to the data type: sets the output enable signal, determines whether it is the beginning, end or end of the stream, extracts the symbol data and the number of additional bits; Table lookup phase B, querying the Huffman table. If a static Huffman tree is used, this phase will query the static Huffman table to obtain the Huffman code and length of each symbol, and process the dynamic flags related to the dynamic Huffman tree; Coding stage C, obtain Huffman code, according to the results of dynamic Huffman tree or static Huffman table, obtain the Huffman code and code length of each symbol and distance. If it is a dynamic Huffman tree, reverse bit operation will be used to obtain the correct code; High and low bit merging stage D, bit stream merging, merging high and low bit Huffman codes in the same cycle, merging the code and length information from the encoding stage C into a unified bit stream, and calculating the number of merged bits; In the bitstream merging stage E, the bitstream is merged across clock cycles, 32 bits of data are output, and the shift register t_bits is used to temporarily store the encoding. The bits are aligned to ensure that the output data is aligned in bytes. If the number of valid bits in the shift register t_bitc is greater than 32, the lower 32 bits of the merged bitstream are output to the register e_data in a low-byte to high-byte manner. The part exceeding 32 bits is right-shifted to the low bit of the shift register t_bits. At the same time, the byte valid signal byte_cnt is used to indicate that the bytes in the 32 bits are valid, and the stream end signal last is generated to indicate the end of the current block. The final output stream in the AXI-Stream format after GZIP compression is generated, which is composed of the output signal e_en, the lower 32 bits of the bitstream of the register e_data, the byte valid signal byte_cnt, and the stream end signal last.

[0012] Optionally, the output flow control module includes an internal buffer for caching output data, and dynamically controls the input data flow according to the filling status of the internal buffer based on the output flow control signal i_stall_n. When the internal buffer is close to full, the output flow control signal i_stall_n is set to notify the sender to pause sending data to achieve elastic flow control.

[0013] In addition, the present invention also provides a chip, comprising a data input circuit, a data compression circuit and a data processing circuit connected in sequence, wherein the data compression circuit is the lossless compression circuit for pulse waveform data.

[0014] In addition, the present invention also provides an electronic device, comprising a microprocessor and a memory connected to each other, wherein the microprocessor includes the lossless compression circuit for pulse waveform data.

[0015] Compared with the prior art, the present invention mainly has the following advantages: BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 Schematic diagram of the structure of a lossless compression circuit in an embodiment of the present invention.

[0016] Figure 2 The figure is a flow chart of the LZ77 compression algorithm adopted in the embodiment of the present invention.

[0017] Figure 3 This is a hash table sample of the LZ77 compression algorithm in an embodiment of the present invention.

[0018] Figure 4 Schematic diagram of the architecture of the LZ77 compressor in an embodiment of the present invention.

[0019] Figure 5 Schematic diagram of the pipeline implementation of the LZ77 compressor in an embodiment of the present invention.

[0020] Figure 6 Schematic diagram of the sliding window of the LZ77 compressor in an embodiment of the present invention.

[0021] Figure 7 1 is an example of Huffman tree construction in an embodiment of the present invention, wherein (a) is the initial Huffman tree; (b) is the Huffman tree after merging 1 and 2; (c) is the Huffman tree after merging 3 and 4; and (d) is the Huffman tree after merging 6 and 7.

[0022] Figure 8 It is a Deflate tree obtained based on the Huffman tree construction example in an embodiment of the present invention.

[0023] Fig. 9 Schematic diagram of the architecture of a Huffman encoder in an embodiment of the present invention.

[0024] Fig.10 Schematic diagram of the state transition of the finite state machine FSM in an embodiment of the present invention.

[0025] Fig.11 Schematic diagram of the Huffman encoder data output stream pipeline in an embodiment of the present invention.

[0026] Fig.12 Schematic diagram of the working flow of the lossless compression circuit in an embodiment of the present invention.

[0027] Legend: 1. Input flow control module; 2. Division module; 21. Counter; 22. Comparator; 3. LZ77 compressor; 4. Conversion module; 5. Verification module; 6. Huffman encoder; 7. Output flow control module. DETAILED DESCRIPTION

[0028] The lossless compression circuit for pulse waveform data in this embodiment is mainly based on hardware to implement the accelerated operation of the Deflate algorithm, such as Figure 1 As shown, the lossless compression circuit for pulse waveform data in this embodiment includes: Input flow control module 1, used to receive input data stream and implement flow control; A division module 2 is used to divide the input data stream into data blocks of fixed size; LZ77 compressor 3, used to implement LZ77 compression algorithm in Deflate algorithm to compress data blocks; A conversion module 4, used for converting the output of the LZ77 compression algorithm into a Huffman coded symbol; The check module 5 is used to receive the input data stream and calculate the length len and cyclic redundancy check code of the entire data stream; Huffman encoder 6, used to implement the Huffman encoding algorithm in the Deflate algorithm, and encode and output the data compressed by the LZ77 compression algorithm; Output flow control module 7, used to organize the encoded output according to the specified compression format specification and then output it; The input flow control module 1, the division module 2, and the LZ77 compressor 3 are connected in sequence, the LZ77 compressor 3 is connected to the input ends of the conversion module 4 and the verification module 5 respectively, the output ends of the conversion module 4 and the verification module 5 are connected to the input end of the Huffman encoder 6 respectively, and the output end of the Huffman encoder 6 is connected to the input end of the output flow control module 7. In this embodiment, the input data stream is a data stream in the AXI-Stream format, the input flow control module 1 receives the data input in the AXI-Stream format for buffering, the division module 2 divides the data stream into blocks and controls the flow of the data stream, the LZ77 compressor 3 implements the LZ77 data compression algorithm, the conversion module 4 converts the LZ77 compressed data into characters, the verification module 5 counts the number of data and calculates the CRC32 check code, the Huffman encoder 6 encodes the data processed by the LZ77 compressor 3, and finally puts the data into the output flow control module 7 for output flow control and transmits it to the next module in the AXI-Stream format.

[0029] As an optional implementation, the input flow control module 1 in this embodiment includes two 8-bit buffers for receiving data input in AXI-Stream format and implementing flow control, and the two 8-bit buffers are used to receive data input in AXI-Stream format in turn. The input flow control module 1 in this embodiment receives data input in AXI-Stream format in a double buffer structure through the above structure, which can effectively optimize the data processing flow, improve the response speed and data processing capability of the system, and enhance the stability and reliability of the system.

[0030] like Figure 1As shown, the partitioning module 2 of this embodiment includes a counter 21 and a comparator 22. The counter 21 is used to count according to the data received in the AXI-Stream format. The output end of the counter 21 and the preset threshold BLK_MIN are used as the input of the comparator 22. The comparator 22 is used to take out the data of the preset threshold BLK_MIN size from the input flow control module 1 as a data block when the count value of the counter 21 is equal to the preset threshold BLK_MIN. Output. In this embodiment, data less than the preset threshold BLK_MIN bytes is treated as a data block (DBLK) of the Deflate algorithm, and data greater than the preset threshold BLK_MIN bytes is divided into multiple data blocks DBLK, each of which does not exceed the preset threshold BLK_MIN. The output signal of the partitioning module 2 includes a data signal byte, indicating the end of the data block (eob), and a signal of the end of the data stream (eos). The above design of the partitioning module 2 ensures that the data is processed in an appropriate block size, and compression processing can be effectively performed regardless of the size of the original data stream. It should be noted that although the algorithm of dynamically adjusting the size of the data block DBLK can further improve the compression rate, the hardware implementation needs to consider the benefits and costs. Dynamically adjusting the block size will further increase the complexity of hardware implementation, and the compression rate improvement brought by the increased complexity is unstable. In the EEG signal compression task, the hardware resources are limited and the power consumption is restricted. It is not necessary to dynamically adjust the size of the data block DBLK in pursuit of compression rate.

[0031] LZ77 compressor 3 is used to implement the LZ77 compression algorithm in the Deflate algorithm to compress data blocks. The LZ77 compression algorithm is a classic compression algorithm that uses a dictionary to compress data. It was proposed by two Israeli engineers, Jacob Ziv and Abraham Lempel, in 1977. The core idea is that if the information in the string has appeared before, you only need to point out the position where it appeared before, and you can use relative indexes to represent these words. Figure 2As shown in the figure, the steps of the LZ77 compression algorithm include: (1) Calculate the hash value: use the hash function to calculate the hash value of the current byte and the next 2-byte neighboring data byte by byte; (2) Construct and maintain the hash table; (3) Match: search the hash table by the hash value to determine whether there is a repeated string in the sliding window and perform a match; if there are multiple identical strings, perform index calculation: select the string with the longest matching length (denoted as L) and the closest distance (proximity principle), calculate the distance between the starting positions of the two (denoted as D), and finally use the index composed of (original character, matching length L, distance D) to represent the content of the repeated string. If the repeated string is not found in the dictionary (no match), the original character of the current character can be directly output; (4) Output the compression result of the LZ77 compression algorithm. If the compression is completed, it ends, otherwise continue to perform compression until all characters are processed. Figure 3 is a hash table sample of the LZ77 compression algorithm in this embodiment. Figure 3 Taking the sentence shown as an example, for the first appearing character, the original character will be encoded because it cannot be matched. The subsequent "a" can be represented by (2,1), "aba" can be represented by (4,3), and "bac" can be indexed by (6,3). "ba" appears twice in the sliding window. According to the proximity principle, it is indexed by (3,2).

[0032] Figure 4 The micro-architecture of the LZ77 compressor 3 in this embodiment is shown, and its input includes: a byte of data [7:0]byte, a data valid signal en, a stream end signal eos (end of stream) and a data block end signal eob (end of block), and the output includes: the original character [7:0]byte or the index (D, L), the index (D, L) is represented by [7:0]len to indicate the matching length L, [3:0]dist to indicate the distance D, the original character [7:0]byte or the index (D, L) is distinguished using the type signal nlz (notlz77).

[0033] The pipeline implementation diagram of the LZ77 compressor 3 in this embodiment is shown in FIG. 1 . The use of pipeline design in hardware implementation not only improves the processing speed, but also facilitates design and debugging. Figure 5 As shown, the stages of pipeline design include: The receiving data phase A is used to receive the input signal and determine whether it is in the data block and whether the pipeline should be started; Delay processing stage B is used to introduce delays to balance the speed differences of different operations and ensure the synchronization of data in the pipeline; Hash calculation phase C, used to calculate the hash value of the current data block for fast matching in subsequent phases; Hash table read and write phase D is used to write the information of the current position into the hash table and read the possible matching position from the hash table based on the hash value; Matching phase E is used to prepare the data required for matching search; The search phase F is used to perform the actual match check, including searching the hash table through a sliding window based on the hash value, determining whether there are repeated strings in the sliding window and matching them; if there are multiple identical strings, select the string with the longest matching length L and the closest distance, calculate the distance D between the starting positions of the two, and finally use the index composed of (byte, L, D) to represent the content of the repeated string, where byte is the original character of the current data block; The matching decision stage G is used to make a decision based on the matching search result to determine whether to output the original character in the case of non-matching or output the index information in the case of matching; The original character encoding stages H and J are used to prepare the original characters for output in case of non-matching; The final output stage K is used to integrate the non-matching situation and the matching situation, using the type signal nlz to distinguish between the original character and the index information and generate the final output signal.

[0034] According to the principle of LZ77 compression algorithm, LZ77 compression algorithm has two key components: hash table and fast matching in sliding window, which are implemented in hardware using two separate RAMs. Set the search distance to 16383, the range covers the entire DBLK, use hash table matching search, and the hash table size is 4096; in order to map to the entire data block DBLK, the hash value width should be set to 14 bits. LZ77 compression algorithm looks for repeated patterns in data. In order to find matches effectively, it is necessary to be able to access previous data bytes. The sliding window module supports this search by storing the most recent bytes. At the same time, when looking for matches, it is usually necessary to consider the problem of byte boundary alignment. Figure 3 In the compression process example, the sliding window length is 6. Obviously, the setting of the window length will have a crucial impact on the compression efficiency. From the perspective of spatial compression efficiency, the larger the window, the more possible matches there are for the subsequent unprocessed data, and the higher the spatial compression efficiency. However, as the window becomes larger, the time efficiency will decrease rapidly. In this embodiment, after comprehensively considering the time efficiency and spatial compression rate, the window size of the LZ77 compression algorithm is set to 16384 (2 14). Specifically, in this embodiment, when searching in the hash table through a sliding window based on the hash value, the sliding window size used is 16384, the size of the hash value is 4096, the width of the hash value is 14 bits, the search distance of the search is 16383 to cover the entire data block, and four buffers BUFFER are used to store the lower 2 bits of the storage address of the data for searching. Figure 6 Schematic diagram of the sliding window of the LZ77 compressor in this embodiment. Figure 6 As shown in the figure, using four buffers can ensure that the algorithm can access the correct byte sequence under any given byte alignment. In order to improve the access speed, the data is stored in four buffers (BUFFER0~BUFFER3) in sequence according to the lower 2 bits of the storage address. When searching, matching searches can be performed in parallel in different buffers, and different reading methods of data in the BUFFER can be implemented according to the lower 2 bits of the read address, thereby improving the search speed.

[0035] In this embodiment, the conversion module 4 converts the output of the LZ77 compression algorithm into a Huffman coded symbol, including merging the original character and the matching length len into a symbol [8:0]symbol, and determining the number of extra bits required to encode these symbols according to a preset matching length partition comparison table; or merging the distance D in the index with the matching length len of the matching check to use a distance dist, and determining the number of extra bits required to encode these symbols according to a preset matching length partition comparison table, to form two data streams of distance [8:0]dist and symbol [8:0]symbol. The code value of the original character [7:0]byte is between 0 and 255, and the code value represented by the index is extended by a part of the bytes on this basis to represent the matching length, and 256 is used to represent the end. There is no need to compress short lengths, so the minimum compression length is agreed to be 3, 257 represents a matching length of 3, and so on. The maximum compression length is 258, so the maximum value is 511. Considering the distribution of the matching length, the smaller the value, the higher the probability of occurrence and the higher the secondary compression rate, so the matching length L is grouped. The matching length division comparison table used in this embodiment is shown in Table 1.

[0036] Table 1: Match length classification comparison table

[0037] According to the principle of LZ77 compression algorithm, there are two outputs of LZ77 compression algorithm, original characters or indexes (D, L), and Huffman encoder needs to encode real characters, so the conversion module 4 converts the output of LZ77 compression algorithm into Huffman coded symbols. The conversion process includes merging the original characters and the matching length len into a symbol [8:0] symbol, and calculating the number of additional bits required to encode these symbols (i.e., Bits in Table 1), and the distance D is also encoded in the above-mentioned way. This information is then used in Huffman encoder 6 to generate the final compressed data stream.

[0038] In this embodiment, after receiving the input data stream, the check module 5 calculates the length of the entire data stream and the cyclic redundancy check code (CRC32), and provides this information as output. CRC32 is a commonly used error detection method that can detect whether the data has changed during transmission or storage. Undoubtedly, other check algorithms can also be used as needed to detect whether the data has changed during transmission or storage.

[0039] Huffman encoder 6 is used to implement the Huffman coding algorithm in the Deflate algorithm, and encodes and outputs the data compressed by the LZ77 compression algorithm. The Huffman coding algorithm is a variable-length lossless compression coding method proposed by Dr. David A. Huffman in 1952 based on some coding ideas expounded by Shannon and Fano. It is an entropy coding algorithm constructed with minimum redundancy. The core of Huffman coding is the construction of the Huffman tree. The specific process is as follows: Step (1): According to n weight values ​​{W1, W2, …, W n}composes a forest of n binary trees F={T1,T2,…,T n}, where each binary tree T i Only those with weight W i , and its left and right subtrees are empty. Step (2): Select two binary trees T with the smallest root node weight from the forest F. i and T j (i, j are positive integers not greater than n), as the left and right subtrees to construct a new binary tree T o , T o The weight is W i +W j Step (3): Delete the left and right subtrees T of the new binary tree from the forest F. i and T j , and the new binary tree T oJoin the forest F. Step (4): Repeat steps (2) and (3) until there is only one tree in the forest F. This tree is the Huffman tree.

[0040] Assuming that the given character set is {1,2,4,6}, and its weight set is also {1,2,4,6}, the process of constructing the Huffman tree is as follows: Figure 7 and Figure 8 First, a forest of four binary tree nodes is formed based on these four weight values, as shown in Figure 7 As shown in (a) in the figure, then each time two binary trees 1 and 2 with the smallest node weights are selected from the forest, and a new binary tree is constructed with them as the left and right subtrees. The weight of the new binary tree is the sum of the left and right subtrees, which is 3. Figure 7 As shown in (b) in . Add the new binary tree to the forest F and delete its left and right subtrees from F, as shown in Figure 7 Repeat the above process until there is only one binary tree in F, which is the Huffman tree, as shown in (c). Figure 7 After completing the construction of the leaf node Huffman tree, the left and right branches of each binary tree in the tree are assigned values ​​0 and 1 respectively, and the Deflate tree based on the above Huffman tree construction example is obtained as follows Figure 8 As shown, then traverse the Huffman tree from the root node to each leaf node one by one, and the character code of the corresponding leaf node is the Huffman code of the character. However, in the constructed Huffman tree, swapping the left and right leaf nodes does not affect the optimality of the code. In other words, rotating the left and right branches of any node of the code tree (0 and 1 are swapped), which can also be called the left and right swap of the tree, does not affect the code length. This means that the constructed Huffman tree is not unique. In order to decode correctly, it is necessary to save the structural information of the Huffman tree, which increases the difficulty of storage.

[0041] The central idea of ​​the paradigm Huffman coding is to use certain mandatory conventions to reconstruct the structure of the Huffman coding tree with only a small amount of data. Convention 1: Numerical sequence property, which requires that codewords of the same length are binary descriptions of consecutive integers. Convention 2: In order to make the most of the coding space, the length of the first codeword is i Can be obtained from the last codeword of length i-1 It is concluded that: . Convention 3: The first code with the smallest codeword length starts from 0. Through the above convention, it is possible to restore the structure of the entire Huffman coding tree based on the length of each codeword. Drawing on the idea of ​​paradigm Huffman coding, in order to further reduce the amount of information that needs to be saved, the Deflate algorithm stipulates the use of a special Huffman tree, called the Deflate tree. According to RFC1951, the Deflate tree has the following new features compared to the Huffman tree: (a) The two leaf nodes of the same root node in the last layer, the left node character is smaller than the right node; (b) Except for the last layer, the right subtree cannot be a leaf node, it must be a branch node of the subtree; therefore, a Huffman tree can be uniquely constructed, and further observation shows that each layer has only one leaf node, and the codeword of the character can be obtained by recording the depth (codeword length) of the character.

[0042] There are two types of Huffman coding: dynamic Huffman coding and static Huffman coding. Dynamic Huffman coding is a method that continuously updates the Huffman tree during the data encoding process. This encoding method allows the encoder and decoder to gradually build and adjust the Huffman tree when processing data, thereby adapting to changes in the statistical characteristics of the data. Static Huffman coding is a Huffman tree that is pre-built based on the statistical characteristics of the data before encoding begins. This tree remains unchanged throughout the encoding process. Dynamic Huffman coding has a high compression rate but consumes a lot of resources. Static Huffman coding uses a pre-defined Huffman code table to quickly query the character encoding. The compression rate is not as good as dynamic Huffman coding, but the implementation method is simple.

[0043] The original data stream is compressed by the LZ77 compressor 3 and then processed by the conversion module 4 to form two data streams, distance [8:0]dist and symbol [8:0]symbol. The check module 5 statistically outputs the amount of compressed data and the CRC32 check code of the final data block. The above data are all used as input to the Huffman encoder 6 block. Fig. 9 Schematic diagram of the Huffman encoder 6 in this embodiment. Fig. 9As shown, the Huffman encoder 6 is used to perform Huffman encoding according to the two data streams of distance [8:0] dist and symbol [8:0] symbol output by the conversion module 4, and the length len and cyclic redundancy check code of the data stream output by the check module 5, and output the compressed data stream (4 bytes) with a data width of 4 bytes and a total of 32 bits according to the GZIP format requirements. In the implementation of the Huffman encoder 6 in this embodiment, it can be determined whether to use the static Huffman method or the dynamic Huffman method according to the length of the data stream. When the number of data in the data stream is greater than the MIN_LEN of the dynamic Huffman tree, a dynamic Huffman tree is established, including a character coding tree and a distance coding tree. When DBLK is small, a static Huffman tree is used for encoding. For the dynamic Huffman method, it is necessary to count the frequency and construct a deflate tree. In order to facilitate implementation, an array is used to simulate the construction process of the deflate tree, and the characters and distance information of the input stream, the cyclic check code and length of each block, and the Huffman tree are stored in three buffers respectively.

[0044] like Fig.10 As shown, the Huffman encoder 6 in this embodiment uses a finite state machine FSM to manage the data compression process, and the finite state machine FSM includes: Idle state R_IDLE: used to receive data and write into the data buffer buffer_data. If the length len of the data stream exceeds the preset threshold MIN_LEN, the dynamic Huffman flag is set to wait for the end EOB of the block input and start constructing the dynamic Huffman tree r_dynamic until the construction is completed huffman_ed. At this time, the read and write addresses are different and the preparation state R_PREPARE is entered. Preparation state R_PREPARE: used to prepare the GIZP header. If the data stream is a new data stream r_l_sos, it is first initialized to the GIZP header, initializes the first stage of the output stream pipeline, and then jumps to the GZIP header output state R_GZIP_HEADER_2~3; if it is not the latest data stream, first use the output stream pipeline to output a 3-bit data block start identifier, and if the dynamic Huffman method r_dynamic is used, jump to the dynamic Huffman tree header output state R_DYN_HEADER_1~3; if the static Huffman method is used, jump to the dynamic Huffman tree output state R_DYN_OUTTREE; the output stream pipeline is used to output the encoding result in a pipeline manner; in this embodiment, if it is the latest data stream (r_l_sos), it is first initialized to the GIZP header ('h00088B1F, fixed value, where ID1 = 31 (0x1F), ID2 = 139 (0x8B), indicating the GZIP format, CM = 08, indicating the DEFLATE method), and then jump to different states depending on whether the dynamic Huffman tree (s_dynamic) is used; GZIP header output state R_GZIP_HEADER_2~3: used to output the header information required by the GZIP file format. If the dynamic Huffman method is used, it jumps to the dynamic Huffman tree header output state R_DYN_HEADER_1~3, otherwise it jumps to the dynamic Huffman tree output state R_DYN_OUTTREE; Dynamic Huffman tree head output state R_DYN_HEADER_1~3: used to output the description information of the Huffman tree, and after output, jump to the dynamic Huffman tree output state R_DYN_OUTTREE:; Dynamic Huffman tree output state R_DYN_OUTTREE: used to output the constructed Huffman tree, and jump to the Huffman coding output state R_HUFFMAN_OUT after output; Huffman coding output state R_HUFFMAN_OUT: used to read the data buffer buffer_data, take out the LZ77 coded data, convert it into Huffman coding, and output it to the buffer. After output, jump to the end block symbol output state R_EOB_SYMBOL; End block symbol output state R_EOB_SYMBOL: used to output the block end symbol EOB indicating the end of the data block in LZ77 compression, and jump to the post-processing state R_POST_PARE after output; Post-processing state R_POST_PARE: used to adjust the read and write pointers to prepare for the next compression. If the output block ends, it jumps to the GZIP tail output state R_GZIP_FOOTER_1~3, otherwise it jumps to the idle state R_IDLE; GZIP footer output state R_GZIP_FOOTER_1~3: used to output the footer information required by the GZIP file format, including the CRC checksum and the original data length, and jump to the idle state R_IDLE after output.

[0045] In order to improve the data processing speed, for design and debugging considerations, the data output stream of the Huffman encoder 6 in this embodiment uses a pipeline design. Fig.11 FIG. 4 is a schematic diagram of a data output pipeline of the Huffman encoder 6 in this embodiment. Fig.11 As shown, the output stream pipeline in this embodiment includes the following stages: Preliminary processing stage A, reads the raw data from the buffer (buffer_data) and performs preliminary processing according to the data type: sets the output enable signal, determines whether it is the beginning, end or end of the stream, extracts the symbol data and the number of additional bits (Bits in Table 1); Table lookup phase B, querying the Huffman table. If a static Huffman tree is used, this phase will query the static Huffman table to obtain the Huffman code and length of each symbol, and process the dynamic flags related to the dynamic Huffman tree; Coding stage C, obtain Huffman code, according to the results of dynamic Huffman tree or static Huffman table, obtain the Huffman code and code length of each symbol and distance. If it is a dynamic Huffman tree, reverse bit operation will be used to obtain the correct code; High and low bit merging stage D, bit stream merging, merging high and low bit Huffman codes in the same cycle, merging the code and length information from the encoding stage C into a unified bit stream, and calculating the number of merged bits; In the bitstream merging stage E, the bitstream is merged across clock cycles, 32 bits of data are output, the shift register t_bits is used to temporarily store the encoding, and the bit alignment is performed to ensure that the output data is aligned in bytes. If the number of valid bits in the shift register t_bitc is greater than 32, the lower 32 bits of the merged bitstream are output to the register e_data in the manner of low byte to high byte, and the part exceeding 32 bits is right-shifted to the lower bit of the shift register t_bits. At the same time, the byte valid signal byte_cnt is used to indicate that the bytes in the 32 bits are valid, and the stream end signal last is generated to indicate the end of the current block, and the final GZIP compressed AXI-Stream format output stream is generated, which is composed of the output signal e_en, the lower 32 bits of the bitstream of the register e_data, the byte valid signal byte_cnt, and the stream end signal last. So far, the output signals e_en, e_data, byte_cnt, and last of Stage E constitute the output stream in the AXI-Stream format, and the compressed data is transmitted to the signal output module under the control of the output flow control module.

[0046] In this embodiment, the output flow control module 7 includes an internal buffer for caching output data, and dynamically controls the input data flow according to the filling condition of the internal buffer based on the output flow control signal i_stall_n. When the internal buffer is close to full, the output flow control signal i_stall_n is set to 0, thereby notifying the sender to suspend sending data to achieve elastic flow control. The output flow control module 7 can dynamically control the input data flow according to the filling condition of the internal buffer by outputting the flow control signal i_stall_n. When the buffer is close to full, the output flow control signal i_stall_n is set to 0, thereby notifying the sender to suspend sending data, achieving elastic flow control, ensuring that data can be smoothly transmitted between components of different rates, and preventing data loss or buffer overflow caused by rate mismatch.

[0047] Fig.12 FIG. 1 is a schematic diagram of the working flow of the lossless compression circuit for pulse waveform data in this embodiment, see Fig.12It can be seen that the lossless compression circuit in this embodiment adopts a pipeline design, wherein the input flow control module 1 constitutes the first stage of the pipeline, the division module 2 constitutes the second stage of the pipeline, the LZ77 compressor 3 constitutes the third stage of the pipeline, the conversion module 4 and the verification module 5 both constitute the fourth stage of the pipeline, the Huffman encoder 6 constitutes the fifth stage of the pipeline, and the output flow control module 7 constitutes the sixth stage of the pipeline. The operation of the lossless compression circuit for pulse waveform data in this embodiment includes: (1) the input flow control module 1 receives data in a double buffer structure to ensure smooth data input; (2) the division module 2 uses a counter to count the data, then divides it into blocks, and adds a block end signal eob; (3) the LZ77 compressor 3 compresses the data in a pipeline form, the first stage receives the data, and after 10 The compressed data after the pipeline stage has two forms, the original code or the index pair (D, L); (4) the check module 5 continuously calculates the CRC32 check code and counts the length of the statistical data flow; (5) the conversion module 4 maps the original character + matching length to 0~285 for the LZ77 compressed data according to the rules shown in Table 1, and uses similar rules for the matching distance. After mapping, it is transmitted to the Huffman encoder; (6) the Huffman encoder 6 continues to receive the converted data in the idle state. When the block ends (eob), if the Huffman tree needs to be constructed, the dist and symbol trees are constructed respectively. Only after the construction is completed can the next state be entered. The subsequent states are further processed and finally the information of the coding tree and the encoded data output stream are output; (7) the output flow control module 7 performs elastic flow control on the output stream.

[0048] In summary, the lossless compression circuit for pulse waveform data in this embodiment realizes a hardware implementation of the Deflate algorithm, so that the Deflate algorithm can be combined with the LZ77 compression algorithm and the Huffman coding algorithm to realize lossless compression of EEG signals based on hardware. In view of the high complexity of the Deflate algorithm, the implementation process needs to process a large number of bit operations and data flow management requires precise control and optimization, which increases the difficulty of development and verification, and the dependency of LZ77 compression and Huffman coding makes parallelization complicated. In order to maximize the use of hardware resources, the lossless compression circuit for pulse waveform data in this embodiment uses a finite state machine (FSM) combined with a pipeline in implementation. In addition, LZ77 compression requires a sliding window to find repeated string sequences, and an efficient access management strategy needs to be designed to support fast data access. In this embodiment, the lossless compression circuit for pulse waveform data uses a multi-buffer method for fast matching. When the dynamic Huffman coding algorithm is implemented, the lossless compression circuit for pulse waveform data in this embodiment uses an array to construct a deflate tree, which reduces the complexity of address calculation and can access multiple elements in the array in parallel, while performing comparison and exchange operations, thereby accelerating the deflate tree construction process.

[0049] In addition, this embodiment also provides a chip, including a data input circuit, a data compression circuit and a data processing circuit connected in sequence, and the data compression circuit is the lossless compression circuit for pulse waveform data.

[0050] In addition, this embodiment also provides an electronic device, including a microprocessor and a memory connected to each other, wherein the microprocessor includes the lossless compression circuit for pulse waveform data.

[0051] Those skilled in the art should understand that the technical solutions provided by the embodiments of the present application may be in the form of methods, systems, or computer program products. Therefore, the present application may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present application may take the form of a computer program product implemented on one or more computer-readable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program codes. The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the process Figure 1 A process or multiple processes and / or boxes Figure 1 These computer program instructions can also be stored in a computer-readable memory that can guide a computer or other programmable data processing device to work in a specific way, so that the instructions stored in the computer-readable memory produce a product including an instruction device, which implements the functions specified in the process. Figure 1 A process or multiple processes and / or boxes Figure 1 These computer program instructions can also be loaded onto a computer or other programmable data processing device, so that a series of operation steps are executed on the computer or other programmable device to produce a computer-implemented process, so that the instructions executed on the computer or other programmable device provide for implementing the process in the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0052] The above is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above embodiments. All technical solutions under the concept of the present invention belong to the protection scope of the present invention. It should be pointed out that for ordinary technicians in this technical field, some improvements and modifications without departing from the principle of the present invention should also be regarded as the protection scope of the present invention.

Claims

1. A lossless compression circuit for pulse waveform data, characterized in that: include: An input flow control module (1), used for receiving an input data stream and implementing flow control; A partitioning module (2), used for partitioning the input data stream into data blocks of fixed size; LZ77 compressor (3), used to implement the LZ77 compression algorithm in the Deflate algorithm to compress the data block; A conversion module (4), used for converting the output of the LZ77 compression algorithm into a Huffman coded symbol; A check module (5), used for receiving an input data stream and calculating a length len of the entire data stream and a cyclic redundancy check code; Huffman encoder (6), used to implement the Huffman encoding algorithm in the Deflate algorithm, and to encode and output the data compressed by the LZ77 compression algorithm; An output flow control module (7) is used to organize the encoded output according to the specified compression format specification and then output it; The input flow control module (1), the division module (2), and the LZ77 compressor (3) are connected in sequence; the LZ77 compressor (3) is respectively connected to the input ends of the conversion module (4) and the verification module (5); the output ends of the conversion module (4) and the verification module (5) are respectively connected to the input end of the Huffman encoder (6); the output end of the Huffman encoder (6) is connected to the input end of the output flow control module (7); the lossless compression circuit adopts a pipeline design, wherein the input flow control module (1) constitutes the first stage of the pipeline, the division module (2) constitutes the second stage of the pipeline, the LZ77 compressor (3) constitutes the third stage of the pipeline, the conversion module (4) and the verification module (5) both constitute the fourth stage of the pipeline, the Huffman encoder (6) constitutes the fifth stage of the pipeline, and the output flow control module (7) constitutes the sixth stage of the pipeline.

2. The lossless compression circuit for pulse waveform data according to claim 1, characterized in that: The input flow control module (1) comprises two 8-bit buffers for receiving data input in AXI-Stream format and implementing flow control, wherein the two 8-bit buffers are used to receive data input in AXI-Stream format in turn.

3. The lossless compression circuit for pulse waveform data according to claim 1, characterized in that: The partitioning module (2) comprises a counter (21) and a comparator (22), wherein the counter (21) is used to count data received in an AXI-Stream format, wherein an output end of the counter (21) and a preset threshold value BLK_MIN are used together as inputs of the comparator (22), and when the count value of the counter (21) is equal to the preset threshold value BLK_MIN, the comparator (22) is used to take out data of a size of the preset threshold value BLK_MIN from the input flow control module (1) and output it as a data block.

4. The lossless compression circuit for pulse waveform data according to claim 1, characterized in that: The LZ77 compressor (3) adopts a pipeline design, and the stages of the pipeline design include: The receiving data phase A is used to receive the input signal and determine whether it is in the data block and whether the pipeline should be started; Delay processing stage B is used to introduce delays to balance the speed differences of different operations and ensure the synchronization of data in the pipeline; Hash calculation phase C, used to calculate the hash value of the current data block for fast matching in subsequent phases; Hash table read and write phase D is used to write the information of the current position into the hash table and read the possible matching position from the hash table based on the hash value; Matching phase E is used to prepare the data required for matching search; The search phase F is used to perform the actual match check, including searching the hash table through a sliding window based on the hash value, determining whether there are repeated strings in the sliding window and matching them; if there are multiple identical strings, select the string with the longest matching length L and the closest distance, calculate the distance D between the starting positions of the two, and finally use the index composed of (byte, L, D) to represent the content of the repeated string, where byte is the original character of the current data block; The matching decision stage G is used to make a decision based on the matching search result to determine whether to output the original character in the case of non-matching or output the index information in the case of matching; The original character encoding stages H and J are used to prepare the original characters for output in case of non-matching; The final output stage K is used to integrate the non-matching situation and the matching situation, using the type signal nlz to distinguish between the original character and the index information and generate the final output signal.

5. The lossless compression circuit for pulse waveform data according to claim 4, characterized in that: When searching in the hash table through a sliding window based on the hash value, the sliding window size used is 16384, the size of the hash value is 4096, the width of the hash value is 14 bits, the search distance of the search is 16383 to cover the entire data block, and four buffers BUFFER are used to store the lower 2 bits of the storage address of the data for searching.

6. The lossless compression circuit for pulse waveform data according to claim 4, characterized in that: The conversion module (4) converts the output of the LZ77 compression algorithm into a Huffman coded symbol, including combining the original character and the matching length len into a symbol [8:0]symbol, and determining the number of additional bits required to encode these symbols according to a preset matching length division comparison table; Alternatively, the distance D in the index is combined with the match length len of the match check to form a distance dist, and the number of additional bits required to encode these symbols is determined based on a preset match length partition comparison table to form two data streams, distance [8:0] dist and symbol [8:0] symbol.

7. The lossless compression circuit for pulse waveform data according to claim 6, characterized in that: The Huffman encoder (6) is used to perform Huffman encoding on the two data streams of distance [8:0]dist and symbol [8:0]symbol output by the conversion module (4), and the length len and cyclic redundancy check code of the data stream output by the check module (5), and output a compressed data stream with a data width of 4 bytes and a total of 32 bits according to the GZIP format requirements. The Huffman encoder (6) uses a finite state machine FSM to manage the data compression process. The finite state machine FSM includes: Idle state R_IDLE: used to receive data and write into the data buffer buffer_data. If the length len of the data stream exceeds the preset threshold MIN_LEN, the dynamic Huffman flag is set to wait for the end EOB of the block input and start constructing the dynamic Huffman tree r_dynamic until the construction is completed huffman_ed. At this time, the read and write addresses are different and the preparation state R_PREPARE is entered. Preparation state R_PREPARE: used to prepare the GIZP header. If the data stream is a new data stream r_l_sos, it is first initialized to the GIZP header, initializes the first stage of the output stream pipeline, and then jumps to the GZIP header output state R_GZIP_HEADER_2~3; if it is not the latest data stream, first use the output stream pipeline to output a 3-bit data block start identifier, and if the dynamic Huffman method r_dynamic is used, jump to the dynamic Huffman tree header output state R_DYN_HEADER_1~3; if the static Huffman method is used, jump to the dynamic Huffman tree output state R_DYN_OUTTREE; the output stream pipeline is used to output the encoding result in a pipeline manner; GZIP header output state R_GZIP_HEADER_2~3: used to output the header information required by the GZIP file format. If the dynamic Huffman method is used, it jumps to the dynamic Huffman tree header output state R_DYN_HEADER_1~3, otherwise it jumps to the dynamic Huffman tree output state R_DYN_OUTTREE; Dynamic Huffman tree head output state R_DYN_HEADER_1~3: used to output the description information of the Huffman tree, and after output, jump to the dynamic Huffman tree output state R_DYN_OUTTREE:; Dynamic Huffman tree output state R_DYN_OUTTREE: used to output the constructed Huffman tree, and jump to the Huffman coding output state R_HUFFMAN_OUT after output; Huffman coding output state R_HUFFMAN_OUT: used to read the data buffer buffer_data, take out the LZ77 coded data, convert it into Huffman coding, and output it to the buffer. After output, jump to the end block symbol output state R_EOB_SYMBOL; End block symbol output state R_EOB_SYMBOL: used to output the block end symbol EOB indicating the end of the data block in LZ77 compression, and jump to the post-processing state R_POST_PARE after output; Post-processing state R_POST_PARE: used to adjust the read and write pointers to prepare for the next compression. If the output block ends, it jumps to the GZIP tail output state R_GZIP_FOOTER_1~3, otherwise it jumps to the idle state R_IDLE; GZIP footer output state R_GZIP_FOOTER_1~3: used to output the footer information required by the GZIP file format, including CRC checksum and original data length, and jump to the idle state R_IDLE after output; The output stream pipeline includes the following stages: Initial processing stage A, reads the raw data from the buffer and performs preliminary processing according to the data type: sets the output enable signal, determines whether it is the beginning, end or end of the stream, extracts the symbol data and the number of additional bits; Table lookup phase B, querying the Huffman table. If a static Huffman tree is used, this phase will query the static Huffman table to obtain the Huffman code and length of each symbol, and process the dynamic flags related to the dynamic Huffman tree; Coding stage C, obtain Huffman code, according to the results of dynamic Huffman tree or static Huffman table, obtain the Huffman code and code length of each symbol and distance. If it is a dynamic Huffman tree, reverse bit operation will be used to obtain the correct code; High and low bit merging stage D, bit stream merging, merging high and low bit Huffman codes in the same cycle, merging the code and length information from the encoding stage C into a unified bit stream, and calculating the number of merged bits; In the bitstream merging stage E, the bitstream is merged across clock cycles, 32 bits of data are output, and the shift register t_bits is used to temporarily store the encoding. The bits are aligned to ensure that the output data is aligned in bytes. If the number of valid bits in the shift register t_bitc is greater than 32, the lower 32 bits of the merged bitstream are output to the register e_data in a low-byte to high-byte manner. The part exceeding 32 bits is right-shifted to the low bit of the shift register t_bits. At the same time, the byte valid signal byte_cnt is used to indicate that the bytes in the 32 bits are valid, and the stream end signal last is generated to indicate the end of the current block. The final output stream in the AXI-Stream format after GZIP compression is generated, which is composed of the output signal e_en, the lower 32 bits of the bitstream of the register e_data, the byte valid signal byte_cnt, and the stream end signal last.

8. The lossless compression circuit for pulse waveform data according to claim 1, characterized in that: The output flow control module (7) includes an internal buffer for caching output data, and dynamically controls the input data flow according to the filling status of the internal buffer based on the output flow control signal i_stall_n. When the internal buffer is close to full, the output flow control signal i_stall_n is set to notify the sender to suspend sending data to achieve elastic flow control.

9. A chip comprising a data input circuit, a data compression circuit and a data processing circuit connected in sequence, characterized in that: The data compression circuit is a lossless compression circuit for pulse waveform data as described in any one of claims 1 to 8.

10. An electronic device comprising a microprocessor and a memory connected to each other, characterized in that: The microprocessor comprises the lossless compression circuit for pulse waveform data as claimed in any one of claims 1 to 8.

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