MIL test method and device and computer equipment
By selecting a specified instruction set from the instruction library during the control strategy concept design stage, analyzing the instruction file to generate instruction information, generating virtual signals for simulation operations, comparing the simulation results with the expected results to generate test results, the problem of insufficient testing efficiency and coverage in the existing technology is solved, and high-precision testing is achieved.
Patent Information
- Application Number
- CN202411980947.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-30
- Publication Date
- 2025-05-06
AI Technical Summary
The prior art is difficult to conduct comprehensive and precise testing during the control strategy concept design stage, and it depends on real vehicles and hardware test platforms, with insufficient efficiency and coverage.
By selecting the specified instruction set from the instruction library, analyzing the instruction file to generate instruction information, generating virtual signals for simulation operations, comparing the simulation results with the expected results to generate test results.
Comprehensive and accurate testing is achieved in the early stages of the concept design of control strategy, improving test coverage and accuracy, reducing dependence on expensive test equipment, and reducing testing costs.
Smart Images
Figure CN119937508A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present application relate to the field of simulation testing technology, and in particular to a MIL testing method, apparatus, and computer equipment. Background Art
[0002] In traditional vehicle controller testing, manual vehicle testing is the main testing method. This method involves personnel manually testing according to the functions of the control module, which is inefficient and has poor reliability. The problem with this method is that the testing process is cumbersome, some characteristics are difficult to detect, and a large amount of data needs to be manually processed and input, and the intermediate testing process is easily affected by human factors. Although current automated testing methods such as hardware in the loop (HIL) testing solutions have improved the above problems, they are highly dependent on equipment and are difficult to apply in the conceptual design stage of the control strategy. Physical controllers and hardware testing platforms are required to complete the testing process.
[0003] The prior art provides a method for HIL automated testing, but this method requires hardware such as a real vehicle, controller hardware, and a hardware test platform, and cannot be used for simulation testing in the more advanced control strategy concept design stage. Summary of the invention
[0004] In view of this, embodiments of the present application provide a MIL testing method, apparatus, and computer device for achieving comprehensive and accurate testing in the early stages of control strategy conceptual design.
[0005] A first aspect provides a MIL testing method comprising:
[0006] According to the function to be tested, a specified instruction set is selected from a plurality of instruction sets stored in an instruction library, wherein the specified instruction set is an instruction set corresponding to the function to be tested, and the specified instruction set includes a plurality of instruction files;
[0007] Parsing each of the instruction files to generate multiple instruction information;
[0008] Generate a virtual signal according to the instruction information;
[0009] Performing simulation operations on the plurality of virtual signals to generate a plurality of simulation results;
[0010] Compare each simulation result with the corresponding expected result set in advance to generate a test result.
[0011] In a possible implementation, the method further includes:
[0012] A test report is generated according to the test result, and an archive file is archived, wherein the archive file includes the test result, the test report and a recorded test process file.
[0013] In a possible implementation, the plurality of instruction information includes a time series, a signal list, and a relationship between a signal value and a time series;
[0014] The parsing of each instruction file to generate a plurality of instruction information includes:
[0015] Parsing the time series from the instruction file;
[0016] Parsing the signal list from the instruction file;
[0017] The relationship between the signal value and the time series is parsed from the instruction file.
[0018] In a possible implementation manner, generating a virtual signal according to the instruction information includes:
[0019] Initialize the instruction information specified by the test requirement according to the test requirement;
[0020] Performing signal simulation on the initialized instruction information to generate a simulation signal;
[0021] The analog signal is packaged and encapsulated to generate the virtual signal.
[0022] In a possible implementation, the performing simulation operations on the plurality of virtual signals to generate a plurality of simulation results includes:
[0023] According to the obtained simulation step length and simulation duration, simulation operations are performed on the multiple virtual signals to generate multiple simulation results.
[0024] In a possible implementation, comparing each simulation result with a corresponding preset expected result to generate a test result includes:
[0025] If each simulation result is compared to the corresponding expected result and they are the same, the test result is a successful test;
[0026] If at least one simulation result is compared to a corresponding expected result and is different, the test result is a test failure.
[0027] A second aspect provides a MIL testing device, comprising:
[0028] A test instruction injection module is used to select a specified instruction set from multiple instruction sets stored in an instruction library according to the function to be tested, wherein the specified instruction set is an instruction set corresponding to the function to be tested, and the specified instruction set includes multiple instruction files; each of the instruction files is parsed to generate multiple instruction information;
[0029] A virtual bus, used to generate a virtual signal according to the instruction information;
[0030] A virtual controller, used for performing simulation operations on the plurality of virtual signals to generate a plurality of simulation results;
[0031] The test result evaluation module is used to compare each simulation result with the corresponding preset expected result to generate a test result.
[0032] In a possible implementation, the test result evaluation module is further used to generate a test report according to the test result, and archive the archive file, wherein the archive file includes the test result, the test report and the recorded test process file.
[0033] The third aspect provides a computer device, comprising: one or more processors; a memory; and one or more computer programs, wherein the one or more computer programs are stored in the memory, and the one or more computer programs include instructions, which, when executed by the computer device, enable the computer device to perform the MIL testing method in the above-mentioned first aspect or any possible implementation of the first aspect.
[0034] A fourth aspect provides a computer-readable storage medium, which includes a stored program, wherein when the program is run, the computer device where the computer-readable storage medium is located is controlled to execute the MIL testing method in the above-mentioned first aspect or any possible implementation of the first aspect.
[0035] In the technical solution provided in the embodiment of the present application, each instruction file of a specified instruction set obtained from an instruction library is parsed to generate multiple instruction information, a virtual signal is generated according to the instruction information, simulation operations are performed on the multiple virtual signals to generate multiple simulation results, and each simulation result is compared with a corresponding expected result set in advance to generate a test result. The MIL test method of the embodiment of the present application does not rely on a real vehicle, controller hardware, and hardware test platform, thereby achieving comprehensive and accurate testing in the early stages of control strategy conceptual design, thereby improving test coverage and accuracy. BRIEF DESCRIPTION OF THE DRAWINGS
[0036] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.
[0037] Figure 1 A flowchart of a MIL testing method provided in an embodiment of the present application;
[0038] Figure 2 A schematic diagram of the structure of a MIL testing device provided in an embodiment of the present application;
[0039] Figure 3 A schematic diagram of building a MIL test environment in an embodiment of the present application;
[0040] Figure 4 Another schematic diagram of building a MIL test environment in an embodiment of the present application;
[0041] Figure 5 A schematic diagram of the structure of a computer device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0042] In order to better understand the technical solution of the present application, the embodiments of the present application are described in detail below with reference to the accompanying drawings.
[0043] It should be clear that the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.
[0044] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms "a", "said" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings.
[0045] It should be understood that the term "and / or" used in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.
[0046] Figure 1 A flow chart of a model in the loop (MIL) testing method provided in an embodiment of the present application is shown in FIG. Figure 1 As shown, the method includes:
[0047] Step 102: According to the function to be tested, a designated instruction set is selected from a plurality of instruction sets stored in an instruction library, wherein the designated instruction set is an instruction set corresponding to the function to be tested, and the designated instruction set includes a plurality of instruction files.
[0048] In an embodiment of the present application, an instruction library may be pre-established, and the instruction library may include multiple instruction sets. Since a test function needs to be implemented through multiple instruction files, and each test function corresponds to multiple instruction files, the multiple instruction files corresponding to each test function may be formed into an instruction set, and each instruction set corresponds to a test function, which may be implemented by multiple instruction files in the corresponding instruction set. A single file instruction may include multiple instruction information, wherein the multiple instruction information may include a time series, a signal list, and a relationship between the change of the signal value and the time series. Table 1 shows the specific content of a single file instruction:
[0049] Table 1
[0050] time RealSoc BatSOC AC_PINReq_Raw BatThrmIMnomntSts BatMaxTemo BattCrctTemolnRaw 1 15 15 0 0 2 5 9 1 0 3 15 15 4 15 15 4 5 15 15 4 50 30 16 15 15 1 0 44 17 15 15 4 2 15 15 4 50 30 29 15 15 1 0 20 30 15 15 0 4 31 9 9 1 4
[0051] As shown in Table 1 above, "time" is a time series; "RealSoc", "BatSOC", "AC_PINReq_Raw", "BatThrmMngmntSts", "BatMaxTemp" and "BattCrctTemplnRaw" are signal lists, and each signal list may include a signal value corresponding to a time series. For example, "RealSoc" includes a signal value of 15 corresponding to time series 1 and a signal value of 9 corresponding to time series 2, and the relationship between the change of the signal value and the time series is from the signal value of 15 corresponding to time series 1 to the signal value of 9 corresponding to time series 2.
[0052] Before starting the test, a function to be tested may be selected from a plurality of test functions to test the function to be tested. Since each instruction set stored in the instruction library corresponds to a test function, an instruction set corresponding to the function to be tested may be selected from the instruction library, and the selected instruction set corresponding to the function to be tested may be referred to as a designated instruction set.
[0053] Step 104: parse each instruction file to generate multiple instruction information.
[0054] Specifically, step 104 may include:
[0055] Step 1042: parse the time series from the instruction file.
[0056] Step 1044: parse the signal list from the instruction file.
[0057] Step 1046: parse the change relationship between the signal value and the time series from the instruction file.
[0058] By executing step 1042 to step 1046, the parsing of a single instruction file can be realized. Step 1042 to step 1046 can be repeatedly executed to complete the parsing of multiple instruction files.
[0059] Step 106: Generate a virtual signal according to the instruction information.
[0060] Specifically, step 106 may include:
[0061] Step 1062: Initialize the instruction information specified by the test requirements according to the test requirements.
[0062] As shown in Table 1 above, for example, the test requirement is to initialize the signal value of "RealSoc" corresponding to time series 2, then according to the above test requirement, the signal value 9 of "RealSoc" corresponding to time series 2 is initialized to 0. In actual applications, other test requirements can also be set, which are not listed here one by one.
[0063] Step 1064: Perform signal simulation on the initialized instruction information to generate a simulation signal.
[0064] As an optional solution, hard-wire signal simulation may be performed on the initialized instruction information to generate a hard-wire simulation signal.
[0065] As another optional solution, CAN signal simulation may be performed on the initialized instruction information to generate a CAN simulation signal.
[0066] As an optional solution, a LIN signal simulation may be performed on the initialized command signal to generate a LIN simulation signal.
[0067] At least one of the three signal simulation methods mentioned above may be performed to generate a simulation signal in step 1064. In practical applications, other signal simulation methods may be used to perform signal simulation to generate other types of simulation signals, which are not listed here one by one.
[0068] The embodiments of the present application can simulate various types of signals according to different control strategy requirements, thereby achieving efficient simulation testing.
[0069] Step 1066: Pack and encapsulate the analog signal to generate a virtual signal.
[0070] The virtual signal is a signal that can be directly recognized by the controller and is used for simulation testing.
[0071] Step 108: Perform simulation operations on the multiple virtual signals to generate multiple simulation results.
[0072] Specifically, step 108 may include: performing simulation operations on multiple virtual signals to generate multiple simulation results according to the obtained simulation step size and simulation duration.
[0073] Step 110: Compare each simulation result with a corresponding preset expected result to generate a test result.
[0074] In the embodiment of the present application, a corresponding expected result may be pre-set for each simulation result, and the expected result may be set in an instruction file, and the instruction file may include the expected result.
[0075] Specifically, step 110 may include: if it is compared that each simulation result is the same as the corresponding expected result, the test result is a test success; if it is compared that at least one simulation result is different from the corresponding expected result, the test result is a test failure.
[0076] In the embodiment of the present application, the purpose of executing step 110 is to preliminarily verify whether the functional logic of the simulation test of the controller is correct. If the test result is a test success, it indicates that the functional logic of the simulation test is correct; if the test result is a test failure, it indicates that the functional logic of the simulation test is incorrect.
[0077] As an optional solution, the method further includes:
[0078] Step 112: Generate a test report based on the test results, and archive the archive file, which includes the test results, the test report and the recorded test process file.
[0079] In the embodiment of the present application, the test results can be analyzed to generate a test report; the test process files can be recorded during the test process; and the test results, test report and recorded test process files can be archived.
[0080] As an optional solution, for example, the test process file may include an instruction file, instruction information, a signal injection start flag and a signal injection end flag of the instruction information; for another example, the test process file may also include a test case and a test script, etc. In actual applications, the test process file may also include other files, which are not listed here one by one.
[0081] After the simulation test starts, the recording function will be automatically turned on to record the test cases, test scripts, instruction files, instruction information, the signal injection start flag and the signal injection end flag of the instruction information, and save the test results, test reports and recorded test cases, test scripts, instruction files, instruction information, the signal injection start flag and the signal injection end flag of the instruction information as playback files to realize archiving of archived files.
[0082] The embodiments of the present application realize automated test result evaluation, test report generation, and archiving of archived files, thereby improving the integrity and traceability of the test process.
[0083] In the technical solution provided in the embodiment of the present application, each instruction file of a specified instruction set obtained from an instruction library is parsed to generate multiple instruction information, a virtual signal is generated according to the instruction information, simulation operations are performed on the multiple virtual signals to generate multiple simulation results, and each simulation result is compared with a corresponding expected result set in advance to generate a test result. The MIL test method of the embodiment of the present application does not rely on a real vehicle, controller hardware, and hardware test platform, thereby achieving comprehensive and accurate testing in the early stages of control strategy conceptual design, thereby improving test coverage and accuracy.
[0084] In the MIL testing method of the embodiment of the present application, multiple simulation results are generated by automatically performing simulation operations on multiple virtual signals, and each simulation result is compared with a corresponding expected result set in advance to generate a test result, which significantly improves the efficiency of the test and reduces manual intervention and related risks.
[0085] In the embodiment of the present application, compared with the HIL testing method that relies on hardware in the related art, the use of the MIL testing method reduces the dependence on expensive testing equipment, thereby reducing the testing cost.
[0086] The technical solution of the embodiment of the present application proposes an automated MIL testing method based on a virtual simulation platform, which takes into account the automated testing characteristics of the software and the practicality of the HIL test, and also ensures the application effect and technical leadership in the field of vehicle control system design and testing.
[0087] The automated MIL test provided in the embodiments of the present application can significantly improve test efficiency, reduce repetitive work, and be able to perform testing in an unattended manner, thereby achieving rapid feedback and continuous integration.
[0088] Figure 2 A schematic diagram of the structure of a MIL test device provided in an embodiment of the present application is shown in FIG. Figure 2As shown, the device includes: a test instruction injection module 11, a virtual bus 12, a controller 13 and a test result evaluation module 14. The test instruction injection module 11 is connected to the virtual bus 12, the virtual bus 12 is connected to the controller 13, and the controller 13 is connected to the test result evaluation module 14.
[0089] The test instruction injection module 11 is used to select a specified instruction set from multiple instruction sets stored in the instruction library according to the function to be tested, the specified instruction set is an instruction set corresponding to the function to be tested, and the specified instruction set includes multiple instruction files; each of the instruction files is parsed to generate multiple instruction information; the virtual bus 12 is used to generate a virtual signal according to the instruction information; the controller 13 is used to simulate the multiple virtual signals to generate multiple simulation results; the test result evaluation module 14 is used to compare each simulation result with the corresponding expected result set in advance to generate a test result.
[0090] In the embodiment of the present application, the test instruction injection module 11 injects multiple instruction information into the virtual bus 12. As an optional solution, the test instruction injection module 11 can inject multiple instruction information into the virtual bus 12 by manual injection. Specifically, the user inputs a manual instruction through the instruction interaction panel, and the test instruction injection module 11 manually injects multiple instruction information into the instruction information according to the manual instruction. As another optional solution, the test instruction injection module 11 can inject multiple instruction information into the virtual bus 12 by automatic injection.
[0091] Specifically, the virtual bus 12 is used to clear all signals; initialize the instruction information specified by the test requirements according to the test requirements; perform signal simulation on the initialized instruction information to generate analog signals; package the analog signals to generate virtual signals; monitor the simulation step and simulation duration of the controller 13, and send the virtual signals to the controller 13 according to the simulation step and simulation duration, so that the controller 13 can perform simulation operations on multiple virtual signals to generate multiple simulation results; and reset the state of the controller 13. Among them, the virtual signal is a signal that the controller 13 can directly recognize.
[0092] Specifically, the virtual bus 12 may include a hard-wire signal simulation unit, a CAN signal simulation unit, and a LIN signal simulation unit. The hard-wire signal simulation unit is used to perform hard-wire signal simulation on the initialized instruction information to generate a hard-wire simulation signal; the CAN signal simulation unit is used to perform CAN signal simulation on the initialized instruction information to generate a CAN simulation signal; and the LIN signal simulation unit is used to perform LIN signal simulation on the initialized instruction signal to generate a LIN simulation signal.
[0093] As an optional solution, the test result evaluation module 14 is also used to generate a test report based on the test results, and archive the archive file, which includes the test results, the test report and the recorded test process file. Specifically, the test instruction injection module 11 records the test process file during the test process, and sends the recorded test process file to the test result evaluation module 14. As an optional solution, for example, the test process file may include an instruction file, instruction information, a signal injection start flag bit and a signal injection end flag bit of the instruction information; for another example, the test process file may also include test cases and test scripts. In practical applications, the test process file may also include other files, which are not listed here one by one.
[0094] As an optional solution, the device further includes: a test script generating module 15 , and the test script generating module 15 is connected to the test instruction injecting module 11 .
[0095] The test script generation module 15 is used to configure test case information; select relevant test cases according to the test case information; configure the corresponding test script library according to the selected test cases to generate relevant test scripts; and inject the test cases and test scripts into the test instruction injection module 11.
[0096] The test instruction injection module 11 is also used to generate multiple instruction files according to the test cases and test scripts.
[0097] The embodiment of the present application realizes the construction of a MIL test device by constructing an automated MIL test environment. Figure 3 A schematic diagram of building a MIL test environment in an embodiment of the present application is shown in FIG. Figure 3 As shown in the figure, as an optional solution, a MIL test device can be built using CANoe and Simulink.
[0098] like Figure 3 As shown, as an optional solution, the controller may include a virtual controller. The virtual controller may include an XCU application layer model, and the XCU application layer model to be tested is built in Simulink; a simulation environment is set and Simulink is set to the main mode. For example, the simulation environment may include a solution method, a simulation step size, and a simulation duration; and the virtual controller (XCU application layer model) is connected to an interface.
[0099] like Figure 3As shown, configure the project file of CANoe, for example, the project file may include hard line files, DBC files, LIN files and IL layer files; in CANoe, build a virtual bus according to the project file; configure the test instruction injection module in CANoe, and establish a communication relationship between the test instruction injection module and the virtual bus, that is, integrate the test instruction injection module with the virtual bus; set CANoe to slave mode.
[0100] like Figure 3 As shown in the figure, the virtual bus in CANoe is connected to the virtual controller (XCU application layer model) in Simulink through an interface, thereby realizing cross-platform integration of the virtual bus in CANoe and the virtual controller (XCU application layer model) in Simulink through an interface. Since Simulink is in master mode and CANoe is in slave mode, Simulink starts the joint simulation and controls CANoe.
[0101] like Figure 3 As shown, after the simulation is started, the test instruction injection module parses the instruction file to obtain instruction information, the virtual bus generates a virtual signal according to the instruction information and sends the virtual signal to the virtual controller through the interface, and the virtual controller performs simulation operations on multiple virtual signals to generate multiple simulation results.
[0102] Figure 4 Another schematic diagram of building a MIL test environment in an embodiment of the present application is shown in FIG. Figure 4 As shown, as another optional solution, the XCU application layer model can be carried out through the physical controller to realize the construction of a MIL test device with enhanced bench functions.
[0103] like Figure 4 As shown, the project files of CANoe are configured. For example, the project files may include hardware files, DBC files, LIN files and IL layer files; in CANoe, a virtual bus is built according to the project files; a test instruction injection module is configured in CANoe, and a communication relationship is established between the test instruction injection module and the virtual bus, that is, the test instruction injection module is integrated with the virtual bus.
[0104] like Figure 4 As shown, as an optional solution, the controller may include a physical controller. The physical controller includes an XCU application layer model, the XCU application layer model is compiled into a binary file and the binary file is flashed into the physical controller, and the physical controller runs the XCU application layer model.
[0105] like Figure 4As shown, the virtual bus in CANoe is connected to the physical controller through a hardware parsing device, thereby realizing the integration of the virtual bus in CANoe and the physical controller through the hardware parsing device.
[0106] like Figure 4 As shown, the operation of the physical controller is parallel to the simulation of CANoe, similar to the actual vehicle test. CANoe and the physical controller cannot control each other, so CANoe needs to align the operation step of the physical controller.
[0107] like Figure 4 As shown, INCA is connected to the physical controller to achieve simultaneous integration of the physical controller and INCA. INCA can monitor and calibrate the physical controller (XCU application layer model) during operation.
[0108] In the technical solution provided in the embodiment of the present application, each instruction file of a specified instruction set obtained from an instruction library is parsed to generate multiple instruction information, a virtual signal is generated according to the instruction information, simulation operations are performed on the multiple virtual signals to generate multiple simulation results, and each simulation result is compared with a corresponding expected result set in advance to generate a test result. The MIL test method of the embodiment of the present application does not rely on a real vehicle, controller hardware, and hardware test platform, thereby achieving comprehensive and accurate testing in the early control strategy concept design stage, thereby improving the test coverage and accuracy.
[0109] An embodiment of the present invention provides a computer-readable storage medium, wherein the computer-readable storage medium includes a stored program, wherein when the program is executed, the computer device where the storage medium is located is controlled to execute the embodiment of the above-mentioned MIL test method.
[0110] An embodiment of the present invention provides a computer device, comprising: one or more processors; a memory; and one or more computer programs, wherein the one or more computer programs are stored in the memory, and the one or more computer programs include instructions, which, when executed by the computer device, enable the computer device to perform the above-mentioned MIL testing method.
[0111] Figure 5 A schematic diagram of the structure of a computer device provided in an embodiment of the present application is shown in FIG. Figure 5 As shown, the computer device 20 includes: a processor 21, a memory 22, and a computer program 23 stored in the memory 22 and executable on the processor 21. When the computer program 23 is executed by the processor 21, the MIL test method applied in the embodiment is implemented. To avoid repetition, they are not described one by one here.
[0112] The computer device 20 includes, but is not limited to, a processor 21 and a memory 22. Those skilled in the art will appreciate that Figure 5 It is only an example of the computer device 20 and does not constitute a limitation of the computer device 20. It may include more or fewer components than shown in the figure, or a combination of certain components, or different components. For example, the computer device 20 may also include input and output devices, network access devices, buses, etc.
[0113] The processor 21 may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor, etc.
[0114] The memory 22 may be an internal storage unit of the computer device 20, such as a hard disk or memory of the computer device 20. The memory 22 may also be an external storage device of the computer device 20, such as a plug-in hard disk, a smart memory card (Smart Media Card, SMC), a secure digital (Secure Digital, SD) card, a flash card (Flash Card), etc. equipped on the computer device 20. Furthermore, the memory 22 may also include both an internal storage unit of the intelligent driving domain control device 20 and an external storage device. The memory 22 is used to store computer programs and other programs and data required by the computer device 20. The memory 22 may also be used to temporarily store data that has been output or is to be output.
[0115] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.
[0116] In the several embodiments provided by the present invention, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.
[0117] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
[0118] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of hardware plus software functional units.
[0119] The above-mentioned integrated unit implemented in the form of a software functional unit can be stored in a computer-readable storage medium. The above-mentioned software functional unit is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor (Processor) to perform some steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (Read-Only Memory, ROM), random access memory (Random Access Memory, RAM), disk or optical disk and other media that can store program codes.
[0120] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.
Claims
1. A MIL testing method, characterized in that: include: According to the function to be tested, a specified instruction set is selected from a plurality of instruction sets stored in an instruction library, wherein the specified instruction set is an instruction set corresponding to the function to be tested, and the specified instruction set includes a plurality of instruction files; Parsing each of the instruction files to generate multiple instruction information; Generate a virtual signal according to the instruction information; Performing simulation operations on the plurality of virtual signals to generate a plurality of simulation results; Compare each simulation result with the corresponding expected result set in advance to generate a test result.
2. The method according to claim 1, characterized in that The method further comprises: A test report is generated according to the test result, and an archive file is archived, wherein the archive file includes the test result, the test report and a recorded test process file.
3. The method according to claim 1, characterized in that The plurality of instruction information includes a time series, a signal list and a relationship between a signal value and a time series; The parsing of each instruction file to generate a plurality of instruction information includes: Parsing the time series from the instruction file; Parsing the signal list from the instruction file; The relationship between the signal value and the time series is parsed from the instruction file.
4. The method according to claim 1, characterized in that: The generating a virtual signal according to the instruction information comprises: Initialize the instruction information specified by the test requirement according to the test requirement; Performing signal simulation on the initialized instruction information to generate a simulation signal; The analog signal is packaged and encapsulated to generate the virtual signal.
5. The method according to claim 1, characterized in that The performing simulation operations on the plurality of virtual signals to generate a plurality of simulation results includes: According to the obtained simulation step length and simulation duration, simulation operations are performed on the multiple virtual signals to generate multiple simulation results.
6. The method according to claim 1, characterized in that The step of comparing each simulation result with a corresponding preset expected result to generate a test result includes: If each simulation result is compared to the corresponding expected result and they are the same, the test result is a successful test; If at least one simulation result is compared to a corresponding expected result and is different, the test result is a test failure.
7. A MIL testing device, characterized in that: include: A test instruction injection module is used to select a specified instruction set from multiple instruction sets stored in an instruction library according to the function to be tested, wherein the specified instruction set is an instruction set corresponding to the function to be tested, and the specified instruction set includes multiple instruction files; each of the instruction files is parsed to generate multiple instruction information; A virtual bus, used to generate a virtual signal according to the instruction information; A virtual controller, used for performing simulation operations on the plurality of virtual signals to generate a plurality of simulation results; The test result evaluation module is used to compare each simulation result with the corresponding preset expected result to generate a test result.
8. The device according to claim 7, characterized in that The test result evaluation module is also used to generate a test report according to the test result and archive the archive file, wherein the archive file includes the test result, the test report and the recorded test process file.
9. A computer device, characterized in that: include: one or more processors; Memory; and one or more computer programs, wherein the one or more computer programs are stored in the memory, and the one or more computer programs include instructions, which, when executed by the computer device, enable the computer device to perform the MIL testing method according to any one of claims 1 to 6.
10. A computer-readable storage medium, characterized in that: The computer-readable storage medium includes a stored program, wherein when the program is executed, the computer device where the computer-readable storage medium is located is controlled to execute the MIL testing method according to any one of claims 1 to 6.