Method, device and equipment for extracting parameter RC in PEX based on ResNN in DTCO process

By using ResNN in the DTCO process to model parasitic resistor capacitance parameters, the problems of slow extraction speed, insufficient accuracy and single-objective optimization in traditional methods are solved, and high-precision and high-speed multi-objective parasitic parameters are achieved, which improves the efficiency and performance of integrated circuit design.

CN119940260APending Publication Date: 2025-05-06PRIMARIUS TECH CO LTD
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Patent Information

Application Number
CN202411963487.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-30
Publication Date
2025-05-06

AI Technical Summary

Technical Problem

Traditional parasitic parameter extraction methods have problems such as slow speed, insufficient accuracy and single-objective optimization, making it difficult to quickly and accurately extract multi-objective parameterized parasitic resistor capacitors in the DTCO process.

Method used

Using the Residual Neural Network (ResNN) method, key features are extracted by preprocessing the profile structure information of the device, and the parasitic resistance and capacitance parameters are modeled using ResNN to achieve efficient extraction of multi-objective parameterized parasitic parameters.

Benefits of technology

High precision, high speed and multi-objective optimization of parasitic effect analysis are achieved, reducing design iteration, and improving design efficiency and overall performance.

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Abstract

The invention discloses a method, device and equipment for extracting a parameter RC in PEX based on ResNN in a DTCO process, and aims to solve the problems of accuracy and efficiency of parasitic parameter extraction in PDK development, and the method comprises the steps: carrying out the PCA analysis of structure information based on device profile information, so as to reduce the data dimension, and highlighting key features; based on experience and physical characteristics, the parameter data set is enhanced to increase diversity and robustness of model training data; according to the method, a ResNN deep neural network model is established, a parasitic parameter data set based on device information is trained, the trained ResNN parameter extraction model can achieve multi-target and high-precision RC prediction, the efficiency of a PEX process can be remarkably improved, and an efficient parameterized RC extraction technical scheme is provided for semiconductor design and manufacturing.
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Description

Technical Field

[0001] The present invention relates to the field of parasitic parameter extraction in process design kit (PDK) development, and specifically to a method, device and equipment for extracting parameter RC in PEX based on ResNN in a DTCO process. Background Art

[0002] In modern integrated circuit design, the continuous reduction of technology nodes has led to a significant impact of parasitic effects on circuit performance, among which parasitic resistance and capacitance are particularly important. Parasitic resistance and capacitance will affect the speed, power consumption and signal integrity of the circuit, thus having a negative effect on the overall performance.

[0003] Traditional parasitic parameter extraction is performed in the post-simulation of the design process. Although it can extract parasitic parameters more accurately, this approach has obvious disadvantages. For example, the parasitic parameter extraction process is time-consuming, which increases the cycle of the entire design process. If problems are found in the late stage of design and the design needs to be modified, it will lead to huge time and cost losses. In addition, traditional methods often only focus on a single parasitic parameter target, and the simulation efficiency is low.

[0004] In order to overcome the above problems, the Design Technology Co Optimization (DTCO) process was proposed. DTCO considers the limitations of the technical process and design requirements in the early stage of design, aiming to achieve collaborative optimization between design and technology. This process helps to avoid large-scale changes in the later stage of design, improve design efficiency and reduce costs. However, it is still a challenge to quickly and accurately extract multi-objective parameterized parasitic resistance and capacitance in the DTCO process. Existing technologies find it difficult to balance the requirements of extraction speed, accuracy and multi-objective optimization. Summary of the invention

[0005] In view of the shortcomings of the prior art, the purpose of this application is to provide a method, device and equipment for extracting parameter RC in PEX based on ResNN in the DTCO process, which is committed to solving the problems of slow speed, insufficient accuracy and single-objective optimization in traditional methods, and through an efficient machine learning algorithm, achieve high-precision, high-speed and multi-objective optimization of parasitic effect analysis.

[0006] In a first aspect, a method for extracting RC parameters in PEX based on ResNN in a DTCO process is provided, comprising: extracting key features through preprocessing based on device profile structure information; modeling parasitic resistance and capacitance parameters using ResNN; performing multi-objective parameterized parasitic parameter extraction through the trained model, and outputting prediction results, wherein the prediction results include parasitic resistance and capacitance predictions.

[0007] In combination with the first aspect, in some implementations of the first aspect, extracting key features through preprocessing includes: extracting key features through PCA.

[0008] In combination with the first aspect, in certain implementations of the first aspect, the extracting key features through preprocessing includes: enhancing the data set based on experience and physical properties.

[0009] In combination with the first aspect, in certain implementations of the first aspect, after ResNN outputs the prediction result, the prediction result is optimized by introducing an error correction model.

[0010] In combination with the first aspect, in some implementations of the first aspect, the ResNN includes an input layer, a fully connected layer, and an activation function, wherein the input layer is used to receive input data, the fully connected layer is used to process the input data, and the activation function is used to provide nonlinearity for the network so that the network can learn complex data patterns.

[0011] In combination with the first aspect, in some implementations of the first aspect, the mathematical expression of the residual block in the ResNN is:

[0012] H(X)=F(X)+X

[0013] Among them, H(X) is the output of the residual block, F(X) is the residual map, and X is the input of the residual block.

[0014] In combination with the first aspect, in some implementations of the first aspect, the extracting of key features includes: extracting empirical data from original device profile data, wherein the empirical data includes information of the module to be tested and information of surrounding modules.

[0015] In combination with the first aspect, in certain implementations of the first aspect, the modeling of parasitic resistance and capacitance parameters using ResNN includes: optimizing the network structure.

[0016] In the second aspect, a device for extracting parameters RC in PEX based on ResNN in a DTCO process is provided, including: an acquisition module, the acquisition module is used to obtain device cross-sectional structure information; a processing module, the processing module is used to extract key features through preprocessing based on the device cross-sectional structure information; the processing module is also used to model parasitic resistance and capacitance parameters using ResNN; the processing module is also used to perform multi-objective parameterized parasitic parameter extraction through the trained model, and output prediction results, the prediction results including parasitic resistance and capacitance predictions.

[0017] According to a third aspect, a computing device is provided, the computing device comprising a processor and a memory, the processor being configured to execute instructions stored in the memory so that the computing device performs the method as described in any one of the first aspects.

[0018] According to a fourth aspect, a computer program product comprising instructions is provided, and when the instructions are executed by a computing device, the computing device is caused to perform the method as described in any one of the first aspects.

[0019] The present invention has the following beneficial effects:

[0020] (1) By integrating the parasitic effect prediction model at an early stage, the impact of parasitic effects on circuit performance can be considered at the early stage of design, reducing the number of later design iterations. By learning the relationship between complex design parameters and parasitic effects, designers are provided with more design space and adjustment flexibility.

[0021] (2) The application of multi-objective optimization algorithms makes it possible to strike a balance between different design objectives, thus improving the overall performance of the design. The powerful learning ability and high-dimensional data processing capabilities of the residual network enable this method to flexibly adapt to more complex design requirements and finer technology nodes.

[0022] (3) The use of parameterized models and automated extraction tools has greatly improved the efficiency of parasitic parameter extraction and shortened the design cycle. It provides fast feedback for the DTCO process, thereby accelerating the design iteration and optimization process. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 Schematic diagram of a multi-objective parameterized RC extraction method of a residual neural network in a DTCO process PEX according to an embodiment of the present application.

[0024] Figure 2 This is a cross-sectional structural diagram of a device according to an embodiment of the present application.

[0025] Figure 3 A schematic diagram of PCA analysis and data enhancement according to an embodiment of the present application.

[0026] Figure 4 This is a diagram of the ResNN deep neural network structure of an embodiment of the present application.

[0027] Figure 5 This is a flow chart of the DTCO process PEX multi-objective parameterized RC extraction method of the residual neural network according to an embodiment of the present application. DETAILED DESCRIPTION

[0028] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0029] As an advanced deep neural network structure, Residual Neural Network (ResNN) has the ability to process high-dimensional input data compared to other machine learning algorithms. ResNN can significantly improve the processing efficiency and prediction accuracy of complex data. In high-dimensional space, input data can be represented as a high-dimensional hypercube. ResNN effectively captures features through its deep structure and residual learning strategy, which is critical for processing complex patterns and variables in integrated circuit design.

[0030] This application intends to apply ResNN to the parasitic extraction (PEX) task in the DTCO process, and achieve high-speed and high-precision parasitic extraction by learning the complex relationship between design parameters and parasitic resistance and capacitance. In addition, ResNN's deep structure and multi-objective learning capabilities enable it to perform multi-objective optimization while maintaining the extraction speed, effectively supporting the needs of the DTCO process.

[0031] The present application provides a method, device and equipment for extracting RC parameters in PEX based on ResNN in a DTCO process, aiming to solve the accuracy and efficiency problems of parasitic parameter extraction in the development of a process design kit (PDK). It can perform principal component analysis (PCA) on structural information based on device profile information to reduce data dimensions and highlight key features.

[0032] In addition, based on experience and physical properties, the parameter data set is enhanced to increase the diversity and robustness of the model training data. A ResNN deep neural network model is established to train the parasitic parameter data set based on device information. The trained ResNN parameter extraction model can achieve multi-objective, high-precision resistance and capacitance (Resistor and Capacitor, RC, also known as "capacitor resistance") prediction, which can significantly improve the efficiency of the PEX process and provide an efficient parameterized RC extraction technology solution for semiconductor design and manufacturing.

[0033] An embodiment of the present application provides a method for extracting a parameter RC in a PEX based on a ResNN in a DTCO process, including:

[0034] S100, extracting key features through preprocessing based on device cross-sectional structural information;

[0035] S200, parasitic resistance and capacitance parameters are modeled using ResNN;

[0036] S300, performing multi-objective parameterized parasitic parameter extraction through the trained model, and outputting prediction results, wherein the prediction results include parasitic resistance and capacitance predictions.

[0037] In summary, the residual neural network of this application is optimized and improved based on the existing ResNN structure to meet the needs of multi-objective parasitic parameter extraction. It can make it more suitable for high-dimensional, multi-objective parameter learning tasks by adjusting the number of residual blocks, activation functions, and jump connection methods; in addition, by designing a multi-objective loss function, the model can simultaneously predict multiple parasitic parameters (such as resistance and capacitance) to achieve overall performance optimization. This improvement not only makes adaptive adjustments to the network structure, but also reflects the originality of this application in data preprocessing and objective function design, significantly improving the speed and accuracy of multi-objective parasitic parameter extraction.

[0038] In some embodiments, in step S100, extracting key features by preprocessing includes extracting key features by PCA. Combining PCA dimensionality reduction with data enhancement can make the training data more robust and diverse, and improve the accuracy of the model.

[0039] In some embodiments, the mathematical expression of PCA is:

[0040] PCA(X)=U∑V T

[0041] Where X is the original data matrix, where rows represent samples and columns represent features, U is the left singular vector, ∑ is the singular value diagonal matrix, V T is the transpose of the right singular vector, and PCA is the transformed data matrix, i.e., the principal component score matrix, whose columns are the principal components. After the device profile information is processed by PCA, usually only the first few largest singular values ​​and their corresponding singular vectors are selected to form a data matrix after dimensionality reduction, which effectively retains most of the features of the semiconductor device data set while reducing the number of features that have a weak influence on the predicted parasitic parameters.

[0042] In some embodiments, step S100 further includes enhancing the data set based on experience and physical properties. The method of enhancing the data set can effectively increase the diversity of the data set, and help improve the robustness and accuracy of the model on unknown data.

[0043] Dataset enhancement is performed after PCA extracts key features. It is used to expand the semiconductor device data set and improve the generalization ability of the model. Data enhancement is based on the experience and physical properties of the original data. The key feature data of semiconductor devices extracted by PCA is expanded through arithmetic operations. Its mathematical expression is:

[0044] X ′ =X+α*N(0,σ 2 )

[0045] Among them, X ′ is the enhanced feature data, X is the feature data after PCA processing, α is the scaling factor used to adjust the influence of noise, N(0,σ 2 ) has a mean of 0 and a variance of σ 2 A normally distributed random variable with is used to generate noise data.

[0046] Data augmentation can also be performed through other arithmetic operations, such as addition, subtraction, multiplication, or division between feature data. For example, if the original feature set is {X 1 ,X 2 ,...X n}, based on the combination of the two feature experiences, create a new feature such as X new =X i *X j or X new =X i / X j These new features can be selected based on experience or physical properties of the design.

[0047] like Figure 2 As shown in the figure, the cross-sectional structure of the semiconductor device for extracting parasitic parameters is generated by automatically processing parameterized structure data based on Python scripts, including the materials of different layers, structure names, etc. These various regions with different dielectric constants may affect the values ​​of parasitic resistance and capacitance in the region to be measured. Figure 2 The dark blocks in the middle are the parasitic resistance and capacitance areas to be measured in pairs.

[0048] like Figure 3As shown in the figure, it is a schematic diagram of data enhancement by combining empirical data and physical properties through PCA analysis to improve the effectiveness of model training and the accuracy of prediction. The feature extraction operation is to extract empirical data from the original device profile data, including information of the module to be tested, information of surrounding modules, or other related device structure data. At the same time, the physical properties of the data are extracted, including data obtained from theoretical models, physical equations or experiments. Then, based on the feature combination, the empirical data and physical properties are merged together to form a comprehensive feature set. PCA analysis is applied to reduce the dimension and extract features to obtain a more simplified feature set, which helps to reduce noise and highlight the most important variables in the data. Then data enhancement is applied, and the feature set after dimensionality reduction is used for data enhancement. The steps include various arithmetic operations to improve the generalization ability of the model.

[0049] like Figure 4 As shown, the ResNN architecture for parasitic parameter extraction in step S200-an embodiment is shown in detail, including various residual blocks, activation functions, connection methods, etc. The input layer is used to receive input data, the fully connected layer is used to process the input data, and the activation function is used to provide nonlinearity for the network so that the network can learn complex data patterns. Adding input is used to combine the output of the previous fully connected layer with the original input data, which can help solve the gradient disappearance problem. The jump connection is used to directly pass the data of the input layer to the subsequent layer, combined with the data processed by the previous layer, and the output layer is used to generate the final prediction or output.

[0050] In step S200, a key feature of the residual neural network is the residual block, whose mathematical expression is:

[0051] H(X)=F(X)+X

[0052] Among them, H(X) is the output of the residual block, F(X) is the residual map, and X is the input of the residual block. This structure allows the network to learn F(X) as the difference between H(X) and X, which helps solve the training problem of deep networks.

[0053] In some implementations, step S200 also includes optimizing the network structure to improve prediction accuracy and efficiency.

[0054] In step S300, the multi-objective parametric parasitic parameter extraction is performed through the trained model, and the prediction result is output, which can be expressed by the following mathematical expression:

[0055]

[0056] in, is the predicted parasitic capacitance and resistance, ResNN is the trained residual neural network model, X test is the test dataset.

[0057] In some implementations, after ResNN outputs the prediction result, the prediction result can be optimized by introducing an error correction model. Its mathematical expression is:

[0058]

[0059]

[0060] in and They are the predicted values ​​of parasitic capacitance and parasitic resistance after optimization respectively; and is the preliminary prediction result of the ResNN model; f correction (X test ) and g correction (X test ) is the error correction function based on the test data; β and γ are correction factors used to control the amplitude of the error correction and can be determined by cross-validation.

[0061] The advantages of optimization are that it can automatically correct deviations caused by model errors or failure to consider specific influencing factors, provide more accurate multi-objective parasitic parameter prediction results, and enhance the applicability of the model in complex integrated circuit design.

[0062] An embodiment of the present application demonstrates the comparison between the multi-target parasitic capacitance parameters predicted by the model and the actual measured values, and verifies the prediction performance of the trained ResNN model for multi-target parasitic parameters, as shown below. The parasitic capacitance is predicted by dividing into three groups with different device structures. For the Type 1 structure, 5 target capacitance values ​​of c12, c13, c1e, c1br, and c1bl are predicted. For the Type 2 and Type 3 structures, 4 target capacitance values ​​of c12, c1e, c1b, and c1d2 are predicted respectively. As shown in Table 1 below, it can be seen that the model prediction error is small, the training time is short, and the fitting is convenient. The overall average errors are 2.314%, 1.677%, and 2.448%, respectively.

[0063] Table 1 Training results comparison table

[0064]

[0065]

[0066] Through the above embodiments, the present invention not only improves the efficiency and accuracy of parasitic parameter extraction, but also can be effectively integrated into the existing integrated circuit design process, thereby accelerating the design cycle, reducing design costs, and improving the performance and reliability of integrated circuit products.

[0067] The present application embodiment also provides a residual neural network DTCO process PEX multi-objective parameterized RC extraction method flow chart, such as Figure 5 As shown, based on the structural information of the device, PCA dimensionality reduction is performed on the input information to highlight important features, the data set is expanded through physical and empirical knowledge, a residual neural network model is designed and constructed, the enhanced data set is used to train the ResNN model, and the trained ResNN model is used to predict parasitic resistance and capacitance.

[0068] The present application also provides a device for extracting parameters RC in PEX based on ResNN in a DTCO process, including: an acquisition module, the acquisition module is used to obtain device cross-sectional structure information; a processing module, the processing module is used to extract key features through preprocessing based on the device cross-sectional structure information; the processing module is also used to model parasitic resistance and capacitance parameters using a residual neural network ResNN; the processing module is also used to perform multi-objective parameterized parasitic parameter extraction using the trained model and output prediction results, the prediction results including parasitic resistance and capacitance predictions.

[0069] The present application also provides a computing device, the computer device comprising a processor and a memory, the processor being configured to execute instructions stored in the memory so that the computing device executes the method as described in any one of the first aspects.

[0070] The present application also provides a computer program product comprising instructions, and when the instructions are executed by a computing device, the computing device executes the method as described in any one of the first aspects.

[0071] It should be noted that, in this article, the terms "comprises", "includes" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or apparatus that includes a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or apparatus.

[0072] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A method for extracting RC parameters in PEX based on ResNN in a DTCO process, characterized in that: include: Based on the device cross-sectional structure information, key features are extracted through preprocessing; Use ResNN to model parasitic resistance and capacitance parameters; The trained model is used to perform multi-objective parametric parasitic parameter extraction and output prediction results, which include parasitic resistance and capacitance predictions.

2. The method for extracting the parameter RC in PEX based on ResNN in the DTCO process according to claim 1 is characterized in that: The extracting key features by preprocessing includes: extracting key features by PCA.

3. The method for extracting the parameter RC in PEX based on ResNN in the DTCO process according to claim 1 or 2, characterized in that: The key features are extracted through preprocessing, including: data set enhancement based on experience and physical characteristics.

4. The method for extracting the parameter RC in PEX based on ResNN in the DTCO process according to claim 1 or 2, characterized in that: After ResNN outputs the prediction results, the prediction results are optimized by introducing an error correction model.

5. The method for extracting the parameter RC in PEX based on ResNN in the DTCO process according to claim 1 or 2, characterized in that: The ResNN includes an input layer, a fully connected layer, and an activation function. Among them, the input layer is used to receive input data, the fully connected layer is used to process the input data, and the activation function is used to provide nonlinearity for the network so that the network can learn complex data patterns.

6. The method for extracting the parameter RC in PEX based on ResNN in the DTCO process according to claim 1 or 2, characterized in that: The mathematical expression of the residual block in the ResNN is: H(X)=F(X)+X Among them, H(X) is the output of the residual block, F(X) is the residual map, and X is the input of the residual block.

7. The method for extracting the parameter RC in PEX based on ResNN in the DTCO process according to claim 1 or 2, characterized in that: The extracting of key features includes: extracting empirical data from original device profile data, wherein the empirical data includes information of the module to be tested and information of surrounding modules.

8. The method for extracting the parameter RC in PEX based on ResNN in the DTCO process according to claim 1 or 2, characterized in that: The method of using ResNN to model the parasitic resistance and capacitance parameters includes: optimizing the network structure.

9. A device for extracting RC parameters in PEX based on ResNN in a DTCO process, characterized in that: include: An acquisition module, the acquisition module is used to acquire device cross-sectional structure information; A processing module, the processing module is used to extract key features through preprocessing based on device cross-sectional structure information; The processing module is also used to model the parasitic resistance and capacitance parameters using a residual neural network ResNN; The processing module is also used to perform multi-objective parameterized parasitic parameter extraction through the trained model and output prediction results, which include parasitic resistance and capacitance predictions.

10. A computing device, characterized in that The computer device includes a processor and a memory, and the processor is used to execute instructions stored in the memory so that the computing device performs the steps of the parameter RC extraction method in PEX based on ResNN in the DTCO process as described in any one of claims 1-8.