Large-scale reconfigurable diffracted light computing chip system and architecture

Abstract

The invention relates to the technical field of light computing, in particular to a large-scale reconfigurable diffracted light computing chip system and architecture. The system comprises an acquisition module used for acquiring a first large matrix and a second large matrix which need to be calculated; the calculation and decomposition module is used for performing calculation and decomposition on the first large matrix and the second large matrix to obtain a plurality of decomposition matrixes; and the calculation module is used for performing matrix calculation through the diffraction calculation array based on the plurality of decomposition matrixes to obtain a target output result. According to the invention, through flexible adjustment of the diffraction calculation array, flexible adjustment of the calculation network architecture is realized, so that the calculation scale limitation of a single reconfigurable diffraction calculation kernel is broken through, the calculation scale is greatly improved, and the method can be flexibly applied to various large complex application scenes.

Description

Technical Field

[0001] The present disclosure relates to the field of optical computing technology, and in particular to a large-scale reconfigurable diffraction optical computing chip system and architecture. Background Art

[0002] With the rapid development of artificial intelligence and scientific computing, the complexity and scale of computing needs are also increasing. However, existing microelectronic computing chips face performance bottlenecks (such as speed and energy consumption) when handling the rapidly growing computing power demand, making it difficult to effectively meet the increasingly stringent computing power and power consumption requirements of large-scale complex algorithms. Optical computing, as a new computing paradigm, offers outstanding advantages such as large bandwidth, high speed, and low energy consumption. Using photons as information carriers and utilizing photonic devices to accelerate neural network calculations, optical computing technology is seen as the key to breaking through existing computing bottlenecks. Summary of the Invention

[0003] The present disclosure aims to solve one of the technical problems in the related art at least to a certain extent.

[0004] To this end, the first objective of the present disclosure is to propose a large-scale reconfigurable diffraction optical computing chip system.

[0005] The second objective of the present disclosure is to propose a large-scale reconfigurable diffraction light calculation method.

[0006] To achieve the above objectives, the first embodiment of the present disclosure provides a large-scale reconfigurable diffraction optical computing chip system, the chip system comprising: The acquisition module is used to obtain the first largest matrix and the second largest matrix that need to be calculated; The calculation decomposition module is used to perform calculation decomposition on the first large matrix and the second large matrix to obtain multiple decomposition matrices; The calculation module is used to perform matrix calculation based on the multiple decomposition matrices through a diffraction calculation array to obtain a target output result.

[0007] Optionally, the diffraction calculation array includes a plurality of reconfigurable diffraction calculation cores, which are connected vertically and / or horizontally, wherein the reconfigurable diffraction calculation core includes a signal feeding module, a parameter modulation module, a channel synthesis module, a diffraction propagation module and a result output module. The signal feeding module is used to obtain a first decomposition matrix corresponding to the input mode and obtain a signal parameter matrix through the modulator array; The parameter modulation module is used to obtain a second decomposition matrix of the input parameters and process the second decomposition matrix through the modulation kernel to obtain a corresponding modulation parameter matrix; The channel synthesis module is used to randomly fuse the modulation parameter matrix and the signal parameter matrix to obtain a fusion matrix; The diffraction propagation module is used to input the fusion matrix into the target diffraction propagation model to obtain a diffraction transmission matrix; The result output module is used to output a target form signal based on the diffraction transmission matrix.

[0008] Optionally, the channel synthesis module is specifically configured to perform parallel fusion or cross fusion on the modulation parameter matrix and the signal parameter matrix to obtain a fusion matrix.

[0009] Optionally, the diffraction propagation module is specifically used to: input the fusion matrix into a target diffraction propagation model, and obtain a diffraction transmission matrix through a target diffraction kernel in the target diffraction propagation model, wherein the target diffraction kernel is trained.

[0010] Optionally, the result output module is specifically configured to: Determine the target output format; Based on the target form, determining a corresponding signal feeding technology; Based on the signal feeding technology and the diffraction transmission matrix, a target form signal is output.

[0011] Optionally, the calculation decomposition module is specifically configured to: The first large matrix and the second large matrix are computationally decomposed by tensor decomposition to obtain a plurality of decomposition matrices.

[0012] To achieve the above objectives, a second embodiment of the present disclosure provides a large-scale reconfigurable diffraction light calculation method, the method comprising: Get the first and second largest matrices to be calculated; Performing computational decomposition on the first largest matrix and the second largest matrix to obtain a plurality of decomposition matrices; Based on the multiple decomposition matrices, a target output result is obtained by performing matrix calculation through a diffraction calculation array.

[0013] Another object of the present disclosure is to propose a large-scale reconfigurable diffraction optical computing architecture, characterized in that it includes: at least one large-scale reconfigurable diffraction optical computing chip system.

[0014] In summary, the large-scale reconfigurable diffraction optical computing chip system and architecture provided by the present disclosure decomposes large-scale calculations and performs matrix calculations on the decomposed matrix through a diffraction calculation array to obtain the target output result. Therefore, by flexibly adjusting the diffraction calculation array, the computing network architecture can be flexibly adjusted to break through the computing scale limitation of a single reconfigurable diffraction computing core, thereby achieving a significant increase in computing scale and being flexibly applied in various large and complex application scenarios.

[0015] Additional aspects and advantages of the present disclosure will be given in part in the description below and in part will be obvious from the description below, or will be learned through practice of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The above and / or additional aspects and advantages of the present disclosure will become apparent and readily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which: Figure 1 A schematic diagram of the structure of a large-scale reconfigurable diffraction optical computing chip system provided by an embodiment of the present disclosure; Figure 2 A schematic diagram of a diffraction calculation array provided in an embodiment of the present disclosure; Figure 3 A schematic diagram of a large-scale reconfigurable diffraction computing cluster provided by an embodiment of the present disclosure; Figure 4 A schematic flow chart of a large-scale reconfigurable diffraction light calculation method provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0017] The following describes in detail embodiments of the present disclosure, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present disclosure, and should not be construed as limiting the present disclosure.

[0018] At present, optical neural network chips can include interference, resonance and diffraction neural networks. However, in practical applications, current optical computing chip technology still faces many major challenges and difficulties, such as small chip network scale, single function, lack of versatility and flexibility, etc., which makes it difficult to fully realize its huge application potential. Specifically, for interference or resonant neural networks, they mainly use photonic devices such as waveguide phase shifters, Mach-Zehnder interferometers, directional couplers and microring resonators as basic neuron devices, and the physical size of neuron devices is about tens to hundreds of microns, which limits the number of neurons that can be integrated and the scale of achievable neural networks, which in turn makes it unable to cope with large and complex artificial intelligence tasks.

[0019] Diffractive neural networks, with their subwavelength neuron size and high-density neuron integration, are expected to become an optical computing technology capable of simultaneously achieving large network scale, high computing density, and high computational energy efficiency. However, current diffractive optical computing technology is limited to a single computing core, limiting its application to small-scale, simple computing tasks such as image classification, and rendering it incapable of complex tasks such as natural language processing or multimodal information processing.

[0020] Furthermore, the high-density integration of diffraction neurons makes reconstruction extremely difficult within the current on-chip modulation technology framework, severely restricting their scalability and architectural flexibility. The aforementioned challenges and problems have resulted in diffraction computing still facing issues with limited computing power, single functionality, and inflexible architecture as it continues to develop, making it difficult to flexibly support multiple scenarios and large, complex artificial intelligence tasks. Against this backdrop, achieving optical neural network chips based on scalable scale and adjustable architecture is considered a necessary step and an important strategic trend for the technology to move towards practical application.

[0021] The present disclosure is described in detail below with reference to specific embodiments.

[0022] Figure 1 This is a schematic diagram of the structure of a large-scale reconfigurable diffraction optical computing chip system provided by the embodiment of the present disclosure. Figure 1 As shown, the large-scale reconfigurable diffraction light computing chip system includes an acquisition module, a computing decomposition module and a computing module, wherein: An acquisition module 101 is used to acquire a first largest matrix and a second largest matrix to be calculated; A calculation decomposition module 102 is used to perform calculation decomposition on the first large matrix and the second large matrix to obtain multiple decomposition matrices; The calculation module 103 is used to perform matrix calculation based on multiple decomposition matrices through a diffraction calculation array to obtain a target output result.

[0023] In one embodiment of the present disclosure, the above-mentioned large-scale reconfigurable diffraction optical computing chip system can be applied to large-matrix calculations. Based on this, the above-mentioned large-scale reconfigurable diffraction optical computing chip system can be applied to various scenarios, such as multimodal information processing.

[0024] In one embodiment of the present disclosure, the large-scale reconfigurable diffraction optical computing chip system can be used for matrix calculations in neural networks.

[0025] In addition, in one embodiment of the present disclosure, the first largest matrix and the second largest matrix that need to be calculated in the neural network can be obtained through the acquisition module, wherein the dimensions of the first largest matrix and the second largest matrix are the same and larger. For example, the dimensions of the first largest matrix and the second largest matrix can be 10000×10000.

[0026] Furthermore, in one embodiment of the present disclosure, after the acquisition module acquires the first and second large matrices, the computational decomposition module may perform computational decomposition on the first and second large matrices to obtain multiple decomposition matrices. Specifically, in one embodiment of the present disclosure, the computational decomposition module may perform computational decomposition on the first and second large matrices through tensor decomposition to obtain multiple decomposition matrices. In one embodiment of the present disclosure, the dimensions of the decomposition matrices may be dimensions that can be processed by a single reconfigurable diffraction calculation core in the diffraction calculation array.

[0027] In one embodiment of the present disclosure, the diffraction calculation array may include a plurality of reconfigurable diffraction calculation cores, and the plurality of reconfigurable diffraction calculation cores may be connected vertically and / or horizontally (e.g. Figure 2 As shown). In one embodiment of the present disclosure, when the aforementioned multiple reconfigurable diffraction calculation cores are connected vertically and horizontally, the head-to-tail interconnection of the input and output ports of each reconfigurable diffraction calculation core in the vertical direction is deeply cascaded, thereby achieving vertical scale expansion of the diffraction calculation and step-by-step processing of input signals by the diffraction core; and horizontally, the multiple reconfigurable diffraction calculation cores are multiplexed in parallel, with two scenarios of spatial parallel multiplexing of the multiple reconfigurable diffraction calculation cores and temporal parallel multiplexing of a single reconfigurable diffraction calculation core, thereby achieving horizontal scale expansion of the diffraction calculation and parallel processing of input signals by the diffraction module.

[0028] Furthermore, in one embodiment of the present disclosure, if the dimensions of the first largest matrix and the second largest matrix to be calculated are large, multiple diffraction calculation arrays can be cascaded and multiplexed to form a diffraction cluster. Figure 3 A schematic diagram of a large-scale reconfigurable diffraction computing cluster provided in an embodiment of the present disclosure.

[0029] Furthermore, in one embodiment of the present disclosure, in multi-tasking application scenarios, adaptive mechanisms and algorithms can be introduced to enable on-demand switching between different tasks in a large-scale reconfigurable diffraction computing cluster. Specifically, when training the large-scale reconfigurable diffraction computing cluster, the number of reconfigurable diffraction computing cores, the number of ports, and the basic parameters of the diffraction neurons in the diffraction cores (such as the shape, number, original size, and period of the diffraction neurons) can be initialized and defined accordingly for different tasks. Furthermore, the structural parameters of the diffraction cores (such as the structural parameters of the diffraction neurons and the number of diffraction layers) and remote control parameters can be used as variables for further optimization training and simulation to obtain a large-scale reconfigurable diffraction computing cluster suitable for different tasks.

[0030] In one embodiment of the present disclosure, the connection parameters of each reconfigurable diffraction computing core can be dynamically modulated to overcome the network structure limitations of a single reconfigurable diffraction computing core and enable flexible adjustment of the computing network architecture. Dynamic modulation methods include, but are not limited to, on-chip modulation devices (such as Mach-Zehnder interferometer modulators, waveguide phase shifters, micro-ring modulation, etc.) and spatial modulation devices (such as SLMs). They are also not limited to specific modulation methods, such as phase change materials, PN junctions, and thermocouples, nor are they limited to specific material platforms, such as silicon, silicon nitride, and lithium niobate.

[0031] Furthermore, in one embodiment of the present disclosure, the reconfigurable diffraction calculation core may include a signal feeding module 1031, a parameter modulation module 1032, a channel synthesis module 1033, a diffraction propagation module 1034 and a result output module 1035, and, The signal feeding module 1031 is used to obtain a first decomposition matrix corresponding to the input mode and obtain a signal parameter matrix through the modulator array; A parameter modulation module 1032 is configured to obtain a second decomposition matrix of input parameters and process the second decomposition matrix using a modulation kernel to obtain a corresponding modulation parameter matrix; The channel synthesis module 1033 is used to randomly fuse the modulation parameter matrix and the signal parameter matrix to obtain a fusion matrix; The diffraction propagation module 1034 is used to input the fusion matrix into the target diffraction propagation model to obtain the diffraction transmission matrix; The result output module 1035 is used to output a target form signal based on the diffraction transmission matrix.

[0032] In one embodiment of the present disclosure, the input mode can be set as needed, for example, image, text, or audio.

[0033] In one embodiment of the present disclosure, a signal parameter matrix corresponding to the first matrix can be obtained through a modulator array. In one embodiment of the present disclosure, the signal parameter matrix can be an amplitude and / or phase matrix corresponding to the first matrix.

[0034] Furthermore, in one embodiment of the present disclosure, the modulation core can be trained, and different tasks correspond to different target modulation parameters. In one embodiment of the present disclosure, the implementation method of the modulation core can include, but is not limited to, spatial light or on-chip, and can include, but is not limited to, thermal modulators, carrier modulators, or phase change materials, as well as specific material platforms such as silicon, silicon dioxide, silicon nitride, lithium niobate, etc.

[0035] Furthermore, in one embodiment of the present disclosure, after the target modulation parameters are obtained through the above steps, the second matrix can be processed by a modulation kernel based on the target modulation parameters to obtain a corresponding modulation parameter matrix.

[0036] In one embodiment of the present disclosure, after obtaining the modulation parameter matrix and the signal parameter matrix through the above steps, the modulation parameter matrix and the signal parameter matrix can be randomly fused to obtain a corresponding fused matrix. In one embodiment of the present disclosure, the modulation parameter matrix and the signal parameter matrix can be randomly fused as needed, thereby achieving arbitrary reconfigurability of the diffraction calculation results.

[0037] Furthermore, in one embodiment of the present disclosure, a method of randomly fusing a modulation parameter matrix and a signal parameter matrix to obtain a fused matrix may include: fusing the modulation parameter matrix and the signal parameter matrix in parallel or cross-fusing to obtain a fused matrix.

[0038] Furthermore, in one embodiment of the present disclosure, after obtaining the fused matrix through the above steps, the fused matrix can be input into the target diffraction propagation model to obtain a diffraction transfer matrix. In one embodiment of the present disclosure, the method of inputting the fused matrix into the target diffraction propagation model to obtain the diffraction transfer matrix can include: inputting the fused matrix into the target diffraction propagation model, and obtaining the diffraction transfer matrix using a target diffraction kernel in the target diffraction propagation model, wherein the target diffraction kernel is trained.

[0039] Furthermore, in one embodiment of the present disclosure, the specific implementation of the diffraction kernel may include but is not limited to single-layer or multi-layer diffraction, and the form of neurons may include but is not limited to neurons of various shapes, such as rectangular, circular, conical, elliptical, etc. In one embodiment of the present disclosure, a corresponding target diffraction kernel may be obtained by training the corresponding diffraction kernel to determine the implementation of the target diffraction kernel and the form of neurons.

[0040] Furthermore, in one embodiment of the present disclosure, after obtaining the diffraction transfer matrix through the above steps, a target form signal can be output based on the diffraction transfer matrix. Specifically, in one embodiment of the present disclosure, the above result output module can be used to: determine the target form to be output; determine the corresponding signal output technology based on the target form; and output the target form signal based on the signal output technology and the diffraction transfer matrix.

[0041] In one embodiment of the present disclosure, the target form to be outputted can be determined by the task, and the target form includes but is not limited to a waveguide signal, an optical radiation signal, and an electrical signal.

[0042] Furthermore, in one embodiment of the present disclosure, after determining the target form through the above steps, the corresponding signal feeding technology can be determined according to the target form, so as to output the target form signal based on the signal feeding technology and the diffraction transmission matrix.

[0043] In one embodiment of the present disclosure, different target forms correspond to different signal feeding technologies.

[0044] Specifically, in one embodiment of the present disclosure, the signal feeding technology corresponding to the waveguide signal may be a mode converter based on a waveguide array; the signal feeding technology corresponding to the optical radiation signal may be an optical radiator based on a coupler array; and the signal feeding technology corresponding to the electrical signal may be a photoelectric converter based on a photodetector array.

[0045] In summary, the large-scale reconfigurable diffraction optical computing chip system provided in this embodiment obtains the target output result by performing computational decomposition on large-scale calculations and performing matrix calculations on the decomposed matrix through the diffraction computing array. Therefore, the flexible adjustment of the diffraction computing array can be used to achieve flexible adjustment of the computing network architecture, thereby breaking through the computational scale limitation of a single reconfigurable diffraction computing core, and thus achieving a significant increase in computing scale, which can be flexibly applied in various large and complex application scenarios.

[0046] In order to implement the above embodiment, Figure 4 A large-scale reconfigurable diffraction light calculation method provided in an embodiment of the present disclosure may include the following steps: Step 401: Obtain the first largest matrix and the second largest matrix to be calculated; Step 402: Decompose the first largest matrix and the second largest matrix to obtain multiple decomposition matrices. Step 403: Based on the multiple decomposition matrices, matrix calculation is performed through a diffraction calculation array to obtain a target output result.

[0047] In one embodiment of the present disclosure, the diffraction calculation array includes a plurality of reconfigurable diffraction calculation cores, and the plurality of reconfigurable diffraction calculation cores are connected vertically and / or horizontally.

[0048] Furthermore, in one embodiment of the present disclosure, the method for obtaining a target output result by performing matrix calculation using a diffraction calculation array based on multiple decomposition matrices may include the following steps: Step 4031: Input the multiple decomposition matrices into the corresponding reconfigurable diffraction calculation cores in the diffraction calculation array for calculation, and obtain the target form signal output by the reconfigurable diffraction calculation cores; Step 4032: splice the target form signals output by multiple reconfigurable diffraction calculation cores to obtain a target output result.

[0049] In one embodiment of the present disclosure, a method for inputting multiple decomposition matrices into corresponding reconfigurable diffraction calculation cores in a diffraction calculation array for calculation to obtain a target form signal output by the reconfigurable diffraction calculation core may include the following steps: Step 1: Obtain the first decomposition matrix corresponding to the input mode, and obtain the signal parameter matrix through the modulator array; Step 2: Obtain a second decomposition matrix of the input parameters, and process the second decomposition matrix through the modulation kernel to obtain a corresponding modulation parameter matrix; Step 3: Randomly fuse the modulation parameter matrix and the signal parameter matrix to obtain a fusion matrix; Step 4: Input the fusion matrix into the target diffraction propagation model to obtain the diffraction transmission matrix; Step 5: Based on the diffraction transmission matrix, output the target form signal.

[0050] The collection, storage, use, processing, transmission, provision and disclosure of user personal information involved in this disclosure are in compliance with relevant laws and regulations and do not violate public order and good morals.

[0051] It is important to note that personal information collected from users should be used for legitimate and reasonable purposes and should not be shared or sold beyond these legitimate uses. Furthermore, such collection / sharing should be conducted only after receiving the user's informed consent, including but not limited to notifying the user to read the user agreement / user notice and sign an agreement / authorization that includes the relevant user information before using the feature. Furthermore, any necessary steps must be taken to safeguard and secure access to such personal information and ensure that others with access to personal information comply with its privacy policy and procedures.

[0052] This disclosure contemplates providing implementations that allow users to selectively block the use or access of personal information data. Specifically, this disclosure contemplates providing hardware and / or software to prevent or block access to such personal information data. Risks can be minimized by limiting data collection and deleting data once it is no longer needed. Furthermore, where applicable, such personal information can be de-identified to protect user privacy.

[0053] The acquisition, transmission, storage, use, and processing of data in the technical solution disclosed herein are in compliance with the relevant provisions of national laws and regulations.

[0054] It should be noted that in an embodiment of the present disclosure, certain software, components, models, and other existing solutions in the industry may be mentioned. They should be regarded as exemplary and their purpose is only to illustrate the feasibility of implementing the technical solution of this application, but it does not mean that the applicant has or will necessarily use the solution.

[0055] In the descriptions of the aforementioned embodiments, the reference terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" mean that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present disclosure. In this specification, the schematic expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification and features of different embodiments or examples without contradiction.

[0056] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features being referred to. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. Throughout the present disclosure, "plurality" means at least two, such as two, three, etc., unless otherwise specifically defined.

[0057] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, segment or portion of code comprising one or more executable instructions for implementing the steps of a custom logical function or process, and the scope of the preferred embodiments of the present disclosure includes additional implementations in which functions may be performed out of the order shown or discussed, including performing functions in a substantially simultaneous manner or in the reverse order depending on the functions involved, which should be understood by those skilled in the art to which the embodiments of the present disclosure belong.

[0058] The logic and / or steps represented in a flowchart or otherwise described herein, for example, can be considered a sequenced list of executable instructions for implementing the logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (e.g., a computer-based system, a system including a processor, or other system that can fetch and execute instructions from an instruction execution system, apparatus, or device). For purposes of this specification, a "computer-readable medium" is any device that can contain, store, communicate, propagate, or transport a program for use by, or in conjunction with, an instruction execution system, apparatus, or device. More specific examples (not exhaustive) of computer-readable media include: an electrical connection with one or more wires (electronic devices), a portable computer disk cartridge (magnetic device), random access memory (RAM), read-only memory (ROM), erasable and programmable read-only memory (EPROM or flash memory), fiber optic devices, and a portable compact disc read-only memory (CDROM). Furthermore, the computer-readable medium may even be paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium and then editing, interpreting or otherwise processing it in a suitable manner if necessary, and then storing it in a computer memory.

[0059] It should be understood that various parts of the present disclosure can be implemented using hardware, software, firmware, or a combination thereof. In the above-described embodiments, multiple steps or methods can be implemented using software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented using hardware, as in another embodiment, any one of the following technologies known in the art or a combination thereof can be used: a discrete logic circuit having logic gate circuits for implementing logical functions on data signals, an application-specific integrated circuit having suitable combinational logic gate circuits, a programmable gate array (PGA), a field-programmable gate array (FPGA), etc.

[0060] Those skilled in the art will appreciate that all or part of the steps in the method for implementing the above-mentioned embodiment can be completed by instructing related hardware through a program, and the program can be stored in a computer-readable storage medium. When the program is executed, it includes one or a combination of the steps of the method embodiment.

[0061] In addition, the functional units in the various embodiments of the present disclosure may be integrated into a single processing module, each unit may exist physically separately, or two or more units may be integrated into a single module. The aforementioned integrated modules may be implemented in the form of hardware or in the form of software functional modules. If the integrated modules are implemented in the form of software functional modules and sold or used as independent products, they may also be stored in a computer-readable storage medium.

[0062] The storage medium mentioned above may be a read-only memory, a magnetic disk, or an optical disk, etc. Although the embodiments of the present disclosure have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present disclosure. A person of ordinary skill in the art may make changes, modifications, substitutions, and variations to the above embodiments within the scope of the present disclosure.

Claims

1. A large-scale reconfigurable diffraction optical computing chip system, characterized in that: The chip system includes an acquisition module, a calculation decomposition module and a calculation module, wherein: The acquisition module is used to acquire the first largest matrix and the second largest matrix that need to be calculated; The calculation decomposition module is used to perform calculation decomposition on the first large matrix and the second large matrix to obtain a plurality of decomposition matrices; The calculation module is used to perform matrix calculation based on the multiple decomposition matrices through a diffraction calculation array to obtain a target output result.

2. The system according to claim 1, characterized in that The diffraction calculation array includes a plurality of reconfigurable diffraction calculation cores, which are connected vertically and / or horizontally, wherein the reconfigurable diffraction calculation core includes a signal feeding module, a parameter modulation module, a channel synthesis module, a diffraction propagation module and a result output module. The signal feeding module is used to obtain a first decomposition matrix corresponding to the input mode and obtain a signal parameter matrix through a modulator array; The parameter modulation module is used to obtain a second decomposition matrix of the input parameters, and process the second decomposition matrix through a modulation kernel to obtain a corresponding modulation parameter matrix; The channel synthesis module is used to randomly fuse the modulation parameter matrix and the signal parameter matrix to obtain a fusion matrix; The diffraction propagation module is used to input the fusion matrix into the target diffraction propagation model to obtain a diffraction transmission matrix; The result output module is used to output a target form signal based on the diffraction transmission matrix.

3. The system according to claim 2, characterized in that The channel synthesis module is specifically used to: perform parallel fusion or cross fusion of the modulation parameter matrix and the signal parameter matrix to obtain a fusion matrix.

4. The system according to claim 2, characterized in that The diffraction propagation module is specifically used to: input the fusion matrix into the target diffraction propagation model, and obtain the diffraction transmission matrix through the target diffraction kernel in the target diffraction propagation model, wherein the target diffraction kernel is trained.

5. The system according to claim 2, characterized in that The result output module is specifically used for: Determine the target format for output; Based on the target form, determining a corresponding signal feeding technology; Based on the signal feeding technology and the diffraction transmission matrix, a target form signal is output.

6. The system according to claim 1, characterized in that The calculation decomposition module is specifically used for: The first large matrix and the second large matrix are computationally decomposed by tensor decomposition to obtain a plurality of decomposed matrices.

7. A large-scale reconfigurable diffraction light calculation method, characterized in that: The method comprises: Get the first largest matrix and the second largest matrix to be calculated; Decomposing the first largest matrix and the second largest matrix by calculation to obtain a plurality of decomposed matrices; Based on the multiple decomposition matrices, matrix calculation is performed through a diffraction calculation array to obtain a target output result.

8. The method according to claim 7, characterized in that The diffraction calculation array includes a plurality of reconfigurable diffraction calculation cores, and the plurality of reconfigurable diffraction calculation cores are connected vertically and / or horizontally; the matrix calculation based on the plurality of decomposition matrices is performed through the diffraction calculation array to obtain a target output result, including: Inputting the multiple decomposition matrices into the corresponding reconfigurable diffraction calculation cores in the diffraction calculation array for calculation respectively, and obtaining a target form signal output by the reconfigurable diffraction calculation core; The target form signals output by multiple reconfigurable diffraction calculation cores are spliced ​​to obtain the target output result.

9. The method according to claim 8, characterized in that The step of inputting the plurality of decomposition matrices into the corresponding reconfigurable diffraction calculation cores in the diffraction calculation array for calculation, and obtaining a target form signal output by the reconfigurable diffraction calculation core, comprises: Obtain a first decomposition matrix corresponding to the input mode, and obtain a signal parameter matrix through a modulator array; Obtaining a second decomposition matrix of input parameters, and processing the second decomposition matrix through a modulation kernel to obtain a corresponding modulation parameter matrix; Randomly fusing the modulation parameter matrix and the signal parameter matrix to obtain a fusion matrix; Inputting the fusion matrix into the target diffraction propagation model to obtain a diffraction transmission matrix; Based on the diffraction transmission matrix, a target form signal is output.

10. A large-scale reconfigurable diffraction optical computing architecture, characterized in that: include: At least one large-scale reconfigurable diffractive optical computing chip system as described in any one of claims 1 to 6.

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