Display device

Abstract

The present specification relates to a display device in which reliability can be ensured and a narrow bezel can be realized by removing a dam structure such as a carved dam or a relief dam from a bezel region of the display device. In order to achieve this, in a display device according to the present specification, a surrounding through hole in a form surrounding a display area is formed in a bezel area of a display panel to pass through the display panel, and when a particle cover layer is formed in a manufacturing process, ultraviolet light is radiated through the surrounding through hole of the bezel area to cure the particle cover layer. The dam structure may be removed, thereby preventing defects from occurring in the bezel region.

Description

Technical Field

[0001] The present specification relates to a display device, and more particularly, to a display device having improved quality by preventing seam marks from being visible from a bezel area of ​​a display panel. Background Art

[0002] The display device includes a display area displaying an image and a non-display area formed along an outer edge portion of the display area. In addition to a display panel for displaying an image, the display device requires various additional components such as a driving integrated circuit or a circuit board.

[0003] The additional component may be located in the non-display area, or various connection components (eg, a flexible printed circuit board) for connecting the additional component may be located in the non-display area.

[0004] In the display device, the non-display area includes a frame area, and the frame area can be bent at 180 degrees and maintain a folded shape for a long time. Summary of the invention

[0005] A conventional display device is manufactured in a form in which a groove structure is applied to a bezel area to form an engraved dam DAM, and such that the engraved dam is filled with a particle cover layer (PCL).

[0006] Therefore, the border area has a 90° tapered area due to the groove structure, and such a tapered area leads to reliability defects, which can be seen through the seam marks.

[0007] Therefore, there is a problem in that the reliability of the display device cannot be ensured due to defects in the bezel area, and thus there is a limitation in achieving a stable narrow bezel.

[0008] In order to solve various technical problems in the prior art, including the problems described above, the inventors of this specification provide various embodiments of a display device. One example includes a display device in which reliability can be ensured and a narrow frame can be achieved by removing a dam structure such as an engraved dam or an embossed dam from a frame area of ​​the display device and preventing defects from occurring in the frame area.

[0009] An embodiment of the present specification relates to providing a display device in which a surrounding through hole passes through a display panel in a frame area of ​​the display panel in the form of a surrounding display area, and when a particle covering layer PCL is formed in a manufacturing process, ultraviolet light is radiated through the surrounding through hole in the frame area to cure the particle covering layer PCL.

[0010] The technical benefits of this specification are not limited to the above benefits, and other benefits and advantages not mentioned in this specification can be understood by the following description and can be more clearly understood by the embodiments of this specification. In addition, it can be easily seen that the benefits and advantages of this specification can be achieved by the devices described in the claims and their combinations.

[0011] A display device according to an embodiment of the present specification may be provided. In the display device, a surrounding through hole that passes through the display panel in the form of a periphery surrounding a display area may be provided in a bezel area (BZA) that is provided near a display area (AA), and one or more pixels are provided in the display area (AA).

[0012] The surround via hole (SRH) may be filled with transparent ink, glass material, or transparent material.

[0013] A surround through hole (SRH) may be provided between one or more anode electrodes provided in the bezel region and one or more pixels provided at the periphery of the display region. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 is a view showing a front surface of a display device according to an embodiment of the present specification.

[0015] Figure 2 In a display device according to an embodiment of the present specification Figure 1 Magnified view of area A in FIG.

[0016] Figure 3 is a cross-sectional view of a display device according to an embodiment of the present specification.

[0017] Figure 4 is a cross-sectional view of a display region in a display device according to an embodiment of the present specification.

[0018] Figure 5 is a diagram showing an example of solidifying a particle covering layer by surrounding a through hole according to an embodiment of the present specification.

[0019] Figure 6 is a block diagram schematically showing a system configuration of a display device according to an embodiment of the present specification.

[0020] Figure 7 is a view showing a display area, a bending area, and a pad area in a display panel according to an embodiment of the present specification.

[0021] Figure 8 FIG. 1 is a diagram showing a display device according to an embodiment of the present specification. Figure 7 Figure 2 shows the structure of region B in FIG.

[0022] Fig. 9 is an edge in a display device according to an embodiment of the present specification Figure 8 Cross-sectional view along line CC'.

[0023] Fig. 10A and Fig. 10B is a view showing an example in which a particle covering layer is cured by light radiated through a surrounding through hole of a wafer substrate in a process of manufacturing a display device.

[0024] Fig.11A and Fig. 11B is a view showing an example in which a particle covering layer is cured by light radiated through surrounding via holes of a black matrix in a process of manufacturing a display device.

[0025] FIG. 12A to FIG. 12D is a view showing a process of curing a particle covering layer by radiating light through surrounding through holes according to an embodiment of the present specification. DETAILED DESCRIPTION

[0026] The purpose, features and advantages described above will be described in detail below with reference to the accompanying drawings, so that those skilled in the art to which the present disclosure belongs will be able to easily carry out the technical spirit of the present disclosure. When describing the present disclosure, when it is determined that the detailed description of the known technology related to the present disclosure may unnecessarily obscure the purport of the present disclosure, its detailed description will be omitted. Hereinafter, exemplary embodiments according to the present disclosure will be described in detail with reference to the accompanying drawings. In the accompanying drawings, the same reference numerals are used to represent the same or similar parts.

[0027] The shapes, sizes, dimensions (e.g., length, width, height, thickness, radius, diameter, area, etc.), ratios, angles, number of elements, etc. shown in the drawings used to describe the embodiments of the present disclosure are merely examples, and the present disclosure is not limited thereto.

[0028] For ease of description, dimensions including the size and thickness of each component shown in the drawings are shown. The present disclosure is not limited to the size and thickness of the components shown, but it should be noted that the relative dimensions including the relative size, position and thickness of the components shown in the various drawings submitted herewith are part of the present disclosure.

[0029] In addition, when a first component is described as being “connected,” “coupled” or “engaged” to a second component, these components may be directly connected or engaged, but it should be understood that a third component may be “interposed” between these components, or these components may be “connected,” “coupled” or “engaged” through the third component.

[0030] Unless otherwise defined, all terms (including technical terms and scientific terms) used in this specification may be used as the meanings commonly understood by those skilled in the art to which the present disclosure belongs. In addition, unless clearly and specifically defined, the terms defined in the commonly used dictionaries are not ideally or excessively interpreted.

[0031] Hereinafter, according to an embodiment of the present specification, a display device will be described in which reliability can be ensured and a narrow border can be achieved by removing a dam structure (e.g., a carved dam or a relief dam) from a border area of ​​the display device and preventing defects from occurring in the border area.

[0032] Figure 1 is a view showing a front surface of a display device according to an embodiment of the present specification.

[0033] Figure 1 The front surface of the display device 10 is schematically shown, and the display area AA is located therein. The front surface and the upward direction defined herein represent the Z-axis direction, and the back surface and the downward direction represent the -Z-axis direction.

[0034] Reference Figure 1 , the display device 10 according to the specification of the present disclosure may include a display panel 10 ′ disposed on a front surface thereof.

[0035] The display panel 10' may include a display area AA where one or more pixels PX are disposed, and a bezel area BZA disposed adjacent to or near the display area. The bezel area BZA may be disposed along the outermost edge of the display device 10 in the form of surrounding the display area AA.

[0036] One pixel PX among the one or more pixels may include an anode electrode, a light emitting layer, and a cathode electrode. One pixel PX may be referred to as a light emitting element PX.

[0037] A surrounding through hole SRH extending into the display panel 10 ′ (or in some embodiments, passing through the display panel 10 ′ in the form of surrounding the display area AA) may be provided in the bezel area BZA.

[0038] The surrounding through hole SRH may be disposed in the bezel area BZA between one or more anode electrodes AE disposed in the bezel area BZA and one or more pixels PX disposed at the periphery of the display area AA.

[0039] The surrounding through hole SRH may be filled with a material that transmits light, such as transparent ink, a glass (GLS) material, a transparent organic material, etc. The transparent organic material may include polyimide. Therefore, in the display device 10, the surrounding through hole SRH has a material that transmits light, such as transparent ink or a glass (GLS) material or a transparent organic material, etc., inside the surrounding through hole SRH.

[0040] Although not shown in the drawings, a cover member may be provided on the display panel 10'. The cover member may be made of, for example, a cover glass (CG). The cover member may be provided to cover the front surface of the display panel 10' to protect the display panel 10' from external impact. An edge portion of the cover member may have a circular shape formed to be curved toward the back surface of the display panel 10'.

[0041] Since the cover member includes the display area AA displaying an image, the cover member may be made of a transparent material (eg, cover glass) to display the image. For example, the cover member may be made of transparent plastic, glass, or reinforced glass material.

[0042] Although the display panel 10' is not shown in the figure, a back frame may be provided on the back side thereof. The back frame may be provided on the back surface of the display panel 10' and may contact the cover member to accommodate the display panel 10' and support the cover member.

[0043] The back frame may serve as a housing forming an outer rear surface of the display device 10 and may be made of a metal material such as aluminum (Al) or a polymer epoxy resin material. The embodiments of the present specification are not limited thereto.

[0044] In this case, the back frame may serve as a case forming the outermost portion of the display device 10, but is not limited thereto. For example, the back frame may serve as a middle frame portion serving as a housing protecting the rear surface of the display panel 10'.

[0045] like Figure 1 As shown, the surrounding through hole SRH surrounds the display area AA of the display panel 10 ′ when viewed from a plan view.

[0046] Figure 2 In a display device according to an embodiment of the present specification Figure 1 An enlarged view of area A (a corner of the display panel at the periphery of the display panel) in FIG.

[0047] Reference Figure 2 In the display device 10 according to the embodiment of the present specification, the light emitting layer mask OCM, the cathode electrode contact CE_CT, the cathode electrode CE, and the cathode capping layer CPL may be disposed between the surrounding through hole SRH and the display area AA.

[0048] The light emitting layer mask OCM is a mask for forming the light emitting layer EL.

[0049] The cathode electrode contact CE_CT is a contact electrode or a contact line for grounding the cathode electrode CE and the anode electrode AE.

[0050] The cathode capping layer CPL may be disposed on the cathode electrode CE, and may include a rare earth material having greater oxidizing ability than an organic material for capping and the cathode electrode.

[0051] Furthermore, a sawing margin SM, a wafer cell edge WCE, and an insulating layer IL may be provided between the surrounding through hole SRH and the peripheral end of the bezel area BZA.

[0052] The wafer cell edge WCE may refer to an outermost portion of a cell formed on a wafer substrate.

[0053] The cutting margin SM may represent a spare portion remaining from a cut portion of the wafer substrate to a wafer unit edge WCE.

[0054] The intermediate layer IL may include silicon oxide (SiO x ) or silicon nitride (SiN x ) of an inorganic insulating film. The inorganic insulating film may be deposited by a chemical vapor deposition (CVD) method using vapor to chemically deposit a layer, or by an atomic layer deposition (ALD) method by stacking atomic layers one by one.

[0055] Figure 3 is a cross-sectional view of a display device according to an embodiment of the present specification.

[0056] In other words, Figure 3 The cross-sectional view schematically shows a region where the display panel 10 ′ of the display device 10 is bent.

[0057] Reference Figure 3 In the display device 10 according to the embodiment of the present specification, the first back plate 30 and the second back plate 33 for supporting the display panel 10' are attached below the display panel 10'. The first back plate 30 may be disposed in the display area AA and the first connection portion CoA1, and the second back plate 33 may be disposed to be spaced apart from the first back plate 30 by a selected distance.

[0058] In a region where the first back plate 30 and the second back plate 33 are spaced apart from each other, the display panel 10 ′ may be bent so that the lower surface of the first back plate 30 and the lower surface of the second back plate 33 can face each other.

[0059] A fixing member 31 may be disposed under the first back plate 30. The fixing member 31 may include an adhesive and a heat sink, and may include a metal layer capable of reflecting external light, but the embodiments of the present specification are not limited thereto.

[0060] An adhesive member 32 for connecting the fixing member 31 with the second back plate 33 may be provided under the fixing member 31. The adhesive member 32 may be a double-sided adhesive tape, a double-sided foam adhesive tape, or a double-sided foam adhesive pad.

[0061] For one supporting member, when the supporting member in the bending area BA is cut, the first backplane 30 is located above the fixing member 31 and below the display panel 10', and the second backplane 33 is located below the fixing member 31 on the rear surface portion of the display panel 10'. Here, by cutting and removing the supporting member in the bending area BA, the display panel 10' is exposed from the bending area BA, and then the bending protection layer 34 and the display panel 10' in the bending area BA are bent to be bonded to the fixing member 31 through the second backplane 33.

[0062] The first back plate 30 and the second back plate 33 may have the same height. In other embodiments, the first back plate 30 and the second back plate 33 may have different heights. In the present specification, the heights of the first back plate 30 and the second back plate 33 are not limited thereto.

[0063] The first back plate 30 and the second back plate 33 may have a selected level or higher of strength and thickness to enhance the rigidity of the display panel 10'. Since the first back plate 30 is formed to have a selected level or higher of strength and thickness to enhance the rigidity of the display panel 10', the first back plate 30 may not be formed on the display panel 10' that has a curved shape by bending in the bending area BA. The embodiments of the present specification are not limited thereto.

[0064] Based on the shape of the display panel 10' before bending, the second back plate 33 may be disposed below the display panel 10' and spaced apart from the first back plate 30. The second back plate 33 may be disposed below the display panel 10' to enhance the rigidity of the display panel 10' and maintain the display panel 10' in a planar state. Since the second back plate 33 is formed to have a selected level or higher level of strength and thickness to enhance the rigidity of the display panel 10', the second back plate 33 may not be formed on the display panel 10' corresponding to the portion of the bending area BA. The embodiments of the present specification are not limited thereto.

[0065] The fixing member 31 may support the surface of the display panel 10' between the first back plate 30 and the second back plate 33. The fixing member 31 may include, for example, metal to enhance the supporting strength of the first back plate 30 and the second back plate 33. In addition, the fixing member 31 may be made of a plastic material including one or more of the following: polycarbonate (PC), polyimide (PI), polyethylene naphthalate (PEN) and polyethylene terephthalate (PET). The embodiments of this specification are not limited thereto. In addition, the fixing member 31 may include one or a combination of stainless steel (SUS), glass, ceramic and metal.

[0066] The bending area BA of the display panel 10' may include an area in which the partition wall 94 is disposed, and the bending protection layer 34 may be disposed to overlap the partition wall 94. The bending protection layer 34 may include a polymer material and may prevent moisture from penetrating into the bending area BA.

[0067] The bending protection layer 34 may be disposed outside the display panel 10' in the bending area BA. The bending protection layer 34 may prevent deformation of the display panel 10' in the bending area BA and enable the display panel 10' to bend at a constant curvature. The bending protection layer 34 may be formed as a resin layer to compensate for the weakening of rigidity caused by the bending of the display panel 10' in the bending area BA. In addition, the bending protection layer 34 may be made of a polymer such as polyimide (PI) or polyethylene terephthalate (PET). When the bending protection layer 34 is a polymer film, the bending protection layer 34 may have a modulus of about 1 GPa to about 10 GPa. The embodiments of the present specification are not limited thereto.

[0068] The bending protection layer 34 may include a resin, and an ultraviolet (UV)-curable acrylic-based resin is used, but is not limited thereto. Specifically, the bending protection layer 34 may be formed of a resin-cured product that is subjected to a curing process after being coated with the resin. When an ultraviolet curing resin is used as the resin, ultraviolet curing may be performed.

[0069] The bending protection layer 34 may be disposed outside the display panel 10' to cover various signal lines between the packaging portion and the pad portion of the display panel 10'. Therefore, the bending protection layer 34 may protect the signal lines from external impact and prevent moisture from penetrating into the signal lines.

[0070] In addition, the bending protection layer 34 may be disposed outside the display panel 10' in the bending area BA, thereby enhancing the rigidity of the display panel 10' in the bending area BA from which the support member has been removed. For example, the bending protection layer 34 may include a micro-coating layer. The micro-coating layer MCL may be referred to as a micro-covering layer MCL. The micro-coating layer MCL may include a resin, and an acrylic-based resin curable by ultraviolet (UV) light may be used, but is not limited thereto. Specifically, the micro-coating layer MCL may be formed of a resin cured product that is subjected to a curing treatment after being coated with the resin. When an ultraviolet curable resin is used as the resin, ultraviolet curing may be performed.

[0071] The micro coating layer MCL may be disposed outside the display panel 10' in the bending area BA to cover various signal lines between the packaging portion and the pad portion of the display panel 10'. Therefore, the micro coating layer MCL may protect the signal lines from external impact and prevent moisture from penetrating into the signal lines.

[0072] In addition, the micro coating layer MCL may be disposed outside the display panel 10' in the bending area BA, thereby enhancing the rigidity of the display panel 10' in the bending area BA from which the support member has been removed. When the support member is engaged under the display panel 10' and the bending area BA is removed after bending, the first back plate 30 remains under the display panel 10' and the second back plate 33 remains above the bent display panel 10'. Therefore, although the rigidity of the display panel 10' may be weakened in the bending area BA from which the support member has been removed, the rigidity of the bending area BA may be enhanced by the micro coating layer MCL attached to the outside.

[0073] In addition, the micro-coating layer MCL may contain metal nanoparticles. The resin component is a material used when the bending protection layer 34 is formed as the micro-coating layer MCL. For example, in the case of 10 vol% of metal nanoparticles, a mixed solution of the resin component and the metal nanoparticles may have a thickness of about 6 μm, and the mixed solution may be applied with a total thickness of 60 μm including the bending protection layer 34. Here, vol% is a physical unit of volume, and represents the ratio of a material to a unit volume of 100%. Therefore, 10 vol% of metal nanoparticles means that the metal nanoparticles occupy a proportion of 10% in a 100% mixed solution.

[0074] The micro coating layer MCL formed through the process described above may contain metal nanoparticles, and when irradiated with high-intensity ultraviolet (UV) light, the ultraviolet light may be reflected by the metal nanoparticles.

[0075] By coating the micro coating layer MCL on the display panel 10', when irradiated with high-intensity ultraviolet (UV) light, the amount of ultraviolet light radiated to the bending area BA of the display panel 10' can be reduced, and the rigidity of the display panel 10' near the bending area BA can be locally enhanced. Therefore, compared with other areas, damage to the display panel 10' applied to the panel can be reduced, and the shortening of the panel life can be minimized.

[0076] A data driver D-IC may be disposed under the display panel 10 ′ in the non-display area NA.

[0077] A cover window 80 may be disposed above the display panel 10 ′.

[0078] The cover window 80 may include an optical film 81, an adhesive 82, and an upper substrate 83. The optical film 81 may include a polarizing film POL, but the embodiments of the present specification are not limited thereto. The adhesive 82 may be formed of one or more layers made of one or more of a transparent optically clear adhesive (OCA), a transparent optically clear resin (OCR), and a pressure-sensitive adhesive (PSA).

[0079] The upper substrate 83 may be provided at an end portion extending further than the end portion PE at the bent portion of the display panel 10'. The upper substrate 83 may be provided by applying black ink 84 to a portion corresponding to the non-display area NA to prevent light leakage from the non-display area NA of the display panel 10'.

[0080] like Figure 3 As shown, in the display device 10 according to the embodiment of the present specification, the optical film 81 can be set on the display panel 10', the upper substrate 83 can be set on the optical film 81 by the adhesive 82, the first back plate 30 can be set below the display panel 10', the fixing member 31 can be set below the first back plate 30, the second back plate 33 can be set below the fixing member 31 by the adhesive member 32, the bent display panel 10' can be set below the second back plate 33, and the bending protection layer 34 can be set below the bent display panel 10'.

[0081] Figure 4 is a cross-sectional view of a display region in a display device according to an embodiment of the present specification.

[0082] Reference Figure 4 In the display area AA of the display device 10 according to the embodiment of the present specification, the TR layer TFTL may be on the substrate SUB, the planarization layer PLN may be set on the TR layer TFTL, the pixel layer PXL may be set on the planarization layer PLN, the encapsulation layer ENCAP 200 may be set on the pixel layer PXL, and the touch layer TL may be set on the encapsulation layer ENCAP 200.

[0083] The substrate SUB may include a first substrate SUB1, an interlayer insulating film IPD, and a second substrate SUB2. The interlayer insulating film IPD may be located between the first substrate SUB1 and the second substrate SUB2. Since the substrate SUB is formed by the first substrate SUB1, the interlayer insulating film IPD, and the second substrate SUB2, moisture penetration may be prevented. For example, the first substrate SUB1 and the second substrate SUB2 may be polyimide (PI) substrates. The first substrate SUB1 may be referred to as a main PI substrate, and the second substrate SUB2 may be referred to as a secondary PI substrate.

[0084] On the substrate SUB, various patterns ACT, SD1, and GATE, various insulating films MBUF, ABUF1, ABUF2, GI, ILD1, ILD2, and PAS0, and various metal patterns TM, GM, ML1, and ML2 for forming transistors such as a driving transistor DRT may be disposed.

[0085] The TR layer TFTL may be disposed on the second substrate SUB2. In the TR layer TFTL, the multi-buffer layer MBUF may be disposed on the second substrate SUB2, and the first active buffer layer ABUF1 may be disposed on the multi-buffer layer MBUF.

[0086] The first metal layer ML1 and the second metal layer ML2 may be disposed on the first active buffer layer ABUF1. Here, the first metal layer ML1 and the second metal layer ML2 may be light shielding layers LS for shielding light.

[0087] The second active buffer layer ABUF2 may be disposed on the first metal layer ML1 and the second metal layer ML2. The active layer ACT of the driving transistor DRT may be disposed on the second active buffer layer ABUF2.

[0088] The gate insulating film GI may be provided to cover the active layer ACT.

[0089] The gate electrode GATE of the driving transistor DRT may be disposed on the gate insulating film GI. In this case, the gate material layer GM may be disposed on the gate insulating film GI together with the gate electrode GATE of the driving transistor DRT at a position different from the formation position of the driving transistor DRT.

[0090] The first interlayer insulating layer ILD1 may be provided to cover the gate electrode GATE and the gate material layer GM. The metal pattern TM may be provided on the first interlayer insulating layer ILD1. The metal pattern TM may be located at a position different from the formation position of the driving transistor DRT. The second interlayer insulating film ILD2 may be provided to cover the metal pattern TM on the first interlayer insulating film ILD1.

[0091] Two first source-drain electrode patterns SD1 may be disposed on the second interlayer insulating film ILD2. One of the two first source-drain electrode patterns SD1 is a source node of the driving transistor DRT, and the other is a drain node of the driving transistor DRT.

[0092] The two first source-drain electrode patterns SD1 may be electrically connected to one side and the other side of the active layer ACT through contact holes of the second interlayer insulating film ILD2 , the first interlayer insulating film ILD1 , and the gate insulating film GI.

[0093] The second interlayer insulating film ILD2 may include a 2-1 interlayer insulating film ILD2-1 and a 2-2 interlayer insulating film ILD2-2. The 2-1 interlayer insulating film ILD2-1 may be positioned to cover the metal pattern TM. The 2-2 interlayer insulating film ILD2-2 may be positioned on the 2-1 interlayer insulating film ILD2-1.

[0094] A portion of the active layer ACT overlapping the gate electrode GATE is a channel region. One of the two first source-drain electrode patterns SD1 may be connected to one side of the channel region in the active layer ACT, and the other of the two first source-drain electrode patterns SD1 may be connected to the other side of the channel region in the active layer ACT.

[0095] A passivation layer PAS0 may be disposed on the 2-2 interlayer insulating layer ILD2-2. The passivation layer PAS0 is disposed to cover the two first source-drain electrode patterns SD1.

[0096] The planarization layer PLN may be disposed on the passivation layer PAS0. The planarization layer PLN may include a first planarization layer PLN1 and a second planarization layer PLN2. The first planarization layer PLN1 may be disposed on the passivation layer PAS0.

[0097] A second source-drain electrode pattern SD2 may be disposed on the first planarization layer PLN1. The second source-drain electrode pattern SD2 may be connected to one of the two first source-drain electrode patterns SD1 (corresponding to the first electrode 100) through a contact hole of the first planarization layer PLN1. Figure 2 The second node N2 of the driving transistor DRT in the sub-pixel SP).

[0098] The second planarization layer PLN2 may be disposed to cover the second source-drain electrode pattern SD2 .

[0099] The light emitting element layer PXL may be disposed on the second planarization layer PLN2. Referring to the stacked structure of the light emitting element layer PXL, the light emitting element layer PXL may be disposed on the second planarization layer PLN2 of the anode electrode AE. The anode electrode AE ​​may be electrically connected to the second source-drain electrode pattern SD2 through the contact hole of the second planarization layer PLN2.

[0100] The bank BANK may be provided to cover a portion of the anode electrode AE. A portion of the bank BANK corresponding to the emission area EA of the sub-pixel SP may be opened.

[0101] A portion of the anode electrode AE ​​may be exposed to the opening (opening portion) of the bank BANK. The light emitting layer EL may be located on the side surface of the bank BANK and the opening (opening portion) of the bank BANK. All or part of the light emitting layer EL may be located between adjacent banks BANK.

[0102] The light emitting layer EL may be in contact with the anode electrode AE ​​in the opening of the bank BANK. A cathode electrode CE may be formed on the light emitting layer EL.

[0103] The light emitting element PX may be formed of an anode electrode AE, a light emitting layer EL, and a cathode electrode CE. The light emitting layer EL may include an organic film.

[0104] The encapsulation layer ENCAP 200 may be disposed on the light emitting element layer PXL.

[0105] The encapsulation layer 200 may have a single-layer structure or a multi-layer structure. Figure 4 As shown, the encapsulation layer 200 may include a first encapsulation layer PAS1 , a second encapsulation layer PCL (also referred to as a particle covering layer PCL in some embodiments), and a third encapsulation layer PAS2 .

[0106] For example, the first encapsulation layer PAS1 and the third encapsulation layer PAS2 may be inorganic films, and the second encapsulation layer PCL may be an organic film. The second encapsulation layer PCL may be referred to as a particle covering layer PCL.

[0107] Among the first encapsulation layer PAS1, the second encapsulation layer PCL and the third encapsulation layer PAS2, the second encapsulation layer PCL may be the thickest. Therefore, the second encapsulation layer PCL may be used as a planarization layer. The first encapsulation layer PAS1 may be referred to as a first inorganic encapsulation layer, the second encapsulation layer PCL may be referred to as an organic encapsulation layer, and the third encapsulation layer PAS2 may be referred to as a second inorganic encapsulation layer.

[0108] The first encapsulation layer PAS1 may be disposed on the cathode electrode CE and may be disposed closest to the light emitting element PX. The first encapsulation layer PAS1 may be made of an inorganic insulating material capable of low temperature deposition. For example, the first encapsulation layer PAS1 may be made of silicon nitride (SiN x ), silicon oxide (SiO x), silicon oxynitride (SiON) or aluminum oxide (Al2O3). Since the first encapsulation layer PAS1 is deposited in a low temperature atmosphere, the first encapsulation layer PAS1 can prevent damage to the light emitting layer EL including an organic material susceptible to a high temperature atmosphere during the deposition process.

[0109] The second encapsulation layer PCL may be formed to have a smaller area than the first encapsulation layer PAS1. In this case, the second encapsulation layer PCL may be formed to expose both ends of the first encapsulation layer PAS1. The second encapsulation layer PCL may be used as a buffer for reducing stress between layers caused by bending of the display device 10, and for enhancing planarization performance. For example, the second encapsulation layer PCL may be made of: acrylic resin, epoxy resin, polyimide, polyethylene, or silicon oxycarbide (SiOC), and may be made of an organic insulating material. For example, the second encapsulation layer PCL may be formed using an inkjet method.

[0110] The third encapsulation layer PAS2 may be formed to cover the upper surface and side surface of each of the second encapsulation layer PCL and the first encapsulation layer PAS1 on the substrate SUB on which the second encapsulation layer PCL is formed. The third encapsulation layer PAS2 may minimize or block external moisture or oxygen from penetrating into the first encapsulation layer PAS1 and the second encapsulation layer PCL. For example, the third encapsulation layer PAS2 may be made of a material such as silicon nitride (SiN x ), silicon oxide (SiO x ), silicon nitride oxide (SiON) or aluminum oxide (Al2O3) inorganic insulating materials

[0111] Reference Figure 4 , the touch layer TL may be disposed on the encapsulation layer 200. When the touch layer TL is a type in which the touch sensor TS is embedded in the display panel 10', the touch sensor TS may be disposed on the encapsulation layer 200. The structure of the touch sensor will be described in detail below.

[0112] A touch buffer film T-BUF may be disposed on the encapsulation layer 200. A touch sensor TS and a touch interlayer insulating layer T-ILD may be disposed on the touch buffer layer T-BUF.

[0113] The touch sensor TS may include a touch sensor metal TSM and a bridge metal BRG located at different layers.

[0114] The touch interlayer insulating layer T-ILD may be disposed between the touch sensor metal TSM and the bridge metal BRG.

[0115] For example, the touch sensor metal TSM may include a first touch sensor metal TSM, a second touch sensor metal TSM, and a third touch sensor metal TSM disposed adjacent to each other. The third touch sensor metal TSM may be disposed between the first touch sensor metal TSM and the second touch sensor metal TSM, and when the first touch sensor metal TSM and the second touch sensor metal TSM are electrically connected, the first touch sensor metal TSM and the second touch sensor metal TSM may be electrically connected through a bridge metal BRG at different layers. The bridge metal BRG may be insulated from the third touch sensor metal TSM by the touch interlayer insulating layer T-ILD.

[0116] When the touch sensor TS is formed on the display panel 10', a chemical solution (such as a developer or an etchant) used in the process may be introduced, or external moisture may be introduced. By arranging the touch sensor TS on the touch buffer film T-BUF, it is possible to prevent the chemical solution, moisture, etc. from penetrating the light-emitting layer EL containing an organic material during the manufacturing process of the touch sensor TS. Therefore, the touch buffer film T-BUF can prevent damage to the light-emitting layer that is susceptible to the chemical solution or moisture.

[0117] The touch buffer film T-BUF is made of the following organic insulating material to prevent damage to the light-emitting layer EL containing an organic material susceptible to high temperature: the organic insulating material can be formed at a low temperature less than a selected temperature (e.g., 100°C) and has a low dielectric constant of 1 to 3. For example, the touch buffer film T-BUF may be made of an acrylic-based, epoxy-based, or siloxane-based material. When the display device 10 is bent, the encapsulation layer ENCAP may be damaged, and the touch sensor metal located on the touch buffer film T-BUF may be damaged. Even when the display device 10 is bent, the touch buffer film T-BUF made of an organic insulating material and having a planarization property can prevent damage to the encapsulation layer 200 and / or damage to the metal TSM and BRG forming the touch sensor TS.

[0118] A protection layer (PAC) may be disposed on the touch sensor TS and the touch interlayer insulating layer T-ILD. The protection layer PAC may be disposed to cover the touch sensor TS. The protection layer PAC may be made of an organic material.

[0119] Meanwhile, the encapsulation layer 200 according to the embodiment of the present specification may be formed on the display panel 10' by a manufacturing device. The manufacturing device may include a resin coating valve (injection valve) and a coating nozzle. Therefore, the process of forming the encapsulation layer 200 may be performed in a state where a chip on film (COF), a flexible printed circuit board (FPCB), an FPC top pad, etc. are provided.

[0120] The encapsulation layer 200 may be formed by coating a mixed solution of a resin component and aluminum (Al) nanoparticles through a coating nozzle in a state where a resin coating valve is located at an end portion of the second display panel 10 ′.

[0121] The resin component is a material used when the bending protection layer 34 is formed as a micro coating layer MCL. In the case of 10 vol% of aluminum nanoparticles, the mixed solution of the resin component and the aluminum nanoparticles may have a thickness of 10 nm to 30 nm, and the mixed solution may be applied with a total thickness of 60 nm. Here, vol% is a physical unit of volume and represents the ratio of a material to a unit volume of 100%. Therefore, 10 vol% of aluminum nanoparticles means that the aluminum nanoparticles occupy a proportion of 10% in the 100% mixed solution.

[0122] The encapsulation layer 200 formed through the process described above may include aluminum (Al) nanoparticles to reflect ultraviolet (UV) light when irradiated with ultraviolet light.

[0123] Here, it is found that aluminum nanoparticles have a higher ultraviolet reflectivity than other metal nanoparticles. When the wavelength (λ) of ultraviolet light is 350nm, the ultraviolet reflectivity of aluminum nanoparticles is found to be 0.9. Therefore, it can be seen that when irradiated with ultraviolet light having the same wavelength, aluminum has a higher reflectivity than other metals.

[0124] The mixed solution of the resin component and the aluminum nanoparticles is a composite material of resin and metal, and for ultraviolet light having a wavelength (λ) of 350 nm, 90% of the amount of ultraviolet light radiated to the encapsulation layer 200 may be reflected by the reflectivity of the aluminum nanoparticles.

[0125] When the mixed solution of the resin component and the aluminum nanoparticles is a composite material and is coated on the bending protection layer 34 or the display panel 10' with a thickness of 60nm, it is found that when the aluminum nanoparticles are precipitated at 10vol% in the mixed solution, the values ​​of reflectivity and modulus are high. When the aluminum nanoparticles are precipitated to a thickness of 6nm or less (which is 10Vol% of the total thickness of the encapsulation layer 200 of 60nm), the ultraviolet reflectivity is shown to be about 90%, and the modulus is shown to be about 1625MPa.

[0126] As described above, by forming the bending protection layer 34 and the encapsulation layer 200 outside the bending portion of the display panel 10 ′ in the bending area BA and reflecting ultraviolet light through metal nanoparticles when irradiated with ultraviolet light, the panel can be prevented from being cracked and damaged.

[0127] In addition, when manufacturing the display panel 10 ′, ultraviolet radiation may be locally controlled by the precipitation amount of the metal nanoparticles contained in the encapsulation layer 200 in the bending area BA susceptible to ultraviolet radiation.

[0128] In addition, when manufacturing the display panel 10 ′, the compressive rigidity of the bending area BA of the display panel 10 ′ may be enhanced by reflecting ultraviolet light through the metal nanoparticles included in the encapsulation layer 200 .

[0129] Meanwhile, a driving integrated circuit D-IC may be disposed on the other surface of the pad portion of the display panel 10 ′.

[0130] The driving integrated circuit D-IC may be mounted on the display panel 10' through a die bonding process or a surface mounting process. Based on the bending state, the driving integrated circuit D-IC may be disposed under the display panel 10'. For example, the driving integrated circuit D-IC may be disposed under the pad portion.

[0131] In this case, a flexible printed circuit board (not shown) may be disposed between the pad portion PAD and the driving integrated circuit D-IC, and the driving integrated circuit D-IC may be located on a back surface of the flexible printed circuit board (FPCB).

[0132] The driving integrated circuit D-IC generates a data signal and a gate control signal based on the image data and the timing synchronization signal provided from the external host driving system. In addition, the driving integrated circuit D-IC can provide the data signal to the data line of each pixel through the pad part, and provide the gate control signal to the gate driver 13.

[0133] The driving integrated circuit D-IC may be mounted on a chip mounting area defined in the display panel 10 ′ and electrically connected to the pad portion, and may be connected to each of signal lines of a gate driver and a pixel array unit provided on the display panel 10 ′.

[0134] Since the driving integrated circuit D-IC generates considerable heat, it is necessary to effectively dissipate heat from the driving integrated circuit D-IC. The driving integrated circuit D-IC may be mainly dissipated heat by the support plate.

[0135] The pad portion may be provided on one side portion of the display panel 10' on which the driving integrated circuit D-IC is mounted. The pad portion may be electrically connected to an FPCB on which a circuit board is mounted on a rear surface of the display panel 10'.

[0136] One side of the FPCB may be electrically connected to a pad portion disposed on one side portion of the display panel 10 ′ through a film attachment process using a conductive adhesive layer and may be located on a rear surface of the display panel 10 ′.

[0137] In this case, the conductive adhesive layer may use, for example, an anisotropic conductive film (ACF).

[0138] The circuit board may provide image data and a timing synchronization signal provided from a host driving system to the driving integrated circuit, and provide a voltage required to drive each of the pixel array unit, the gate driving circuit unit, and the driving integrated circuit.

[0139] The FPCB connected to the display panel 10 ′ at one side may be formed to extend to be bent to a rear surface of a front surface portion of the display panel 10 ′ together with the display panel 100 .

[0140] The FPCB extending from one side connected to the display panel 10 ′ may be located on the back surface of the display panel 10 ′ that is not covered by the pad portion of the display panel 10 ′.

[0141] Therefore, at least a portion of the FPCB may be in contact with the back surface of the display panel 10 ′.

[0142] The display device 10 according to an embodiment of the present specification refers to a flexible display device, and may be used in the same meaning as a bendable display device, a rollable display device, an unbreakable display device, a foldable display device, and the like.

[0143] The driving integrated circuit D-IC may be implemented by a thin film transistor TFT in the non-display area NA. The driving integrated circuit D-IC may be referred to as a gate-in-panel (GIP) circuit unit. The GIP circuit unit GIP may include a gate driver having a GIP structure, and in this case, the gate driver is formed by a bottom-gate thin film transistor BG-T, and the source metal film and the drain metal film of the bridge wire may extend and may be connected to the drain electrode of the BG thin film transistor.

[0144] In addition, some components such as the driver integrated circuit D-IC may be mounted on a separate printed circuit board and may be coupled to a connection interface (pad / bump, pin, etc.) provided in the non-display area NA using a circuit film such as an FPCB, a chip on film (COG), or a tape carrier package (TCP). Since the non-display area NA may be bent together with the connection interface, the printed circuit (COF, PCB, etc.) may be located on the rear surface (or back surface) of the display device 1.

[0145] The display device 10 according to the present specification may include various additional elements for generating various signals or driving the pixels PX in the display area. Additional elements for driving pixels may include inverter circuits, multiplexers, electrostatic discharge circuits, etc. The display device 10 according to the present specification may also include additional elements associated with functions other than pixel driving. For example, the display device 10 according to the present specification may include additional elements for providing a touch detection function, a user authentication function (e.g., fingerprint recognition), a multi-level pressure detection function, a tactile feedback function, etc. The above-mentioned additional elements may be located in the non-display area NA and / or in an external circuit connected to the connection interface.

[0146] Various portions of the display device 10 according to the present specification may be bent along a bending line. The bending line may extend horizontally, vertically, or diagonally. Therefore, the display device 10 according to an embodiment of the present specification may be bent in a combination of horizontal, vertical, and diagonal directions based on the desired design.

[0147] One or more edges of the display device 10 according to the present specification may be bent from the center portion along a bending line. The bending line may be located near the edge of the display device 10, but may extend across the center portion of the display device 10 or extend diagonally from one or more corners of the display device 10. Such a structure may make the display device 10 a foldable display device or a display device for displaying images on two folded surfaces.

[0148] Since one or more portions of the display device 10 can be bent, the display device 10 according to the present specification can be defined as a substantially flat portion and a bent portion. A portion of the display device 10 can be referred to as a substantially flat planar area. A portion of the display device 10 can be bent at a predetermined angle, and such a portion can be referred to as a bent area or a curvature area. The curvature area includes a bending area that is actually bent at a predetermined bending radius.

[0149] The term "substantially flat" also includes portions that are not completely flat. For example, in some embodiments, a concave center portion and a convex center portion may also be described as a substantially flat portion. One or more bends are located next to the concave center portion or the convex center portion and are bent inward or outward at a certain angle relative to the bending axis along the bend line. The bending radius of the curvature area is smaller than the bending radius of the flat area. In other words, the term "substantially flat portion" refers to a portion having a smaller curvature than an adjacent area.

[0150] Depending on the position of the bend line, when the portion on one side of the bend line is positioned toward the center of the display device 10, the portion on the other side of the bend line is positioned toward the edge of the display device 10. The portion disposed toward the center of the display device 10 may also be described as a central portion, and the portion positioned toward the edge of the display device 10 may be described as an edge portion. In some cases, the central portion of the display device 10 may be substantially flat, and its edge portion may be a bend portion. The substantially flat portion may also be located on the edge portion. In addition, in some shapes of the display device 10, the bend zone may be disposed between two substantially flat portions.

[0151] When the non-display area NA is bent, the non-display area NA may be invisible or only minimally visible from the front surface of the display device 10. The portion of the non-display area NA visible from the front surface of the display device 10 may be covered by a frame. The frame may be an independent structure, or may be formed by a housing or other suitable element. The portion of the non-display area NA visible from the front surface of the display device 10 may be hidden under an opaque mask layer such as black ink (e.g., a polymer filled with carbon black). Such an opaque mask layer may be provided on any layer (touch sensor layer, polarizing layer, particle covering layer, etc.) included in the display device 10.

[0152] In some embodiments, the bent portion of the display device 10 may include a display area that displays an image. In other words, the bending line may be disposed in the display area such that at least some pixels of the display area are included in the bent portion.

[0153] Figure 5 is a diagram illustrating an example of solidifying a particle cover layer PCL by surrounding a through hole according to an embodiment of the present specification.

[0154] Reference Figure 5 , the surrounding through hole SRH according to the embodiment of the present specification may be formed in the wafer substrate WSUB in the bezel area BZA. In other words, the surrounding through hole SRH may be formed in the wafer substrate WSUB including the display panel 10 ′.

[0155] Although not shown in the drawings, the wafer substrate WSUB may include a substrate SUB and a planarization layer PLN in the non-display area NA, and include a substrate SUB, a TR layer TFTL, a planarization layer PLN, and a pixel layer PXL in the display area AA. The wafer substrate WSUB may have a first thickness T1 to include the substrate SUB, the TR layer TFTL, the planarization layer PLN, and the pixel layer PXL.

[0156] exist Figure 5 In the embodiment, one or more anode electrode AE ​​patterns may be provided on the wafer substrate WSUB.

[0157] The encapsulation layer ENCAP 200 may be disposed on the wafer substrate WSUB and one or more anode electrode AE ​​patterns. In other words, the first encapsulation layer PAS1 may be disposed on the wafer substrate WSUB and one or more anode electrode AE ​​patterns, the second encapsulation layer PCL may be disposed on the first encapsulation layer PAS1, and the third encapsulation layer PAS2 may be disposed on the second encapsulation layer PCL.

[0158] When the resin composition is applied to the first encapsulation layer PAS1 using an inkjet method in the manufacturing process to flow toward the end of the unit, the second encapsulation layer PCL is formed by radiating ultraviolet (UV) light emitted by the ultraviolet supply device UVL to the resin composition through the surrounding through hole SRH and curing the resin composition. Therefore, the end (or end portion) END1 of the second encapsulation layer PCL can be located at a position corresponding to the surrounding through hole SRH. In some embodiments, according to a plan view, the end END1 of the second encapsulation layer PCL overlaps with the surrounding through hole SRH. In some embodiments, the surrounding through hole SRH has a transparent material therein.

[0159] The second encapsulation layer PCL may be made of an organic insulating material, such as acrylic resin, epoxy resin, polyimide, polyethylene, or silicon oxycarbide (SiOC).

[0160] like Figure 5 As shown, the surrounding through hole SRH may be formed in the wafer substrate WSUB between the anode electrode AE ​​pattern located at the cell end in the bezel area BZA and the anode electrode AE ​​pattern next to the anode electrode AE ​​pattern.

[0161] In some embodiments, the surround vias SRH extend through the wafer substrate WSUB.

[0162] As shown, the first encapsulation layer PAS1 is located on the wafer substrate WSUB. The first encapsulation layer PAS1 has a first surface FS and a second surface SS opposite to the first surface FS. The second encapsulation layer PCL is located on the second surface SS of the first encapsulation layer PAS1. As shown, the second encapsulation layer PCL has an end portion END1 having a triangular cross-section with an inclined side surface ISS. However, the shape of the end portion END1 is not limited to Figure 5 Here, as shown, the end portion END1 of the second encapsulation layer PCL overlaps the surrounding through hole SRH according to a plan view.

[0163] In addition, the end portion END1 of the second encapsulation layer PCL has an inclination angle θ between the inclined side surface ISS and the second surface SS of the first encapsulation layer PAS1 .

[0164] In some embodiments, the end portion END1 of the second encapsulation layer PCL completely overlaps the surrounding through hole SRH according to a plan view. Figure 5 The illustrated width W1 of the end portion END1 of the second encapsulation layer PCL may be smaller than the width W2 of the surrounding through hole SRH such that the end portion END1 of the second encapsulation layer PCL completely overlaps the surrounding through hole SRH according to a plan view.

[0165] In addition, the third encapsulation layer PAS2 is disposed on the second encapsulation layer PCL. The third encapsulation layer also has an end portion END2, and the end portion END2 of the third encapsulation layer PAS2 is on the end portion END1 of the second encapsulation layer PCL and covers the end portion END1 of the second encapsulation layer PCL. In some embodiments, according to a plan view, the end portion END2 of the third encapsulation layer PAS2 overlaps with the surrounding through hole SRH.

[0166] Figure 6 is a block diagram schematically showing a system configuration of a display device according to an embodiment of the present specification.

[0167] Reference Figure 6 The display device 10 according to the embodiment of the present specification may include a display panel 10 ′ and a display driving circuit.

[0168] The display driving circuit is a circuit for driving the display panel 10 ′, and may include a data driver 12 , a gate driver 13 , a controller 14 , and the like.

[0169] The display panel 10' may include a display area AA that displays an image and a non-display area NA that does not display an image. The non-display area NA may be an area outside the display area AA, and is also referred to as a frame area BZA. All or a portion of the non-display area NA may be an area visible from the front surface of the display device 10, or may be an area that is bent and not visible from the front surface of the display device 10.

[0170] The display panel 10' may include a substrate SUB and a plurality of sub-pixels SP disposed on the substrate SUB. In addition, the display panel 10' may further include various types of signal lines for driving the plurality of sub-pixels SP.

[0171] The display device 10 according to the embodiment of the present specification may be a liquid crystal display, or a light-emitting display device in which the display panel 10' itself emits light. When the display device 10 according to the embodiment of the present specification is a self-luminous display device, each of the plurality of sub-pixels SP may include a light-emitting element PX.

[0172] For example, the display device 10 according to the embodiment of the present specification may be an organic light emitting diode display device in which the light emitting element PX is implemented as an organic light emitting diode (OLED). For another example, the display device 10 according to the embodiment of the present specification may be an inorganic light emitting display device in which the light emitting element is implemented as a light emitting diode based on an inorganic material. For another example, the display device 10 according to the embodiment of the present specification may be a quantum dot display device in which the light emitting element is implemented as a quantum dot, which is a semiconductor crystal that emits light by itself.

[0173] The structure of each subpixel SP may vary according to the type of the display device 10. For example, if the display device 10 is a self-luminous display device in which the subpixel SP emits light itself, each subpixel SP may include a self-luminous light emitting element, one or more transistors, and one or more capacitors.

[0174] For example, the various types of signal lines may include a plurality of data lines DL through which data signals (referred to as data voltages or image signals) are transmitted, a plurality of gate lines GL through which gate signals (referred to as scan signals) are transmitted, and the like.

[0175] The plurality of data lines DL and the plurality of gate lines GL may intersect each other. Each of the plurality of data lines DL may be disposed to extend along a first direction. Each of the plurality of gate lines GL may be disposed to extend along a second direction.

[0176] Here, the first direction may be a column direction, and the second direction may be a row direction. The first direction may be a row direction, and the second direction may be a column direction.

[0177] The data driver 12 is a circuit configured to drive the plurality of data lines DL and may output data signals to the plurality of data lines DL. The data driver 12 may provide data voltages to the display panel 100.

[0178] The gate driver 13 is a circuit configured to drive the plurality of gate lines GL and may output gate signals to the plurality of gate lines GL. The gate driver 13 may provide the gate signals to the display panel 100.

[0179] The controller 14 may be a device configured to control the data driver 12 and the gate driver 13. The controller 14 may control a driving timing of a plurality of data lines DL and a driving timing of a plurality of gate lines GL.

[0180] The controller 14 may provide a data driving control signal DCS to the data driver 12 to control the data driver 12. The controller 14 may provide a gate driving control signal GCS to the gate driver 13 to control the gate driver 13.

[0181] The controller 14 may receive input image data from the host system 15 and provide image data Data to the data driver 12 based on the input image data.

[0182] The data driver 12 may provide data signals to the plurality of data lines DL according to driving timing control of the controller 14 .

[0183] The data driver 12 may receive digital image data Data from the controller 14 , convert the received image data Data into analog data signals, and output the analog data signals to a plurality of data lines DL.

[0184] The gate driver 13 may provide gate signals to the plurality of gate lines GL according to the timing control of the controller 14. The gate driver 13 may receive a first gate voltage corresponding to an on-level voltage, a second gate voltage corresponding to an off-level voltage, and various gate driving control signals GCS, may generate gate signals, and may provide the generated gate signals to the plurality of gate lines GL.

[0185] For example, the data driver 12 may be connected to the display panel 10' using a tape automated bonding (TAB) method, connected to a bonding pad of the display panel 10' using a chip on glass (COG) or chip on panel (COP) method, or connected to the display panel 10' using a chip on film (COF) method.

[0186] The gate driver 13 may be connected to the display panel 10' using a TAB method, may be connected to a bonding pad of the display panel 10' using a COG or COP method, or may be connected to the display panel 10' using a COF method. Alternatively, the gate driver 13 may be formed in a non-display area NA of the display panel 10' of a gate-in-panel (GIP) type. The gate driver 13 may be disposed on or connected to the substrate SUB. In other words, when the gate driver 13 is a GIP type, the gate driver 13 may be disposed in a non-display area NA of the substrate SUB. When the gate driver 13 is a COG type, a COF type, etc., the gate driver 13 may be connected to the substrate.

[0187] Meanwhile, a driving circuit of at least one of the data driver 12 and the gate driver 13 may be disposed in the display area AA of the display panel 10'. For example, a driving circuit of at least one of the data driver 12 and the gate driver 13 may be disposed not to overlap with the sub-pixel SP, and may be disposed to partially or completely overlap with the sub-pixel SP.

[0188] The data driver 12 may be connected to one side (e.g., the upper side or the lower side) of the display panel 10'. Depending on a driving method, a panel design method, etc., the data driver 12 may be connected to both sides (e.g., the upper side and the lower side) of the display panel 10', or to two or more of the four side surfaces of the display panel 10'.

[0189] The gate driver 13 may be connected to one side (e.g., the left side or the right side) of the display panel 10'. Depending on a driving method, a panel design method, etc., the gate driver 13 may be connected to both sides (e.g., the left side and the right side) of the display panel 10', or to two or more of the four side surfaces of the display panel 10'.

[0190] The controller 14 may be implemented as a separate component from the data driver 12 , or implemented as an integrated circuit by being integrated with the data driver 12 .

[0191] The controller 14 may be a timing controller used in a typical display technology, a control device capable of further performing other control functions in addition to the timing controller, a control device different from the timing controller, or a circuit in the control device. The controller 14 may be implemented as various circuits or electronic components, such as an integrated circuit (IC), a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), and a processor.

[0192] The controller 14 may be electrically connected to the data driver 12 and the gate driver 13 through a PCB, an FPCB, or the like.

[0193] The controller 14 may send and receive signals to and from the data driver 12 according to one or more selected interfaces. Here, for example, the interface may include a low voltage differential signaling (LVDS) interface, an embedded panel interface (EPI), a serial peripheral interface (SPI), etc.

[0194] Reference Figure 6 , the display device 10 according to the embodiment of the present specification may include one or more opening areas OA in which at least a portion of the substrate SUB has been removed.

[0195] One or more electro-optical devices (not shown) may be provided in the following area: at least a portion of the area overlaps with the opening area OA. The one or more electro-optical devices may include, for example, one or more of a shooting device such as a camera (image sensor), a detection sensor such as a proximity sensor, and an illumination sensor.

[0196] For example, a photographing device such as a camera may be located under the first opening area OA1 , and a detection sensor may be located under the first opening area OA1 in the second opening area OA2 .

[0197] The electro-optical device may be located under the substrate SUB, and at least a portion of the electro-optical device may be positioned to overlap the opening area OA.

[0198] The first opening area OA1 and the second opening area OA2 may have various shapes, such as a circular shape, an elliptical shape, a quadrangular shape, a hexagonal shape, or an octagonal shape. The shapes of the first opening area OA1 and the second opening area OA2 may be the same or different. The area of ​​the first opening area OA1 may be the same or different from the area of ​​the second opening area OA2.

[0199] For convenience of description, it is assumed that the first opening area OA1 and the second opening area OA2 have a circular shape and have the same area, but the present disclosure is not limited thereto.

[0200] Meanwhile, one or more opening areas OA may be located in the region where the substrate SUB has been removed, and the opening area OA may be a non-display area NA where the sub-pixel SP is not disposed.

[0201] The opening area OA located in the display area AA is also referred to as a “hole in display area (HiAA)”.

[0202] The signal lines (eg, the data lines DL and the gate lines GL) disposed on the substrate SUB may be disposed near the opening area OA (or bypass the opening area OA).

[0203] In order to provide both an image display function and a touch sensing function, the display device 10 according to an embodiment of the present specification may include a touch sensor and a touch sensing circuit for detecting whether a touch is generated by a touch object such as a finger or a pen, or for detecting a touch position by sensing the touch sensor.

[0204] The touch sensing circuit may include a touch driving circuit 16 for driving and sensing the touch sensor and generating and outputting touch sensing data, a touch controller 17 for sensing the occurrence of a touch or detecting a touch position using the touch sensing data, and the like.

[0205] The touch sensor may include a plurality of touch electrodes. The touch sensor may also include a plurality of touch wires for electrically connecting the plurality of touch electrodes to the touch driving circuit 16.

[0206] The touch sensor may exist outside the display panel 10 ′ in the form of a touch panel, or exist inside the display panel 10 ′.

[0207] When the touch sensor exists outside the display panel 10' in the form of a panel, the touch sensor is called an external type touch sensor. When the touch sensor is an external type, the touch panel and the display panel 10' can be manufactured separately and coupled during the assembly process. The external type touch panel may include a touch panel substrate and a plurality of touch electrodes provided on the touch panel substrate.

[0208] When the touch sensor exists inside the display panel 10 ′, the touch sensor may be formed on the substrate SUB together with display driving-related signal lines, electrodes, etc. during a manufacturing process of the display panel 10 ′.

[0209] The touch driving circuit 16 may provide a touch driving signal to at least one of the plurality of touch electrodes, and generate touch sensing data by sensing at least one of the plurality of touch electrodes.

[0210] The touch sensing circuit may perform touch sensing using a self-capacitance sensing method or a mutual capacitance sensing method.

[0211] When the touch sensing circuit performs touch sensing using a self-capacitance sensing method, the touch sensing circuit may perform touch sensing based on capacitance between each touch electrode and a touch object (eg, a finger or a pen).

[0212] According to the self-capacitance sensing method, each of the plurality of touch electrodes may function as both a driving touch electrode and a sensing touch electrode. The touch driving circuit 160 may drive all or some of the plurality of touch electrodes and sense all or some of the plurality of touch electrodes.

[0213] When the touch sensing circuit performs touch sensing using a mutual capacitance sensing method, the touch sensing circuit may perform touch sensing based on capacitance between touch electrodes.

[0214] According to the mutual capacitance sensing method, a plurality of touch electrodes are divided into driving touch electrodes and sensing touch electrodes. The touch driving circuit 16 may drive the driving touch electrodes and sense the sensing touch electrodes.

[0215] The touch driving circuit 16 and the touch controller 17 included in the touch sensing circuit may be implemented as separate devices or as a single device. In addition, the touch driving circuit 16 and the data driver 12 may be implemented as separate devices or as a single device.

[0216] The display device 10 may further include a power supply circuit for supplying various types of power to the display driving circuit and / or the touch sensing circuit, etc.

[0217] The display device 10 according to an embodiment of the present specification may be a mobile terminal such as a smartphone or a tablet, a monitor or TV having various sizes, etc., and is not limited thereto, and may be a display device having various types and sizes that can display information or images.

[0218] Figure 7 is a view showing a display area, a bending area, and a pad area in a display panel according to an embodiment of the present specification.

[0219] Reference Figure 7 The display panel 10 ′ according to the embodiment of the present specification includes a display area AA and a non-display area surrounding the display area AA.

[0220] The non-display area may include opening areas OA1 and OA2 , a bezel area BZA, a bending area BA, a pad area PA, and the like.

[0221] A plurality of sub-pixels for displaying an image are located in the display area AA. In addition, one or more signal lines SL are provided in the display area AA.

[0222] The signal lines SL may include data lines, through which data signals are provided to the sub-pixels, and gate signal lines, through which gate signals are provided to the sub-pixels.

[0223] Figure 7 The signal line SL shown may include a touch sensor embedded in the display panel 10 ′. For example, a touch driving signal output from a touch driving circuit may be input to the signal line SL.

[0224] Hereinafter, the signal line SL will be described based on the assumption that the signal line SL is a data line through which a data signal is provided to a sub-pixel, but is not limited thereto.

[0225] Reference Figure 7 , the frame area is located near the display area AA. For example, the top frame BZ-T may be located on the top side of the display area AA, the left frame BZ-L may be located on the left side of the display area AA, the right frame BZ-R may be located on the right side of the display area AA, and the bottom frame BZ-B may be located on the bottom side of the display area AA.

[0226] For example, in the left bezel area and / or the right bezel area, the gate driving circuit may be provided in a GIP type, or the gate driving circuit may be provided in a COG type, a COF type, or the like.

[0227] In the top frame area and / or the bottom frame area, the data driving circuit may be connected to the display panel 10' using a TAB method. Alternatively, at the pad portion PAD, the data driving circuit may be connected to the display panel 10' using a COG method or a COP method. Alternatively, the data driving circuit may be implemented using a COF method and may be connected to the display panel 10' in the frame area.

[0228] exist Figure 7 In the embodiment, the bending area BA and the pad area PA are marked separately from the bottom frame BZ-B to distinguish the bending area BA from the pad area PA. However, the bending area BA and the pad area PA may be included in the bottom frame BZ-B. In this specification, for the convenience of description, the bottom frame BZ-B and the bending area BA are described separately, but the display device according to the embodiment of this specification is not limited thereto.

[0229] Reference Figure 7 The bending area BA and the pad area PA where the pad portion PAD is located may be located below the bottom frame BZ-B.

[0230] The substrate constituting the display panel 10 ′ is bent in the bending area BA, and the pad area PA is located toward the back surface of the display area AA.

[0231] In the bending area BA, a plurality of link lines LL for electrically connecting the pad portion PAD and the signal line SL are provided.

[0232] The plurality of link lines LL are arranged along a direction perpendicular to the bending axis in the bending area BA. At at least one of the top and bottom sides of the bending area BA, the plurality of link lines LL may be arranged along a diagonal direction inclined from the vertical direction.

[0233] The pad portion PAD may transmit a signal input from the outside to the signal line SL, or include at least one pin for transmitting a signal input from the signal line SL to the outside.

[0234] For example, when the signal line SL is a data line, the pad portion PAD is connected to the data driving circuit, and the pad portion is electrically connected to the data line in the display area AA through a plurality of link lines LL.

[0235] When the data driving circuit is positioned using the COP method, the data driving circuit may be located on the pad portion PAD.

[0236] Figure 8 FIG. 1 is a diagram showing a display device according to an embodiment of the present specification. Figure 7 Figure 2 shows the structure of region B in FIG. Fig. 9 is an edge in a display device according to an embodiment of the present specification Figure 8 Cross-sectional view along line CC'.

[0237] Reference Figure 8 , the wafer substrate WSUB according to the embodiment of the present specification may be configured such that a plurality of link lines LL, signal lines SL, and the like pass through surrounding through holes SRH formed therein.

[0238] Reference Fig. 9 , the surround through hole SRH may be formed in the wafer substrate WSUB in the bezel area BZA.

[0239] In addition, a first insulating layer ILD1 may be disposed on the wafer substrate WSUB, and a signal line SL may be disposed on the first insulating layer ILD1. Here, the signal line SL may be formed of a first source-drain line SD1.

[0240] In addition, a first planarization layer PLN1 may be disposed on the signal line SL, a second planarization layer PLN2 may be disposed on the first planarization layer PLN1 , and a first encapsulation layer PAS1 may be disposed on the second planarization layer PLN2 .

[0241] In addition, a second encapsulation layer PCL may be disposed on the first encapsulation layer PAS1.

[0242] The end of the second encapsulation layer PCL may be located at a position corresponding to the surrounding through hole SRH. For example, in the manufacturing process, the second encapsulation layer PCL may be cured by ultraviolet rays radiated from the ultraviolet supply device UVL through the surrounding through hole SRH, and the end of the second encapsulation layer PCL may be formed at a position corresponding to the surrounding through hole SRH.

[0243] The signal line SL may be electrically connected to the connection electrode on the first planarization layer PLN1 and the connection electrode on the second planarization layer PLN2 via a contact hole at a position corresponding to the surrounding through hole SRH.

[0244] Fig. 10A and Fig. 10B is a view showing an example in which PCL is cured by light radiated through a surrounding through hole of a wafer substrate in a process of manufacturing a display device according to an embodiment of the present specification.

[0245] Reference Fig. 10A , the surround through hole SRH according to the embodiment of the present specification may be formed in the wafer substrate WSUB.

[0246] A first encapsulation layer PAS1 may be disposed on the wafer substrate SUB, a second encapsulation layer PCL may be disposed on the first encapsulation layer PAS1 , and a third encapsulation layer PAS2 may be disposed on the second encapsulation layer PCL.

[0247] In this case, the surrounding through hole SRH may be spaced apart from the peripheral end of the bezel area BZA by a selected distance and formed in the wafer substrate WSUB.

[0248] Therefore, ultraviolet rays provided from the ultraviolet ray supplying device UVL disposed under the wafer substrate WSUB may be radiated to the second encapsulation layer PCL through the surrounding through hole SRH.

[0249] Therefore, the second encapsulation layer PCL moved on the first encapsulation layer PAS1 during the manufacturing process may be cured by ultraviolet light irradiated through the surrounding through hole SRH, and an end portion of the second encapsulation layer PCL may be formed by stopping at a position corresponding to the surrounding through hole SRH.

[0250] The end portion of the second encapsulation layer PCL may be formed to be inclined at a position corresponding to the surrounding through hole SRH.

[0251] Reference Fig. 10B , the surrounding through hole SRH according to the embodiment of the present specification may be formed from the peripheral end of the bezel area BZA to a position where the inclined end of the second encapsulation layer PCL starts.

[0252] Therefore, due to Fig. 10B The surrounding via SRH shown has a Fig. 10A The surrounding through hole SRH is shown to have a large width, so a larger amount of UV light can pass through the second encapsulation layer PCL to make the second encapsulation layer PCL cure faster.

[0253] Fig.11A and Fig. 11B is a view illustrating an example in which a PCL is cured by light radiated through surrounding through holes of a black matrix in a process of manufacturing a display device according to an embodiment of the present specification.

[0254] Reference Fig.11A , in the display device according to the embodiment of the present specification, a surrounding through hole SRH passing through the display panel 10 ′ may be formed in the black matrix BM.

[0255] A glass substrate GLS (or glass layer GLS) may be disposed on the black matrix BM, a first encapsulation layer PAS1 may be disposed on the glass layer GLS, a second encapsulation layer PCL may be disposed on the first encapsulation layer PAS1, and a third encapsulation layer PAS2 may be disposed on the second encapsulation layer PCL.

[0256] In this case, the surrounding through hole SRH may be spaced apart from the peripheral end of the bezel area BZA by a selected distance and formed in the black matrix BM.

[0257] Therefore, ultraviolet rays supplied from the ultraviolet ray supplying device UVL disposed under the black matrix BM may be radiated to the second encapsulation layer PCL through the surrounding through holes SRH.

[0258] Therefore, the second encapsulation layer PCL moved on the first encapsulation layer PAS1 during the manufacturing process may be cured by ultraviolet light irradiated through the surrounding through hole SRH, and an end portion of the second encapsulation layer PCL may be formed by stopping at a position corresponding to the surrounding through hole SRH.

[0259] In this case, the end portion of the second package layer PCL may be formed to be inclined at a position corresponding to the surrounding through hole SRH.

[0260] Reference Fig.11A The glass layer GLS has a first surface FSS and a second surface SSS opposite to the first surface FSS. The black matrix BM is disposed on the first surface FSS of the glass layer GLS.

[0261] In some embodiments, the surrounding via hole SRH extends through the black matrix BM and exposes the first surface FSS of the glass layer GLS.

[0262] As shown, the first encapsulation layer PAS1 is on the second surface SSS of the glass layer GLS. The second encapsulation layer PCL is on the first encapsulation layer PAS1 and has an end portion. The end portion of the second encapsulation layer PCL overlaps the surrounding through hole SRH according to a plan view.

[0263] In addition, the third encapsulation layer PAS2 is disposed on the second encapsulation layer PCL. Figure 5 Similar descriptions regarding the end portion of the second encapsulation layer PCL and the end portion of the third encapsulation layer PAS2 will not be repeated.

[0264] In some embodiments, an end portion of the third encapsulation layer PAS2 is on and covers an end portion of the second encapsulation layer PCL Here, the end portion of the third encapsulation layer PAS2 overlaps the surrounding through hole SRH according to a plan view.

[0265] Reference Fig. 11B , the surrounding through hole SRH according to the embodiment of the present specification may be formed from the peripheral end of the bezel area BZA to a position where the inclined end of the second encapsulation layer PCL starts.

[0266] Therefore, due to Fig. 11B The surrounding via SRH shown has a Fig.11A The surrounding through hole SRH is shown to have a large width, so a larger amount of UV light can pass through the second encapsulation layer PCL to make the second encapsulation layer PCL cure faster.

[0267] FIG. 12A to FIG. 12D is a view illustrating a process of curing PCL by radiating light through surrounding through holes according to an embodiment of the present specification.

[0268] Reference Fig. 12A , the surround through hole SRH according to the embodiment of the present specification may be formed in the wafer substrate WSUB.

[0269] In this case, the first encapsulation layer PAS1 is disposed on the wafer substrate WSUB, and a resin composition is supplied onto the first encapsulation layer PAS1 from the inkjet device Ink-J.

[0270] Reference Fig. 12B , the resin component supplied from the inkjet device Ink-J onto the first encapsulation layer PAS1 moves toward the cell ends on the first encapsulation layer PAS1 to form the second encapsulation layer PCL.

[0271] In this case, ultraviolet light provided from the ultraviolet light supplying device UVL is radiated through the surrounding through hole SRH to pass through the first encapsulation layer PAS1.

[0272] Reference Fig. 12C , the second encapsulation layer PCL moved on the first encapsulation layer PAS1 is cured by the ultraviolet light radiated through the surrounding through hole SRH, and the end of the second encapsulation layer PCL stops at a position corresponding to the surrounding through hole SRH.

[0273] Reference Fig.12D , the second ultraviolet light supplying device UVL2 is located above the second encapsulation layer PCL, and the second ultraviolet light supplying device UVL2 radiates another ultraviolet light onto the surface of the second encapsulation layer PCL.

[0274] Therefore, the second encapsulation layer PCL is cured by the ultraviolet light provided from the top and the ultraviolet light radiated through the surrounding through hole SRH, and an end portion of the second encapsulation layer PCL is formed in a form of stopping at a position corresponding to the surrounding through hole SRH on the first encapsulation layer PAS1.

[0275] As described above, according to the embodiments of the present specification, by removing a dam structure such as an engraved dam or an embossed dam from a bezel region of a display device and preventing defects from occurring in the bezel region, a display device capable of ensuring reliability and achieving a narrow bezel can be realized.

[0276] In addition, according to an embodiment of the present specification, the following display device can be realized: in the display device, a through hole in the form of surrounding the display area can be formed in the border area of ​​the display panel, and when the particle covering layer PCL is formed in the manufacturing process, the particle covering layer PCL can be cured by radiating ultraviolet light through the through hole in the border area.

[0277] According to an embodiment of the present specification, a surrounding through hole SRH passing through the display panel in the form of surrounding the periphery of the display area may be provided in the bezel area.

[0278] Therefore, since the particle covering layer PCL is cured by radiating ultraviolet light to the particle covering layer PCL through the surrounding through hole SRH when the particle covering layer PCL moves to the frame area in the manufacturing process, the particle covering layer PCL can be formed in the frame area by stopping the movement of the particle covering layer PCL.

[0279] Therefore, the quality of the display device can be improved by preventing the seam marks from being visible from the frame area of ​​the display panel.

[0280] In addition, according to the embodiment of the present specification, by forming the particle covering layer PCL in the frame area without the structure of the engraved dam or the embossed dam, the number of processes for forming the dam can be reduced by removing the dam and the manufacturing cost can be reduced accordingly. Therefore, the manufacturing energy can be reduced.

[0281] In addition, according to the embodiments of the present specification, defects may be prevented from occurring in a bezel region of a display device, thereby preventing the life of a display panel from being shortened.

[0282] In addition, according to the embodiments of the present specification, defects may be prevented from occurring in a bezel region of a display device, thereby achieving a stable narrow bezel.

[0283] In addition, according to the embodiments of the present specification, defects may be prevented from occurring in a bezel region of a display device, thereby minimizing a reduction in the life of a panel and improving the quality of the display device.

[0284] Defects in the bezel region may be prevented by surrounding the through hole without a dam structure in the bezel region of the display device according to the present specification, thereby easily realizing a narrow bezel.

[0285] The effects of the present specification are not limited to the above-mentioned effects, and other effects not mentioned can be clearly understood by those skilled in the art from the following description.

[0286] The specific effects of the present specification as well as the above-mentioned effects are described together with the description of the following detailed matters for implementing the embodiments of the present specification.

[0287] Although the present specification has been described above with reference to the exemplary drawings, the present specification is not limited to the embodiments and drawings disclosed in the present specification, and it is obvious that those skilled in the art can make various modifications within the scope of the technical spirit of the present specification. In addition, even when the operational effect of the configuration according to the present specification is not explicitly described in the description of the embodiments of the present specification, it goes without saying that the effect that can be predicted by the corresponding configuration should be recognized.

[0288] The various embodiments described above can be combined to provide additional embodiments. All U.S. patents, U.S. patent application publications, U.S. patent applications, foreign patents, foreign patent applications, and non-patent publications mentioned in this specification and / or listed in the application data sheet are incorporated herein by reference in their entirety. If necessary, various aspects of the embodiments can be modified to provide further embodiments using the concepts of various patents, applications, and disclosures.

[0289] These and other changes can be made to the embodiments in light of the above detailed description. Generally, in the appended claims, the terms used should not be interpreted as limiting the claims to the specific embodiments disclosed in the specification and claims, but should be interpreted as including all possible embodiments and the full range of equivalents to which these claims are entitled. Therefore, the claims are not limited by the present disclosure.

[0290] Description of Reference Numerals

[0291] 10: Display device 10': Display panel

[0292] 12: Data driver 13: Gate driver

[0293] 14: Controller 15: Host system

[0294] 16: Touch drive circuit 17: Touch controller

[0295] 30: First back plate 31: Fixing member

[0296] 32: Adhesive member 33: Second back plate

[0297] 34: Bending protection layer 80: Cover window

[0298] 81: Optical film 82: Adhesive

[0299] 83: Upper substrate 84: Black ink

[0300] 200: Package layer SRH: Surrounding vias

[0301] AA: Display area NA: Non-display area

[0302] BZA: Border area BA: Bending area

[0303] AE: Anode electrode PX: Light-emitting element (pixel)

[0304] D-IC: Driver integrated circuit WSUB: Wafer substrate

[0305] SUB: Substrate TFTL: TR layer

[0306] PLN: Planarization layer PXL: Pixel layer

[0307] ENCAP: Encapsulation layer TL: Touch layer

Claims

1. A display device, comprising: The display panel includes a display area provided with one or more pixels and a frame area provided adjacent to the display area; as well as A surrounding through hole is arranged in the frame area, and the surrounding through hole surrounds the periphery of the display area and extends into the display panel.

2. The display device according to claim 1, wherein: The surrounding through hole is disposed between one or more anode electrodes disposed in the bezel area and one or more pixels disposed at the periphery of the display area.

3. The display device according to claim 1, wherein: A light emitting layer mask, a cathode electrode contact, a cathode electrode and a cathode capping layer are disposed between the surrounding through hole and the display area.

4. The display device according to claim 1, wherein: A cutting margin, a wafer unit edge, and an insulating layer are disposed between the surrounding through hole and a peripheral end portion of the frame region.

5. The display device according to claim 1, wherein: The surrounding through hole is filled with transparent ink, glass material or transparent material.

6. The display device according to claim 1, wherein: The surrounding through hole is formed in a wafer substrate including the display panel.

7. The display device according to claim 6, wherein: One or more anode electrode patterns are disposed on the wafer substrate, A first encapsulation layer is disposed on the wafer substrate and the one or more anode electrode patterns, A second encapsulation layer is disposed on the first encapsulation layer, and A third encapsulation layer is disposed on the second encapsulation layer.

8. The display device according to claim 7, wherein: An end of the second encapsulation layer is located at a position corresponding to the surrounding through hole.

9. The display device according to claim 8, wherein: The surrounding through hole is formed in the wafer substrate between the anode electrode pattern located at the peripheral end of the bezel area and the anode electrode pattern beside the anode electrode pattern.

10. The display device according to claim 6, wherein: A first insulating layer is disposed on the wafer substrate, The signal line is arranged on the first insulating layer, A first planarization layer is disposed on the signal line, A second planarization layer is disposed on the first planarization layer, A first encapsulation layer is disposed on the second planarization layer, and The second encapsulation layer is disposed on the first encapsulation layer.

11. The display device according to claim 10, wherein: The end of the second encapsulation layer is located at a position corresponding to the surrounding through hole, and The signal line is electrically connected to a connection electrode on the first planarization layer and a connection electrode on the second planarization layer via a contact hole at a position corresponding to the surrounding through hole.

12. The display device according to claim 6, wherein: A first packaging layer is disposed on the wafer substrate, A second encapsulation layer is disposed on the first encapsulation layer, A third encapsulation layer is disposed on the second encapsulation layer, and The surrounding through hole is spaced apart from a peripheral end of the bezel area by a selected distance and is formed in the wafer substrate, and an end of the second encapsulation layer is formed to be inclined at a position corresponding to the surrounding through hole.

13. The display device according to claim 1, wherein: The surrounding through hole passing through the display panel is formed on the black matrix, A glass layer is disposed on the black matrix, A first encapsulation layer is disposed on the glass layer, A second encapsulation layer is disposed on the first encapsulation layer, A third encapsulation layer is disposed on the second encapsulation layer, and An end portion of the second encapsulation layer is positioned to be inclined at a position corresponding to the surrounding through hole.

14. The display device according to claim 13, wherein: The surrounding via hole is spaced apart from a peripheral end of the bezel area by a selected distance and is formed in the black matrix.

15. The display device according to claim 13, wherein: The surrounding through hole is formed from the peripheral end of the frame area to a position where the inclined end of the second encapsulation layer starts.

16. A display device, comprising: A display panel having a display area and a frame area adjacent to the display area, the display panel comprising: one or more pixels disposed in the display area; Wafer substrates; and A surrounding through hole is provided in the border region, wherein the surrounding through hole extends through the wafer substrate, Wherein, the surrounding through hole surrounds the display area of ​​the display panel when viewed from a plan view.

17. The display device according to claim 16, further comprising: one or more anode electrodes disposed in the frame region, Wherein, the surrounding through hole is arranged between the one or more anode electrodes arranged in the frame area and the one or more pixels arranged in the display area.

18. The display device according to claim 16, further comprising: A first packaging layer on the wafer substrate, wherein the first packaging layer has a first surface and a second surface opposite to the first surface; as well as a second encapsulation layer on a second surface of the first encapsulation layer, the second encapsulation layer having an end portion, and Wherein, according to a plan view, an end portion of the second packaging layer overlaps with the surrounding through hole.

19. The display device according to claim 16, wherein: The end portion of the second encapsulation layer has an inclined angle relative to the second surface of the first encapsulation layer, Wherein, according to the plan view, the end portion of the second packaging layer completely overlaps with the surrounding through hole.

20. The display device according to claim 16, further comprising: a third encapsulation layer on the second encapsulation layer, the third encapsulation layer having an end portion, wherein an end portion of the third encapsulation layer is on an end portion of the second encapsulation layer and covers an end portion of the second encapsulation layer, and Wherein, according to the plan view, an end portion of the third encapsulation layer overlaps with the surrounding through hole.

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