Light-emitting device

Abstract

To provide a display device, etc. with a novel structure in which gate capacitance of a transistor connected to a scan line is reduced, a display device, etc. with a novel structure in which the resistance of a scan line is reduced, a display device, etc. with a novel structure in which pixels can be arranged with high definition, or a display device, etc. with a novel structure in which the increase in manufacturing cost is suppressed.SOLUTION: In a transistor including a first gate electrode and a second gate electrode connected to a scan line, the first gate electrode is formed of a metal material with low resistance and the second gate electrode is formed of a metal oxide material that can reduce oxygen deficiency of an oxide semiconductor layer. The first gate electrode is connected to the scan line and the second gate electrode is connected to a wire to which a constant potential is applied.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] One embodiment of the present invention relates to a display device including a transistor including an oxide semiconductor. .

[0002] Note that one embodiment of the present invention is not limited to the above technical fields. The technical field of one aspect of the present invention relates to a product, a method, or a manufacturing method. process, machine, manufacture, or composition of matter In particular, one embodiment of the present invention relates to a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, The present invention relates to a device, a driving method thereof, or a manufacturing method thereof. [Background technology]

[0003] A transistor (field-effect transistor) is made using a semiconductor layer formed on a substrate with an insulating surface. The technology that makes up the field-effect transistor (FET) or thin-film transistor (TFT) is attracting attention. The transistor is used in power devices such as integrated circuits (ICs) and image display devices (display devices). Silicon is widely used as a semiconductor layer for transistors. The representative semiconductor material is widely known, but oxide semiconductors are also attracting attention. It is being done.

[0004] For example, amorphous oxides containing In, Zn, Ga, Sn, etc. are used as oxide semiconductors. A technique for fabricating a transistor using self-aligned transistors has been disclosed (see Patent Document 1). A technology for fabricating an oxide layer transistor with a top gate structure has been disclosed (Patent (See Reference 2.) In order to increase the field-effect mobility, the choke is driven by the electric field of the upper and lower gate electrodes. There is a technology for manufacturing a transistor with a structure that electrically surrounds an oxide layer in which a channel is formed (see Patent Document 3). (See Patent Document 3).

[0005] Also, an insulating layer that releases oxygen by heating is used for the underlying insulating layer of the oxide semiconductor layer that forms the channel, and by reducing the oxygen deficiency of the oxide semiconductor layer, a technology for manufacturing a transistor with enhanced electrical reliability, such as a small shift in the threshold voltage, is disclosed (see Patent Document 4). (See Patent Document 4). (See Patent Document 4).

Prior Art Documents

Patent Documents

[0006]

Patent Document 1

Patent Document 2

Patent Document 3

Patent Document 4

Summary of the Invention

Problems to be Solved by the Invention

[0007] Transistors having an oxide layer are expected to be applied to display devices. Transistors are required to have high field-effect mobility and high reliability. To obtain high field-effect mobility , a transistor with a structure that electrically surrounds the oxide layer in which a channel is formed is effective . However, when driving a transistor with a structure that electrically surrounds the oxide layer in which a channel is formed with a signal of a scanning line by the electric field of the gate electrode, there is a problem that the gate capacitance of the transistor becomes too large . (See Patent Document 3).

[0008] In order to reduce the gate capacitance, instead of a structure in which the oxide layer is surrounded by a gate electrode, it is effective to adopt a single gate structure. However, in order to obtain high reliability, when a gate electrode that releases oxygen by heating, such as an oxide layer, is adopted as the top gate, compared with a gate electrode made of metal, there is a problem that the resistance of the gate electrode, that is, the scanning line, becomes high.

[0009] A configuration in which a gate electrode that releases oxygen by heating is adopted as the top gate is effective in enhancing the reliability of the transistor. Therefore, in order to reduce the resistance of the scanning line while maintaining such a configuration, it is effective to adopt a gate electrode made of metal as the bottom gate and form the scanning line with the metal wiring on the bottom gate side. However, it is difficult to arrange the opening for connecting the top gate and the bottom gate in a narrow area such as a pixel region, and there is a problem that it becomes difficult to realize a high-definition display device. In addition, a configuration in which a metal wiring is laminated on a gate electrode that releases oxygen by heating to reduce the resistance of the scanning line is also conceivable, but there is a problem that the manufacturing cost increases due to an increase in the number of processes.

[0010] In view of the above problems, one aspect of the present invention is to provide a display device or the like having a novel configuration in which the gate capacitance of a transistor connected to a scanning line is reduced. Or one aspect of the present invention is to provide a display device or the like having a novel configuration in which the resistance of a scanning line is reduced. Or one aspect of the present invention is to provide a display device or the like having a novel configuration that enables pixels to be arranged with high definition. Or one aspect of the present invention is to provide a display device or the like having a novel configuration that enables pixels to be arranged with high definition. Or one aspect of the present invention is the manufacturing cost One of the problems is to provide a display device or the like with a novel configuration in which the increase is suppressed.

[0011] Note that the problems of one aspect of the present invention are not limited to the problems listed above. The problems listed above do not prevent the existence of other problems. Other problems are those not mentioned in this section as described below. Problems not mentioned in this section can be derived by those skilled in the art from the description of the specification or the drawings and the like, and can be appropriately extracted from these descriptions . Note that one aspect of the present invention solves at least one of the problems listed above and / or other problems.

Means for Solving the Problems

[0012] One aspect of the present invention includes a first transistor, a second transistor, a first wiring, and a second wiring. The first transistor includes a first gate electrode, a second gate electrode, and a first semiconductor layer. The second transistor includes a first gate electrode, a second gate electrode, and a second semiconductor layer. The first wiring has a function of transmitting a signal for controlling the conduction states of the first transistor and the second transistor. The second wiring has a function of transmitting a constant voltage. The first gate electrode of the first transistor and the first gate electrode of the second transistor are electrically connected to the first wiring. The second gate electrode of the first transistor and the second gate electrode of the second transistor are electrically connected to the second wiring. The first semiconductor layer and the second semiconductor layer include an oxide semiconductor. The first gate electrode of the first transistor and the first gate electrode of the second transistor include a metal material. The first The second gate electrode of the transistor and the second gate electrode of the second transistor are made of gold The display device has a metal oxide material.

[0013] One aspect of the present invention has a first transistor, a second transistor, a third transistor, a first wiring, and a second wiring. The first transistor has a first gate electrode, a second gate electrode, and a first semiconductor layer. The second transistor has a first gate electrode, a second gate electrode, and a second semiconductor layer. The third transistor has a first gate electrode, a second gate electrode, and a third semiconductor layer. The first wiring has a function of transmitting a signal for controlling the conduction states of the first transistor and the second transistor. The second wiring has a function of transmitting a constant voltage. The first gate electrode of the first transistor and the first gate electrode of the second transistor are electrically connected to the first wiring. The second gate electrode of the first transistor and the second gate electrode of the second transistor are electrically connected to the second wiring. The first gate electrode of the third transistor and the second gate electrode of the third transistor are electrically connected to each other. The first semiconductor layer, the second semiconductor layer, and the third semiconductor layer have an oxide semiconductor. The first gate electrode of the first transistor, the first gate electrode of the second transistor, and the first gate electrode of the third transistor have a metal material. The second gate electrode of the first transistor, the second gate electrode of the second transistor, and the second gate electrode of the third transistor are a display device having a metal oxide material. The display device has a metal oxide material. The display device has a metal oxide material. The display device has a metal oxide material. The display device has a metal oxide material. The display device has a metal oxide material. The display device has a metal oxide material. The display device has a metal oxide material. The display device has a metal oxide material. The display device has a metal oxide material. The display device has a metal oxide material. The display device has a metal oxide material. The display device has a metal oxide material. The display device has a metal oxide material. The display device has a metal oxide material. The display device has a metal oxide material.

[0014] One aspect of the present invention has a first transistor, a second transistor, and a third transistor a first transistor, a capacitance element, a light emitting element, a first wiring, and a second wiring; The gate electrode includes a first gate electrode, a second gate electrode, and a first semiconductor layer. The transistor has a first gate electrode, a second gate electrode, and a second semiconductor layer. The third transistor includes a first gate electrode, a second gate electrode, and a third semiconductor layer. , and the first wiring controls the conductive state of the first transistor and the second transistor. The first wiring has a function of transmitting a signal to control the first transistor, the second wiring has a function of transmitting a constant voltage, and the first transistor The first gate electrode of the first transistor and the first gate electrode of the second transistor are connected to the first gate electrode of the first transistor. a second gate electrode of the first transistor electrically connected to the line; The second gate electrode is electrically connected to the second wiring and is a source of the first transistor. Alternatively, one of the drains is connected to the first gate electrode of the third transistor and one of the drains of the capacitor element. a second gate electrode of the third transistor, the second transistor being electrically connected to the first gate electrode of the third transistor; The source or drain of the first transistor is connected to the source or drain of the second transistor. one electrode of the capacitor element and one electrode of the light emitting element are electrically connected to the first electrode of the capacitor element and the second electrode of the light emitting element. The first semiconductor layer, the second semiconductor layer, and the third semiconductor layer each include an oxide semiconductor. a first gate electrode of the second transistor, a first gate electrode of the third transistor, The first gate electrode of the first transistor has a metal material, and the second gate electrode of the first transistor has a metal material. a second gate electrode of the second transistor, a second gate electrode of the third transistor, A photoelectrode is a display device that has a metal oxide material.

[0015] One aspect of the present invention has pixels electrically connected to a first wiring and a second wiring. The pixel has a first transistor and a second transistor. The first transistor has a first gate electrode, a second gate electrode, and a first semiconductor layer. The second transistor has a first gate electrode, a second gate electrode, and a second semiconductor layer. The first wiring has a function of transmitting a signal for controlling the conduction states of the first transistor and the second transistor. The second wiring has a function of transmitting a constant voltage. The first gate electrode of the first transistor and the first gate electrode of the second transistor are electrically connected to the first wiring. The second gate electrode of the first transistor and the second gate electrode of the second transistor are electrically connected to the second wiring. The first semiconductor layer and the second semiconductor layer have an oxide semiconductor. The first gate electrode of the first transistor and the first gate electrode of the second transistor have a metal material. The second gate electrode of the first transistor and the second gate electrode of the second transistor have a metal oxide material. The display device is as described above.

[0016] In one aspect of the present invention, the oxide semiconductor preferably has oxygen, In, Zn, and M (where M is Al, Ga, Y, or Sn).

[0017] In one aspect of the present invention, the oxide semiconductor preferably has a crystalline portion, and the crystalline portion has c-axis orientation.

[0018] In one aspect of the present invention, the metal oxide material preferably has oxygen, In, Zn, and M (where M is Al Ga, Y, or Sn), and has a higher carrier density than the oxide semiconductor.

[0019] For other aspects of the present invention, they are described in the embodiments described below and shown in the drawings.

Advantages of the Invention

[0020] One aspect of the present invention can provide a novel display device or the like with a reduced gate capacitance of a transistor connected to a scanning line. Or one aspect of the present invention can provide a novel display device or the like with a reduced resistance of a scanning line. Or, one aspect of the present invention can provide a novel display device or the like that can arrange pixels with high definition. Or, one aspect of the present invention can provide a novel display device or the like with a suppressed increase in manufacturing cost.

[0021] Note that the effects of one aspect of the present invention are not limited to the effects listed above. The effects listed above do not prevent the existence of other effects. Other effects are the effects not mentioned in this item described below. Effects not mentioned in this item can be derived by those skilled in the art from the descriptions in the specification or drawings or the like, and can be appropriately extracted from these descriptions. Note that one aspect of the present invention has at least one of the effects listed above and / or other effects. Therefore, one aspect of the present invention may, in some cases, not have the effects listed above.

Brief Description of the Drawings

[0022]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Figure 13

Figure 14

Figure 15

Figure 16

Figure 17

Figure 18

Figure 19

Figure 20

Figure 21

Figure 22

Figure 23

Figure 24

Figure 25

Figure 26

Figure 27

Mode for Carrying Out the Invention

[0023] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and those skilled in the art can easily understand that the form and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention is not construed as being limited to the content described in the following embodiments.

[0024] In the configuration of the invention described below, the same parts or parts having the same functions are commonly used with the same reference numerals among different drawings, and the repeated description thereof will be omitted. Also, when referring to the same function, the hatching pattern may be the same, and there may be cases where no reference numerals are particularly assigned .

[0025] In each drawing described in this specification, the size of each component, the thickness of each layer, or the area may be exaggerated for clarity. Therefore, it is not necessarily limited to that scale .

[0026] The ordinal numbers such as "first" and "second" in this specification are attached to avoid confusion of components and are not numerically limiting.

[0027] A transistor is a type of semiconductor device and can realize operations such as amplification of current or voltage and switching operations for controlling conduction or non-conduction. The transistors in this specification are , including IGFET (Insulated Gate Field Effect Trans istor) and thin film transistors (TFT: Thin Film Transistor ).

[0028] Also, the functions of "source" and "drain" may be interchanged when transistors of different polarities are employed or when the direction of current changes in circuit operation. Therefore, in this specification, the terms "source" and "drain" are assumed to be interchangeable . .

[0029] (Embodiment 1) In this embodiment, a configuration example of a display device according to an aspect of the present invention will be described

[0030] [Configuration Example of Circuit Diagram] FIG. 1(A) is a circuit diagram of a pixel included in the display device

[0031] The pixel PIX includes a transistor M1, a transistor M2, a transistor M3, a capacitor element C1, and a light emitting element EL. The pixel PIX is connected to a scanning line GL, a signal line SL, a current supply line ANODE, a wiring V0, and a common wiring CATHODE. The pixel PIX corresponds to a sub-pixel included in a pixel that performs a cathode ray display. Note that transistors M1 to M3 will be described as n-channel type transistors, but they may be p-channel type .

[0032] The scanning line GL is a wiring that supplies a scanning signal to the pixel. The scanning signal is a signal that controls the conduction state of the supplied transistor . The signal line SL is a wiring that supplies a signal corresponding to image data to the pixel . The current supply line ANODE and the common wiring CATHODE are for the light emitting element EL It is wiring for flowing current. Wiring V0 is wiring to which a constant voltage is applied.

[0033] The transistor M1 and the transistor M2 have gate electrodes provided above and below the semiconductor layer in such a structure. The gate electrode made of a metal material on the lower side of the semiconductor layer is called the first gate electrode (also referred to as the bottom gate electrode). The gate electrode made of a metal oxide material on the upper side of the semiconductor layer is called the second gate electrode (also referred to as the top gate electrode). Regarding the configuration example of the transistor applicable to the transistors M1 and M2, it will be described later. In FIG. 1(A ), the transistor M3 is also described as having the same structure as the transistors M1 and M2, but it is not limited to this. The metal oxide material is a material having a metal element and oxygen. )

[0034] The first gate electrode of the transistor M1 is connected to the scanning line GL. The second gate electrode of the transistor M1 is connected to the wiring V0. One of the source or drain of the transistor M1 is connected to the signal line SL. The other of the source or drain of the transistor M1 is connected to the first gate and the second gate electrode of the transistor M3, and one electrode of the capacitor element C1.

[0035] The first gate electrode of the transistor M2 is connected to the scanning line GL. The second gate electrode of the transistor M2 is connected to the wiring V0. One of the source or drain of the transistor M2 is connected to the wiring V0. The other of the source or drain of the transistor M2 is connected to one of the source or drain of the transistor M3, the other electrode of the capacitor element C1, and one electrode of the light-emitting element EL. ​​​​

[0036] The first gate electrode of transistor M3 is connected to the source or drain of transistor M1 On the other hand, it is connected to the second gate electrode of transistor M3 and one electrode of capacitor element C1. One of the source or drain of transistor M3 is connected to the other of the source or drain of transistor M2, the other electrode of capacitor element C1, and one electrode of light-emitting element EL. The other of the source or drain of transistor M3 is connected to the current supply line ANODE.

[0037] One electrode of capacitor element C1 is connected to the other of the source or drain of transistor M1, the first gate electrode of transistor M3, and the second gate electrode of transistor M3. The other electrode of capacitor element C1 is connected to the other of the source or drain of transistor M2, one of the source or drain of transistor M3, and one electrode of light-emitting element EL.

[0038] One electrode of light-emitting element EL is connected to the other of the source or drain of transistor M2, one of the source or drain of transistor M3, and the other electrode of capacitor element C1. The other electrode of light-emitting element EL is connected to the common wiring CATHODE.

[0039] The scanning line GL to which the first gate electrode of transistor M1 and the first gate electrode of transistor M2 are connected is formed of a metal material below the semiconductor layer. The scanning line GL is connected to the first gate electrode of transistor M1 and the first gate electrode of transistor M2 without passing through the opening. The second gate electrode of transistor M1 and the transistor The wiring V0 connected to the second gate electrode of M2 is formed of a metal material constituting a conductive layer above the transistors M1 and M2. The wiring V0 is connected to the second gate electrode of the transistor M1 and the second gate electrode of the transistor M2 through an opening.

[0040] Next, FIG. 1(B) shows a timing chart for explaining the simple operation of the circuit of FIG. 1(A). In FIG. 1(B), a single scanning selection period ( P SCAN ) in the scanning line GL(n) of the n-th row is illustrated, and the voltage of the wiring V0 and the SCAN image signal of the signal line SL are illustrated at P .

[0041] As shown in FIG. 1(B), at P SCAN , the image signal of the signal line SL switches from the signal DATA(n - 1) of the (n - 1)-th row to the signal DATA(n) of the n-th row. During this period, the voltage of the wiring V0 is set to a constant voltage V0.

[0042] In the above configuration, in the transistors M1 and M2, the first gate electrode and the second gate electrode are not connected. With this configuration, compared to the case where the gate electrodes of each other are connected, the gate capacitance between the scanning line GL and the transistor can be made only the capacitance formed between the first gate electrode. Since a constant voltage is applied to the wiring V0, the gate capacitance between the wiring V0 and the transistors M1 and M2 is not a problem. Therefore, the above configuration can reduce the gate capacitance between the scanning line GL and the transistor compared to the case where the gate electrodes of each other are connected. Also, by controlling the constant voltage V0 applied to the wiring V0, there is an effect that the threshold voltages of the transistors M 1 and M2 can be adjusted. 1 and M2 can be adjusted. ​​​

[0043] In the above configuration, in transistors M1 and M2, a scanning line GL made of a metal material can be arranged in the same layer as the first gate electrode. Therefore, even if the first gate electrode is formed of a conductive layer made of a metal material and the second gate electrode is formed of a conductive layer made of a metal oxide material such as an oxide semiconductor, the problem that the resistance of the scanning line GL becomes high can be avoided. Also, the manufacturing cost for providing extra wiring made of a metal material can be reduced in order to lower the resistance of the scanning line GL. In the above configuration, in transistors M1 and M2, a scanning line GL made of a metal material can be arranged in the same layer as the first gate electrode. Therefore, even if the first gate electrode is formed of a conductive layer made of a metal material and the second gate electrode is formed of a conductive layer made of a metal oxide material such as an oxide semiconductor, the problem that the resistance of the scanning line GL becomes high can be avoided. Also, the manufacturing cost for providing extra wiring made of a metal material can be reduced in order to lower the resistance of the scanning line GL. In the above configuration, in transistors M1 and M2, a scanning line GL made of a metal material can be arranged in the same layer as the first gate electrode. Therefore, even if the first gate electrode is formed of a conductive layer made of a metal material and the second gate electrode is formed of a conductive layer made of a metal oxide material such as an oxide semiconductor, the problem that the resistance of the scanning line GL becomes high can be avoided. Also, the manufacturing cost for providing extra wiring made of a metal material can be reduced in order to lower the resistance of the scanning line GL. In the above configuration, in transistors M1 and M2, a scanning line GL made of a metal material can be arranged in the same layer as the first gate electrode. Therefore, even if the first gate electrode is formed of a conductive layer made of a metal material and the second gate electrode is formed of a conductive layer made of a metal oxide material such as an oxide semiconductor, the problem that the resistance of the scanning line GL becomes high can be avoided. Also, the manufacturing cost for providing extra wiring made of a metal material can be reduced in order to lower the resistance of the scanning line GL. In the above configuration, in transistors M1 and M2, a scanning line GL made of a metal material can be arranged in the same layer as the first gate electrode. Therefore, even if the first gate electrode is formed of a conductive layer made of a metal material and the second gate electrode is formed of a conductive layer made of a metal oxide material such as an oxide semiconductor, the problem that the resistance of the scanning line GL becomes high can be avoided. Also, the manufacturing cost for providing extra wiring made of a metal material can be reduced in order to lower the resistance of the scanning line GL. In the above configuration, in transistors M1 and M2, a scanning line GL made of a metal material can be arranged in the same layer as the first gate electrode. Therefore, even if the first gate electrode is formed of a conductive layer made of a metal material and the second gate electrode is formed of a conductive layer made of a metal oxide material such as an oxide semiconductor, the problem that the resistance of the scanning line GL becomes high can be avoided. Also, the manufacturing cost for providing extra wiring made of a metal material can be reduced in order to lower the resistance of the scanning line GL.

[0044] In the above configuration, the first gate electrode can be formed of a conductive layer made of a metal material, and the second gate electrode can be formed of a conductive layer made of a metal oxide material such as an oxide semiconductor. In the above configuration, the first gate electrode can be formed of a conductive layer made of a metal material, and the second gate electrode can be formed of a conductive layer made of a metal oxide material such as an oxide semiconductor. Therefore, a gate electrode that releases oxygen by heating can be adopted for the second gate electrode, and the reliability of the transistor can be improved. In addition, in transistors M1 and M2, since the first gate electrode and the second gate electrode are not connected, a configuration in which the gate electrodes are not connected to each other in a narrow region such as a pixel region can be adopted, and thus a high-definition display device can be realized. Therefore, a gate electrode that releases oxygen by heating can be adopted for the second gate electrode, and the reliability of the transistor can be improved. In addition, in transistors M1 and M2, since the first gate electrode and the second gate electrode are not connected, a configuration in which the gate electrodes are not connected to each other in a narrow region such as a pixel region can be adopted, and thus a high-definition display device can be realized. Therefore, a gate electrode that releases oxygen by heating can be adopted for the second gate electrode, and the reliability of the transistor can be improved. In addition, in transistors M1 and M2, since the first gate electrode and the second gate electrode are not connected, a configuration in which the gate electrodes are not connected to each other in a narrow region such as a pixel region can be adopted, and thus a high-definition display device can be realized. Therefore, a gate electrode that releases oxygen by heating can be adopted for the second gate electrode, and the reliability of the transistor can be improved. In addition, in transistors M1 and M2, since the first gate electrode and the second gate electrode are not connected, a configuration in which the gate electrodes are not connected to each other in a narrow region such as a pixel region can be adopted, and thus a high-definition display device can be realized. Therefore, a gate electrode that releases oxygen by heating can be adopted for the second gate electrode, and the reliability of the transistor can be improved. In addition, in transistors M1 and M2, since the first gate electrode and the second gate electrode are not connected, a configuration in which the gate electrodes are not connected to each other in a narrow region such as a pixel region can be adopted, and thus a high-definition display device can be realized.

[0045] [Example of Transistor Configuration] Here, an example of a transistor configuration applicable to transistors M1 and M2 will be described with reference to FIGS. 2(A) to (C). Here, an example of a transistor configuration applicable to transistors M1 and M2 will be described with reference to FIGS. 2(A) to (C).

[0046] FIGS. 2(A), (B), and (C) show an example of a semiconductor device having a transistor. Note that the transistors shown in FIGS. 2(A) to (C) have a structure in which gate electrodes are provided above and below a semiconductor layer. FIGS. 2(A), (B), and (C) show an example of a semiconductor device having a transistor. Note that the transistors shown in FIGS. 2(A) to (C) have a structure in which gate electrodes are provided above and below a semiconductor layer. FIGS. 2(A), (B), and (C) show an example of a semiconductor device having a transistor. Note that the transistors shown in FIGS. 2(A) to (C) have a structure in which gate electrodes are provided above and below a semiconductor layer.

[0047] Figure 2(A) is a top view of the transistor 100, and Figure 2(B) is a cross-sectional view taken along the dash-dot line X1-X2 in Figure 2(A). Figure 2(C) is a cross-sectional view taken along the dash-dot line Y1-Y2 in Figure 2(A). In Figure 2(A), for clarity, components such as the insulating layer 110 are omitted from the illustration. In the top view of the transistor, as in Figure 2(A) in subsequent drawings, some components may be omitted from the illustration. Also, the dash-dot line X1-X2 direction is referred to as the channel length (L) direction, and the dash-dot line Y1-Y2 direction is referred to as the channel width (W) direction. Figure 2(A) is a top view of the transistor 100, and Figure 2(B) is a cross-sectional view taken along the dash-dot line X1-X2 in Figure 2(A). Figure 2(C) is a cross-sectional view taken along the dash-dot line Y1-Y2 in Figure 2(A). In Figure 2(A), for clarity, components such as the insulating layer 110 are omitted from the illustration. In the top view of the transistor, as in Figure 2(A) in subsequent drawings, some components may be omitted from the illustration. Also, the dash-dot line X1-X2 direction is referred to as the channel length (L) direction, and the dash-dot line Y1-Y2 direction is referred to as the channel width (W) direction. Figure 2(A) is a top view of the transistor 100, and Figure 2(B) is a cross-sectional view taken along the dash-dot line X1-X2 in Figure 2(A). Figure 2(C) is a cross-sectional view taken along the dash-dot line Y1-Y2 in Figure 2(A). In Figure 2(A), for clarity, components such as the insulating layer 110 are omitted from the illustration. In the top view of the transistor, as in Figure 2(A) in subsequent drawings, some components may be omitted from the illustration. Also, the dash-dot line X1-X2 direction is referred to as the channel length (L) direction, and the dash-dot line Y1-Y2 direction is referred to as the channel width (W) direction. Figure 2(A) is a top view of the transistor 100, and Figure 2(B) is a cross-sectional view taken along the dash-dot line X1-X2 in Figure 2(A). Figure 2(C) is a cross-sectional view taken along the dash-dot line Y1-Y2 in Figure 2(A). In Figure 2(A), for clarity, components such as the insulating layer 110 are omitted from the illustration. In the top view of the transistor, as in Figure 2(A) in subsequent drawings, some components may be omitted from the illustration. Also, the dash-dot line X1-X2 direction is referred to as the channel length (L) direction, and the dash-dot line Y1-Y2 direction is referred to as the channel width (W) direction. Figure 2(A) is a top view of the transistor 100, and Figure 2(B) is a cross-sectional view taken along the dash-dot line X1-X2 in Figure 2(A). Figure 2(C) is a cross-sectional view taken along the dash-dot line Y1-Y2 in Figure 2(A). In Figure 2(A), for clarity, components such as the insulating layer 110 are omitted from the illustration. In the top view of the transistor, as in Figure 2(A) in subsequent drawings, some components may be omitted from the illustration. Also, the dash-dot line X1-X2 direction is referred to as the channel length (L) direction, and the dash-dot line Y1-Y2 direction is referred to as the channel width (W) direction. Figure 2(A) is a top view of the transistor 100, and Figure 2(B) is a cross-sectional view taken along the dash-dot line X1-X2 in Figure 2(A). Figure 2(C) is a cross-sectional view taken along the dash-dot line Y1-Y2 in Figure 2(A). In Figure 2(A), for clarity, components such as the insulating layer 110 are omitted from the illustration. In the top view of the transistor, as in Figure 2(A) in subsequent drawings, some components may be omitted from the illustration. Also, the dash-dot line X1-X2 direction is referred to as the channel length (L) direction, and the dash-dot line Y1-Y2 direction is referred to as the channel width (W) direction. Figure 2(A) is a top view of the transistor 100, and Figure 2(B) is a cross-sectional view taken along the dash-dot line X1-X2 in Figure 2(A). Figure 2(C) is a cross-sectional view taken along the dash-dot line Y1-Y2 in Figure 2(A). In Figure 2(A), for clarity, components such as the insulating layer 110 are omitted from the illustration. In the top view of the transistor, as in Figure 2(A) in subsequent drawings, some components may be omitted from the illustration. Also, the dash-dot line X1-X2 direction is referred to as the channel length (L) direction, and the dash-dot line Y1-Y2 direction is referred to as the channel width (W) direction.

[0048] The transistor 100 shown in FIGS. 2(A) to 2(C) includes a conductive layer 106 formed on a substrate 102, an insulating layer 104 on the conductive layer 106, an oxide semiconductor layer 108 on the insulating layer 104, an insulating layer 110 on the oxide semiconductor layer 108, an oxide semiconductor layer 112 on the insulating layer 110, and an insulating layer 116 on the insulating layer 104, the oxide semiconductor layer 108, and the oxide semiconductor layer 112. The oxide semiconductor layer 108 has a channel region 108i in contact with the insulating layer 110, a source region 108s in contact with the insulating layer 116, and a drain region 108d in contact with the insulating layer 116. The transistor 100 shown in FIGS. 2(A) to 2(C) includes a conductive layer 106 formed on a substrate 102, an insulating layer 104 on the conductive layer 106, an oxide semiconductor layer 108 on the insulating layer 104, an insulating layer 110 on the oxide semiconductor layer 108, an oxide semiconductor layer 112 on the insulating layer 110, and an insulating layer 116 on the insulating layer 104, the oxide semiconductor layer 108, and the oxide semiconductor layer 112. The oxide semiconductor layer 108 has a channel region 108i in contact with the insulating layer 110, a source region 108s in contact with the insulating layer 116, and a drain region 108d in contact with the insulating layer 116. The transistor 100 shown in FIGS. 2(A) to 2(C) includes a conductive layer 106 formed on a substrate 102, an insulating layer 104 on the conductive layer 106, an oxide semiconductor layer 108 on the insulating layer 104, an insulating layer 110 on the oxide semiconductor layer 108, an oxide semiconductor layer 112 on the insulating layer 110, and an insulating layer 116 on the insulating layer 104, the oxide semiconductor layer 108, and the oxide semiconductor layer 112. The oxide semiconductor layer 108 has a channel region 108i in contact with the insulating layer 110, a source region 108s in contact with the insulating layer 116, and a drain region 108d in contact with the insulating layer 116. The transistor 100 shown in FIGS. 2(A) to 2(C) includes a conductive layer 106 formed on a substrate 102, an insulating layer 104 on the conductive layer 106, an oxide semiconductor layer 108 on the insulating layer 104, an insulating layer 110 on the oxide semiconductor layer 108, an oxide semiconductor layer 112 on the insulating layer 110, and an insulating layer 116 on the insulating layer 104, the oxide semiconductor layer 108, and the oxide semiconductor layer 112. The oxide semiconductor layer 108 has a channel region 108i in contact with the insulating layer 110, a source region 108s in contact with the insulating layer 116, and a drain region 108d in contact with the insulating layer 116. The transistor 100 shown in FIGS. 2(A) to 2(C) includes a conductive layer 106 formed on a substrate 102, an insulating layer 104 on the conductive layer 106, an oxide semiconductor layer 108 on the insulating layer 104, an insulating layer 110 on the oxide semiconductor layer 108, an oxide semiconductor layer 112 on the insulating layer 110, and an insulating layer 116 on the insulating layer 104, the oxide semiconductor layer 108, and the oxide semiconductor layer 112. The oxide semiconductor layer 108 has a channel region 108i in contact with the insulating layer 110, a source region 108s in contact with the insulating layer 116, and a drain region 108d in contact with the insulating layer 116. The transistor 100 shown in FIGS. 2(A) to 2(C) includes a conductive layer 106 formed on a substrate 102, an insulating layer 104 on the conductive layer 106, an oxide semiconductor layer 108 on the insulating layer 104, an insulating layer 110 on the oxide semiconductor layer 108, an oxide semiconductor layer 112 on the insulating layer 110, and an insulating layer 116 on the insulating layer 104, the oxide semiconductor layer 108, and the oxide semiconductor layer 112. The oxide semiconductor layer 108 has a channel region 108i in contact with the insulating layer 110, a source region 108s in contact with the insulating layer 116, and a drain region 108d in contact with the insulating layer 116. The transistor 100 shown in FIGS. 2(A) to 2(C) includes a conductive layer 106 formed on a substrate 102, an insulating layer 104 on the conductive layer 106, an oxide semiconductor layer 108 on the insulating layer 104, an insulating layer 110 on the oxide semiconductor layer 108, an oxide semiconductor layer 112 on the insulating layer 110, and an insulating layer 116 on the insulating layer 104, the oxide semiconductor layer 108, and the oxide semiconductor layer 112. The oxide semiconductor layer 108 has a channel region 108i in contact with the insulating layer 110, a source region 108s in contact with the insulating layer 116, and a drain region 108d in contact with the insulating layer 116.

[0049] The transistor 100 may further include a conductive layer 120a electrically connected to the source region 108s through an opening 141a provided in the insulating layer 116, and a conductive layer 120b electrically connected to the drain region 108d through an opening 141b provided in the insulating layer 116. The transistor 100 may further include a conductive layer 120a electrically connected to the source region 108s through an opening 141a provided in the insulating layer 116, and a conductive layer 120b electrically connected to the drain region 108d through an opening 141b provided in the insulating layer 116. The transistor 100 may further include a conductive layer 120a electrically connected to the source region 108s through an opening 141a provided in the insulating layer 116, and a conductive layer 120b electrically connected to the drain region 108d through an opening 141b provided in the insulating layer 116. The transistor 100 may further include a conductive layer 120a electrically connected to the source region 108s through an opening 141a provided in the insulating layer 116, and a conductive layer 120b electrically connected to the drain region 108d through an opening 141b provided in the insulating layer 116.

[0050] The conductive layer 106 has a function as a first gate electrode and is made of a metal material. 。The oxide semiconductor layer 112 functions as a second gate electrode and is composed of a metal oxide material. Also, the insulating layer 104 functions as a first gate insulating layer, and the insulating layer 11 0 functions as a second gate insulating layer.

[0051] In addition, the insulating layer 116 contains either or both of nitrogen and hydrogen. By configuring the insulating layer 11 6 to contain either or both of nitrogen and hydrogen, it is possible to supply either or both of nitrogen and hydrogen to the oxide semiconductor layer 108 and the oxide semiconductor layer 112.

[0052] Examples of the insulating layer 116 include a nitride insulating layer. As the nitride insulating layer, silicon nitride, silicon oxynitride, aluminum nitride, aluminum oxynitride, etc. can be used for formation. The hydrogen concentration contained in the insulating layer 116 is preferably 1×10 22 atoms / cm 3 or more.

[0053] In addition, the oxide semiconductor layer 112 has a function of supplying oxygen to the insulating layer 110. Since the oxide semiconductor layer 112 has a function of supplying oxygen to the insulating layer 110, it becomes possible to include excess oxygen in the insulating layer 110. By the insulating layer 110 having an excess oxygen region, it is possible to supply the excess oxygen to the oxide semiconductor layer 108, more specifically, to the channel region 108i. Therefore, a highly reliable semiconductor device can be provided.

[0054] As the insulating layer 110, an oxide insulating layer or a nitride insulating layer can be formed as a single layer or a laminate. As the insulating layer 110, for example, silicon oxide, silicon oxynitride, oxynitride Silicon carbide, silicon nitride, aluminum oxide, hafnium oxide, gallium oxide, or G a-Zn oxide or the like may be used and can be provided in a single layer or a stacked layer.

[0055] The insulating layer 110 formed above the oxide semiconductor layer 108 is configured to have excess oxygen. By doing so, it becomes possible to selectively supply excess oxygen only to the channel region 108i. Alternatively, after supplying excess oxygen to the channel region 108i, the source region 108s, and the drain region 108d, the carrier density of the source region 108s and the drain region 108d may be selectively increased.

[0056] Note that it is preferable that the film thickness of the insulating layer 110 is smaller than the film thickness of the insulating layer 104. As described above, the oxide semiconductor layer 112 that functions as the second gate electrode has a constant voltage from the wiring V0. Since the film thickness of the insulating layer 110 is small, a large parasitic capacitance can be provided in the transistor 100 by the second gate electrode, the second gate insulating layer, and the oxide semiconductor layer 108. Therefore, it is possible to suppress the dielectric breakdown of the transistor due to electrostatic discharge or the like.

[0057] After supplying oxygen to the insulating layer 110, the carrier density of the oxide semiconductor layer 112 increases when either one or both of nitrogen and hydrogen are supplied from the insulating layer 116. In other words, the oxide semiconductor layer 112 also has a function as an oxide conductor (OC: Oxide Conductor). Therefore, the carrier density of the oxide semiconductor layer 112 is higher than that of the oxide semiconductor layer 108.

[0058] The source region 108s and drain region 108d of the oxide semiconductor layer 108, and the oxide semiconductor layer 112 may each have an element that forms an oxygen deficiency. Above Typical examples of the element that forms the oxygen deficiency include hydrogen, boron, carbon, nitrogen, fluorine, lithium, sulfur, chlorine, noble gas elements, etc. Also, typical examples of noble gas elements include helium, neon, argon, krypton, and xenon.

[0059] When an impurity element is added to the oxide semiconductor layer, the bond between the metal element and oxygen in the oxide semiconductor layer is broken, and an oxygen deficiency is formed. Or, when an impurity element is added to the oxide semiconductor layer, the oxygen that was bonded to the metal element in the oxide semiconductor layer binds to the impurity element, and oxygen is desorbed from the metal element, forming an oxygen deficiency. As a result, the carrier density in the oxide semiconductor layer increases and the conductivity becomes higher. Or, when an impurity element is added to the oxide semiconductor layer, the oxygen that was bonded to the metal element in the oxide semiconductor layer binds to the impurity element, and oxygen is desorbed from the metal element, forming an oxygen deficiency. As a result, the carrier density in the oxide semiconductor layer increases and the conductivity becomes higher. In the transistor 100, it is preferable to have a region where the side end of the insulating layer 110 and the side end of the oxide semiconductor layer 112 are aligned. In other words, in the transistor 100, the upper end of the insulating layer 110 and the lower end of the oxide semiconductor layer 112 are substantially aligned. For example, by processing the insulating layer 110 using the oxide semiconductor layer 112 as a mask, the above structure can be obtained. In the transistor 100, it is preferable to have a region where the side end of the insulating layer 110 and the side end of the oxide semiconductor layer 112 are aligned.

[0060] In the transistor 100, it is preferable to have a region where the side end of the insulating layer 110 and the side end of the oxide semiconductor layer 112 are aligned. In other words, in the transistor 100, the upper end of the insulating layer 110 and the lower end of the oxide semiconductor layer 112 are substantially aligned. For example, by processing the insulating layer 110 using the oxide semiconductor layer 112 as a mask, the above structure can be obtained. For example, by processing the insulating layer 110 using the oxide semiconductor layer 112 as a mask, the above structure can be obtained. The oxide semiconductor layer 108 and the oxide semiconductor layer 112 are formed of a metal oxide such as In-M-Zn oxide (M is Al,

[0061] Ga, Y, or Sn). Also, as the oxide semiconductor layer 108 and the oxide semiconductor layer 112, In-Ga oxide or In-Zn oxide may be used. Ga, Y, or Sn). Also, as the oxide semiconductor layer 108 and the oxide semiconductor layer 112, In-Ga oxide or In-Zn oxide may be used. In particular, the oxide semiconductor layer 108 and the oxide semiconductor layer 112 are made of a metal composed of the same constituent elements. In particular, the oxide semiconductor layer 108 and the oxide semiconductor layer 112 are made of a metal composed of the same constituent elements. When formed of an oxide, it is preferable because the manufacturing cost can be reduced.

[0062] When the oxide semiconductor layer 108 and the oxide semiconductor layer 112 are In-M-Zn oxide, I The atomic ratio of the metal elements of the sputtering target used to form the In-M-Zn oxide is preferably such that In ≥ M and Zn ≥ M. As the atomic ratio of the metal elements of such a sputtering target, In:M:Zn = 1:1:1, In:M:Zn = 1: 1:1.2, In:M:Zn = 2:1:1.5, In:M:Zn = 2:1:2.3, In :M:Zn = 2:1:3, In:M:Zn = 3:1:2, In:M:Zn = 4:2:4. 1, In:M:Zn = 5:1:7, etc. are preferable. Note that the atomic ratio of the oxide semiconductor layer 108 to be formed and the oxide semiconductor layer 112 may each vary by about plus or minus 40% of the atomic ratio of the metal elements contained in the above sputtering target. For example, when using a sputtering target with an atomic ratio of In:Ga:Zn = 4:2:4.1, the atomic ratio of the oxide semiconductor layer to be formed may be in the vicinity of In:Ga:Zn = 4:2:3 and the like. By using an oxide semiconductor layer with a low impurity concentration and a low defect level density as the channel region 108i, a transistor with further excellent electrical characteristics can be fabricated.

[0063] Here, a low impurity concentration and a low defect level density (less oxygen deficiency) are called high purity intrinsic or substantially high purity intrinsic. Alternatively, it is called intrinsic or substantially intrinsic. An oxide semiconductor that is high purity intrinsic or substantially high purity intrinsic has few carrier generation sources, so ​​​​​There may be cases where the carrier density can be lowered. Therefore, in the oxide semiconductor layer, a transistor in which a channel region is formed has an electrical characteristic (also referred to as a normally-off characteristic) in which the threshold voltage becomes positive. Further, an oxide semiconductor layer that is highly pure intrinsic or substantially highly pure intrinsic may have a low trap level density because of its low defect level density. In addition, an oxide semiconductor layer that is highly pure intrinsic or substantially highly pure intrinsic can obtain a characteristic in which the off-current is extremely small. Therefore, a transistor in which a channel region is formed in the oxide semiconductor layer may have small fluctuations in electrical characteristics and become a highly reliable transistor.

[0064] On the other hand, the source region 108s, the drain region 108d, and the oxide semiconductor layer 112 are in contact with the insulating layer 116. When the source region 108s, the drain region 108d, and the oxide semiconductor layer 112 are in contact with the insulating layer 116, either one or both of hydrogen and nitrogen are added from the insulating layer 116 to the source region 108s, the drain region 108d, and the oxide semiconductor layer 112, so that the carrier density increases.

[0065] The carrier density of the oxide semiconductor layer will be described below.

[0066] Factors that affect the carrier density of the oxide semiconductor layer include oxygen defects (Vo) in the oxide semiconductor layer, or impurities in the oxide semiconductor layer, etc.

[0067] When the oxygen defects in the oxide semiconductor layer increase, when hydrogen binds to the oxygen defects (this state is also referred to as VoH), the defect level density increases. Or, when impurities in the oxide semiconductor layer ​When there are more of them, the density of defect levels increases due to these impurities. Therefore, in the oxide semiconductor layer by controlling the density of defect levels in the oxide semiconductor layer, the carrier density of the oxide semiconductor layer can be controlled .

[0068] Here, consider a transistor using an oxide semiconductor layer for the channel region.

[0069] When aiming to suppress the negative shift of the threshold voltage of the transistor or to reduce the off-current of the transistor, it is preferable to lower the carrier density of the oxide semiconductor layer. When lowering the carrier density of the oxide semiconductor layer, the impurity concentration in the oxide semiconductor layer should be lowered and the density of defect levels should be lowered. In this specification and the like, a low impurity concentration and a low density of defect levels are referred to as high-purity intrinsic or substantially high-purity intrinsic. As the carrier density of the high-purity intrinsic oxide semiconductor layer, it is less than 8×10 15 cm -3 , preferably less than 1 ×10 11 cm -3 , more preferably less than 1×10 10 cm -3 , and it may be 1×10 -9 cm -3 or more.

[0070] On the other hand, when aiming to improve the on-current of the transistor or to improve the field-effect mobility of the transistor, it is preferable to increase the carrier density of the oxide semiconductor layer. When increasing the carrier density of the oxide semiconductor layer, the impurity concentration of the oxide semiconductor layer may be slightly increased, or the density of defect levels of the oxide semiconductor layer may be slightly increased. Or, the bandgap of the oxide semiconductor layer may be made smaller. For example, for a transistor In the range where the on / off ratio of the Id-Vg characteristics can be obtained, an oxide semiconductor layer with a slightly higher impurity concentration or a slightly higher defect level density can be regarded as substantially intrinsic. Also, an oxide semiconductor layer with a large electron affinity, accompanied by a small bandgap, and as a result, an increased density of thermally excited electrons (carriers) can be regarded as substantially intrinsic. Moreover, when an oxide semiconductor layer with a larger electron affinity is used, the threshold voltage of the transistor becomes lower. The above-mentioned oxide semiconductor layer with an increased carrier density is slightly n-type. Therefore, the oxide semiconductor layer with an increased carrier density may be referred to as "Slightly-n". The carrier density of the substantially intrinsic oxide semiconductor layer is preferably 1×10 cm or more and less than 1×10 cm

[0071] It is more preferably 1×10 cm or more and 1×10

[0072] cm 5 cm -3 or more and less than 1×10 1 8 cm -3 It is even more preferably 1×10 7 cm -3 or more and 1×10 17 cm -3 or less, and even more preferably 1×10 cm 9 cm -3 or more and 5×10 16 cm -3 or less, and even more preferably 1×10 10 cm -3 or more and 1×10 16 cm -3 or less, and even more preferably 1×10 11 cm -3 or more and 1×10 cm 15 cm -3 or less.

[0073] In addition, by using the above-described substantially intrinsic oxide semiconductor layer, the reliability of the transistor may be improved. Here, with reference to FIG. 23, the reason why the reliability of a transistor using an oxide semiconductor layer in the channel region is improved will be described. FIG. 23 is a diagram for explaining the energy band in a transistor using an oxide semiconductor layer in the channel region. In FIG. 23, GE represents a gate electrode, GI represents a gate insulating film, OS represents an oxide semiconductor layer, and SD represents a source electrode or a drain electrode. That is, FIG. 23 is an example of the energy band of a gate electrode, a gate insulating film, an oxide semiconductor layer, and a source electrode or a drain electrode in contact with the oxide semiconductor layer.

[0074] In FIG. 23, GE represents a gate electrode, GI represents a gate insulating film, OS represents an oxide semiconductor layer, and SD represents a source electrode or a drain electrode, respectively. That is, FIG. 23 shows an example of the energy band of a gate electrode, a gate insulating film, an oxide semiconductor layer, and a source electrode or a drain electrode in contact with the oxide semiconductor layer. Furthermore, in FIG. 23, a silicon oxide film is used as the gate insulating film, and an In-Ga-Zn oxide is used for the oxide semiconductor layer. The transition level (εf) of defects that can be formed in the silicon oxide film is formed at a position about 3.1 eV away from the lower end of the conduction band of the gate insulating film. When the gate voltage (Vg) is 30 V, the Fermi level (Ef) of the silicon oxide film at the interface between the oxide semiconductor layer and the silicon oxide film is formed at a position about 3.6 eV away from the lower end of the conduction band of the gate insulating film. Note that the Fermi level of the silicon oxide film varies depending on the gate voltage. For example, by increasing the gate voltage, the Fermi level (Ef) of the silicon oxide film at the interface between the oxide semiconductor layer and the silicon oxide film becomes lower. In FIG. 23, white circles represent electrons (carriers), and Xs represent defect levels in the silicon oxide film.

[0075] In addition, in FIG. 23, a silicon oxide film is used as the gate insulating film, and an In-Ga-Zn oxide is used for the oxide semiconductor layer. The transition level (εf) of defects that can be formed in the silicon oxide film is formed at a position about 3.1 eV away from the lower end of the conduction band of the gate insulating film. When the gate voltage (Vg) is 30 V, the Fermi level (Ef) of the silicon oxide film at the interface between the oxide semiconductor layer and the silicon oxide film is formed at a position about 3.6 eV away from the lower end of the conduction band of the gate insulating film. Note that the Fermi level of the silicon oxide film varies depending on the gate voltage. For example, by increasing the gate voltage, the Fermi level (Ef) of the silicon oxide film at the interface between the oxide semiconductor layer and the silicon oxide film is lowered. In FIG. 23, white circles represent electrons (carriers), and Xs represent defect levels in the silicon oxide film. is formed at a position about 3.1 eV away from the lower end of the conduction band of the gate insulating film. When the gate voltage (Vg) is 30 V, the Fermi level (Ef) of the silicon oxide film at the interface between the oxide semiconductor layer and the silicon oxide film is formed at a position about 3.6 eV away from the lower end of the conduction band of the gate insulating film. Note that the Fermi level of the silicon oxide film varies depending on the gate voltage. For example, by increasing the gate voltage, the Fermi level (Ef) of the silicon oxide film at the interface between the oxide semiconductor layer and the silicon oxide film is formed at a position about 3.6 eV away from the lower end of the conduction band of the gate insulating film. Note that the Fermi level of the silicon oxide film varies depending on the gate voltage. For example, by increasing the gate voltage, the Fermi level (Ef) of the silicon oxide film at the interface between the oxide semiconductor layer and the silicon oxide film is lowered. In FIG. 23, white circles represent electrons (carriers), and Xs represent defect levels in the silicon oxide film. is formed at a position about 3.6 eV away from the lower end of the conduction band of the gate insulating film. Note that the Fermi level of the silicon oxide film varies depending on the gate voltage. For example, by increasing the gate voltage, the Fermi level (Ef) of the silicon oxide film at the interface between the oxide semiconductor layer and the silicon oxide film is lowered. In FIG. 23, white circles represent electrons (carriers), and Xs represent defect levels in the silicon oxide film. at the interface between the oxide semiconductor layer and the silicon oxide film becomes lower. In FIG. 23, white circles represent electrons (carriers), and Xs represent defect levels in the silicon oxide film. at the interface between the oxide semiconductor layer and the silicon oxide film becomes lower. In FIG. 23, white circles represent electrons (carriers), and Xs represent defect levels in the silicon oxide film. In FIG. 23, white circles represent electrons (carriers), and Xs represent defect levels in the silicon oxide film.

[0076] As shown in Fig. 23, with a gate voltage applied, for example, carriers are thermally excited and the carriers are trapped at defect levels (X in the figure), and the charge state of the defect levels changes from positive (“+”) to neutral (“0”). That is, when the value obtained by adding the energy of the above-mentioned thermal excitation to the Fermi level (Ef) of the silicon oxide film is higher than the transition level (εf) of the defect, the charge state of the defect level in the silicon oxide film changes from a positive state to a neutral state, and the threshold voltage of the transistor varies in the positive direction.

[0077] In addition, when oxide semiconductor layers with different electron affinities are used, the depths at which the Fermi levels are formed at the interfaces between the gate insulating film and the oxide semiconductor layers may be different. When an oxide semiconductor layer with a large electron affinity is used, near the interface between the gate insulating film and the oxide semiconductor layer, the lower end of the conduction band of the gate insulating film becomes relatively high. In this case, the defect levels (X in Fig. 23) that can be formed in the gate insulating film also become relatively high, so the energy difference between the Fermi level of the gate insulating film and the Fermi level of the oxide semiconductor layer becomes large. Due to this increase in the energy difference, the amount of charge trapped in the gate insulating film decreases. For example, the change in the charge state of the defect levels that can be formed in the above-mentioned silicon oxide film decreases, and the variation in the threshold voltage of the transistor in a gate bias temperature (also referred to as GBT) stress can be reduced. The above is the explanation about the carrier density of the oxide semiconductor layer.

[0078]

[0079] Also, as shown in Fig. 2(C), the oxide semiconductor layer 108i serves as the first gate electrode The conductive layer 106 that functions, and that of the oxide semiconductor layer 112 that functions as the second gate electrode are positioned so as to face each other, and are sandwiched between a conductive layer or an oxide semiconductor layer that functions as two gate electrodes.

[0080] By having such a configuration, the oxide semiconductor layer 108 included in the transistor 100 can be electrically surrounded by the electric field due to the scanning signal of the conductive layer 106 that functions as the first gate electrode, and the electric field due to the constant voltage of the oxide semiconductor layer 112 that functions as the second gate electrode. be surrounded.

[0081] As described with reference to FIG. 1(A), the transistor 100 is configured to apply a scanning signal for controlling the conduction state of the transistor 100 from the first gate electrode, and to apply a constant voltage from the second gate electrode. Therefore, since a constant voltage is applied to the wiring V0, the gate capacitance between the wiring V0 and the transistors M1 and M2 does not pose a problem, and the gate capacitance between the scanning line GL and the transistor can be made smaller than in the case of connecting the gate electrodes to each other.

[0082] Further, the transistor 100 is configured to control the conduction state by a scanning line provided in the same layer as the first gate electrode. The first gate electrode is made of a metal material. The metal material has a smaller resistance value than a metal oxide material such as the oxide semiconductor layer 112 that is the second gate electrode. Therefore, the resistance of the scanning line formed of the same material as the conductive layer 106 can be reduced.

[0083] Further, the transistor 100 has an oxide semiconductor layer 112 that functions as the second gate electrode, together with a gate electrode that releases oxygen by heating, such as an oxide layer. Therefore, the transistor ​​​​​​The transistor 100 can be a highly reliable transistor. Also, as described above the conductive layer 106 which is the first gate electrode and the scanning line in the same layer can reduce the resistance and can compensate for the drawback that the resistance of the second gate electrode increases. Also, in order to reduce the resistance of the oxide semiconductor layer which is the second gate electrode, compared with the configuration in which the oxide semiconductor layer and the metal wiring are laminated to reduce the resistance, the number of processes can be reduced, so the manufacturing cost can be reduced. Moreover, the transistor 100 has no opening for connecting the first gate electrode and the second gate electrode. Therefore, it is possible to avoid a configuration in which an opening is arranged in a narrow region such as a pixel region. Therefore, it is suitable for a high-definition display device.

[0084] Also, the transistor 100

[0085] [Configuration example of top view] Next, FIG. 3 shows an example of a top view applicable to the circuit configuration of FIG. 1(A), excluding the configuration of a light-emitting element and the like. FIG. 4 shows a state in which the conductive layer and the semiconductor layer in the vertical relationship in the top view of FIG. 3 are separated by layer and connected through an opening. FIG. 5(A) is a cross-sectional view taken between the dotted lines P1 - P2 in FIG. 3, and FIG. 5(B) is a cross-sectional view taken between the dotted lines Q1 - Q2 in FIG. 3. FIGS. 6(A) and (B) are top views showing the top views of FIG. 3 including the configuration of a light-emitting element and the like arranged side by side.

[0086] In the top view of FIG. 3, the scanning line GL, the signal line SL, the wiring V0, the current supply line ANODE , the transistor M1, the transistor M2, the transistor M3, and the capacitor element C1 are shown. In the layer structure of the conductive layer and the oxide semiconductor layer, the illustration of the insulating layer and the like is omitted in the figure.

[0087] The layer structures of the conductive layer and the oxide semiconductor layer that constitute each wiring and the like in FIG. 3 can be understood from FIGS. 4 and FIG. 5. On the substrate SUB, a conductive layer 151 that functions as a first gate electrode and and a conductive layer 152 are provided. Next, an insulating layer 153 that functions as a first gate insulating layer is interposed, and an oxide semiconductor layer 161, an oxide semiconductor layer 162, and an oxide semiconductor layer 16 3 are provided. Next, through an insulating layer 164 that functions as a second gate insulating layer , an oxide semiconductor layer 171, an oxide semiconductor layer 172, and an oxide semiconductor layer 173 that function as a second gate electrode are provided. Next, the carrier densities in the oxide semiconductor layer 161, the oxide semiconductor layer 162, the oxide semiconductor layer 163, and the oxide semiconductor layer 171, the oxide semiconductor layer 1 72, and the oxide semiconductor layer 173 are selectively increased to enhance conductivity, and through an insulating layer 174, a conductive layer 181, a conductive layer 182, a conductive layer 183, a conductive layer 184, and a conductive layer 18 5 that function as a source electrode, a drain electrode, or various wirings of the transistor are provided. Next, an insulating layer 186 and an insulating layer 18 7 that function as an interlayer insulating layer are interposed, and a conductive layer 191 and a conductive layer 192 are provided. On the conductive layer 191 and the conductive layer 192, an insulating layer 193 that functions as an interlayer insulating layer is provided. Further, openings 190 that reach the conductive layer 183 are provided in the insulating layer 186, the insulating layer 187, and the insulating layer 193. This opening 190 is an opening for forming a pixel electrode and connecting it to a light-emitting element provided thereon.

[0088] In FIGS. 3 and 4, the configuration marked with a cross in a square represents an opening formed in the insulating layer. ​It is. Through the opening, as indicated by the arrow in FIG. 4, the conductive layer and the oxide semiconductor layer of each layer are connected. Also shown in FIG. 4 are the conductive layer 151 that serves as the scanning line GL, the conductive layer 1 91 that serves as the signal line SL, the conductive layer 181 that serves as the wiring V0, and the conductive layer 192 that serves as the current supply line ANODE .

[0089] As can be seen from FIGS. 3, 4, and 5, in transistors M1 and M2, the first gate electrode and the second gate electrode are not connected. With this configuration , compared to the case where the gate electrodes of each other are connected, the gate capacitance between the scanning line GL and transistors M1 and M2 can be made to be only formed between the first gate electrode. Therefore, the above configuration can reduce the gate capacitance between the scanning line GL and the transistors compared to the case where the gate electrodes of each other are connected.

[0090] Also, as can be seen from FIGS. 3, 4, and 5, in transistors M1 and M2, a configuration can be adopted in which the scanning line GL made of a metal material is arranged in the same layer as the first gate electrode. Therefore, even if a configuration is adopted in which the first gate electrode is formed of a conductive layer made of a metal material and the second gate electrode is formed of a conductive layer made of a metal oxide material such as an oxide semiconductor, the problem that the resistance of the scanning line GL becomes high can be avoided. Also, the manufacturing cost for providing extra wiring made of a metal material can be reduced in order to lower the resistance of the scanning line GL.

[0091] Also, as can be seen from FIGS. 3, 4, and 5, the two electrodes forming the capacitive element C1 can be composed of the conductive layer 152 and the oxide semiconductor layer 163. Between the two electrodes By thinning the insulating layer 153, a capacitive element with a large capacitance can be obtained.

[0092] Also, in FIG. 6(A), the pixels described in FIGS. 3 to 5 are shown as a top view of 2×3 pixels as sub-pixels of three colors (for example, red (R), green (G), and blue (B)). FIG. 6( A) shows sub-pixels (R1, R2, G1, G2, B1, B2) arranged in two rows of the m-th row and the (m + 1)-th row, and three columns of the n-th column, the (n + 1)-th column, and the (n + 2)-th column. Also, in FIG. 6( A), in addition to the opening 190 described in FIGS. 3 to 5, the light-emitting layer 1 98 that constitutes the light-emitting element EL and the partition layer 199 are shown. Also, in FIG. 6(A), the scanning line GL_ m of the m-th row, the scanning line GL_m + 1 of the (m + 1)-th row, the signal line SL_n of the n-th column, the (n + 1) th signal line SL_n + 1, the signal line SL_n + 2 of the (n + 2)-th column, the wiring V0, and the electric current supply line ANODE are shown.

[0093] Also, FIG. 6(B) is a diagram schematically showing the top view shown in FIG. 6(A). In FIG. 6(B ), the region 22 is a region where the light-emitting layer 198 and the partition layer 199 are provided, and the region 24 is a region where a circuit including transistors M1 to M3 is provided. As shown in FIG. 6(A) as well, the opening 190 is arranged near the center of the region 24. By arranging the region 24 shifted without overlapping the region 22, the opening 190 can be arranged at the end of the region 22 . With such a configuration, the light-emitting region can be arranged regardless of the position of the opening 190 .

[0094] [Modification Example] A circuit configuration applicable to one aspect of the present invention is the transistors M1 to M in FIG. 1(A) It is not limited to a pixel configuration having 3. For example, as shown in FIG. 7(A), it is also applicable to a pixel configuration having two or less transistors. It is also applicable to a pixel configuration having two or less transistors.

[0095] The pixel configuration shown in FIG. 7(A) includes a transistor M4, a transistor M5, a capacitor element C 2, and a light-emitting element EL. That is, it corresponds to a circuit configuration in which the transistor M2 in FIG. 1(A) is omitted. It corresponds to the circuit configuration in which the transistor M2 in FIG. 1(A) is omitted.

[0096] Also in the configuration shown in FIG. 7(A), in the transistor M4, the first gate electrode and the second gate electrode are not connected. With this configuration, compared to the case where the gate electrodes are connected to each other, the gate capacitance between the scanning line GL and the transistor can be made only the capacitance formed between the first gate electrode and the second gate electrode. Since a constant voltage is applied to the wiring V0, the gate capacitance between the wiring V0 and the transistor M4 is not a problem. Therefore, the above configuration can reduce the gate capacitance between the scanning line GL and the transistor compared to the case where the gate electrodes are connected to each other. Also, by controlling the constant voltage applied to the wiring V0, there is an effect that the threshold voltage of the transistor M4 can be adjusted. Also in the configuration shown in FIG. 7(A), in the transistor M4, the first gate electrode and the second gate electrode are not connected. With this configuration, compared to the case where the gate electrodes are connected to each other, the gate capacitance between the scanning line GL and the transistor can be made only the capacitance formed between the first gate electrode and the second gate electrode. Since a constant voltage is applied to the wiring V0, the gate capacitance between the wiring V0 and the transistor M4 is not a problem. Therefore, the above configuration can reduce the gate capacitance between the scanning line GL and the transistor compared to the case where the gate electrodes are connected to each other. Also, by controlling the constant voltage applied to the wiring V0, there is an effect that the threshold voltage of the transistor M4 can be adjusted. gate electrode are not connected. With this configuration, compared to the case where the gate electrodes are connected to each other, the gate capacitance between the scanning line GL and the transistor can be made only the capacitance formed between the first gate electrode and the second gate electrode. Since a constant voltage is applied to the wiring V0, the gate capacitance between the wiring V0 and the transistor M4 is not a problem. Therefore, the above configuration can reduce the gate capacitance between the scanning line GL and the transistor compared to the case where the gate electrodes are connected to each other. Also, by controlling the constant voltage applied to the wiring V0, there is an effect that the threshold voltage of the transistor M4 can be adjusted. gate electrode are not connected. With this configuration, compared to the case where the gate electrodes are connected to each other, the gate capacitance between the scanning line GL and the transistor can be made only the capacitance formed between the first gate electrode and the second gate electrode. Since a constant voltage is applied to the wiring V0, the gate capacitance between the wiring V0 and the transistor M4 is not a problem. Therefore, the above configuration can reduce the gate capacitance between the scanning line GL and the transistor compared to the case where the gate electrodes are connected to each other. Also, by controlling the constant voltage applied to the wiring V0, there is an effect that the threshold voltage of the transistor M4 can be adjusted. gate electrode are not connected. With this configuration, compared to the case where the gate electrodes are connected to each other, the gate capacitance between the scanning line GL and the transistor can be made only the capacitance formed between the first gate electrode and the second gate electrode. Since a constant voltage is applied to the wiring V0, the gate capacitance between the wiring V0 and the transistor M4 is not a problem. Therefore, the above configuration can reduce the gate capacitance between the scanning line GL and the transistor compared to the case where the gate electrodes are connected to each other. Also, by controlling the constant voltage applied to the wiring V0, there is an effect that the threshold voltage of the transistor M4 can be adjusted. gate electrode are not connected. With this configuration, compared to the case where the gate electrodes are connected to each other, the gate capacitance between the scanning line GL and the transistor can be made only the capacitance formed between the first gate electrode and the second gate electrode. Since a constant voltage is applied to the wiring V0, the gate capacitance between the wiring V0 and the transistor M4 is not a problem. Therefore, the above configuration can reduce the gate capacitance between the scanning line GL and the transistor compared to the case where the gate electrodes are connected to each other. Also, by controlling the constant voltage applied to the wiring V0, there is an effect that the threshold voltage of the transistor M4 can be adjusted.

[0097] Also, in the above configuration, in the transistor M4, the scanning line GL formed of a metal material in the same layer as the first gate electrode can be arranged. Therefore, even if a configuration is adopted in which the first gate electrode is formed of a conductive layer made of a metal material and the second gate electrode is formed of a conductive layer made of a metal oxide material such as an oxide semiconductor, the problem that the resistance of the scanning line GL becomes high can be avoided. Also, in order to reduce the resistance of the scanning line GL, the manufacturing cost for providing an extra wiring made of a metal material can be reduced. Also, in the above configuration, in the transistor M4, the scanning line GL formed of a metal material in the same layer as the first gate electrode can be arranged. Therefore, even if a configuration is adopted in which the first gate electrode is formed of a conductive layer made of a metal material and the second gate electrode is formed of a conductive layer made of a metal oxide material such as an oxide semiconductor, the problem that the resistance of the scanning line GL becomes high can be avoided. Also, in order to reduce the resistance of the scanning line GL, the manufacturing cost for providing an extra wiring made of a metal material can be reduced. Also, in the above configuration, in the transistor M4, the scanning line GL formed of a metal material in the same layer as the first gate electrode can be arranged. Therefore, even if a configuration is adopted in which the first gate electrode is formed of a conductive layer made of a metal material and the second gate electrode is formed of a conductive layer made of a metal oxide material such as an oxide semiconductor, the problem that the resistance of the scanning line GL becomes high can be avoided. Also, in order to reduce the resistance of the scanning line GL, the manufacturing cost for providing an extra wiring made of a metal material can be reduced. Also, in the above configuration, in the transistor M4, the scanning line GL formed of a metal material in the same layer as the first gate electrode can be arranged. Therefore, even if a configuration is adopted in which the first gate electrode is formed of a conductive layer made of a metal material and the second gate electrode is formed of a conductive layer made of a metal oxide material such as an oxide semiconductor, the problem that the resistance of the scanning line GL becomes high can be avoided. Also, in order to reduce the resistance of the scanning line GL, the manufacturing cost for providing an extra wiring made of a metal material can be reduced. Also, in the above configuration, in the transistor M4, the scanning line GL formed of a metal material in the same layer as the first gate electrode can be arranged. Therefore, even if a configuration is adopted in which the first gate electrode is formed of a conductive layer made of a metal material and the second gate electrode is formed of a conductive layer made of a metal oxide material such as an oxide semiconductor, the problem that the resistance of the scanning line GL becomes high can be avoided. Also, in order to reduce the resistance of the scanning line GL, the manufacturing cost for providing an extra wiring made of a metal material can be reduced. Also, in the above configuration, in the transistor M4, the scanning line GL formed of a metal material in the same layer as the first gate electrode can be arranged. Therefore, even if a configuration is adopted in which the first gate electrode is formed of a conductive layer made of a metal material and the second gate electrode is formed of a conductive layer made of a metal oxide material such as an oxide semiconductor, the problem that the resistance of the scanning line GL becomes high can be avoided. Also, in order to reduce the resistance of the scanning line GL, the manufacturing cost for providing an extra wiring made of a metal material can be reduced.

[0098] Also, in the above configuration, the first gate electrode can be formed of a conductive layer made of a metal material, and the second gate electrode can be formed of a conductive layer made of a metal oxide material such as an oxide semiconductor. Therefore, a gate electrode that releases oxygen by heating is adopted as the second gate electrode, and the reliability of the transistor can be improved. In addition, in the transistor M4, since the first gate electrode and the second gate electrode are not connected, a configuration in which the gate electrodes are not connected to each other in a narrow region such as a pixel region can be adopted, so that a high-definition display device can be realized.

[0099] The circuit configuration applicable to one aspect of the present invention is not limited to the pixel configurations of FIGS. 1(A) and 7(A). For example, as shown in FIG. 7(B), it is also applicable to a pixel configuration having three or more transistors.

[0100] The pixel configuration shown in FIG. 7(B) includes a transistor M6, a transistor M7, a transistor M8, a transistor M9, a transistor M10, a transistor M11, a capacitor element C3, a capacitor element C4, a capacitor element C5, and a light-emitting element EL. Further, the pixel configuration operates by a signal line SL, a current supply line ANODE, a wiring V0, a common wiring CATHODE, and in addition, scanning lines GL1 to GL4, and wirings V1 and V2. The wirings V1 and V2 are wirings to which a constant voltage is applied.

[0101] Also in the configuration shown in FIG. 7(B), in the transistors M6 to M10, the first gate electrode and the second gate electrode are not connected. With this configuration, the gate electrodes of each other ​​​​​​The gate capacitance between the scanning lines GL1 to GL4 and the transistor can be made to be only formed between them and the first gate electrode, compared with the case of connecting the electrodes. Since a fixed voltage is applied to the wiring V0, the gate capacitance between the wiring V0 and the transistors M6 to M10 does not pose a problem. Therefore, the above configuration can reduce the gate capacitance between the scanning lines GL1 to GL4 and the transistor, compared with the case of connecting the gate electrodes to each other. Also, by controlling the fixed voltage applied to the wiring V0, there is an effect such that the threshold voltages of the transistors M6 to M10 can be adjusted. Also, in the above configuration, in the transistors M6 to M10, the scanning lines GL1 to GL4 made of a metal material can be arranged in the same layer as the first gate electrode. Therefore, even if a configuration is adopted in which the first gate electrode is formed of a conductive layer made of a metal material and the second gate electrode is formed of a conductive layer made of a metal oxide material such as an oxide semiconductor, the problem that the resistance of the scanning lines GL1 to GL4 becomes high can be avoided. Also, the manufacturing cost for providing extra wiring made of a metal material to reduce the resistance of the scanning lines GL1 to GL4 can be reduced. Also, in the above configuration, the first gate electrode can be formed of a conductive layer made of a metal material, and the second gate electrode can be formed of a conductive layer made of a metal oxide material such as an oxide semiconductor. Therefore, a gate electrode that releases oxygen by heating can be adopted as the second gate electrode, and the reliability of the transistor can be improved. In addition, in the transistors M6 to M10, since the first gate electrode and the second gate electrode are not connected, in a narrow region such as a pixel region Since a fixed voltage is applied to the wiring V0, the gate capacitance between the wiring V0 and the transistors M6 to M10 does not pose a problem. Therefore, the above configuration can reduce the gate capacitance between the scanning lines GL1 to GL4 and the transistor, compared with the case of connecting the gate electrodes to each other. Also, by controlling the fixed voltage applied to the wiring V0, there is an effect such that the threshold voltages of the transistors M6 to M10 can be adjusted. Also, in the above configuration, in the transistors M6 to M10, the scanning lines GL1 to GL4 made of a metal material can be arranged in the same layer as the first gate electrode. Therefore, even if a configuration is adopted in which the first gate electrode is formed of a conductive layer made of a metal material and the second gate electrode is formed of a conductive layer made of a metal oxide material such as an oxide semiconductor, the problem that the resistance of the scanning lines GL1 to GL4 becomes high can be avoided. Also, the manufacturing cost for providing extra wiring made of a metal material to reduce the resistance of the scanning lines GL1 to GL4 can be reduced. Also, in the above configuration, the first gate electrode can be formed of a conductive layer made of a metal material, and the second gate electrode can be formed of a conductive layer made of a metal oxide material such as an oxide semiconductor. Therefore, a gate electrode that releases oxygen by heating can be adopted as the second gate electrode, and the reliability of the transistor can be improved. In addition, in the transistors M6 to M10, since the first gate electrode and the second gate electrode are not connected, in a narrow region such as a pixel region Since a fixed voltage is applied to the wiring V0, the gate capacitance between the wiring V0 and the transistors M6 to M10 does not pose a problem. Therefore, the above configuration can reduce the gate capacitance between the scanning lines GL1 to GL4 and the transistor, compared with the case of connecting the gate electrodes to each other. Also, by controlling the fixed voltage applied to the wiring V0, there is an effect such that the threshold voltages of the transistors M6 to M10 can be adjusted.

[0102] Also, in the above configuration, in the transistors M6 to M10, the scanning lines GL1 to GL4 made of a metal material can be arranged in the same layer as the first gate electrode. Therefore, even if a configuration is adopted in which the first gate electrode is formed of a conductive layer made of a metal material and the second gate electrode is formed of a conductive layer made of a metal oxide material such as an oxide semiconductor, the problem that the resistance of the scanning lines GL1 to GL4 becomes high can be avoided. Also, the manufacturing cost for providing extra wiring made of a metal material to reduce the resistance of the scanning lines GL1 to GL4 can be reduced. Also, in the above configuration, in the transistors M6 to M10, the scanning lines GL1 to GL4 made of a metal material can be arranged in the same layer as the first gate electrode. Therefore, even if a configuration is adopted in which the first gate electrode is formed of a conductive layer made of a metal material and the second gate electrode is formed of a conductive layer made of a metal oxide material such as an oxide semiconductor, the problem that the resistance of the scanning lines GL1 to GL4 becomes high can be avoided. Also, the manufacturing cost for providing extra wiring made of a metal material to reduce the resistance of the scanning lines GL1 to GL4 can be reduced. Also, in the above configuration, the first gate electrode can be formed of a conductive layer made of a metal material, and the second gate electrode can be formed of a conductive layer made of a metal oxide material such as an oxide semiconductor. Therefore, a gate electrode that releases oxygen by heating can be adopted as the second gate electrode, and the reliability of the transistor can be improved. In addition, in the transistors M6 to M10, since the first gate electrode and the second gate electrode are not connected, in a narrow region such as a pixel region Also, in the above configuration, in the transistors M6 to M10, the scanning lines GL1 to GL4 made of a metal material can be arranged in the same layer as the first gate electrode. Therefore, even if a configuration is adopted in which the first gate electrode is formed of a conductive layer made of a metal material and the second gate electrode is formed of a conductive layer made of a metal oxide material such as an oxide semiconductor, the problem that the resistance of the scanning lines GL1 to GL4 becomes high can be avoided. Also, the manufacturing cost for providing extra wiring made of a metal material to reduce the resistance of the scanning lines GL1 to GL4 can be reduced. Also, in the above configuration, the first gate electrode can be formed of a conductive layer made of a metal material, and the second gate electrode can be formed of a conductive layer made of a metal oxide material such as an oxide semiconductor. Therefore, a gate electrode that releases oxygen by heating can be adopted as the second gate electrode, and the reliability of the transistor can be improved. In addition, in the transistors M6 to M10, since the first gate electrode and the second gate electrode are not connected, in a narrow region such as a pixel region Also, in the above configuration, in the transistors M6 to M10, the scanning lines GL1 to GL4 made of a metal material can be arranged in the same layer as the first gate electrode. Therefore, even if a configuration is adopted in which the first gate electrode is formed of a conductive layer made of a metal material and the second gate electrode is formed of a conductive layer made of a metal oxide material such as an oxide semiconductor, the problem that the resistance of the scanning lines GL1 to GL4 becomes high can be avoided. Also, the manufacturing cost for providing extra wiring made of a metal material to reduce the resistance of the scanning lines GL1 to GL4 can be reduced. Also, in the above configuration, the first gate electrode can be formed of a conductive layer made of a metal material, and the second gate electrode can be formed of a conductive layer made of a metal oxide material such as an oxide semiconductor. Therefore, a gate electrode that releases oxygen by heating can be adopted as the second gate electrode, and the reliability of the transistor can be improved. In addition, in the transistors M6 to M10, since the first gate electrode and the second gate electrode are not connected, in a narrow region such as a pixel region

[0103] Also, in the above configuration, the first gate electrode can be formed of a conductive layer made of a metal material, and the second gate electrode can be formed of a conductive layer made of a metal oxide material such as an oxide semiconductor. Therefore, a gate electrode that releases oxygen by heating can be adopted as the second gate electrode, and the reliability of the transistor can be improved. In addition, in the transistors M6 to M10, since the first gate electrode and the second gate electrode are not connected, in a narrow region such as a pixel region Also, in the above configuration, the first gate electrode can be formed of a conductive layer made of a metal material, and the second gate electrode can be formed of a conductive layer made of a metal oxide material such as an oxide semiconductor. Therefore, a gate electrode that releases oxygen by heating can be adopted as the second gate electrode, and the reliability of the transistor can be improved. In addition, in the transistors M6 to M10, since the first gate electrode and the second gate electrode are not connected, in a narrow region such as a pixel region Also, in the above configuration, the first gate electrode can be formed of a conductive layer made of a metal material, and the second gate electrode can be formed of a conductive layer made of a metal oxide material such as an oxide semiconductor. Therefore, a gate electrode that releases oxygen by heating can be adopted as the second gate electrode, and the reliability of the transistor can be improved. In addition, in the transistors M6 to M10, since the first gate electrode and the second gate electrode are not connected, in a narrow region such as a pixel region Also, in the above configuration, the first gate electrode can be formed of a conductive layer made of a metal material, and the second gate electrode can be formed of a conductive layer made of a metal oxide material such as an oxide semiconductor. Therefore, a gate electrode that releases oxygen by heating can be adopted as the second gate electrode, and the reliability of the transistor can be improved. In addition, in the transistors M6 to M10, since the first gate electrode and the second gate electrode are not connected, in a narrow region such as a pixel region Also, in the above configuration, the first gate electrode can be formed of a conductive layer made of a metal material, and the second gate electrode can be formed of a conductive layer made of a metal oxide material such as an oxide semiconductor. Therefore, a gate electrode that releases oxygen by heating can be adopted as the second gate electrode, and the reliability of the transistor can be improved. In addition, in the transistors M6 to M10, since the first gate electrode and the second gate electrode are not connected, in a narrow region such as a pixel region Since a configuration can be adopted in which the gate electrodes are not connected to each other in the domain, a high-definition display device can be realized. This is possible.

[0104] Also, in Fig. 1(A), the transistor M3 is shown with a configuration in which the first gate electrode and the second gate electrode are connected. However, one aspect of the present invention is not limited to this configuration. For example, as shown in Fig. 8(A), the second gate electrode of the transistor M3 may be configured to be connected to the wiring V0. This may be a configuration.

[0105] Alternatively, for example, as shown in Fig. 8(B), the first gate electrode of the transistor M3 may be configured to be omitted. Alternatively, for example, as shown in Fig. 8(C), the first gate electrode of the transistor M 3 may be configured to be connected to either the source or the drain of the transistor M3. This may be a configuration.

[0106] Also, in the configurations shown in Figs. 8(A) to (C), in the transistors M1 and M2, the first gate electrode and the second gate electrode are not connected. With this configuration, compared to the case where the gate electrodes are connected to each other, the gate capacitance between the scanning line GL and the transistor can be made to be only formed between the first gate electrode. Since a fixed voltage is applied to the wiring V0, the gate capacitance between the wiring V0 and the transistors M1 and M2 does not pose a problem. Therefore, the above configuration can reduce the gate capacitance between the scanning line GL and the transistor compared to the case where the gate electrodes are connected to each other. Also, by controlling the fixed voltage applied to the wiring V0, there is an effect that the threshold voltages of the transistors M1 and M2 can be adjusted. In the above configuration, in the transistors M1 and M2, the first gate electrode is in the same layer as

[0107] the second gate electrode. A configuration can be adopted in which a scanning line GL made of a metal material is arranged. Therefore, the first gate electrode is formed of a conductive layer made of a metal material, and the second gate electrode is formed of a conductive layer made of a metal oxide material such as an oxide semiconductor even if a configuration is adopted, a problem such as an increase in the resistance of the scanning line GL can be avoided. In addition, in order to reduce the resistance of the scanning line GL , the manufacturing cost for providing extra wiring made of a metal material can be reduced.

[0108] In addition, in the above configuration, the first gate electrode can be formed of a conductive layer made of a metal material, and the second gate electrode can be formed of a conductive layer made of a metal oxide material such as an oxide semiconductor. Therefore, a gate electrode that releases oxygen by heating can be adopted as the second gate electrode, and the reliability of the transistor can be improved. In addition, in transistors M1 and M2, since the first gate electrode and the second gate electrode are not connected, a configuration in which the gate electrodes are not connected to each other in a narrow area such as a pixel region can be adopted, so that a high-definition display device can be realized .

[0109] In addition, in FIG. 1(A), a configuration in which both of the second gate electrodes in transistors M1 and M2 are connected to the wiring V0 is shown, but one aspect of the present invention is not limited to this configuration. For example, as shown in FIG. 24(A), the second gate electrode of transistor M1 is connected to the wiring V0, and the second gate electrode of transistor M2 may be connected to the scanning line GL. According to this configuration, the current supply ability of transistor M2 can be improved .

[0110] Alternatively, for example, as shown in FIG. 24(B), the second gate electrode of the transistor M2 is connected to the wiring V0, and the second gate electrode of the transistor M1 is connected to the scanning line GL may be configured. With this configuration, the current supply capacity of the transistor M1 can be increased .

[0111] Also, in FIG. 1(A), the scanning line GL may be a plurality of scanning lines GL1, GL2. For example, as shown in FIG. 25(A), the first gate electrode of the transistor M1 is connected to the scanning line GL 1, and the first gate electrode of the transistor M2 may be connected to the scanning line GL2.

[0112] Also, in FIG. 1(A), the wiring V0 may be a plurality of wirings V0_1, V0_2. For example, as shown in FIG. 25(B), the second gate electrode of the transistor M1 is connected to the wiring V0_ 1, and the second gate electrode of the transistor M2 may be connected to the wiring V0_1.

[0113] This embodiment can be implemented in appropriate combination with at least some of the other embodiments described in this specification.

[0114] (Embodiment 2) In this embodiment, a cross-sectional configuration example of a display device according to an aspect of the present invention will be described.

[0115] 〔Configuration example of display device〕 FIG. 9 shows a schematic top view of the display device 10 described below. The display device 10 includes a pixel portion 1 1, a scanning line driving circuit 12, a signal line driving circuit 13, a terminal portion 15, a plurality of wirings 16a, and a plurality of wirings 16b, etc.

[0116] 〔Cross-sectional configuration example 1〕 Figure 10 is a schematic cross-sectional view of the display device 10. Figure 10 corresponds to a cross-section along the cutting line A1- A2 in, for example, Figure 9.

[0117] The display device 10 has a configuration in which a first substrate 201 and a second substrate 202 are bonded together by an adhesive layer 220. to each other.

[0118] On the first substrate 201, there are provided a terminal portion 15, a wiring 16b, a transistor 255 that constitutes a signal line driving circuit 13, transistors 251 and 252 that constitute a pixel portion 11, a capacitor element 253, a light-emitting element 254, and the like. Also, on the first substrate 201, there are provided an insulating layer 211, an insulating layer 212, an insulating layer 213, an insulating layer 214, a spacer 215, and the like. are provided. there.

[0119] On the side of the second substrate 202 facing the first substrate 201, there are provided an insulating layer 221, a light-shielding layer 231, a colored layer 2 32, a structure 230a, a structure 230b, and the like.

[0120] The light-emitting element 254 is provided on the insulating layer 213. The light-emitting element 254 has a pixel electrode 225 that functions as a first electrode, an EL layer 222, and a second electrode 223. Also, an optical adjustment layer 224 is provided between the pixel electrode 225 and the EL layer 222. The insulating layer 214 covers the ends of the pixel electrode 225 and the optical adjustment layer 224. is provided. is provided covering the ends of the pixel electrode 225 and the optical adjustment layer 224.

[0121] The transistor 251 is a transistor that functions as the transistor M1 or M2 described in FIG. 1(A) of the above Embodiment 1. The transistor 252 is a transistor that functions as the transistor M3 described in FIG. 1(A) of the above Embodiment 1. is a transistor that functions as the transistor M3 described in FIG. 1(A) of the above Embodiment 1. of the above Embodiment 1.

[0122] The transistors 251, 252, and 255 are provided with a conductive layer 275 that functions as a first gate electrode and a conductive layer 272 that functions as a second gate electrode. That is , the semiconductor in which the channel is formed is sandwiched between two gate electrodes. The conductive layer 275 corresponds to the conductive layer 106 that functions as the first gate electrode described in FIG. 2 of the first embodiment . The conductive layer 272 corresponds to the oxide semiconductor layer 112 that functions as the second gate electrode described in FIG. 2 of the first embodiment .

[0123] By serving as an electrode that can repair the oxygen deficiency of the semiconductor layer 271 by releasing oxygen, it is possible to stabilize the electrical characteristics of the transistor.

[0124] Also, in a transistor connected to a light-emitting element such as the transistor 252, it is preferable to apply the same signal to these by electrically connecting the two gate electrodes. Such a transistor can increase the field-effect mobility compared to other transistors, and can increase the on-current. As a result, a circuit capable of high-speed operation can be fabricated.

[0125] In FIG. 10, the capacitor element 253 may be composed of a part of the conductive layer 274, a part of the insulating layer 217, and a part of the conductive layer 273, but may also be composed of a part of the conductive layer 275, a part of the insulating layer 211, and a part of the semiconductor layer 271.

[0126] FIG. 10 shows an example in which the light-emitting element 254 is a top-emission structure light-emitting element. Light emission from the light-emitting element 254 is emitted toward the second substrate 202 side. With such a configuration ​By doing so, transistors, capacitor elements, circuits, wirings, etc. can be arranged on the lower side (the side of the first substrate 201) of the light-emitting element 254, so that the aperture ratio of the pixel portion 11 can be increased.

[0127] On the surface of the second substrate 202 on the side of the first substrate 201, a coloring layer 23 2 is provided. Further, a light-shielding layer 231 may be provided in a portion where the coloring layer 232 is not provided. As shown in FIG. 10, the light-shielding layer 231 may be provided at a position overlapping with the signal line driving circuit 13. Further, a light-transmitting overcoat layer may be provided to cover the coloring layer 232 and the light-shielding layer 231.

[0128] Further, on the side of the first substrate 201 of the second substrate 202, a structure 230a is provided in a region inside the adhesive layer 220, and a structure 230b is provided in a region outside the adhesive layer 220. The structure 230a and the structure 230b have a function of suppressing the progress of cracks when cracks occur in the insulating layer 221 or the second substrate 202 at the end of the second substrate 202. In FIG. 10, an example is shown in which the structure 230a and the structure 230b have a laminated structure of a layer made of the same film as the light-shielding layer 231 and a layer made of the same film as the coloring layer 232. By adopting such a laminated structure of two or more layers, the effect of suppressing the progress of cracks can be enhanced. Here, a configuration in which the structure 230a and the structure 230b are arranged on both sides with the adhesive layer 220 interposed therebetween is shown, but either one of them may be used. In addition, when there is no risk of cracks occurring (for example, when the rigidity of the second substrate 202 or the like is high), the structure may be configured not to provide the structure 230a and the structure 230b. By making it a laminated structure of two or more layers in this way, the effect of suppressing the progress of cracks can be further enhanced. Note that here, a configuration in which the structure 230a and the structure 230b are arranged on both sides with the adhesive layer 220 interposed therebetween is shown, but either one of them may be sufficient. In addition, when there is no risk of cracks occurring (for example, when the rigidity of the second substrate 202 or the like is high), the structure may be configured not to provide the structure 230a and the structure 230b. If there is no risk of cracks occurring (for example, when the rigidity of the second substrate 202 or the like is high), the structure

[0129] The spacer 215 is provided on the insulating layer 214. The spacer 215 controls so that the distance between the first substrate 201 and the second substrate 202 does not shrink more than necessary, and has a function as a gap spacer. Also, the spacer 215 has a part of its side surface, and the angle with the surface to be formed is preferably 45 degrees or more and 120 degrees or less, more preferably 60 degrees or more and 100 degrees or less , and even more preferably 75 degrees or more and 90 degrees or less. By doing so, a region where the thickness of the EL layer 222 is thin is likely to be formed on the side surface of the spacer 215. Therefore, between adjacent light-emitting elements, the phenomenon of light emission due to the flow of current through the EL layer 222 can be suppressed. In particular, when the pixel portion 11 is high-definition, since the distance between adjacent light-emitting elements is small, it is effective to provide the spacer 215 having such a shape between the light-emitting elements. Furthermore, it is particularly effective when the EL layer 222 has a layer containing a material with high conductivity.

[0130] Also, when using a shielding mask when forming the EL layer 222, the second electrode 223, etc., the spacer 215 may have a function of preventing the surface to be formed from being damaged by the shielding mask.

[0131] The spacer 215 is preferably provided so as to overlap with a wiring that intersects the scanning line.

[0132] FIG. 10 shows an example of a display device 10 using a color filter method. For example, as the coloring layer 232, a configuration in which one color is expressed by three sub-pixels to which any one of red (R), green (G), and blue (B) is applied may be used. In addition to this, white (W) When applying yellow (Y) sub-pixels, color reproducibility is improved and power consumption can be reduced. This is preferable.

[0133] In the light-emitting element 254, a microcavity formed by the colored layer 232 and the optical adjustment layer 224 allows the display device 10 to extract light with high color purity. The thickness of the optical adjustment layer 224 may vary according to the color of each sub-pixel. Also, for some sub-pixels, it may be configured without an optical adjustment layer.

[0134] Also, as the EL layer 222 included in the light-emitting element 254, it is preferable to apply an EL layer that emits white light. By applying such a light-emitting element 254, there is no need to separately coat the EL layer 222 for each sub-pixel, so cost can be reduced and yield can be improved. In addition, high definition of the pixel portion 11 becomes easier. Also, by providing optical adjustment layers with different thicknesses for each sub-pixel, it may be configured to separately coat the EL layer 222 for each sub-pixel. In that case, it may be configured without either one or both of the optical adjustment layer or the colored layer. Also, at this time, in each sub-pixel, only at least the light-emitting layer of the EL layer 222 may be separately coated and formed, and the other layers may be formed without separate coating.

[0135] In FIG. 10, an example is shown in which an FPC 242 electrically connected to the terminal portion 15 is provided. Therefore, the display device 10 shown in FIG. 10 can also be called a display module. Also, a display device without an FPC or the like provided can also be called a display panel.

[0136] The terminal portion 15 is electrically connected to the FPC 242 via the connection layer 243.

[0137] In FIG. 10, the terminal portion 15 has a structure having a laminated structure of a conductive layer made of the same conductive film as the wiring 16b and the pixel electrode 225. Thus, by forming the terminal portion 15 with a structure in which a plurality of conductive layers are laminated, it is possible not only to reduce the electrical resistance but also to increase the mechanical strength, which is preferable.

[0138] It is preferable to use a material for the insulating layer 211 and the insulating layer 221 in which impurities such as water and hydrogen do not easily diffuse. That is, the insulating layer 211 and the insulating layer 221 can function as a barrier film. With such a configuration, even if a material having moisture permeability is used as the first substrate 201 or the second substrate 202, it is possible to effectively suppress the intrusion of impurities from the outside into the light-emitting element 254 or the transistor, etc., and a highly reliable display device can be realized.

[0139] FIG. 10 shows a case where a hollow sealing structure having a space 250 is provided between the first substrate 201 and the second substrate 202. For example, the space 250 may be filled with an inert gas such as nitrogen or a rare gas. Also, the space 250 may be filled with a liquid crystal material or a fluid material such as oil. Or, the space 250 may be depressurized. Note that the sealing method is not limited to this, and a solid seal filled with resin or the like may be used.

[0140] 〔Cross-sectional configuration example 2〕 FIG. 11 shows a configuration example of a display device suitable for the case where the pixel portion 11 and the signal line driving circuit 13 are used after being bent.

[0141] In the display device 10 shown in FIG. 11, the first substrate 201 and the second substrate 202 are sealed with a sealing material 260. ​​​​​​​​​​​​Therefore, an example of the case having the bonded solid sealing structure is shown.

[0142] Also, an adhesive layer 261 is provided on the first substrate 201, and an insulating layer 216 is provided on the adhesive layer 261. Transistors, light-emitting elements, etc. are provided on the insulating layer 216. The insulating layer 216 can be made of a material in which impurities such as water and hydrogen hardly diffuse, similar to the insulating layer 221.

[0143] Also, an adhesive layer 262 is provided between the second substrate 202 and the insulating layer 221.

[0144] Also, as shown in FIG. 11, an opening is provided in the insulating layer 213 on the outer peripheral side of the first substrate 201 rather than in the pixel portion 11 and the signal line driving circuit 13. For example, when a resin material is used as the insulating layer 213, it is preferable to provide an opening surrounding the pixel portion 11, the signal line driving circuit 13, etc. With such a configuration, since the vicinity of the side surface in contact with the outside of the insulating layer 213 and the portion overlapping the pixel portion 11, the signal line driving circuit 13, etc. are not continuous, diffusion of impurities such as water and hydrogen from the outside through the insulating layer 213 can be suppressed.

[0145] By adopting the solid sealing structure as shown in FIG. 11, it becomes easy to keep the distance between the first substrate 201 and the second substrate 202 uniform. Therefore, as the first substrate 201 and the second substrate 202, a flexible substrate can be preferably used. Therefore, part or all of the pixel portion 11, the scanning line driving circuit 12, and the signal line driving circuit 13 can be bent and used. For example, by attaching the display device 10 to a curved surface or folding the pixel portion of the display device 10, various forms of electronic devices can be realized.

[0146] [Modification Example] Hereinafter, an example of a touch panel having a touch sensor will be described.

[0147] FIG. 12 shows an example of a touch panel in which an on-cell type touch sensor is applied to the configuration illustrated in FIG. 10.

[0148] On the outer surface of the second substrate 202, a conductive layer 291 and a conductive layer 292 are provided, and an insulating layer 294 is provided to cover them. Further, a conductive layer 293 is provided on the insulating layer 294. The conductive layer 293 is electrically connected to two conductive layers 292 provided with the conductive layer 291 interposed therebetween through an opening provided in the insulating layer 294. Further, the insulating layer 294 and the substrate 296 are bonded together by an adhesive layer 295.

[0149] The capacitance formed between the conductive layer 291 and the conductive layer 292 changes as the object to be detected approaches. Thereby, it is possible to detect that the object to be detected approaches or contacts. By arranging a plurality of conductive layers 291 and a plurality of conductive layers 292 in a lattice pattern, position information can be obtained.

[0150] Also, a terminal portion 299 is provided in a region near the outer periphery of the second substrate 202. The terminal portion 299 is electrically connected to the FPC 297 through the connection layer 298.

[0151] Here, the substrate 296 can also be used as a substrate directly touched by a detection object such as a finger or a stylus. In that case, it is preferable to provide a protective layer (such as a ceramic coat) on the substrate 296. The protective layer can use an inorganic insulating material such as silicon oxide, aluminum oxide, yttrium oxide, yttria-stabilized zirconia (YSZ). Also ​​​​​​​​​​​​, strengthened glass may be used for the substrate 296. The strengthened glass is physically or chemically treated by an ion exchange method, an air-cooled strengthening method, etc., and the one with compressive stress applied to its surface is used. This can be done. A touch sensor is provided on one side of the strengthened glass, and the opposite side is provided on the outermost surface of, for example, an electronic device and used as a touch surface, whereby the thickness of the entire device can be reduced.

[0152] As the touch sensor, for example, a capacitance type touch sensor can be applied. As the capacitance type, there are a surface capacitance type, a projected capacitance type, etc. Also, as the projected capacitance type, there are a self-capacitance type, a mutual-capacitance type, etc. Using the mutual-capacitance type is preferable because simultaneous multi-point detection becomes possible. Hereinafter, the case where a projected capacitance type touch sensor is applied will be described.

[0153] Note that it is not limited to this, and various sensors capable of detecting the approach or contact of a detected object such as a finger or a stylus can also be applied.

[0154] Here, a so-called on-cell type touch panel configuration in which wirings and the like constituting a touch sensor are formed on the outer surface of the second substrate 202 is shown, but it is not limited to this. For example, an attached type (out-cell type) touch panel or an in-cell type touch panel configuration may be applied. By using the on-cell type or in-cell type touch panel configuration, even if the function of the touch panel is added to the display panel, its thickness can be reduced.

[0155] The above is the description of the cross-sectional configuration example.

[0156] [Regarding each component] ​​​​​​​​​​​​Hereinafter, each component shown above will be described.

[0157] 〔Substrate〕 For the substrate included in the display device, a material having a flat surface can be used. For the substrate on the side where light from the light-emitting element is extracted, a material that transmits the light is used. For example, materials such as glass, quartz, ceramic, sapphire, and organic resin can be used. By using a thin substrate, the display device can be made lighter and thinner. Furthermore, by using a substrate having a thickness that allows flexibility, a flexible display device can be realized.

[0158] As the glass, for example, non-alkali glass, barium borosilicate glass, aluminoborosilicate glass, etc. can be used.

[0159] Examples of materials having flexibility and transparency to visible light include glass having a thickness that allows flexibility, polyester resins such as polyethylene terephthalate (PET) and polyethylene naphthalate (PEN), polyacrylonitrile resin, polyimide resin, polymethyl methacrylate resin, polycarbonate (PC) resin, polyethersulfone (PES) resin, polyamide resin, cycloolefin resin, polystyrene resin, polyamideimide resin, polyvinyl chloride resin, polytetrafluoroethylene (PTFE) resin, etc. In particular, it is preferable to use a material having a low coefficient of thermal expansion. For example, polyamideimide resin, polyimide resin, PET, etc. can be suitably used. Also, a substrate impregnated with an organic resin in glass fibers or a substrate in which an inorganic filler is mixed with an organic resin to lower the coefficient of thermal expansion can be used.

[0160] It can also be done. Since the substrate using such a material is light in weight, the display device using the substrate can also be made lightweight.

[0161] In addition, since the substrate on the side where light emission is not extracted does not necessarily need to have light transmittance, in addition to the substrate mentioned above, a metal substrate or the like can also be used. Since the metal substrate has high thermal conductivity and can easily conduct heat to the entire sealing substrate, it is possible to suppress a local temperature rise of the display device, which is preferable.

[0162] The material constituting the metal substrate is not particularly limited. For example, metals such as aluminum, copper, and nickel, or alloys such as aluminum alloys or stainless steel can be preferably used.

[0163] In addition, a substrate subjected to insulation treatment may be used, for example, by oxidizing the surface of the metal substrate or forming an insulating film on the surface. For example, an insulating film may be formed using a coating method such as a spin coating method or a dip method, an electroplating method, a vapor deposition method, or a sputtering method. Alternatively, an oxide film may be formed on the surface of the substrate by leaving it in an oxygen atmosphere or heating it, or by an anodizing method or the like.

[0164] A hard coat layer (for example, a silicon nitride layer or the like) for protecting the surface of the display device from scratches and a layer made of a material capable of dispersing pressure (for example, an aramid resin layer or the like) may be laminated on the flexible substrate. In addition, in order to suppress a decrease in the life of the light-emitting element due to moisture or the like, an insulating film with low water permeability may be laminated on the flexible substrate. For example, inorganic insulating materials such as silicon nitride, silicon oxynitride, aluminum oxide, and aluminum nitride can be used. ​​​​​​​​​​​​​​​

[0165] The substrate can also be used by laminating a plurality of layers. In particular, it is configured to have a glass layer This can improve the barrier properties against water and oxygen, and enable a highly reliable display device. For example, a substrate in which a glass layer, an adhesive layer, and an organic resin layer are laminated from the side closer to the light-emitting element can be used By providing such an organic resin layer, cracks and fractures in the glass layer can be suppressed, and the mechanical strength can be improved. By applying such a composite material of a glass material and an organic resin to the substrate, a highly reliable flexible display device can be obtained

[0166] 〔Transistor〕 The transistor included in the display device includes a conductive layer that functions as a front gate electrode, a conductive layer that functions as a back gate electrode, a semiconductor layer, a conductive layer that functions as a source electrode a conductive layer that functions as a drain electrode, and an insulating layer that functions as a gate insulating layer.

[0167] That is, the transistor included in the display device according to one aspect of the present invention has a structure in which gate electrodes are provided above and below the channel.

[0168] The crystallinity of the semiconductor material used for the transistor is not particularly limited, and any of an amorphous semiconductor, a semiconductor having crystallinity (microcrystalline semiconductor, polycrystalline semiconductor, single crystal semiconductor, or a semiconductor having a partially crystalline region) may be used. Using a semiconductor having crystallinity is preferable because deterioration of transistor characteristics can be suppressed.

[0169] In addition, as the semiconductor material used for the transistor, for example, an oxide semiconductor is used for the semiconductor layer ​​​​​​​​​It can be used. In particular, it is preferable to apply an oxide semiconductor having a larger band gap than silicon. Using a semiconductor material with a wider band gap and a lower carrier density than silicon is preferable because it can reduce the current in the off state of the transistor.

[0170] For example, as the above oxide semiconductor, it is preferable to contain at least indium (In) or zinc (Zn). More preferably, it contains an oxide represented by In-M-Zn system oxide (M is a metal such as Al, Ti, Ga, Ge, Y, Zr, Sn, La, Ce or Hf).

[0171] In particular, as the semiconductor layer, it is preferable to use an oxide semiconductor layer having a plurality of crystal parts, wherein the c-axis of the crystal part is oriented substantially perpendicular to the surface to be formed of the semiconductor layer or the upper surface of the semiconductor layer, and no grain boundary is observed between adjacent crystal parts.

[0172] Since such an oxide semiconductor has no grain boundaries, it is possible to suppress the occurrence of cracks in the oxide semiconductor layer due to stress when the display panel is curved. Therefore, such an oxide semiconductor can be preferably used for a display device having flexibility and used in a curved state.

[0173] In addition, by using such a crystalline oxide semiconductor as the semiconductor layer, fluctuations in electrical characteristics can be suppressed, and a highly reliable transistor can be realized.

[0174] In addition, a transistor using an oxide semiconductor having a larger band gap than silicon can retain the charge stored in the capacitor connected in series with the transistor for a long time due to its low off-current. It is possible to hold continuously over this range. By applying such a transistor to a pixel, it becomes possible to stop the drive circuit while maintaining the gradation of the image displayed in each display area. As a result, a display device with extremely low power consumption can be realized.

[0175] 〔Conductive layer〕 In addition to the gate, source, and drain of the transistor, materials that can be used for conductive layers such as various wirings and electrodes constituting the display device include metals such as aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten, or alloys having these as the main components. Further, films containing these materials can be used as a single layer or in a laminated structure. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure in which an aluminum film is laminated on a titanium film, a two-layer structure in which an aluminum film is laminated on a tungsten film, a two-layer structure in which a copper film is laminated on a copper-magnesium-aluminum alloy film, a two-layer structure in which a copper film is laminated on a titanium film, a two-layer structure in which a copper film is laminated on a tungsten film, a three-layer structure in which a titanium film or a titanium nitride film is formed, and an aluminum film or a copper film is laminated thereon, and further a titanium film or a titanium nitride film is formed thereon, a three-layer structure in which a molybdenum film or a molybdenum nitride film is formed, and an aluminum film or a copper film is laminated thereon, and further a molybdenum film or a molybdenum nitride film is formed thereon, etc. are available. In addition, oxides such as indium oxide, tin oxide, or zinc oxide may be used. Further, when copper containing manganese is used, it is preferable because the controllability of the shape by etching is enhanced. etc. Note that oxides such as indium oxide, tin oxide, or zinc oxide may be used. Further, when copper containing manganese is used, it is preferable because the controllability of the shape by etching is enhanced. .

[0176] ​​​​​​​In addition, as a light-transmitting material that can be used for various wirings and conductive layers such as electrodes constituting the display device, conductive oxides such as indium oxide, indium tin oxide, indium zinc oxide, zinc oxide, zinc oxide added with gallium, or graphene can be used. Alternatively, metal materials such as gold, silver, platinum, magnesium, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, or titanium, or alloy materials containing the metal materials can be used. Alternatively, nitrides of the metal materials (for example, titanium nitride) etc. may be used. Note that when using metal materials, alloy materials (or their nitrides), they may be made thin enough to have light-transmitting properties. Also, a laminated film of the above materials can be used as the conductive layer. For example, a laminated film of an alloy of silver and magnesium and indium tin oxide is preferably used because it can enhance conductivity.

[0177] 〔Insulating Layer〕 As insulating materials that can be used for each insulating layer, overcoat, spacer, etc., for example, resins such as acrylic and epoxy, resins having a siloxane bond such as silicone resin, and in addition, inorganic insulating materials such as silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, and aluminum oxide can also be used.

[0178] Also, the light-emitting element is preferably provided between a pair of insulating films with low water permeability. Thereby, it is possible to suppress the intrusion of impurities such as water into the light-emitting element and suppress the deterioration of the reliability of the device.

[0179] As the insulating film with low water permeability, a silicon nitride film, a silicon oxynitride film, etc., which contain nitrogen and silicon ​Examples include films containing nitrogen and aluminum such as films containing aluminum nitride, etc. Also, a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, etc. may be used.

[0180] For example, the water vapor transmission rate of an insulating film with low water permeability is 1×10 -5 [g / (m 2 ·day) or less, preferably 1×10 -6 [g / (m 2 ·day)] or less, more preferably 1×1 0 -7 [g / (m 2 ·day)] or less, even more preferably 1×10 -8 [g / (m 2 ·d ay)] or less.

[0181] 〔Adhesive layer, encapsulant〕 As the adhesive layer and the encapsulant, various curable adhesives such as photocurable adhesives such as ultraviolet curable type, reaction curable adhesives, thermosetting adhesives, anaerobic adhesives, etc. can be used. These adhesives include epoxy resins, acrylic resins, silicone resins, phenolic resins, polyimide resins, imide resins, PVC (polyvinyl chloride) resins, PVB (polyvinyl butyral) resins, EVA (ethylene vinyl acetate) resins, etc. In particular, materials with low moisture permeability such as epoxy resins are preferred. Also, a two-component mixed resin may be used. Also, an adhesive sheet, etc. may be used.

[0182] Also, the above resin may contain a desiccant. For example, substances that adsorb moisture by chemical adsorption such as oxides of alkaline earth metals (calcium oxide, barium oxide, etc.) can be used. Or, substances that adsorb moisture by physical adsorption such as zeolite and silica gel, etc. can be used. A substance for adsorption may be used. If a desiccant is included, impurities such as moisture can be prevented from invading the functional elements, which is preferable because the reliability of the display panel is improved.

[0183] Also, by mixing a filler or a light-scattering member having a high refractive index into the resin, the light extraction efficiency from the light-emitting element can be improved. For example, titanium oxide, barium oxide, zeolite, zirconium, etc. can be used.

[0184] 〔Light-Emitting Element〕 As the light-emitting element, an element capable of self-luminescence can be used, and an element whose brightness is controlled by current or voltage is included in that category. For example, a light-emitting diode (LED), an organic EL element, an inorganic EL element, etc. can be used.

[0185] The light-emitting element may be any of a top emission type, a bottom emission type, and a dual emission type For the electrode on the light extraction side, a conductive film that transmits visible light is used Also, for the electrode on the side where light is not extracted, it is preferable to use a conductive film that reflects visible light

[0186] The EL layer has at least a light-emitting layer. As layers other than the light-emitting layer, the EL layer may further have a layer containing a substance with high hole injection property, a substance with high hole transport property, a hole blocking material, a substance with high electron transport property, a substance with high electron injection property, or a bipolar substance (a substance with high electron transport property and high hole transport property).

[0187] Either a low molecular weight compound or a high molecular weight compound can be used for the EL layer, and it may contain an inorganic compound. The layers constituting the EL layer are each formed by a vapor deposition method (including vacuum vapor deposition method) ​​It can be formed by methods such as a transfer method, a printing method, an inkjet method, a coating method, etc.

[0188] When a voltage higher than the threshold voltage of the light-emitting element is applied between the cathode and the anode, holes are injected from the anode side into the EL layer, and electrons are injected from the cathode side. The injected electrons and holes recombine in the EL layer, and the light-emitting substance contained in the EL layer emits light.

[0189] When a light-emitting element that emits white light is applied as the light-emitting element, it is preferable to adopt a configuration in which the EL layer contains two or more types of light-emitting substances. For example, white light can be obtained by selecting light-emitting substances such that the emission of each of the two or more light-emitting substances has a complementary color relationship. For example, light-emitting substances that respectively exhibit emissions such as R (red), G (green), B (blue), Y (yellow), O (orange), etc., or among light-emitting substances that exhibit emissions including spectral components of two or more colors among R, G, and B, it is preferable to include two or more. Also, it is preferable to apply a light-emitting element whose emission spectrum from the light-emitting element has two or more peaks within the wavelength range of the visible light region (for example, 350 nm to 750 nm). Further, the emission spectrum of a material having a peak in the yellow wavelength region is preferably a material that also has spectral components in the green and red wavelength regions.

[0190] The EL layer preferably has a structure in which a light-emitting layer containing a light-emitting material that emits one color and a light-emitting layer containing a light-emitting material that emits another color are laminated. For example, the plurality of light-emitting layers in the EL layer may be laminated in contact with each other, or may be laminated via a region that does not contain any light-emitting material. For example, between a fluorescent light-emitting layer and a phosphorescent light-emitting layer, the same material as that of the fluorescent light-emitting layer or the phosphorescent light-emitting layer (for example, a host material, an assist material) is included, and the phosphorescent light-emitting layer contains a region that does not contain any light-emitting material. A configuration may be adopted in which a region not containing the optical material is provided. This makes it easier to fabricate the light-emitting element, and also reduces the driving voltage.

[0191] Also, the light-emitting element may be a single element having one EL layer, or may be a tandem element in which a plurality of EL layers are laminated via a charge generation layer.

[0192] The conductive film that transmits visible light can be made of, for example, indium oxide, indium tin oxide (ITO: Indium Tin Oxide), indium zinc oxide, zinc oxide, zinc oxide doped with gallium, etc. Also, metals such as gold, silver, platinum, magnesium, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, or titanium, alloys containing these metal materials, or nitrides of these metal materials (e.g., titanium nitride) can be used by forming them thinly enough to have light transmittance. Also, a laminated film of the above materials can be used as the conductive layer. For example, a laminated film of an alloy of silver and magnesium and ITO is preferably used because it can enhance conductivity. Also, graphene or the like may be used. The conductive film that reflects visible light can be made of, for example, metal materials such as aluminum, gold, platinum, silver, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, or palladium, or alloys containing these metal materials. Also, lanthanum, neodymium, or germanium may be added to the above metal materials or alloys. Also, alloys of aluminum and titanium, alloys of aluminum and nickel, alloys of aluminum and neodymium, etc.

[0193] such as aluminum alloys can be used. Alloys containing niobium (aluminum alloys), alloys of silver and copper, alloys of silver, palladium and copper, alloys containing silver such as alloys of silver and magnesium can be used. Alloys containing silver and copper are preferred because of their high heat resistance. Furthermore, by laminating a metal film or a metal oxide film in contact with the aluminum alloy film, oxidation of the aluminum alloy film can be suppressed. Examples of the material for the metal film and the metal oxide film include titanium, titanium oxide, etc. Also, a conductive film that transmits the above visible light and a film made of a metal material may be laminated. For example, a laminated film of silver and ITO, a laminated film of an alloy of silver and magnesium and ITO, etc. can be used.

[0194] The conductive layers may be formed by using vapor deposition or sputtering methods respectively. In addition, discharge methods such as inkjet methods, printing methods such as screen printing methods, or plating methods can be used to form them.

[0195] Note that the above-mentioned light-emitting layer, as well as layers containing substances with high hole injection properties, substances with high hole transport properties, substances with high electron transport properties, and substances with high electron injection properties, bipolar substances, etc. may each have an inorganic compound such as quantum dots or a polymer compound (oligomer, dendrimer, polymer, etc.). For example, by using quantum dots in the light-emitting layer, it can also function as a light-emitting material.

[0196] Note that as the quantum dot material, colloidal quantum dot materials, alloy-type quantum dot materials, core-shell type quantum dot materials, core-type quantum dot materials, etc. can be used. Also, materials containing element groups of Group 12 and Group 16, Group 13 and Group 15, or Group 14 and Group 16 can be It may also be used. Alternatively, a quantum dot material containing elements such as cadmium, selenium, zinc, sulfur, phosphorus, indium, tellurium, lead, gallium, arsenic, aluminum, etc. may be used.

[0197] 〔Coloring layer〕 Examples of materials that can be used for the coloring layer include metal materials, resin materials, pigments or dyes, and resin materials containing the same.

[0198] 〔Light-shielding layer〕 Examples of materials that can be used for the light-shielding layer include carbon black, metal oxides, composite oxides containing a solid solution of multiple metal oxides, etc. Also, a laminated film of a film containing the material of the coloring layer can be used for the light-shielding layer. For example, a laminated structure of a film containing a material used for a coloring layer that transmits light of a certain color and a film containing a material used for a coloring layer that transmits light of another color can be used. By sharing the materials of the coloring layer and the light-shielding layer, the device can be shared and the process can be simplified, which is preferable.

[0199] 〔Connection layer〕 For the connection layer that connects the FPC or IC to the terminal, an anisotropic conductive film (ACF: Anisotropic Conductive Film) or an anisotropic conductive paste (ACP: Anisotropic Conductive Paste) can be used.

[0200] The above is the description of each component.

[0201] This embodiment can be implemented in appropriate combination with at least a part of other embodiments described in this specification.

[0202] (Embodiment 3) In this embodiment, an example of a method for manufacturing a display device using a flexible substrate will be described. Hereinafter.

[0203] Here, layers including light-emitting elements, circuits, wirings, electrodes, and insulating layers, as well as light components such as coloring layers and light-shielding layers will be collectively referred to as element layers. For example, the element layer includes a light-emitting element, and may include wirings electrically connected to the light-emitting element, and elements such as transistors used for pixels and circuits.

[0204] Also, here, at the stage where the light-emitting element is completed (the manufacturing process is finished), the member that supports the element layer and has flexibility will be referred to as a substrate. For example, the substrate includes extremely thin films with a thickness of 10 nm or more and 300 μm or less.

[0205] As a method for forming an element layer on a substrate having flexibility and an insulating surface, typically, there are the following two methods. One is a method of directly forming an element layer on a flexible substrate. The other is a method of forming an element layer on a support substrate different from the flexible substrate, then peeling the element layer from the support substrate and transferring the element layer to the substrate. Note that, although not described in detail here, in addition to the above two methods, there is also a method of forming an element layer on a non-flexible substrate and making it flexible by thinning the substrate by polishing or the like.

[0206] When the material constituting the substrate has heat resistance against the heat applied in the element layer formation process, forming the element layer directly on the substrate is preferable because the process is simplified. At this time, it is preferable to form the element layer with the substrate fixed to the support substrate because transportation within the device and between devices becomes easier.

[0207] In addition, when a method is used in which an element layer is formed on a supporting base material and then transferred to a substrate, the supporting base material is first A release layer and an insulating layer are laminated on the support substrate, and an element layer is formed on the insulating layer. The element layer is then transferred to the substrate. It is only necessary to select a material that causes peeling at the interface between the peeling layer and the insulating layer or within the peeling layer. In this method, a material having high heat resistance is used for the support substrate and the peeling layer, and thus the element layer is formed. This allows the upper limit of the temperature during the formation of the semiconductor device to be increased, forming a device layer having more reliable devices. This is preferable because it is possible.

[0208] For example, a layer containing a high melting point metal material such as tungsten as a peeling layer and a layer containing the metal material A layer containing an oxide is laminated and used. In addition, silicon oxide, silicon nitride, etc. are used as an insulating layer on the peeling layer. It is preferable to use a multi-layer structure including silicon, silicon oxynitride, silicon nitride oxide, etc. In this specification, an oxynitride is a material containing more oxygen than nitrogen as a component. Nitrogen oxide refers to a material that has a high nitrogen content compared to oxygen in its composition. Refers to the material.

[0209] The element layer and the support substrate can be peeled off by applying a mechanical force or by etching the peeling layer. Examples include etching the surface or allowing a liquid to penetrate the peeled interface. Alternatively, the difference in thermal expansion between the two layers that form the peel interface can be utilized to heat or cool the material. The peeling may be performed by

[0210] When peeling begins, a starting point for peeling is first formed, and the peeling progresses from that starting point. It is preferable. The starting point of peeling can be achieved by locally heating a part of the insulating layer or the peeling layer with a laser beam or the like, or by physically cutting or penetrating a part of the insulating layer or the peeling layer with a sharp member, etc. It can be formed.

[0211] Also, when peeling is possible at the interface between the support substrate and the insulating layer, the peeling layer may not be provided.

[0212] For example, by using glass as the support substrate and an organic resin such as polyimide as the insulating layer, peeling can be performed at the interface between the glass and the organic resin. Also, the remaining organic resin such as polyimide can be used as the substrate.

[0213] Alternatively, a heat - generating layer may be provided between the support substrate and the insulating layer made of an organic resin, and peeling may be performed at the interface between the heat - generating layer and the insulating layer by heating the heat - generating layer. As the heat - generating layer, various materials can be used, such as a material that generates heat by passing an electric current, a material that generates heat by absorbing light, and a material that generates heat by applying a magnetic field. For example, as the heat - generating layer, a semiconductor, a metal, or an insulator can be selected and used. Hereinafter, an example of a more specific manufacturing method will be described. By changing the layer formed as the layer to be peeled in the manufacturing method described below, a flexible input / output device according to an aspect of the present invention can also be manufactured.

[0214] First, an island - shaped peeling layer 303 is formed on a manufacturing substrate 301, and a layer to be peeled 3 05 is formed on the peeling layer 303 (FIG. 13(A)). Separately, an island - shaped peeling layer 323 is formed on a manufacturing substrate 321, and a layer to be peeled 325 is formed on the peeling layer 323 (FIG. 13(B)).

[0215]

[0216] ​​​ Here, an example of forming an island-shaped release layer has been shown, but it is not limited to this. In this step, when peeling the layer to be peeled from the fabricated substrate, a material is selected such that peeling occurs at the interface between the fabricated substrate and the release layer, the interface between the release layer and the layer to be peeled, or within the release layer. In the present embodiment, a case where peeling occurs at the interface between the layer to be peeled and the release layer is exemplified, but it is not limited to this depending on the combination of materials used for the release layer and the layer to be peeled. When the layer to be peeled has a laminated structure, the layer in contact with the release layer is particularly referred to as the first layer. For example, when the release layer has a laminated structure of a tungsten film and a tungsten oxide film, peeling occurs at the interface (or near the interface) between the tungsten film and the tungsten oxide film, so that a part of the release layer (here, the tungsten oxide film) may remain on the layer to be peeled side. Also, the release layer remaining on the layer to be peeled side may be removed thereafter. The fabricated substrate uses a substrate having at least heat resistance capable of withstanding the processing temperature during the fabrication process. As the fabricated substrate, for example, a glass substrate, a quartz substrate, a sapphire substrate, a semiconductor substrate, a ceramic substrate, a metal substrate, a resin substrate, a plastic substrate, etc. can be used. When a glass substrate is used for the fabricated substrate, it is preferable to form an insulating film such as a silicon oxide film, a silicon oxynitride film, a silicon nitride film, or a silicon nitride oxide film as an underlayer film between the fabricated substrate and the release layer to prevent contamination from the glass substrate. The release layer is made of tungsten, molybdenum, titanium, tantalum, niobium, nickel, cobalt,

[0217] zirconium, zinc, ruthenium, rhodium, palladium, osmium, iridium, or the like.

[0218]

[0219]

[0220] , an element selected from silicon, an alloy material containing the element, or a compound material containing the element, etc. The crystal structure of the silicon-containing layer may be amorphous, microcrystalline, or polycrystalline. Also usable are aluminum oxide, gallium oxide, zinc oxide, titanium dioxide, and indium oxide. Indium, indium tin oxide, indium zinc oxide, In-Ga-Zn oxide, etc. The peeling layer may be made of a high melting point metal such as tungsten, titanium, or molybdenum. Use of a metal material is preferable because it increases the degree of freedom in the process of forming the peeled layer.

[0221] The peeling layer can be formed by, for example, a sputtering method, a plasma CVD method, or a coating method (spin coating). The peeling layer can be formed by a method such as a printing method, a droplet ejection method, a dispensing method, etc. is, for example, 10 nm or more and 200 nm or less, preferably 20 nm or more and 100 nm or less.

[0222] When the peeling layer has a single layer structure, it is preferably a tungsten layer, a molybdenum layer, or a combination of tungsten and molybdenum. It is preferable to form a layer containing a mixture of tungsten and tungsten oxide. A layer containing an oxynitride, a layer containing an oxide or oxynitride of molybdenum, or a layer containing a tungsten oxide or nitride. Alternatively, a layer containing an oxide or oxynitride of a mixture of fluorine and molybdenum may be formed. A mixture of tungsten and molybdenum is, for example, a mixture of tungsten and molybdenum. Correct.

[0223] In addition, a layer including tungsten and a layer including a tungsten oxide may be used as the peeling layer. When forming a structure, a layer containing tungsten is formed, and an insulating layer formed of oxide is formed on the layer. By forming a film, a tungsten oxide-containing film is formed at the interface between the tungsten layer and the insulating film. The formation of the layer may be utilized. Further, the surface of the layer containing tungsten may be subjected to thermal oxidation treatment, oxygen plasma treatment, nitrous oxide (N2O) plasma treatment, treatment with a solution having a strong oxidizing power such as ozone water, etc. to form a layer containing tungsten oxide. Also, the plasma treatment and the heat treatment may be carried out in an atmosphere of oxygen, nitrogen, nitrous oxide alone, or a mixed gas atmosphere of the gas and other gases. By changing the surface state of the release layer by the above plasma treatment and heat treatment, it is possible to control the adhesion between the release layer and the insulating film formed later. In addition, when peeling is possible at the interface between the production substrate and the layer to be peeled, the release layer may not be provided. For example, glass is used as the production substrate, and an organic resin such as polyimide, polyester, polyolefin, polyamide, polycarbonate, acrylic, etc. is formed in contact with the glass. Next, by performing laser irradiation or heat treatment, the adhesion between the production substrate and the organic resin is improved. Then, an insulating film, a transistor, etc. are formed on the organic resin. After that, laser irradiation is performed at an energy density higher than that of the previous laser irradiation, or heat treatment is performed at a temperature higher than that of the previous heat treatment, so that peeling can be performed at the interface between the production substrate and the organic resin. Also, at the time of peeling, a liquid may be infiltrated into the interface between the production substrate and the organic resin to separate them. In this method, since an insulating film, a transistor, etc. are formed on an organic resin having low heat resistance, a high temperature cannot be applied to the substrate in the manufacturing process. Here, since a transistor using an oxide semiconductor does not require a high-temperature manufacturing process, it can be suitably formed on an organic resin. Moreover, the plasma treatment and the heat treatment may be carried out in an atmosphere of oxygen, nitrogen, nitrous oxide alone, or a mixed gas atmosphere of the gas and other gases. By changing the surface state of the release layer by the above plasma treatment and heat treatment, it is possible to control the adhesion between the release layer and the insulating film formed later. In addition, when peeling is possible at the interface between the production substrate and the layer to be peeled, the release layer may not be provided. For example, glass is used as the production substrate, and an organic resin such as polyimide, polyester, polyolefin, polyamide, polycarbonate, acrylic, etc. is formed in contact with the glass. Next, by performing laser irradiation or heat treatment, the adhesion between the production substrate and the organic resin is improved. Then, an insulating film, a transistor, etc. are formed on the organic resin. After that, laser irradiation is performed at an energy density higher than that of the previous laser irradiation, or heat treatment is performed at a temperature higher than that of the previous heat treatment, so that peeling can be performed at the interface between the production substrate and the organic resin. Also, at the time of peeling, a liquid may be infiltrated into the interface between the production substrate and the organic resin to separate them. In this method, since an insulating film, a transistor, etc. are formed on an organic resin having low heat resistance, a high temperature cannot be applied to the substrate in the manufacturing process. Here, since a transistor using an oxide semiconductor does not require a high-temperature manufacturing process, it can be suitably formed on an organic resin. Moreover, the plasma treatment and the heat treatment may be carried out in an atmosphere of oxygen, nitrogen, nitrous oxide alone, or a mixed gas atmosphere of the gas and other gases. By changing the surface state of the release layer by the above plasma treatment and heat treatment, it is possible to control the adhesion between the release layer and the insulating film formed later.

[0224] In addition, when peeling is possible at the interface between the production substrate and the layer to be peeled, the release layer may not be provided. For example, glass is used as the production substrate, and an organic resin such as polyimide, polyester, polyolefin, polyamide, polycarbonate, acrylic, etc. is formed in contact with the glass. Next, by performing laser irradiation or heat treatment, the adhesion between the production substrate and the organic resin is improved. Then, an insulating film, a transistor, etc. are formed on the organic resin. After that, laser irradiation is performed at an energy density higher than that of the previous laser irradiation, or heat treatment is performed at a temperature higher than that of the previous heat treatment, so that peeling can be performed at the interface between the production substrate and the organic resin. Also, at the time of peeling, a liquid may be infiltrated into the interface between the production substrate and the organic resin to separate them. In this method, since an insulating film, a transistor, etc. are formed on an organic resin having low heat resistance, a high temperature cannot be applied to the substrate in the manufacturing process. Here, since a transistor using an oxide semiconductor does not require a high-temperature manufacturing process, it can be suitably formed on an organic resin. Moreover, the plasma treatment and the heat treatment may be carried out in an atmosphere of oxygen, nitrogen, nitrous oxide alone, or a mixed gas atmosphere of the gas and other gases. By changing the surface state of the release layer by the above plasma treatment and heat treatment, it is possible to control the adhesion between the release layer and the insulating film formed later. In addition, when peeling is possible at the interface between the production substrate and the layer to be peeled, the release layer may not be provided. For example, glass is used as the production substrate, and an organic resin such as polyimide, polyester, polyolefin, polyamide, polycarbonate, acrylic, etc. is formed in contact with the glass. Next, by performing laser irradiation or heat treatment, the adhesion between the production substrate and the organic resin is improved. Then, an insulating film, a transistor, etc. are formed on the organic resin. After that, laser irradiation is performed at an energy density higher than that of the previous laser irradiation, or heat treatment is performed at a temperature higher than that of the previous heat treatment, so that peeling can be performed at the interface between the production substrate and the organic resin. Also, at the time of peeling, a liquid may be infiltrated into the interface between the production substrate and the organic resin to separate them. In this method, since an insulating film, a transistor, etc. are formed on an organic resin having low heat resistance, a high temperature cannot be applied to the substrate in the manufacturing process. Here, since a transistor using an oxide semiconductor does not require a high-temperature manufacturing process, it can be suitably formed on an organic resin. Moreover, the plasma treatment and the heat treatment may be carried out in an atmosphere of oxygen, nitrogen, nitrous oxide alone, or a mixed gas atmosphere of the gas and other gases. By changing the surface state of the release layer by the above plasma treatment and heat treatment, it is possible to control the adhesion between the release layer and the insulating film formed later. In addition, when peeling is possible at the interface between the production substrate and the layer to be peeled, the release layer may not be provided. For example, glass is used as the production substrate, and an organic resin such as polyimide, polyester, polyolefin, polyamide, polycarbonate, acrylic, etc. is formed in contact with the glass. Next, by performing laser irradiation or heat treatment, the adhesion between the production substrate and the organic resin is improved. Then, an insulating film, a transistor, etc. are formed on the organic resin. After that, laser irradiation is performed at an energy density higher than that of the previous laser irradiation, or heat treatment is performed at a temperature higher than that of the previous heat treatment, so that peeling can be performed at the interface between the production substrate and the organic resin. Also, at the time of peeling, a liquid may be infiltrated into the interface between the production substrate and the organic resin to separate them. In this method, since an insulating film, a transistor, etc. are formed on an organic resin having low heat resistance, a high temperature cannot be applied to the substrate in the manufacturing process. Here, since a transistor using an oxide semiconductor does not require a high-temperature manufacturing process, it can be suitably formed on an organic resin.

[0225] In this method, since an insulating film, a transistor, etc. are formed on an organic resin having low heat resistance, a high temperature cannot be applied to the substrate in the manufacturing process. Here, since a transistor using an oxide semiconductor does not require a high-temperature manufacturing process, it can be suitably formed on an organic resin. In addition, when peeling is possible at the interface between the production substrate and the layer to be peeled, the release layer may not be provided. For example, glass is used as the production substrate, and an organic resin such as polyimide, polyester, polyolefin, polyamide, polycarbonate, acrylic, etc. is formed in contact with the glass. Next, by performing laser irradiation or heat treatment, the adhesion between the production substrate and the organic resin is improved. Then, an insulating film, a transistor, etc. are formed on the organic resin. After that, laser irradiation is performed at an energy density higher than that of the previous laser irradiation, or heat treatment is performed at a temperature higher than that of the previous heat treatment, so that peeling can be performed at the interface between the production substrate and the organic resin. Also, at the time of peeling, a liquid may be infiltrated into the interface between the production substrate and the organic resin to separate them. In this method, since an insulating film, a transistor, etc. are formed on an organic resin having low heat resistance, a high temperature cannot be applied to the substrate in the manufacturing process. Here, since a transistor using an oxide semiconductor does not require a high-temperature manufacturing process, it can be suitably formed on an organic resin.

[0226] The organic resin may be used as the substrate constituting the device, or the organic resin may be removed , and another substrate may be bonded to the exposed surface of the layer to be peeled off using an adhesive. Further, another substrate (support film) may be bonded to the organic resin using an adhesive.

[0227] Alternatively, a metal layer may be provided between the fabricated substrate and the organic resin, and the metal layer may be heated by passing an electric current through the metal layer, and peeling may be performed at the interface between the metal layer and the organic resin.

[0228] The insulating layer (first layer) formed in contact with the peeling layer may be formed as a single layer or a multilayer using a silicon nitride film, a silicon oxynitride film , a silicon oxide film, a silicon nitride oxide film, or the like. Note that the present invention is not limited to this, and an optimal material can be selected according to the material used for the peeling layer.

[0229] The insulating layer can be formed using a sputtering method, a plasma CVD method, a coating method, a printing method, or the like. For example, by forming the film by the plasma CVD method at a film formation temperature of 250 ° C or higher and 400 ° C or lower, a dense and highly moisture-proof film can be obtained. Note that the thickness of the insulating layer is preferably 10 nm or more and 3000 nm or less, and more preferably 200 nm or more and 1500 nm or less.

[0230] Next, the fabricated substrate 301 and the fabricated substrate 321 are bonded together using the adhesive layer 307 so that the surfaces on which the respective layers to be peeled off are formed face each other, and the adhesive layer 307 is cured (FIG. 13( C)).

[0231] Note that it is preferable to bond the fabricated substrate 301 and the fabricated substrate 321 in a reduced-pressure atmosphere.

[0232] In addition, FIG. 13(C) shows a case where the sizes of the release layer 303 and the release layer 323 are different. However, as shown in FIG. 13(D), release layers of the same size may be used.

[0233] The adhesive layer 307 is arranged to overlap with the release layer 303, the layer to be released 305, the layer to be released 325, and the release layer 323. And the end of the adhesive layer 307 is preferably located inside the end of at least one of the release layer 303 or the release layer 323 (the one to be released first). This can suppress the strong adhesion between the production substrate 301 and the production substrate 321, and can suppress the reduction in the yield of the subsequent peeling process.

[0234] For the adhesive layer 307, for example, various curable adhesives such as photocurable adhesives such as ultraviolet curable type, reaction curable adhesives, heat curable adhesives, anaerobic adhesives, etc. can be used. Examples of these adhesives include epoxy resins, acrylic resins, silicone resins, phenolic resins, polyimide resins, imide resins, PVC resins, PVB resins, EVA resins, etc. In particular, materials with low moisture permeability such as epoxy resins are preferred. As the adhesive, it is preferable to use a material with low fluidity so that it can be arranged only in a desired region. For example, an adhesive sheet, a pressure-sensitive adhesive sheet, a sheet-like or film-like adhesive may be used. For example, an OCA (optical clear adhesive) film can be preferably used. The adhesive may have adhesiveness before bonding, or may develop adhesiveness by heating or light irradiation after bonding.

[0235]

[0236] In addition, the above resin may contain a desiccant. For example, oxides of alkaline earth metals (acids ​​​​​​The material used is one that adsorbs moisture by chemical adsorption, such as calcium chloride or barium oxide. Alternatively, materials such as zeolite and silica gel can absorb water by physical adsorption. Adsorbent materials may be used. Desiccants may be included to prevent the ingress of moisture from the atmosphere. This is preferable because it can suppress deterioration of the elements and improve the reliability of the device.

[0237] Next, a starting point for peeling is formed by irradiation with laser light (FIGS. 14(A) and 14(B)).

[0238] The preparation substrate 301 and the preparation substrate 321 may be peeled off from either one of them. In this case, the substrate may be peeled off from a substrate on which a large release layer is formed, or from a substrate on which a small release layer is formed. It may be peeled off from the substrate. In this case, it may be peeled off from the substrate on which the element is formed, or from the other substrate. Here, an example is shown in which the formation substrate 301 is peeled off first.

[0239] The laser beam is focused on the adhesive layer 307 in a cured state, the layer to be peeled 305, and the peeling layer 303, which are overlapped with each other. The area is irradiated (see arrow P1 in FIG. 14(A)).

[0240] By removing a part of the first layer, a starting point of peeling can be formed (encircled by a dotted line in FIG. 14(B)). At this time, not only the first layer but also other layers of the layer to be peeled 305 and the peeling layer 3 03. A portion of the adhesive layer 307 may be removed.

[0241] The laser light is preferably irradiated from the substrate side on which the peeling layer to be peeled is provided. When the laser beam is irradiated to the region where the peeled layer 305 and the peeling layer 323 overlap, By cracking only the release layer 305 among the release layer 325, the production substrate 301 and the release layer 303 can be peeled off (refer to the area surrounded by the dotted line in Fig. 14(B)). Here, an example of removing a part of each layer constituting the release layer 305 is shown.

[0242] Then, starting from the formed peeling origin, the release layer 305 and the production substrate 301 are separated (Fig. 14(C)(D)). As a result, the release layer 305 can be transferred from the production substrate 301 to the production substrate 321.

[0243] For example, starting from the peeling origin, the release layer 305 and the production substrate 301 can be separated by a physical force (such as a process of peeling off by hand or a jig, or a process of separating while rotating a roller).

[0244] Alternatively, a liquid such as water may be infiltrated into the interface between the release layer 303 and the release layer 305 to separate the production substrate 3 01 and the release layer 305. The liquid can easily penetrate between the release layer 303 and the release layer 305 due to capillary action, enabling easy separation. Also, the static electricity generated during peeling can be suppressed from having an adverse effect on the functional elements contained in the release layer 305 (such as a semiconductor element being damaged by static electricity).

[0245] Next, the exposed release layer 305 and the substrate 331 are bonded together using the adhesive layer 333, and the adhesive layer 333 is cured (Fig. 15(A)).

[0246] Note that it is preferable to bond the release layer 305 and the substrate 331 in a reduced-pressure atmosphere.

[0247] Next, a peeling origin is formed by irradiating a laser beam (Fig. 15(B)(C)).​​​​​​​​

[0248] The laser light is irradiated onto the region where the cured adhesive layer 333, the layer to be peeled 325, and the peeling layer 323 overlap (see arrow P2 in Fig. 15(B)). By removing a part of the first layer, a starting point for peeling can be formed (see the region surrounded by the dotted line in Fig. 15(C). Here, an example of removing a part of each layer constituting the layer to be peeled 325 is shown.). At this time, not only the first layer but also other layers of the layer to be peeled 325, and a part of the peeling layer 323 and the adhesive layer 333 may be removed. Region (see arrow P2 in Fig. 15(B)). A part of the first layer can be removed to form a starting point for peeling (see the region surrounded by the dotted line in Fig. 15(C). Here, an example of removing a part of each layer constituting the layer to be peeled 325 is shown.). To form a starting point for peeling (see the region surrounded by the dotted line in Fig. 15(C). Here, an example of removing a part of each layer constituting the layer to be peeled 325 is shown.). At this time, not only the first layer but also other layers of the layer to be peeled 325, and a part of the peeling layer 323 and the adhesive layer 333 may be removed. 325. At this time, not only the first layer but also other layers of the layer to be peeled 325, and a part of the peeling layer 323 and the adhesive layer 333 may be removed. The laser light is preferably irradiated from the side of the production substrate 321 provided with the peeling layer 323.

[0249] And then, the layer to be peeled 325 and the production substrate 321 are separated from the formed starting point for peeling (Fig. 15(D)). Thereby, the layer to be peeled 305 and the layer to be peeled 325 can be transferred onto the substrate 331. .

[0250] And then, the layer to be peeled 325 and the production substrate 321 are separated from the formed starting point for peeling (Fig. 15(D)). Thereby, the layer to be peeled 305 and the layer to be peeled 325 can be transferred onto the substrate 331. This allows the layer to be peeled 305 and the layer to be peeled 325 to be transferred onto the substrate 331. It is possible.

[0251] After that, a substrate can be further attached to the layer to be peeled 325.

[0252] The exposed layer to be peeled 325 and the substrate 341 are bonded together by the adhesive layer 343, and the adhesive layer 3 43 is cured (Fig. 16(A)). Here, an example in which an opening is provided in the substrate 341 in advance is shown. Is shown.

[0253] As described above, the layer to be peeled can be sandwiched between a pair of flexible substrates.

[0254] After that, as shown in Fig. 16(B), unnecessary ends such as the substrate 331 and the substrate 341 may be cut off and removed. At this time, a part of the ends of the layer to be peeled 305 and the layer to be peeled 325 may be cut off simultaneously. And removed. At this time, a part of the ends of the layer to be peeled 305 and the layer to be peeled 325 may be cut off simultaneously. It may be cut off.

[0255] By the above method, a flexible device can be fabricated. By using the configuration exemplified in the above embodiment for the peeling layer, a flexible display device can be fabricated. It can be done.

[0256] In the method for fabricating a display device according to one aspect of the present invention shown above, after bonding a pair of fabrication substrates each provided with a peeling layer and a layer to be peeled, a starting point for peeling is formed by irradiating laser light and, after making each peeling layer and the layer to be peeled in a state where they can be easily peeled, peeling is performed. Thereby, the yield of the peeling process can be improved.

[0257] Also, after preliminarily bonding a pair of fabrication substrates each formed with a layer to be peeled, peeling is performed, and the substrate constituting the device to be fabricated can be bonded to the layer to be peeled. Therefore, when bonding the layers to be peeled, fabrication substrates with low flexibility can be bonded to each other and the alignment accuracy during bonding can be improved compared to when bonding flexible substrates to each other.

[0258] Note that, as shown in FIG. 17(A), the end of the peeling region 351 of the layer to be peeled 305 is preferably located inside the end of the peeling layer 303. Thereby, the yield of the peeling process can be increased. Also, when there are a plurality of regions 351, as shown in FIG. 17(B), a peeling layer 303 may be provided for each region 351, or as shown in FIG. 17(C), a plurality of regions 351 may be provided on one peeling layer 303.

[0259] The above is the description of the method for fabricating a flexible display device.

[0260] This embodiment can be implemented in appropriate combination with at least a part of other embodiments described in this specification. It can be implemented in appropriate combination with at least a part of other embodiments described in this specification.

[0261] (Embodiment 4) In this embodiment, an example of an electronic device to which a display device according to one aspect of the present invention can be applied will be described. It will be described.

[0262] An electronic device or a lighting device can be manufactured using a display device according to one aspect of the present invention. Using a display device according to one aspect of the present invention, an electronic device or a lighting device with high display quality can be manufactured. Using a display device according to one aspect of the present invention, an electronic device or a lighting device with good viewing angle characteristics can be manufactured. Using a display device according to one aspect of the present invention, an electronic device or a lighting device with reduced power consumption can be manufactured. Also, using a display device according to one aspect of the present invention, a highly reliable electronic device or lighting device can be manufactured. Using a display device according to one aspect of the present invention, an electronic device or a lighting device with high display quality can be manufactured. Using a display device according to one aspect of the present invention, an electronic device or a lighting device with good viewing angle characteristics can be manufactured. Using a display device according to one aspect of the present invention, an electronic device or a lighting device with reduced power consumption can be manufactured. Also, using a display device according to one aspect of the present invention, a highly reliable electronic device or lighting device can be manufactured. Using a display device according to one aspect of the present invention, an electronic device or a lighting device with good viewing angle characteristics can be manufactured. Using a display device according to one aspect of the present invention, an electronic device or a lighting device with reduced power consumption can be manufactured. Also, using a display device according to one aspect of the present invention, a highly reliable electronic device or lighting device can be manufactured. Using a display device according to one aspect of the present invention, an electronic device or a lighting device with reduced power consumption can be manufactured. Also, using a display device according to one aspect of the present invention, a highly reliable electronic device or lighting device can be manufactured. Also, using a display device according to one aspect of the present invention, a highly reliable electronic device or lighting device can be manufactured. It can be manufactured.

[0263] Examples of the electronic device include, for example, a television device, a desktop or notebook personal computer, a monitor for a computer, a digital camera, a digital video camera, a digital photo frame, a mobile phone, a portable game machine, a portable information terminal, an audio reproduction device, a large game machine such as a pachinko machine, and the like. Examples of the electronic device include, for example, a television device, a desktop or notebook personal computer, a monitor for a computer, a digital camera, a digital video camera, a digital photo frame, a mobile phone, a portable game machine, a portable information terminal, an audio reproduction device, a large game machine such as a pachinko machine, and the like. Examples of the electronic device include, for example, a television device, a desktop or notebook personal computer, a monitor for a computer, a digital camera, a digital video camera, a digital photo frame, a mobile phone, a portable game machine, a portable information terminal, an audio reproduction device, a large game machine such as a pachinko machine, and the like. Examples of the electronic device include, for example, a television device, a desktop or notebook personal computer, a monitor for a computer, a digital camera, a digital video camera, a digital photo frame, a mobile phone, a portable game machine, a portable information terminal, an audio reproduction device, a large game machine such as a pachinko machine, and the like.

[0264] An electronic device or a lighting device according to one aspect of the present invention can be incorporated along the inner wall or outer wall of a house or a building, or along the curved surface of the interior or exterior of an automobile. An electronic device or a lighting device according to one aspect of the present invention can be incorporated along the inner wall or outer wall of a house or a building, or along the curved surface of the interior or exterior of an automobile.

[0265] An electronic device according to one aspect of the present invention may have a secondary battery, and it is preferable that the secondary battery can be charged using non-contact power transmission. An electronic device according to one aspect of the present invention may have a secondary battery, and it is preferable that the secondary battery can be charged using non-contact power transmission.

[0266] Examples of secondary batteries include lithium-ion secondary batteries such as lithium polymer batteries (lithium ion polymer batteries), nickel-metal hydride batteries, nickel-cadmium batteries, organic radical batteries, lead-acid batteries, air secondary batteries, nickel-zinc batteries, silver-zinc batteries, and the like.

[0267] An electronic device according to one aspect of the present invention may have an antenna. By receiving a signal with the antenna, it is possible to display images, information, and the like on the display unit. Further, when the electronic device has an antenna and a secondary battery, the antenna may be used for non-contact power transmission.

[0268] An electronic device according to one aspect of the present invention may have a sensor (including a function of measuring force, displacement, position, velocity, acceleration, angular velocity, rotation number, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, power , radiation, flow rate, humidity, gradient, vibration, odor, or infrared rays).

[0269] An electronic device according to one aspect of the present invention can have various functions. For example, functions such as displaying various information (still images, moving images, text images, etc.) on the display unit, a touch panel function, a calendar , a function of displaying a date or time, etc., a function of executing various software (programs), a wireless communication function, a function of reading programs or data recorded on a recording medium , etc. can be provided.

[0270] Furthermore, in an electronic device having a plurality of display units, a function of mainly displaying image information on one display unit and mainly displaying character information on another display unit, or a function of displaying a three-dimensional image by displaying an image considering parallax on the plurality of display units can be provided.​​ Furthermore, in an electronic device having an image receiving unit, it can have functions such as shooting still images or moving images, automatically or manually correcting the shot images, saving the shot images in a recording medium (external or built-in to the electronic device), and displaying the shot images on a display unit. Note that the functions of the electronic device according to an aspect of the present invention are not limited to these, and it can have various functions. Examples of an electronic device having a curved display unit 7000 are shown in FIGS. 18(A) to (E). The display unit 7000 is provided with a curved display surface, and can perform display along the curved display surface. Note that the display unit 7000 may have flexibility. The display unit 7000 is manufactured using a display device or the like according to an aspect of the present invention. According to an aspect of the present invention, it is possible to provide an electronic device with reduced power consumption, equipped with a curved display unit, and having high reliability. Examples of mobile phones are shown in FIGS. 18(A) and (B). The mobile phone 7100 shown in FIG. 18(A) and the mobile phone 7110 shown in FIG. 18(B) each have a housing 7101, a display unit 7000, operation buttons 7103, an external connection port 7104, a speaker 7105, a microphone 7106, etc. The mobile phone 7110 shown in FIG. 18(B) further has a camera 7107.

[0271] Each mobile phone is provided with a touch sensor on the display unit 7000. Any operation such as making a call or inputting characters can be performed by touching the display unit 7000 with a finger or a stylus.

[0272]

[0273]

[0274]

[0275] ​​​​​​​​​​​​​Also, by operating the operation button 7103, the power can be turned on and off, and the type of image displayed on the display unit 7000 can be switched. For example, it can be switched from the email creation screen to the main menu screen.

[0276] In addition, a detection device such as a gyro sensor or an acceleration sensor is provided inside the mobile phone, so that the orientation (portrait or landscape) of the mobile phone can be determined, and the screen display orientation of the display unit 7000 can be automatically switched. Also, the switching of the screen display orientation can be performed by touching the display unit 7000, operating the operation button 7103, or using voice input using the microphone 7106, etc.

[0277] Examples of the portable information terminal are shown in FIGS. 18(C) and (D). The portable information terminal 7200 shown in FIG. 18(C) and the portable information terminal 7210 shown in FIG. 18(D) each have a housing 7201 and a display unit 7000. Further, it may have an operation button, an external connection port, a speaker, a microphone, an antenna, a camera, or a battery, etc. The display unit 7000 is provided with a touch sensor . The operation of the portable information terminal can be performed by touching the display unit 7000 with a finger or a stylus, etc.

[0278] The portable information terminal exemplified in this embodiment has one or more functions selected from, for example, a telephone, a notebook, or an information browsing device, etc. Specifically, it can be used as a smartphone respectively. The portable information terminal exemplified in this embodiment can execute various applications such as, for example, a mobile phone, an electronic mail, text browsing and creation, music playback, Internet communication, computer games, etc.

[0279] The mobile information terminal 7200 and the mobile information terminal 7210 can display characters, image information, etc. on a plurality of its surfaces. For example, as shown in FIGS. 18(C) and (D), three operation buttons 7202 can be displayed on one surface, and the information 7203 shown by a rectangle can be displayed on another surface. FIG. 18(C) shows an example where information is displayed on the upper side of the mobile information terminal, and FIG. 18(D) shows an example where information is displayed on the side of the mobile information terminal. Also, information may be displayed on three or more surfaces of the mobile information terminal.

[0280] Note that examples of information include notifications of SNS (Social Networking Service), displays notifying incoming calls such as e-mails and phone calls, the subject or sender name of e-mails, date and time, remaining battery level, antenna reception strength, etc. Or, operation buttons, icons, etc. may be displayed at the position where the information is displayed instead of the information.

[0281] For example, the user of the mobile information terminal 7200 can check the display (here, the information 7203) while the mobile information terminal 7200 is stored in the breast pocket of the clothing.

[0282] Specifically, the phone number or name of the caller of the incoming call, etc. is displayed at a position where it can be observed from above the mobile information terminal 7200 The user can check the display without taking out the mobile information terminal 7200 from the pocket and determine whether to answer the phone.

[0283] FIG. 18(E) shows an example of a television device. The television device 7300 has a display unit 7000 incorporated in a housing 7 301. Here, a configuration in which the housing 7 301 is supported by a stand 7303 is shown. ​

[0284] The operation of the television apparatus 7300 shown in Fig. 18(E) can be performed by operation switches provided on the housing 7301 or by a separate remote control operation unit 7311. Alternatively, the display unit 70 00 may be provided with a touch sensor, and the operation may be performed by touching the display unit 7000 with a finger or the like. The remote control operation unit 7311 may have a display unit for displaying information output from the remote control operation unit 7311. The operation keys or touch panel provided on the remote control operation unit 7311 can be used to operate the channel and volume, and can also be used to operate the video displayed on the display unit 7000.

[0285] Note that the television apparatus 7300 is configured to include a receiver and a modem, etc. The receiver can receive general television broadcasts. Also, by connecting to a wired or wireless communication network via the modem, one-way (from sender to receiver) or two-way (between sender and receiver, or between receivers) information communication can be performed.

[0286] Fig. 18(F) shows an example of an illumination device having a curved light emitting portion.

[0287] The light emitting portion of the illumination device shown in Fig. 18(F) is manufactured using the display device or the like of one aspect of the present invention. According to one aspect of the present invention, it is possible to provide an illumination device with reduced power consumption, a curved light emitting portion, and high reliability.

[0288] The light emitting portion 7411 provided in the illumination device 7400 shown in Fig. 18(F) has a configuration in which two convexly curved light emitting portions are symmetrically arranged. Therefore, the illumination device 7400 can illuminate the entire area around it. ​

[0289] Also, the light-emitting unit 7411 included in the lighting device 7400 may have flexibility. The light-emitting unit 7411 may be fixed with a plastic member or a member such as a movable frame, and the light-emitting surface of the unit 7411 may be configured to be freely curved according to the application.

[0290] The lighting device 7400 includes a base unit 7401 having an operation switch 7403, and a light-emitting unit 7411 supported by the base unit 7401.

[0291] Here, a lighting device in which the light-emitting unit is supported by the base unit has been exemplified, but a housing having the light-emitting unit can also be used by fixing it to the ceiling or suspending it from the ceiling. Since the light-emitting surface can be curved and used, the light-emitting surface can be curved in a concave shape to brightly illuminate a specific area, or the light-emitting surface can be curved in a convex shape to brightly illuminate the entire room.

[0292] Figs. 19(A) to (I) show an example of a portable information terminal having a flexible and bendable display unit 7001. An example of a portable information terminal having a flexible and bendable display unit 7001 is shown.

[0293] The display unit 7001 is manufactured using a display device or the like according to an aspect of the present invention. For example, a display device or the like that can be bent with a radius of curvature of 0.01 mm or more and 150 mm or less can be applied. Also, the display unit 7001 may include a touch sensor, and the portable information terminal can be operated by touching the display unit 7001 with a finger or the like. According to an aspect of the present invention, an electronic device having a flexible display unit and high reliability can be provided. unit and high reliability can be provided. unit and high reliability can be provided.

[0294] Figs. 19(A) and (B) are perspective views showing an example of a portable information terminal. The portable information terminal 75 00 includes a housing 7501, a display unit 7001, a drawer member 7502, operation buttons 7503, etc. It has them.

[0295] The portable information terminal 7500 has a flexible display unit 7001 wound in a roll shape inside the housing 7501. The display unit 7001 can be pulled out using the drawer member 7502. It can be done.

[0296] Also, the portable information terminal 7500 can receive a video signal by a built-in control unit and display the received video on the display unit 7001. Further, a battery is built in the portable information terminal 7500. Also, the housing 7501 is provided with a terminal portion for connecting a connector, and it may be configured to directly supply a video signal and power from the outside by wire. It can be done. Also, a battery is built in the portable information terminal 7500. Also, the housing 7501 is provided with a terminal portion for connecting a connector, and it may be configured to directly supply a video signal and power from the outside by wire. It can be done. Also, a battery is built in the portable information terminal 7500. Also, the housing 7501 is provided with a terminal portion for connecting a connector, and it may be configured to directly supply a video signal and power from the outside by wire. It can be done. Also, a battery is built in the portable information terminal 7500. Also, the housing 7501 is provided with a terminal portion for connecting a connector, and it may be configured to directly supply a video signal and power from the outside by wire.

[0297] Also, by the operation buttons 7503, operations such as turning on and off the power and switching the displayed video can be performed. In FIGS. 19(A) and (B), an example of arranging the operation buttons 7503 on the side surface of the portable information terminal 7500 is shown, but it is not limited to this, and they may be arranged on the same surface (front surface) as the display surface of the portable information terminal 7500 or on the back surface. It can be done. In FIGS. 19(A) and (B), an example of arranging the operation buttons 7503 on the side surface of the portable information terminal 7500 is shown, but it is not limited to this, and they may be arranged on the same surface (front surface) as the display surface of the portable information terminal 7500 or on the back surface. It can be done. In FIGS. 19(A) and (B), an example of arranging the operation buttons 7503 on the side surface of the portable information terminal 7500 is shown, but it is not limited to this, and they may be arranged on the same surface (front surface) as the display surface of the portable information terminal 7500 or on the back surface. It can be done. In FIGS. 19(A) and (B), an example of arranging the operation buttons 7503 on the side surface of the portable information terminal 7500 is shown, but it is not limited to this, and they may be arranged on the same surface (front surface) as the display surface of the portable information terminal 7500 or on the back surface.

[0298] FIG. 19(B) shows the portable information terminal 7500 with the display unit 7001 pulled out. In this state, a video can be displayed on the display unit 7001. Also, the portable information terminal 7500 may be configured to perform different displays between the state of FIG. 19(A) where a part of the display unit 7001 is wound in a roll shape and the state of FIG. 19(B) where the display unit 7001 is pulled out. For example, when in the state of FIG. 19(A), the power consumption of the portable information terminal 7500 can be reduced by making the rolled portion of the display unit 7001 non-display. It can be done. Also, the portable information terminal 7500 may be configured to perform different displays between the state of FIG. 19(A) where a part of the display unit 7001 is wound in a roll shape and the state of FIG. 19(B) where the display unit 7001 is pulled out. For example, when in the state of FIG. 19(A), the power consumption of the portable information terminal 7500 can be reduced by making the rolled portion of the display unit 7001 non-display. It can be done. Also, the portable information terminal 7500 may be configured to perform different displays between the state of FIG. 19(A) where a part of the display unit 7001 is wound in a roll shape and the state of FIG. 19(B) where the display unit 7001 is pulled out. For example, when in the state of FIG. 19(A), the power consumption of the portable information terminal 7500 can be reduced by making the rolled portion of the display unit 7001 non-display. It can be done. Also, the portable information terminal 7500 may be configured to perform different displays between the state of FIG. 19(A) where a part of the display unit 7001 is wound in a roll shape and the state of FIG. 19(B) where the display unit 7001 is pulled out. For example, when in the state of FIG. 19(A), the power consumption of the portable information terminal 7500 can be reduced by making the rolled portion of the display unit 7001 non-display. It can be done. Also, the portable information terminal 7500 may be configured to perform different displays between the state of FIG. 19(A) where a part of the display unit 7001 is wound in a roll shape and the state of FIG. 19(B) where the display unit 7001 is pulled out. For example, when in the state of FIG. 19(A), the power consumption of the portable information terminal 7500 can be reduced by making the rolled portion of the display unit 7001 non-display.

[0299] When the display unit 7001 is pulled out, the display surface of the display unit 7001 is made flat. To fix the display unit 7001 in place, a reinforcing frame may be provided on the side of the display unit 7001 .

[0300] In addition to this configuration, a speaker is provided on the housing, and the audio signal received together with the video signal is output. The configuration may be such that sound is outputted.

[0301] 19(C) to 19(E) show an example of a foldable portable information terminal. ) in the unfolded state, and in Fig. 19(D) in either the unfolded or folded state. In FIG. 19(E), the portable information terminal 7 is in a folded state. The portable information terminal 7600 is highly portable when folded and can be folded up to 600 mm when unfolded. In this state, the large, seamless display area provides excellent visibility.

[0302] The display unit 7001 is supported by three housings 7601 connected by hinges 7602. By bending the two housings 7601 via the hinge 7602, The terminal 7600 can be reversibly transformed from an unfolded state to a folded state.

[0303] 19(F) and (G) show an example of a foldable portable information terminal. In FIG. 19(G), the display unit 7001 is folded inward. The mobile information terminal 7650 is folded so that the 7001 faces outward. The terminal 7650 has a display portion 7001 and a non-display portion 7651. When not in use, the display unit 7001 can be folded inward. It is possible to suppress dirt and damage.

[0304] Fig. 19(H) shows an example of a flexible portable information terminal. The portable information terminal 7700 has a housing 7701 and a display unit 7001. Furthermore, buttons 7703a and 7703b which are input units, speakers 7704a and 7704b which are audio output units, an external connection port 770 5, a microphone 7706, etc. may be provided. Also, the portable information terminal 7700 can be equipped with a flexible battery 7709. The battery 7709 may be arranged, for example, overlapping the display unit 700 1.

[0305] The housing 7701, the display unit 7001, and the battery 7709 are flexible. Therefore, it is easy to bend the portable information terminal 7700 into a desired shape and to apply torsion to the portable information terminal 7700. For example, the portable information terminal 7700 can be used by being bent so that the display unit 7001 faces inward or outward. Alternatively, the portable information terminal 7700 can also be used in a state of being rolled up like a roll. Since the housing 7701 and the display unit 7 001 can be freely deformed in this way, the portable information terminal 7700 has the advantage of being difficult to break even when it falls or when an unintended external force is applied.

[0306] Also, since the portable information terminal 7700 is lightweight, it can be used by holding the upper part of the housing 7701 with a clip or the like and hanging it, or by fixing the housing 7701 to a wall surface with a magnet or the like in various situations with good convenience.

[0307] Fig. 19(I) shows an example of a wristwatch-type portable information terminal. The portable information terminal 7800 is a band It has a band 7801, a display unit 7001, input / output terminals 7802, operation buttons 7803, etc. The band 7801 has the function of a housing. Also, the portable information terminal 7800 can be equipped with a flexible battery 7805. The battery 7805 may be arranged, for example, overlapping the display unit 70 01 or the band 7801, etc.

[0308] The band 7801, the display unit 7001, and the battery 7805 have flexibility. Therefore, it is easy to bend the portable information terminal 7800 into a desired shape.

[0309] In addition to time setting, the operation buttons 7803 can have various functions such as turning the power on and off, turning wireless communication on and off, executing and canceling the manner mode, and executing and canceling the power saving mode. For example, the functions of the operation buttons 7803 can also be freely set by the operating system incorporated in the portable information terminal 7800.

[0310] Also, by touching the icon 7804 displayed on the display unit 7001 with a finger or the like, an application can be launched.

[0311] In addition, the portable information terminal 7800 can perform short-range wireless communication compliant with a communication standard. For example, by communicating with a wireless communication-capable headset, it is also possible to make a hands-free call.

[0312] The portable information terminal 7800 may also have input / output terminals 7802. When it has the input / output terminals 7 802, it can directly exchange data with other information terminals via a connector. It is also possible to perform charging via the input / output terminals 7802. Note that in this embodiment, The charging operation of the mobile information terminal exemplified in the form may be performed by non-contact power transmission without passing through the input / output terminal. This may be done.

[0313] Fig. 20(A) shows the exterior of the automobile 7900. Fig. 20(B) shows the driver's seat of the automobile 7900. The automobile 7900 has a vehicle body 7901, wheels 7902, a windshield 7903, a rearview mirror 7904, a fog lamp 7905, etc. etc.

[0314] The display device according to one aspect of the present invention can be used for a display unit of the automobile 7900 or the like. For example, the display device according to one aspect of the present invention can be provided in the display units 7910 to 7917 shown in Fig. 20(B). For example, the display device according to one aspect of the present invention can be provided in the display units 7910 to 7917 shown in Fig. 20(B). The display units 7910 and 7911 are provided on the windshield of the automobile. In one aspect of the present invention, by forming the electrodes included in the display device from a conductive material having translucency, a so-called see-through display device in which the opposite side can be seen through can be obtained.

[0315] Since a see-through display device does not obstruct the view even when the automobile 7900 is being driven, the display device according to one aspect of the present invention can be installed on the windshield of the automobile 7900. When providing a transistor or the like in the display device, an organic transistor using an organic semiconductor material or a transistor using an oxide semiconductor, etc., a transistor having translucency may be used. Since a see-through display device does not obstruct the view even when the automobile 7900 is being driven, the display device according to one aspect of the present invention can be installed on the windshield of the automobile 7900. When providing a transistor or the like in the display device, an organic transistor using an organic semiconductor material or a transistor using an oxide semiconductor, etc., a transistor having translucency may be used. Since a see-through display device does not obstruct the view even when the automobile 7900 is being driven, the display device according to one aspect of the present invention can be installed on the windshield of the automobile 7900. When providing a transistor or the like in the display device, an organic transistor using an organic semiconductor material or a transistor using an oxide semiconductor, etc., a transistor having translucency may be used. Since a see-through display device does not obstruct the view even when the automobile 7900 is being driven, the display device according to one aspect of the present invention can be installed on the windshield of the automobile 7900. When providing a transistor or the like in the display device, an organic transistor using an organic semiconductor material or a transistor using an oxide semiconductor, etc., a transistor having translucency may be used. Since a see-through display device does not obstruct the view even when the automobile 7900 is being driven, the display device according to one aspect of the present invention can be installed on the windshield of the automobile 7900. When providing a transistor or the like in the display device, an organic transistor using an organic semiconductor material or a transistor using an oxide semiconductor, etc., a transistor having translucency may be used. Since a see-through display device does not obstruct the view even when the automobile 7900 is being driven, the display device according to one aspect of the present invention can be installed on the windshield of the automobile 7900. When providing a transistor or the like in the display device, an organic transistor using an organic semiconductor material or a transistor using an oxide semiconductor, etc., a transistor having translucency may be used. Since a see-through display device does not obstruct the view even when the automobile 7900 is being driven, the display device according to one aspect of the present invention can be installed on the windshield of the automobile 7900. When providing a transistor or the like in the display device, an organic transistor using an organic semiconductor material or a transistor using an oxide semiconductor, etc., a transistor having translucency may be used. Since a see-through display device does not obstruct the view even when the automobile 7900 is being driven, the display device according to one aspect of the present invention can be installed on the windshield of the automobile 7900. When providing a transistor or the like in the display device, an organic transistor using an organic semiconductor material or a transistor using an oxide semiconductor, etc., a transistor having translucency may be used.

[0316] The display unit 7912 is provided on the pillar portion. The display unit 7913 is provided on the dashboard portion. For example, by displaying an image from an imaging unit provided on the vehicle body on the display unit 7912, the view blocked by the pillar can be supplemented. Similarly, the display unit 79 The display unit 7912 is provided on the pillar portion. The display unit 7913 is provided on the dashboard portion. For example, by displaying an image from an imaging unit provided on the vehicle body on the display unit 7912, the view blocked by the pillar can be supplemented. Similarly, the display unit 79 The display unit 7912 is provided on the pillar portion. The display unit 7913 is provided on the dashboard portion. For example, by displaying an image from an imaging unit provided on the vehicle body on the display unit 7912, the view blocked by the pillar can be supplemented. Similarly, the display unit 79 In 13, the view blocked by the dashboard can be complemented, and in the display unit 7914, the view blocked by the door can be complemented. That is, by projecting the video from the imaging unit provided outside the vehicle, blind spots can be compensated and safety can be enhanced. Also , by projecting the video that complements the invisible part, safety confirmation can be performed more naturally without a sense of discomfort.

[0317] Also, the display unit 7917 is provided on the steering wheel. The display unit 7915, the display unit 791 6, or the display unit 7917 can provide various other information such as navigation information, speedometer, tachometer, driving distance, fuel supply amount, gear state, air conditioner settings, etc. Also, the display items and layout displayed on the display unit can be appropriately changed according to the user's preference. Incidentally, the above information can also be displayed on the display units 7910 to 7914.

[0318] Note that the display units 7910 to 7917 can also be used as lighting devices.

[0319] The display unit to which the display device according to one aspect of the present invention is applied may be flat. In this case, the display device according to one aspect of the present invention may have a configuration without curvature and flexibility.

[0320] Examples of digital signage are shown in FIGS. 20(C) and (D). Digital signage includes a housing 8000, a display unit 8001, and a speaker 8003, etc. Further, it can have an LED lamp, operation keys (including a power switch or an operation switch), connection terminals, various sensors, a microphone, etc.

[0321] FIG. 20(D) is a digital signage attached to a cylindrical column.

[0322] The larger the display unit 8001 is, the more information can be provided at one time. Also, the larger the display unit 8001 is, the more likely it is to catch people's eyes, and for example, the advertising effect can be enhanced.

[0323] By applying a touch panel to the display unit 8001, not only can an image or video be displayed on the display unit 8001, but also the user can operate it intuitively, which is preferable. Also, when used for applications such as providing route information or traffic information, the user usability can be enhanced by intuitive operation.

[0324] The portable game machine shown in FIG. 20(E) includes a housing 8101, a housing 8102, a display unit 8103 , a display unit 8104, a microphone 8105, a speaker 8106, operation keys 8107, a stylus 8108, etc.

[0325] The portable game machine shown in FIG. 20(E) has two display units (display unit 8103 and display unit 810 4). Note that the number of display units included in the electronic device according to one aspect of the present invention is not limited to two and may be one or three or more. When the electronic device has a plurality of display units, at least one display unit may have the display device according to one aspect of the present invention.

[0326] FIG. 20(F) is a notebook personal computer and includes a housing 8111, a display unit 811 2, a keyboard 8113, a pointing device 8114, etc.

[0327] The display unit 8112 can be applied with the display device according to an aspect of the present invention.

[0328] Fig. 21(A) shows the appearance of the camera 8400 with the finder 8500 attached. Shown.

[0329] The camera 8400 has a housing 8401, a display unit 8402, operation buttons 8403, a shutter button 8404, etc. Also, a detachable lens 8406 is attached to the camera 8400. Attached.

[0330] Here, the camera 8400 is configured such that the lens 8406 can be removed from the housing 8401 and replaced, but the lens 8406 and the housing may be integrated. Although it is possible, the lens 8406 and the housing may be integrated.

[0331] The camera 8400 can take an image by pressing the shutter button 8404. Also, the display unit 8402 has a function as a touch panel, and it is also possible to take an image by touching the display unit 8402. By touching it, it is also possible to take an image.

[0332] The housing 8401 of the camera 8400 has a mount with electrodes, and in addition to the finder 850 0, a strobe device or the like can be connected.

[0333] The finder 8500 has a housing 8501, a display unit 8502, buttons 8503, etc. .

[0334] The housing 8501 has a mount that engages with the mount of the camera 8400, and the finder 8500 can be attached to the camera 8400. Also, the mount has electrodes and can display on the display unit 8502 the video or the like received from the camera 8400 via the electrodes. Can be made to display.

[0335] Button 8503 has a function as a power button. By means of button 8503, the display on the display unit 8502 can be switched between on and off.

[0336] The display device according to one aspect of the present invention can be applied to the display unit 8402 of the camera 8400 and the display unit 8502 of the viewfinder 8500. The display device according to one aspect of the present invention can be applied.

[0337] In FIG. 21(A), the camera 8400 and the viewfinder 8500 are separate electronic devices, and they are configured to be detachable. However, a viewfinder having the display device according to one aspect of the present invention may be built into the housing 8401 of the camera 8400. The display device according to one aspect of the present invention may be built in.

[0338] FIG. 21(B) shows the appearance of the head-mounted display 8200.

[0339] The head-mounted display 8200 has a mounting part 8201, a lens 8202, a main body 82 03, a display unit 8204, a cable 8205, etc. A battery 8206 is built into the mounting part 8201. The battery 8206 is built in.

[0340] The cable 8205 supplies power from the battery 8206 to the main body 8203. The main body 82 03 is provided with a wireless receiver or the like, and can display video information such as received image data on the display unit 8204. Further, a camera provided on the main body 8203 captures the movement of the user's eyeballs and eyelids, and calculates the coordinates of the user's viewpoint based on the information, so that the user's viewpoint can be used as an input unit. The movement of the user's eyeballs and eyelids is captured, and the coordinates of the user's viewpoint are calculated based on the information, so that the user's viewpoint can be used as an input unit.

[0341] In addition, a plurality of electrodes may be provided at positions where the mounting part 8201 touches the user. . By detecting the current flowing through the electrodes as the user's eyeball moves, the main body 8203 may have a function of recognizing the user's viewing point. Also, by detecting the current flowing through the electrodes , it may have a function of monitoring the user's pulse. Further, the mounting portion 820 1 may have various sensors such as a temperature sensor, a pressure sensor, and an acceleration sensor, and may have a function of displaying the user's biological information on the display portion 8204. Also, it may detect the movement of the user's head and change the video displayed on the display portion 8204 according to the movement.

[0342] The display device according to one aspect of the present invention can be applied to the display portion 8204.

[0343] Figures 21(C) and (D) show the appearance of the head-mounted display 8300. .

[0344] The head-mounted display 8300 has a housing 8301, two display portions 8302, an operation button 8303, and a band-shaped fixture 8304.

[0345] In addition to the functions of the head-mounted display 8200, the head-mounted display 8300 includes two display portions.

[0346] By having two display portions 8302, the user can view one display portion for each eye. Thus, even when performing a three-dimensional display or the like using parallax, a high-resolution video can be displayed. Also, the display portion 8302 is curved in an arc shape centered approximately on the user's eyes. Thereby, the distance from the user's eyes to the display surface of the display portion becomes constant. Therefore, the user can view a more natural video. Also, even if the brightness and chromaticity of the light from the display unit change depending on the viewing angle, since the user's eyes are positioned in the direction normal to the display surface of the display unit, the influence can be substantially ignored, so a more realistic video can be displayed. Even in a case where the brightness and chromaticity of the light from the display unit change depending on the viewing angle, since the user's eyes are positioned in the direction normal to the display surface of the display unit, the influence can be substantially ignored, so a more realistic video can be displayed.

[0347] The operation button 8303 has functions such as a power button. Also, the operation button 8303 may have other buttons. It may also have buttons.

[0348] Also, as shown in FIG. 21(E), a lens 8305 may be provided between the display unit 8302 and the position of the user's eyes. With the lens 8305, the user can view the display unit 8302 enlarged, so the sense of presence is enhanced. At this time, as shown in FIG. 21(E), a dial 8306 for changing the position of the lens for visual acuity adjustment may be provided. With the lens 8305, the user can view the display unit 8302 enlarged, so the sense of presence is enhanced. At this time, as shown in FIG. 21(E), a dial 8306 for changing the position of the lens for visual acuity adjustment may be provided. Also, as shown in FIG. 21(E), a dial 8306 for changing the position of the lens for visual acuity adjustment may be provided.

[0349] The display device according to one aspect of the present invention can be applied to the display unit 8302. Since the display device according to one aspect of the present invention has extremely high definition, even if it is enlarged using the lens 8305 as shown in FIG. 21(E), a more realistic video can be displayed without the user being able to visually recognize the pixels. Since the display device according to one aspect of the present invention has extremely high definition, even if it is enlarged using the lens 8305 as shown in FIG. 21(E), a more realistic video can be displayed without the user being able to visually recognize the pixels. Also, as shown in FIG. 21(E), a dial 8306 for changing the position of the lens for visual acuity adjustment may be provided.

[0350] FIGS. 22(A) to (C) show an example in the case of having one display unit 8302. By adopting such a configuration, the number of components can be reduced.

[0351] The display unit 8302 can display two images, an image for the right eye and an image for the left eye, side by side in two regions on the left and right. Thereby, a stereoscopic video using binocular parallax can be displayed. The display unit 8302 can display two images, an image for the right eye and an image for the left eye, side by side in two regions on the left and right. Thereby, a stereoscopic video using binocular parallax can be displayed.

[0352] Also, even if one image visible to both eyes is displayed across the entire display unit 8302 it is acceptable. As a result, since it becomes possible to display a panoramic video across both ends of the field of view, the sense of reality is enhanced.

[0353] Also, as shown in Fig. 22(C), a lens 8305 may be provided. The display unit 8302 may display two images side by side, or may be configured such that one image is displayed on the display unit 8302 and the same image can be viewed with both eyes through the lens 8305.

[0354] This embodiment can be implemented in appropriate combination with at least a part of other embodiments described in this specification.

Example

[0355] Calculations were performed on the display device of one aspect of the present invention regarding the time required for charging and discharging each wiring, etc. Fig. 26(A) is a block diagram of the display device used in the calculation. Fig. 26(B) is a circuit diagram of the pixel corresponding to the fabricated top view.

[0356] The block diagram of the display device shown in Fig. 26(A) represents a so-called 8K panel having pixels composed of sub-pixels arranged in a stripe pattern of 65 inches, 7680×4320×RGBW (red, green, blue, white). The scanning line drive circuits (Gate Driver) arranged on both sides are gate-on arrays (GOA), and are configured to output scanning signals from both scanning line drive circuits to the pixels (PIX). The signal line drive circuit (Source Driver) was made external (External).

[0357] ​​​​​​​​​FIG. 26(B) is a circuit diagram of the pixel (PIX) shown in FIG. 26(A). FIG. 26(B ) shows a circuit diagram corresponding to the circuit diagram described in FIG. 7(A) with the arrangement of the capacitive element C2 changed .

[0358] Similar to FIG. 7(A), the configuration shown in FIG. 26(B) is such that the first gate electrode and the second gate electrode are not connected in the transistor M4 . With this configuration, the gate capacitance between the scanning line GL and the transistor can be made to be only formed between the first gate electrode as compared with the case where the gate electrodes are connected to each other . .

[0359] FIG. 27 is a top view of the pixel (PIX) corresponding to FIG. 26(B). The pixel shown in FIG. 27 illustrates four sub-pixels of RGBW. The configurations corresponding to the circuit diagram are labeled with the same reference numerals . Using the configurations shown in FIGS. 26(A), (B), and 27, the time required for charging and discharging each wiring such as the scanning line and the signal line was estimated . The various calculations for estimating the time required for charging and discharging were performed using the software "SmartSpice" of SILVACO . The pixel size was 188 μm × 188 μm, the channel length L / channel width (W) of the transistor M4 was 4 μm / 4 μm, and the L / W of the transistor M5 was 6 μm / 6 μm . .

[0360] The calculation results are shown in Table 1. In Table 1, "Gate fall time" is the time until the signal on the scanning line falls, "Source line charge time (>95%)" is the time required to charge the signal line to 95%, "Total" is the sum of the above two times, and "One horizontal period" represents one horizontal scanning period . is doing so.

[0361]

Table 1

[0362] As shown in Table 1, the charge and discharge times in the scanning lines and signal lines are within one horizontal scanning period. Therefore, it has been found that the display device to which one aspect of the present invention is applied is suitable for an 8K panel because the gate capacitance of the transistor connected to the scanning line is reduced.

Explanation of Signs

[0363] GL Scanning line SL Signal line V0 Wiring ANODE Current supply line M1 Transistor M2 Transistor M3 Transistor C1 Capacitive element EL Light-emitting element CATHODE Common wiring 100 Transistor 102 Substrate 104 Insulating layer 106 Conductive layer 108 Oxide semiconductor layer 110 Insulating layer 112 Oxide semiconductor layer 116 Insulating layer 108i Channel region 108s Source region 108d Drain region 141a Opening 141b Opening 120a Conductive layer 120b Conductive layer 151 Conductive layer 152 Conductive layer 153 Insulating layer 161 Oxide semiconductor layer 162 Oxide semiconductor layer ​163 Oxide semiconductor layer 164 Insulating layer 171 Oxide semiconductor layer 172 Oxide semiconductor layer 173 Oxide semiconductor layer 174 Insulating layer 181 Conductive layer 182 Conductive layer 183 Conductive layer 184 Conductive layer 185 Conductive layer 186 Insulating layer 187 Insulating layer 190 Opening 191 Conductive layer 192 Conductive layer 193 Insulating layer 198 Light-emitting layer 199 Partition layer 10 Display device 11 Pixel section 12 Scanning line drive circuit 13 Signal line drive circuit 15 Terminal section 16a Wiring 16b Wiring 22 Region 24 Region M4 Transistor M5 Transistor M6 Transistor M7 Transistor M8 Transistor M9 Transistor M10 Transistor M11 Transistor C2 Capacitor element C3 Capacitor element C4 Capacitor element C5 Capacitor element GL1 Scanning line GL2 Scanning line GL3 Scanning line GL4 Scanning line V1 Wiring V2 Wiring 201 Substrate 202 Substrate 211 Insulating layer 212 Insulating layer 213 Insulating layer 214 Insulating layer 215 Spacer 216 Insulating layer 217 Insulating layer 218 Insulating layer 220 Adhesive layer 221 Insulating layer 222 EL layer 223 Electrode 224 Optical adjustment layer 225 Pixel electrode 230a Structure 230b Structure 231 Light-shielding layer 232 Coloring layer 242 FPC 243 Connection layer 250 Space 251 Transistor 252 Transistor 253 Capacitor element 254 Light-emitting element 255 Transistor 260 Sealing material 261 Adhesive layer 262 Adhesive layer 271 Semiconductor layer 272 Conductive layer 273 Conductive layer 274 Conductive layer 275 Conductive layer 276 Insulating layer 291 Conductive layer 292 Conductive layer 293 Conductive layer 294 Insulating layer 295 Adhesive layer 296 Substrate 297 FPC 298 Connection layer 299 Terminal part 301 Fabrication substrate 303 Release layer 305 Layer to be released 307 Adhesive layer 321 Fabrication substrate 323 Release layer 325 Release layer 331 Substrate 333 Adhesive layer 341 Substrate 343 Adhesive layer 351 Area 7000 Display unit 7001 Display unit 7100 Mobile phone 7101 Housing 7103 Operation button 7104 External connection port 7105 Speaker 7106 Microphone 7107 Camera 7110 Mobile phone 7200 Portable information terminal 7201 Housing 7202 Operation button 7203 Information 7210 Portable information terminal 7300 Television device 7301 Housing 7303 Stand 7311 Remote control operation unit 7400 Lighting device 7401 Base 7403 Operation switch 7411 Light emitting part 7500 Portable information terminal 7501 Housing 7502 Member 7503 Operation button 7600 Portable information terminal 7601 Housing 7602 Hinge 7650 Portable information terminal 7651 Non-display part 7700 Portable information terminal 7701 Housing 7703a Button 7703b Button 7704a Speaker 7704b Speaker 7705 External connection port 7706 Microphone 7709 Battery 7800 Portable Information Terminal 7801 Band 7802 Input / Output Terminal 7803 Operation Button 7804 Icon 7805 Battery 7900 Automobile 7901 Vehicle Body 7902 Wheel 7903 Windshield 7904 Light 7905 Fog Lamp 7910 Display Unit 7911 Display Unit 7912 Display Unit 7913 Display Unit 7914 Display Unit 7915 Display Unit 7916 Display Unit 7917 Display Unit 8000 Housing 8001 Display Unit 8003 Speaker 8101 Housing 8102 Housing 8103 Display Unit 8104 Display Unit 8105 Microphone 8106 Speaker 8107 Operation Key 8108 Stylus 8111 Housing 8112 Display Unit 8113 Keyboard 8114 Pointing Device 8200 Head-Mounted Display 8201 Mounting Part 8202 Lens 8203 Main Body 8204 Display Unit 8205 Cable 8206 Battery 8300 Head-Mounted Display 8301 Housing 8302 Display unit 8303 Operation button 8304 Fixture 8305 Lens 8306 Dial 8400 Camera 8401 Housing 8402 Display unit 8403 Operation button 8404 Shutter button 8406 Lens 8500 Finder 8501 Housing 8502 Display unit 8503 Button

Claims

1. The pixel portion includes a first transistor to a third transistor, a light-emitting element, a signal line, a current supply line, and a wiring, The first transistor has a function of controlling the supply of current from the current supply line to the light-emitting element according to a signal corresponding to image data input to the signal line, One of the source or drain of the second transistor is electrically connected to the signal line, The second transistor has a function of controlling the input of a signal corresponding to the image data to the first transistor, One of the source or drain of the third transistor is electrically connected to the pixel electrode of the light-emitting element, The other of the source or drain of the third transistor is electrically connected to the wiring, and is a light-emitting device, A semiconductor film having a channel formation region of the first transistor, A first conductive film having a region disposed above the semiconductor film and having a function as a gate electrode of the first transistor, A first insulating film having a region disposed above the first conductive film, A second conductive film having a region disposed above the first insulating film and electrically connected to the semiconductor film, A third conductive film having a region disposed above the first insulating film and electrically connected to the semiconductor film, A fourth conductive film having a region disposed above the first insulating film and electrically connected to the first conductive film, A fifth conductive film having a region disposed above the first insulating film and electrically connected to one of the source or drain of the second transistor, A second insulating film having a region disposed above the third conductive film, a region disposed above the fourth conductive film, and a region disposed above the fifth conductive film, A sixth conductive film having a region disposed above the second insulating film, electrically connected to the third conductive film, and having a function as the current supply line, A seventh conductive film having a region disposed above the second insulating film, electrically connected to the fifth conductive film, and having a function as the signal line, The second conductive film is electrically connected to the pixel electrode of the light-emitting element, The sixth conductive film has a shape extending in a first direction across at least two adjacent pixels, The seventh conductive film has a shape extending in the first direction across the at least two adjacent pixels, A light-emitting device.

2. The pixel portion includes a first transistor to a third transistor, a light-emitting element, a signal line, a current supply line, and a wiring, The first transistor has a function of controlling the supply of current from the current supply line to the light-emitting element according to a signal corresponding to image data input to the signal line. One of the source or drain of the second transistor is electrically connected to the signal line. The second transistor has a function of controlling the input of a signal corresponding to the image data to the first transistor. One of the source or drain of the third transistor is electrically connected to the pixel electrode of the light-emitting element. The other of the source or drain of the third transistor is electrically connected to the wiring, and is a light-emitting device, A semiconductor film having a channel formation region of the first transistor; A first conductive film having a region disposed above the semiconductor film and having a function as a gate electrode of the first transistor; A first insulating film having a region disposed above the first conductive film; A second conductive film having a region disposed above the first insulating film and electrically connected to the semiconductor film; A third conductive film having a region disposed above the first insulating film and electrically connected to the semiconductor film; A fourth conductive film having a region disposed above the first insulating film and electrically connected to the first conductive film; A fifth conductive film having a region disposed above the first insulating film and electrically connected to one of the source or drain of the second transistor; An eighth conductive film having a region disposed above the first insulating film and having a function as the wiring; A second insulating film having regions disposed above the third conductive film, above the fourth conductive film, above the fifth conductive film, and above the eighth conductive film; A sixth conductive film having a region disposed above the second insulating film, electrically connected to the third conductive film, and having a function as the current supply line; A seventh conductive film having a region disposed above the second insulating film, electrically connected to the fifth conductive film, and having a function as the signal line. The second conductive film is electrically connected to the pixel electrode of the light-emitting element. The sixth conductive film has a shape extending in a first direction across at least two adjacent pixels. The seventh conductive film has a shape extending in the first direction across the at least two adjacent pixels. Light-emitting device.

3. The pixel portion has a first transistor to a third transistor, a light-emitting element, a signal line, a current supply line, and a wiring. The first transistor has a function of controlling the supply of current from the current supply line to the light-emitting element according to a signal corresponding to image data input to the signal line. One of the source or drain of the second transistor is electrically connected to the signal line. The second transistor has a function of controlling the input of a signal corresponding to the image data to the first transistor. One of the source or drain of the third transistor is electrically connected to the pixel electrode of the light-emitting element. The other of the source or drain of the third transistor is electrically connected to the wiring, and is a light-emitting device, A semiconductor film having a channel formation region of the first transistor; A first conductive film having a region disposed above the semiconductor film and having a function as a gate electrode of the first transistor; A first insulating film having a region disposed above the first conductive film; A second conductive film having a region disposed above the first insulating film and electrically connected to the semiconductor film; A third conductive film having a region disposed above the first insulating film and electrically connected to the semiconductor film; A fourth conductive film having a region disposed above the first insulating film and electrically connected to the first conductive film; A fifth conductive film having a region disposed above the first insulating film and electrically connected to one of the source or drain of the second transistor; A second insulating film having a region disposed above the third conductive film, a region disposed above the fourth conductive film, and a region disposed above the fifth conductive film; A sixth conductive film having a region disposed above the second insulating film, electrically connected to the third conductive film, and having a function as the current supply line; A seventh conductive film having a region disposed above the second insulating film, electrically connected to the fifth conductive film, and having a function as the signal line. The second conductive film is electrically connected to the pixel electrode of the light-emitting element. The sixth conductive film has a region overlapping with the first conductive film. The sixth conductive film has a shape extending in a first direction across at least two adjacent pixels. The seventh conductive film has a shape extending in the first direction across the at least two adjacent pixels. Light-emitting device.

4. The pixel portion has a first transistor to a third transistor, a light-emitting element, a signal line, a current supply line, and a wiring. The first transistor has a function of controlling the supply of current from the current supply line to the light-emitting element according to a signal corresponding to image data input to the signal line. One of the source or drain of the second transistor is electrically connected to the signal line. The second transistor has a function of controlling the input of a signal corresponding to the image data to the first transistor. One of the source or drain of the third transistor is electrically connected to the pixel electrode of the light-emitting element. The other of the source or drain of the third transistor is electrically connected to the wiring, and is a light-emitting device. A semiconductor film having a channel formation region of the first transistor. A first conductive film having a region disposed above the semiconductor film and having a function as a gate electrode of the first transistor. A first insulating film having a region disposed above the first conductive film. A second conductive film having a region disposed above the first insulating film and electrically connected to the semiconductor film. A third conductive film having a region disposed above the first insulating film and electrically connected to the semiconductor film. A fourth conductive film having a region disposed above the first insulating film and electrically connected to the first conductive film. A fifth conductive film having a region disposed above the first insulating film and electrically connected to one of the source or drain of the second transistor. An eighth conductive film having a region disposed above the first insulating film and having a function as the wiring. A second insulating film having a region disposed above the third conductive film, a region disposed above the fourth conductive film, a region disposed above the fifth conductive film, and a region disposed above the eighth conductive film. A sixth conductive film having a region disposed above the second insulating film, electrically connected to the third conductive film, and having a function as the current supply line. It has a region disposed above the second insulating film, and a seventh conductive film that is electrically connected to the fifth conductive film and functions as the signal line. The second conductive film is electrically connected to the pixel electrode of the light-emitting element. The sixth conductive film has a region overlapping with the first conductive film. The sixth conductive film has a shape extending in a first direction across at least two adjacent pixels. The seventh conductive film has a shape extending in the first direction across at least two adjacent pixels. Light-emitting device.

5. A pixel portion includes a first transistor to a third transistor, a light-emitting element, a signal line, a current supply line, and a wiring. The first transistor has a function of controlling the supply of current from the current supply line to the light-emitting element according to a signal corresponding to image data input to the signal line. One of the source or drain of the second transistor is electrically connected to the signal line. The second transistor has a function of controlling the input of a signal corresponding to the image data to the first transistor. One of the source or drain of the third transistor is electrically connected to the pixel electrode of the light-emitting element. The other of the source or drain of the third transistor is electrically connected to the wiring, and is a light-emitting device. A semiconductor film having a channel formation region of the first transistor. A first conductive film having a region disposed above the semiconductor film and functioning as a gate electrode of the first transistor. A first insulating film having a region disposed above the first conductive film. A second conductive film having a region disposed above the first insulating film and electrically connected to the semiconductor film. A third conductive film having a region disposed above the first insulating film and electrically connected to the semiconductor film. A fourth conductive film having a region disposed above the first insulating film and electrically connected to the first conductive film. A fifth conductive film having a region disposed above the first insulating film and electrically connected to one of the source or drain of the second transistor. A second insulating film having a region disposed above the third conductive film, a region disposed above the fourth conductive film, and a region disposed above the fifth conductive film. A sixth conductive film having a region disposed above the second insulating film, being electrically connected to the third conductive film, and having a function as the current supply line; A seventh conductive film having a region disposed above the second insulating film, being electrically connected to the fifth conductive film, and having a function as the signal line; The second conductive film is electrically connected to the pixel electrode of the light-emitting element; The sixth conductive film does not overlap with the channel formation region of the second transistor; The sixth conductive film has a shape extending in a first direction across at least two adjacent pixels; The seventh conductive film has a shape extending in the first direction across the at least two adjacent pixels; A light-emitting device.

6. A pixel portion includes a first transistor to a third transistor, a light-emitting element, a signal line, a current supply line, and a wiring; The first transistor has a function of controlling the supply of current from the current supply line to the light-emitting element according to a signal corresponding to image data input to the signal line; One of the source or drain of the second transistor is electrically connected to the signal line; The second transistor has a function of controlling the input of a signal corresponding to the image data to the first transistor; One of the source or drain of the third transistor is electrically connected to the pixel electrode of the light-emitting element; The other of the source or drain of the third transistor is electrically connected to the wiring, and the light-emitting device; A semiconductor film having a channel formation region of the first transistor; A first conductive film having a region disposed above the semiconductor film and having a function as a gate electrode of the first transistor; A first insulating film having a region disposed above the first conductive film; A second conductive film having a region disposed above the first insulating film and being electrically connected to the semiconductor film; A third conductive film having a region disposed above the first insulating film and being electrically connected to the semiconductor film; A fourth conductive film having a region disposed above the first insulating film and being electrically connected to the first conductive film; A fifth conductive film having a region disposed above the first insulating film and being electrically connected to one of the source or drain of the second transistor; An eighth conductive film having a region disposed above the first insulating film and having a function as the wiring; A second insulating film having a region disposed above the third conductive film, a region disposed above the fourth conductive film, a region disposed above the fifth conductive film, and a region disposed above the eighth conductive film; A sixth conductive film having a region disposed above the second insulating film, being electrically connected to the third conductive film, and having a function as the current supply line; A seventh conductive film having a region disposed above the second insulating film, being electrically connected to the fifth conductive film, and having a function as the signal line; The second conductive film is electrically connected to the pixel electrode of the light-emitting element; The sixth conductive film does not overlap with the channel formation region of the second transistor; The sixth conductive film has a shape extending in a first direction across at least two adjacent pixels; The seventh conductive film has a shape extending in the first direction across at least two adjacent pixels; A light-emitting device. **Claim 7** In any one of Claims 1 to 6, each of the second conductive film to the fifth conductive film has a first film containing titanium or titanium nitride, a second film containing aluminum on the first film, and a third film containing titanium or titanium nitride on the second film; A light-emitting device.

Images