Data encryption method and device, computer device and storage medium
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- ZHEJIANG UNIV
- Filing Date
- 2024-12-17
- Publication Date
- 2026-06-23
AI Technical Summary
In existing technologies, the iterative compression process of the hash algorithm SM3 requires 64 iterations, resulting in an excessively long data encryption cycle, and the delay of the addition carry chain limits the clock frequency.
The compression cycle is shortened by filling the data to be compressed until the preset length is reached, iterating and expanding, selecting the first number of word groups for compression, repeating until the total number of groups reaches the second number, and using a carry-adder retainer to replace the addition operation.
Performing multiple compressions within an iterative compression cycle shortens the time required for data encryption, meets the compression round requirements, and improves the efficiency of data encryption.
Smart Images

Figure CN119945661B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of cryptographic algorithms, and in particular to data encryption methods, apparatus, computer equipment, and storage media. Background Technology
[0002] Modern cryptography plays a vital role in social life and national security, forming the foundation of information network security. Hash algorithms, a type of cryptographic algorithm, can compress messages of arbitrary length into fixed-length values. They are widely used in security scenarios such as data integrity verification, digital signatures and authentication, and random number generation. Currently, internationally used secure hash functions include the SHA-2 (Secure Hash Algorithm 2) and SHA-3 (Secure Hash Algorithm 3) series. To prevent unknown attack risks and backdoors in international hash algorithms, the State Cryptography Administration released the domestically developed hash algorithm SM3 (Commercial Cryptography 3 algorithm) in 2010. It can handle hashes smaller than 2... 64 Bits of data, after message padding, message expansion, and iterative compression, ultimately generate a 256-bit hash value. Compared to software implementations of cryptographic algorithms on general-purpose processors, hardware implementations offer faster processing speeds and higher security, and are typically used as hardware security engines in various security chips. Given the widespread use of the domestically developed hash cryptography algorithm SM3, improving its processing speed at the hardware design level is necessary. The bottleneck of the SM3 hash algorithm lies primarily in the iterative compression process, which requires 64 rounds of compression. Too many rounds lead to excessively long clock cycles. Furthermore, each round of compression involves multiple addition operations, and excessive carry chain latency limits the clock frequency.
[0003] There is currently no effective solution to the problem of long data encryption cycles in related technologies. Summary of the Invention
[0004] Therefore, it is necessary to provide a data encryption method, apparatus, computer equipment, and storage medium that can solve the problem of long data encryption cycles, in order to address the aforementioned technical issues.
[0005] Firstly, this embodiment provides a data encryption method, the method comprising:
[0006] The data to be compressed is padded until the length of the padded data reaches the preset length, thus obtaining the first data.
[0007] The first data is iteratively expanded, and a first number of word groups are selected from the first data after each round of iterative expansion.
[0008] After compressing the target character group selected from the first number of character groups, repeat the following steps until the first number of character groups are all compressed: obtain the compression result and select a new target character group from the character groups of the first data, and compress the compression result and the new target character group;
[0009] If the total number of selected character groups after iterative expansion reaches the second quantity, the iterative expansion of the first data is stopped.
[0010] In some embodiments, after iteratively expanding the first data and selecting a first number of word groups from the first data after each round of iterative expansion, the method further includes:
[0011] If the number of iterations reaches a preset number, new data to be compressed is received from upstream.
[0012] The new data to be compressed is filled until the length of the filled data reaches the preset length, thus obtaining the second data.
[0013] Cache the second data;
[0014] If the iterative expansion of the first data is stopped, the second data is obtained and iterative expansion of the second data is performed.
[0015] In some embodiments, the step of padding the data to be compressed until the length of the padded data reaches a preset length to obtain the first data includes:
[0016] In response to a first signal at a first level, the system receives the data to be compressed input from upstream.
[0017] The data to be compressed is padded until the length of the padded data reaches the preset length, thus obtaining the first data.
[0018] Adjust the first signal to the second level to stop receiving data input from the upstream.
[0019] In some embodiments, the data to be compressed is constructed from at least one data block; the process of padding the data to be compressed until the length of the padded data reaches a preset length to obtain first data includes:
[0020] Sequentially obtain the data blocks from the data to be compressed;
[0021] Upon receiving the last data block of the data to be compressed, determine whether the data in the last data block is valid;
[0022] If all the data in the last data block is valid, then the end of the data to be compressed is filled with the first bit value and the bit value corresponding to the amount of data to be compressed, until the length of the data to be compressed after filling reaches the preset length, thus obtaining the first data;
[0023] If invalid data exists in the last data block, then if the amount of data to be compressed is equal to the specified quantity, a bit value corresponding to the amount of data to be compressed is added to the end of the data to be compressed; if the amount of data to be compressed is not equal to the specified quantity, a second bit value is added to the end of the data to be compressed.
[0024] In some embodiments, after sequentially acquiring the data blocks from the data to be compressed, the method further includes:
[0025] Determine whether the data in at least one of the received data blocks is valid;
[0026] If the data in the data block is valid, then the step of determining whether the data in the last data block is valid is executed when the last data block in the data to be compressed is received.
[0027] In some embodiments, compressing the target word group selected from the word group of the first data includes:
[0028] The first and second functions are obtained based on the iteration and expansion rounds;
[0029] Retrieve predefined working variables, state variables, and constants;
[0030] Obtain the first value calculated based on the first function and the first working variable, and the second value calculated based on the second function on the first state variable;
[0031] The first value, the second working variable, and the first word in the target word group are calculated based on the first carry-adder retainer.
[0032] The second value, the second state variable, and the second word in the target word group are calculated using the second carry-adder retainer.
[0033] The constant quantity, the third working variable, and the third state variable are calculated based on the third carry-adder retainer;
[0034] The compression result is obtained based on the output values of the first carry-adder, the second carry-adder, and the third carry-adder.
[0035] Secondly, this embodiment provides a data encryption device, which includes: a message filling module, a message expansion module, and an iterative compression module; wherein,
[0036] The message filling module is used to fill the data to be compressed until the length of the data to be compressed after filling reaches the preset length, so as to obtain the first data.
[0037] The message expansion module is used to iteratively expand the first data and select a first number of word groups from the first data after each round of iterative expansion; when it is determined that the total number of word groups selected after iterative expansion has reached a second number, the iterative expansion of the first data is stopped.
[0038] The iterative compression module is used to, after acquiring the first number of data and compressing the target word group selected from the word groups of the first data, repeatedly execute the following steps until the first number of word groups are all compressed: acquire the compression result, and compress a new target word group obtained by selecting the compression result and the word groups of the first data.
[0039] In some embodiments, the iterative compression module includes the first number of compressors, each of which is connected in series.
[0040] Thirdly, this embodiment provides a computer device including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the data encryption method described in the first aspect above.
[0041] Fourthly, this embodiment provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the data encryption method described in the first aspect above.
[0042] The aforementioned data encryption method, apparatus, computer equipment, and storage medium, after filling the data to be compressed, select a first number of word groups and iteratively compress the word groups, performing multiple compressions within one iteration expansion cycle; by stopping the iterative expansion when the total number of selected word groups reaches a second number, the compression rounds are ensured to meet the requirements; thus achieving the technical effect of shortening the time required for data encryption. Attached Figure Description
[0043] Figure 1 This is a hardware structure block diagram of a terminal for a data encryption method in one embodiment;
[0044] Figure 2 This is a flowchart illustrating a data encryption method in one embodiment;
[0045] Figure 3 This is a structural block diagram of a data encryption device in one embodiment;
[0046] Figure 4 This is a structural block diagram of a device for implementing the SM3 algorithm in one embodiment;
[0047] Figure 5 This is a timing diagram showing the execution of various modules in a device used to implement the SM3 algorithm in one embodiment;
[0048] Figure 6 This is a schematic diagram of a finite state machine designed for the message filling module in one embodiment;
[0049] Figure 7 This is a schematic diagram illustrating the expansion of the message expansion module in one embodiment;
[0050] Figure 8 This is a schematic diagram of a finite state machine designed for the message extension module in one embodiment;
[0051] Figure 9 This is a schematic diagram of an iterative compression module in one embodiment;
[0052] Figure 10 This is an internal structural diagram of a computer device in one embodiment. Detailed Implementation
[0053] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.
[0054] The method embodiments provided in this example can be executed on a terminal, computer, or similar computing device. For example, it can run on a terminal. Figure 1 This is a hardware structure block diagram of a terminal for a data encryption method according to an embodiment of this application. For example... Figure 1 As shown, a terminal may include one or more ( Figure 1 Only one is shown in the diagram. A processor 102 and a memory 104 for storing data are also included. The processor 102 may be, but is not limited to, a microprocessor (MCU) or a programmable logic device (FPGA). The terminal may also include a transmission device 106 for communication functions and an input / output device 108. Those skilled in the art will understand that… Figure 1 The structure shown is for illustrative purposes only and does not limit the structure of the terminal described above. For example, the terminal may also include components that are larger than... Figure 1 The more or fewer components shown, or having the same Figure 1 The different configurations shown are illustrated.
[0055] The memory 104 can be used to store computer programs, such as application software programs and modules, like the computer program corresponding to the data encryption method in this embodiment. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, thereby implementing the aforementioned method. The memory 104 may include high-speed random access memory and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may further include memory remotely located relative to the processor 102, and these remote memories can be connected to the terminal via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.
[0056] The transmission device 106 is used to receive or send data via a network. This network includes a wireless network provided by the terminal's communication provider. In one example, the transmission device 106 includes a Network Interface Controller (NIC), which can connect to other network devices via a base station to communicate with the Internet. In another example, the transmission device 106 can be a Radio Frequency (RF) module used for wireless communication with the Internet.
[0057] In one embodiment, such as Figure 2 As shown, a data encryption method is provided, which can be applied to... Figure 1 Taking the terminal in the example, the explanation includes the following steps:
[0058] Step S202: Fill the data to be compressed until the length of the data to be compressed after filling reaches the preset length, and obtain the first data.
[0059] The preset length is a multiple of 512. Optionally, the original message input from the upstream is converted into a bit string representation to obtain the data to be compressed. The data to be compressed is padded with preset bit values; the preset bit values include one "1" and multiple "0"s, including: adding a "1" to the end of the data to be compressed as the start of padding, and then appending "0" bits to the data to be compressed. Further, after padding the data to be compressed with the preset bit values, a length field is added to the end of the data to be compressed, indicating the length of the original message input from the upstream.
[0060] Step S204: Iteratively expand the first data, and select the first number of word groups from the first data after each round of iterative expansion.
[0061] Iterative expansion, also known as message expansion, refers to transforming the first data multiple times through bitwise operations, circular shifts, and other methods, thereby increasing the amount of data while improving the security of the data encryption method.
[0062] Optionally, the first data is iteratively expanded once within a time period, including: dividing the first data into multiple message blocks, each message block consisting of multiple bits. The value of the message block before iteration is denoted as W. t Additional message blocks are generated based on each message block through bitwise operations and circular shifts, and their values are denoted as W. t '. Combining W t and W t 'Select the first number of character groups. For example, when the first number is 2, and each character group contains two values, two character groups can be selected, namely character groups W0 and W0'; W1 and W1'. It can be understood that the first number and the number of values contained in each character group can be modified according to actual needs.'
[0063] Step S206: After compressing the target character group selected from the first number of character groups, repeat the following steps until the first number of character groups are all compressed: obtain the compression result and select a new target character group from the character group of the first data, and compress the compression result and the new target character group.
[0064] Specifically, word groups can be iteratively compressed using a preset compression function, and the data encryption result is obtained through multiple cycles of iterative compression. Optionally, after receiving the first number of word groups, the scheme of step S206 is executed within one clock cycle so that the first number of word groups are all compressed.
[0065] Optionally, iterative compression is performed using multiple serially connected compressors, the number of compressors being the same as the first number; each compressor contains the same compression function. The following steps are repeated until the first number of word groups are compressed: a target word group is selected from the word groups of the first data and input into the first compressor for compression; the compression result output by that compressor and the new target word group are used as the input to the next compressor to obtain a new compression result.
[0066] Step S208: If it is determined that the total number of selected character groups after iterative expansion has reached the second quantity, stop iterative expansion of the first data.
[0067] The second quantity is the same as the number of compression rounds required. When the total number of word groups reaches the second quantity, the compression of the data to be compressed is considered complete. Optionally, taking a 64-round compression as an example, when the first quantity is 3 and the total number of selected word groups reaches 64, the iterative compression of the data can be completed within 22 clock cycles. In the last clock cycle, the number of selected word groups can be set to 1, so that the total number of word groups equals the second quantity. Compared to the traditional technique that requires 64 cycles for 64 compressions, this significantly shortens the compression time.
[0068] In the above data encryption method, by selecting a first number of word groups and iteratively compressing the word groups, the effect of performing multiple compressions within one iterative compression cycle is achieved. Through multiple iterations, the total number of selected word groups reaches a second number, ensuring that the compression rounds meet the requirements and achieving the technical effect of shortening the time required for data encryption.
[0069] In one embodiment, after iteratively expanding the first data and selecting a first number of word groups from the first data after each round of iterative expansion, the method further includes: when it is determined that the number of iterative expansions has reached a preset number, receiving new data to be compressed from upstream; filling the new data to be compressed until the length of the filled data reaches a preset length to obtain second data; caching the second data; and when iterative expansion of the first data stops, obtaining the second data and iteratively expanding the second data.
[0070] The preset number of iterations can be set based on the time period required for iterative expansion of the first data and the time period required for filling the data to be compressed. For ease of understanding, taking a second data quantity of 22 (meaning iterative expansion requires 22 time periods and message filling requires 8 time periods) as an example, the preset number of iterations can be set to less than or equal to 13. This allows for a new round of iterative expansion and compression calculations on the cached second data immediately after the first data iteration is completed. If the preset number of iterations is set to more than 13, the time period required for iterative expansion and compression of the second data will increase accordingly. Optionally, a register can be set to cache the second data by placing it in the register.
[0071] In this embodiment, by acquiring new data to be compressed before the iterative expansion is completed, and caching the filled data to be compressed, i.e. the second data, the time required for data encryption when continuously receiving data to be compressed is reduced.
[0072] In one embodiment, padding the data to be compressed until the length of the padded data reaches a preset length to obtain first data includes: receiving the data to be compressed from upstream in response to a first signal at a first level; padding the data to be compressed until the length of the padded data reaches a preset length to obtain first data; and adjusting the first signal to a second level to stop receiving the data input from upstream.
[0073] Optionally, the first level is set to high and the second level is set to low. Taking the first signal as denoted as pad_ready, by outputting the pad_ready signal upstream, a high level indicates that the data to be compressed can be received; when the first data obtained after padding reaches 512 bits, the pad_ready signal is pulled low to indicate that the upstream data to be compressed is not accepted. It is understood that, depending on the application requirements, the first level can also be set to low and the second level to high.
[0074] Furthermore, after adjusting the first signal to the second level, if the number of iterations reaches a preset number, the level of the first signal can be converted back to the first level to receive new data to be compressed again; until the new data to be compressed is filled, the level of the first signal is converted back to the second level.
[0075] In this embodiment, the input of upstream messages is controlled by the first signal to avoid the upstream information affecting message expansion and causing inaccurate data during compression.
[0076] In one embodiment, a second signal can also be set to transmit the padded data to be compressed. The process involves: filling the data to be compressed using a message filling module until the padded data reaches a preset length, obtaining first data; iteratively expanding the first data using a message expansion module, selecting a first number of word groups from the first data after each iteration; stopping the iterative expansion of the first data when the total number of word groups selected after iterative expansion reaches a second number; and receiving the first data generated by the message filling module in response to a second signal at a first level. Once all the first data has been transmitted to the message expansion module, the second signal is adjusted to a second level to stop receiving data output from the message filling module. When the number of iterative expansions reaches a preset number, the second signal is adjusted to a second level to receive data output from the message expansion module again. Controlling the input and expansion of upstream messages using the second signal avoids inaccurate data during compression due to the influence of upstream inputs during message expansion.
[0077] In one embodiment, padding the data to be compressed based on preset bit values includes: sequentially acquiring data blocks from the data to be compressed; upon receiving the last data block, determining whether the data in the last data block is valid; if all the data in the last data block is valid, padding the end of the data to be compressed with a first bit value and a bit value corresponding to the data size of the data to be compressed, until the length of the data to be compressed after padding reaches a preset length, thus obtaining the first data. If invalid data exists in the last data block, if the data size of the data to be compressed is equal to a specified number, padding the end of the data to be compressed with a bit value corresponding to the data size of the data to be compressed; if the data size of the data to be compressed is not equal to the specified number, padding the end of the data to be compressed with a second bit value.
[0078] After obtaining the data to be compressed, the data to be compressed can be converted into multiple data blocks. The converted data blocks are obtained sequentially in time periodic units, and data filling is performed after all the data to be compressed is obtained.
[0079] The first bit value is obtained based on the padding requirements of the compression algorithm being executed. When executing the SM3 algorithm, the first bit value includes one "1" and k "0"s, such that padding with one "1" and k "0"s satisfies the condition that l+1+k≡448mod 512 is the smallest non-negative integer, where l is the data length of the bit value corresponding to the amount of data to be compressed.
[0080] Optionally, when the preset length is 512 bits and the data to be compressed is divided into multiple data blocks in units of 64 bits: when adding the first bit value, a portion of the first bit value is added first, including one "1" and several "0"s. Then, it is determined whether all three of the following conditions are met: the preset extension condition is met, the padded portion of the first bit value is valid, and the data to be compressed after the padded portion of the first bit value still needs to be padded with data of 2 data block lengths. If all three conditions are met, a 64-bit string is padded to the end of the data to be compressed, representing the amount of data to be compressed before padded. If the preset extension condition and the padded portion of the first bit value are met, but the data length to be padded after the padded portion of the first bit value is not equal to 2 data blocks, several sets of "0" strings are padded to the end of the data to be compressed, each set of "0" strings representing 64 "0"s. After filling several sets of "0" strings, if the data to be compressed after filling the first bit value still needs to be filled with a data length equal to 2 data blocks, a 64-bit bit string is filled at the end of the data to be compressed. The bit string represents the amount of data to be compressed before filling.
[0081] The preset expansion condition indicates that iterative expansion of the first data is currently possible. Optionally, the message expansion module and the message filling module perform a handshake. If the handshake is successful, it is determined that the preset expansion condition is met; otherwise, it is determined that the preset expansion condition is not met. Optionally, the preset expansion condition is determined to be met if iterative expansion of the first data has not started, or if the number of iterative expansions has reached a preset number; if iterative expansion of the first data has started but the number of iterative expansions has not reached the preset number, it is determined that the preset expansion condition is not met.
[0082] The second bit value is obtained based on the padding requirements of the compression algorithm being executed. When executing the SM3 algorithm, the second bit value includes multiple "0"s, the number of which is determined by the difference between the amount of data to be compressed and the preset length. The specified number can be determined based on the state machine used to pad the data to be compressed. Optionally, the preset length is 512 bits, and the data to be compressed is divided into multiple data blocks in 64-bit units; the specified number is set to 12 words. Counting begins after receiving a data block. If invalid data exists in the last data block when 12 words have been counted, a 64-bit bit string is padded to the end of the data to be compressed, representing the amount of data to be compressed before padding. If invalid data exists in the last data block before 12 words have been counted, several sets of the second bit value are padded to the end of the data to be compressed until the final two data blocks need to be padded.
[0083] In this embodiment, the number of bits to be filled is determined based on the amount of data to be compressed, so that the first data obtained after filling meets the filling requirements of the data encryption algorithm.
[0084] Furthermore, in one embodiment, after sequentially acquiring data blocks from the data to be compressed, the method further includes: determining whether the data in at least one received data block is valid; if the data in the data block is valid, then performing the step of determining whether the data in the last data block is valid when the last data block from the data to be compressed is received.
[0085] Optionally, if invalid data is detected in the received data block, the following step is not output: If the last data block of the data to be compressed is received, determine whether the data in the last data block is valid. If all data in the received data block is valid, receive the next data block until the last data block is received, and then execute the step: determine whether the data in the last data block is valid. In this embodiment, valid data is ensured by verifying the input data during the data block reception process, thus improving the stability of the data encryption method.
[0086] In one embodiment, compressing a target word group selected from the word group of the first data includes: obtaining a first function and a second function according to the iteration expansion rounds; obtaining predefined working variables, state variables, and constant quantities; obtaining a first value calculated based on the first function and the first working variable, and a second value calculated based on the second function on the first state variable; calculating the first value, the second working variable, and the first word in the target word group according to a first carry-adder; calculating the second value, the second state variable, and the second word in the target word group according to a second carry-adder; calculating the constant quantity, the third working variable, and the third state variable according to a third carry-adder; and obtaining the compression result based on the output values of the first carry-adder, the second carry-adder, and the third carry-adder.
[0087] Here, the first function and the second function are preset functions. Optionally, during the compression process, the first and second functions are called based on their function signatures. The first and second functions may be the same or different in different iterative expansion rounds. Optionally, the first working variable is used as the input to the first function to obtain the first output value. The first state variable is used as the input to the second function to obtain the second output value.
[0088] For example, an initial value is obtained and assigned to eight 32-bit data A. i ~H i With A i ~H i Calculate A i+1 ~H i+1 For example, the calculation formula is as follows:
[0089] 1. B i+1 =A i
[0090] 2. C i+1 =B i <<<9
[0091] 3. D i+1 =C i
[0092] 4. F i+1 =E i
[0093] 5. G i+1 =F i <<<19
[0094] 6. H i+1 =G i
[0095] 7. [s0,c0]=CSA0(FF(A i Bi C i ),D i W i ')
[0096] 8. t0 = s0 + (c0 << 1)
[0097] 9. [s1,c1]=CSA1(A i <<<12,E i ,T i )
[0098] 10. t1 = (s1 + (c1 << 1)) << < 7
[0099] 11. [s2,c2]=CSA2(GG(E i ,F i G i ),H i W i )
[0100] 12. t² = s² + (c² << 1)
[0101] 13. t3 = A i <<<12⊕t1
[0102] 14. A i+1 =t0+t3
[0103] 15. E i+1 =P0(t1+t2)
[0104] Among them, A i B i C i D i For predefined working variables; E i F i G i H i For predefined state variables; T i `i` is a predefined constant; `i` is a positive integer representing the iteration round of compression. The first working variable is `A`. i B i C i The first state variable is E. i ,F i G i The first function is FF; the first value is FF(A) i B i C i The second function is GG; the second value is GG(E). i ,F i G i ); Predefined constant Ti The second working variable is D. i The first character is W. i The second state variable is H. i The second character is W. i .
[0105] In this embodiment, when a carry-adder is used instead of addition, three operands can be processed at once, thereby reducing the number of additions. By reducing the delay of the critical path, the circuit delay caused by addition operations is shortened.
[0106] Based on the same inventive concept, this application also provides a data encryption device for implementing the data encryption method described above. The solution provided by this device is similar to the implementation described in the above method; therefore, the specific limitations in one or more data encryption device embodiments provided below can be found in the limitations of the data encryption method described above, and will not be repeated here.
[0107] In one embodiment, such as Figure 3 As shown, a data encryption device is provided, including: a message filling module, a message expansion module, and an iterative compression module; wherein,
[0108] The message filling module is used to fill the data to be compressed until the length of the data to be compressed after filling reaches the preset length, and then obtain the first data.
[0109] The message expansion module is used to iteratively expand the first data and select a first number of word groups from the first data after each round of iterative expansion; when it is determined that the total number of word groups selected after iterative expansion has reached a second number, the iterative expansion of the first data is stopped.
[0110] The iterative compression module is used to obtain a first number of data; after compressing the target word group selected from the word group of the first data, repeat the following steps until the first number of word groups are all compressed: obtain the compression result, and compress the new target word group obtained by selecting the word group of the compression result and the word group of the first data.
[0111] In some embodiments, the iterative compression module includes a first number of compressors connected in series. The compressors in the iterative compression module can perform the same number of compression operations within a time period as the first number.
[0112] In some embodiments, after iteratively expanding the first data and selecting a first number of word groups from the first data after each round of iterative expansion, the message filling module is further configured to: receive new data to be compressed from upstream when it is determined that the number of iterative expansions has reached a preset number; fill the new data to be compressed until the length of the filled data reaches a preset length to obtain the second data; cache the second data; and obtain the second data and iteratively expand the second data when iterative expansion of the first data stops.
[0113] In some embodiments, the data to be compressed is constructed from at least one data block; the message filling module fills the data to be compressed until the length of the filled data to be compressed reaches a preset length to obtain first data, including: sequentially acquiring data blocks in the data to be compressed; when the last data block in the data to be compressed is received, determining whether the data in the last data block is valid; if all the data in the last data block is valid, then filling the end of the data to be compressed with a first bit value and a bit value corresponding to the data size of the data to be compressed, until the length of the filled data to be compressed reaches the preset length to obtain first data; if there is invalid data in the last data block, then if the data size of the data to be compressed is equal to a specified number, filling the end of the data to be compressed with a bit value corresponding to the data size of the data to be compressed; if the data size of the data to be compressed is not equal to the specified number, then filling the end of the data to be compressed with a second bit value.
[0114] Optionally, after sequentially acquiring data blocks from the data to be compressed, the message filling module is further configured to: determine whether the data in at least one received data block is valid; if the data in the data block is valid, then perform the step of determining whether the data in the last data block is valid when the last data block in the data to be compressed is received.
[0115] In some embodiments, the message expansion module fills the data to be compressed until the length of the filled data reaches a preset length to obtain first data; including: receiving the data to be compressed from upstream in response to a first signal of a first level; filling the data to be compressed until the length of the filled data reaches a preset length to obtain first data; and adjusting the first signal to a second level to stop receiving the data input from upstream.
[0116] In some embodiments, the iterative compression module compresses a target word group selected from the word group of the first data, including: obtaining a first function and a second function according to the iteration expansion rounds; obtaining predefined working variables, state variables, and constant quantities; obtaining a first value calculated based on the first function and the first working variable, and a second value calculated based on the second function on the first state variable; calculating the first value, the second working variable, and the first word in the target word group according to a first carry-adder; calculating the second value, the second state variable, and the second word in the target word group according to a second carry-adder; calculating the constant quantity, the third working variable, and the third state variable according to a third carry-adder; and obtaining the compression result based on the output values of the first carry-adder, the second carry-adder, and the third carry-adder.
[0117] Each module in the aforementioned data encryption device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device, or stored in the memory of a computer device as software, so that the processor can call and execute the operations corresponding to each module.
[0118] In one embodiment, combined Figure 3 The device and peripheral input module shown can implement the SM3 algorithm. Figure 4 A structural block diagram of a device for implementing the SM3 algorithm is provided, such as... Figure 4 As shown, the apparatus for implementing the SM3 algorithm includes a message filling module, a message expansion module, and an iterative compression module. This apparatus is also connected to an external input module. The external input module, acting as the upstream of the message filling module, inputs the original message (i.e., the data to be compressed in the above embodiment) into the message filling module via a FIFO (First Input First Output) queue. After processing by the message filling module, message expansion module, and iterative compression module, the original message outputs data hash_res processed by the SM3 algorithm.
[0119] In this system, when the first signal input upstream by the message filling module, namely the pad_ready signal, is high, it indicates that the FIFO can input data into the message filling module. The FIFO inputs 64 bits (8 bytes) of data into the message filling module each cycle. Simultaneously, the external input module uses msg_keep to indicate the validity of each byte (1 for valid, 0 for invalid); msg_valid to indicate whether the input data is valid; msg_last to indicate whether the input data is the last group; and msg_data to indicate the 64 bits (8 bytes) of input data. Optionally, the number of bits input to the message filling module per clock cycle can be changed by adjusting the data interface between the external input module and the message filling module. Since the SM3 algorithm processes a maximum of 512 bits (64 bytes) at a time, taking the FIFO inputting 64 bits per cycle as an example, it requires 8 clock cycles to complete the message filling process.
[0120] After the message filling module fills the original message, it sends the filled data to the message expansion module when the message expansion module outputs a second signal (expand_ready signal is high). The message expansion module then expands the message based on the received data, a process that lasts for 22 clock cycles. Simultaneously with the message expansion module outputting the second signal, the message filling module outputs pad_valid to indicate that the input fill block is valid; pad_data to indicate the data input from the message filling module to the message expansion module; and pad_last to indicate the last data input from the message filling module to the message expansion module.
[0121] After the message expansion module expands the padded data for one clock cycle, it selects a specified number of words from the expanded data and combines them into a group. At least two such groups are then input to the iterative compression module. The iterative compression also takes 22 clock cycles, but lags behind the message expansion by one clock cycle. The message expansion module outputs the `expand_valid` signal to indicate the validity of the data it outputs to the iterative compression module; `expand_data` represents the data input from the message expansion module to the iterative compression module; and `expand_last` represents the last data input from the message expansion module to the iterative compression module.
[0122] Furthermore, when there are a large number of 512-bit message blocks to be processed, the message filling module can be notified to send a new round of data before the current bit block has completed its iterative compression calculation, and the incoming data can be cached in the message expansion module. In this way, the clock cycle required for a new round of 512-bit block message filling can be hidden, which allows the iterative compression module to start a new round of iterative compression calculation immediately after completing the iterative compression calculation of the current bit block. Figure 5 This is a timing diagram showing the execution of each module in a device for implementing the SM3 algorithm in this embodiment, as follows: Figure 5 As shown, taking the FIFO inputting 64 bits to the message filling module in each cycle as an example, apart from the first time the original message corresponding bit block is received from the external input module, which requires 31 clock cycles (clk) for data compression, each subsequent new original message corresponding bit block only requires 22 clock cycles (clk) for compression.
[0123] The methods executed in the message filling module, message expansion module, and iterative compression module will be described in turn below.
[0124] The message padding module pads the received original message. Optionally, assuming the length of the original message m is l (in bits), the message padding steps include: first, adding a bit "1" to the end of the message; then adding k "0"s, where k is the smallest non-negative integer satisfying l+1+k≡448mod 512; finally, adding a 64-bit bit string, which is the binary representation of length l. In this embodiment, setting both the input and output data of the message padding module to 64 bits ensures alignment with 64-bit data during padding.
[0125] Whenever the length of the first data obtained after the message filling module fills reaches 512 bits, it pulls the pad_ready signal low to inform the upstream input module FIFO that the message filling module is not ready to receive new data; conversely, it pulls the pad_ready signal high to inform the upstream input module FIFO that the message filling module is ready to receive new data.
[0126] The message filling module uses a finite state machine to fill in the data. Figure 6 A schematic diagram of the finite state machine designed for the message filling module, as shown below. Figure 6As shown, the finite state machine designed for the message filling module contains a total of 6 states: IDLE represents the idle state, DATA_OUT represents directly outputting the 64 bits of data passed from upstream, DATA_LAST represents outputting the last block of the original message, PAD_00 represents outputting 64 "0"s, PAD_10 represents outputting 1 "1" and 63 "0"s, and PAD_LEN represents the length of the original message. The transition relationships between these states are shown in Table 1.
[0127] Table 1. Transitions of the Finite State Machine in the Message Filling Module
[0128] Current status Jump conditions Next state IDLE msg_valid&~msg_last DATAOUT IDLE msg_valid&msg_last DATA_LAST DATA_OUT msg_valid&msg_last DATA_LAST DATA_LAST word_cnt==12&~(&msg_keep) PAD_LEN DATA_LAST word_cnt! =12&~(&msg_keep) PAD_00 DATA_LAST &msg_keep PAD_10 PAD_10 pad_valid&expand_ready&need_pad_cnt==2 PAD_LEN PAD_10 pad_valid&expand_ready&need_pad_cnt! =2 PAD_00 PAD_00 need_pad_cnt==2 PAD_LEN
[0129] Here, msg_valid indicates that the input data is valid; the original message input from the upstream will be divided into multiple data blocks based on the settings of the message filling module's input interface; msg_last indicates that the input data is the last data block of the original message; ~msg_last indicates that the input data is not the last data block of the original message; word_cnt indicates the count of the input words; &msg_keep indicates that all 8 bytes of the last data block are valid; ~(&msg_keep) indicates that there are invalid bytes in the last data block; pad_valid indicates that the padding block output by the message filling module is valid; expand_ready indicates that the message expansion module is ready to receive the data output by the message filling module; need_pad_cnt indicates the number of blocks that still need to be filled in the message filling module.
[0130] Specifically, for the message expansion module, it begins operation after the message filling module sends 16 characters to it. Optionally, the 16 characters are denoted as W0, W1, W2, ..., W... 15 The extension can be achieved using the following extension function. Specifically, W is obtained by extending W in the manner described in equation (1). 16 W 17 ,…,W 67 ; W0', W1'...W are obtained by expanding according to the following formula (2). 63 '.
[0131]
[0132] The message expansion module will expand by 3 words within one clock cycle. Figure 7 A schematic diagram of the message extension module expansion is provided, such as... Figure 7As shown, in the first clock cycle, W0, W1, W2, and the expanded W0', W1', W2' can be extracted using the expansion function, and word groups can be constructed from W0, W1, W2, W0', W1', and W2'. Optionally, the first quantity is set to 3, resulting in three groups: W0 and W0'; W1 and W1'; and W2 and W2'. After constructing the word groups, the message expansion module sends the extracted word groups to the downstream iterative compression module in the next clock cycle. Optionally, the three groups, totaling six words, are sent to the iterative compression module, where they are used as the message words required for the compression function calculation in the iterative compression module.
[0133] Optionally, the message expansion module also includes an 8-word register, which can be used to cache the data output by the message filling module in the new round, so that the iterative compression module can start a new round of calculation immediately after completing the iterative compression calculation of the current 512-bit block.
[0134] The message expansion module uses a finite state machine to populate the data. Figure 8 The finite state machine designed for the message expansion module is shown, containing three states: REC_DATA indicates that the message expansion module receives data from the message filling module; EXPAND_OUT indicates that the message expansion module expands the message while simultaneously sending compressed words to the iterative compression module; and PRELOAD indicates that the module receives the filling message for the next 512-bit block before the current 512-bit block processing is complete. The transition relationships between these states are shown in Table 2 below.
[0135] Table 2. Transitions in the Finite State Machine of the Message Extension Module
[0136] Current status Jump conditions Next state REC_DATA pad_data_cnt==14 EXPAND_OUT EXPAND_OUT clk_cnt==13&pad_valid PRELOAD EXPAND_OUT clk_cnt==21 REC_DATA PRELOAD clk_cnt==21 EXPAND_OUT
[0137] Among them, pad_data_cnt is the counter for the padding block input by the message padding module; clk_cnt is the clock counter after the message expansion module enters the expansion state; pad_valid indicates that the input padding block is valid.
[0138] Specifically, for the iterative compression module, the iterative compression module begins operation after the message expansion module transmits the first number of word groups to iterative compression. Optionally, Figure 9 A schematic diagram of an iterative compression module is provided, such as... Figure 9 As shown on the left, the iterative compression module consists of three compressors: compressor 1, compressor 2, and compressor 3. Figure 9As shown on the right, the operational logic of each compressor is the same. CSA0, CSA1, and CSA2 are three carry-save-adders (CSAs) in the iterative compression module. In the compression function, the combinational logic involved in calculating the values of A and E from the current values of A to H is the most complex, and these are the two critical paths in the circuit implementation. To reduce the latency of the critical paths, that is, to shorten the circuit delay caused by addition operations, carry-save-adders are used to replace addition, which can process three operands at once, thereby reducing the number of additions. The critical path latency of one compressor is the sum of the latency of one CSA and two adders. In actual circuit implementation, a total of three CSAs and five adders are required.
[0139] based on Figure 9 The iterative compression module shown can merge three rounds of round functions into one round and complete it within one clock cycle. The SM3 algorithm requires a total of 64 rounds of iterative calculations for the compression function. Since three rounds of round function compression are performed per clock cycle, the entire iterative compression operation can be completed in 22 clock cycles. Specifically, in the 22nd clock cycle, only one compression function calculation and XOR with the result of the previous round are needed to complete the entire iterative compression calculation. Furthermore, other numbers of serially connected compressors can be set in the iterative compression module.
[0140] The SM3 algorithm is a modification of the SHA-256 algorithm, both requiring three steps: message stuffing, message expansion, and iterative compression. The first two steps of both involve bit shifting and Boolean operations, while the iterative compression process requires multiple addition operations, resulting in a significant carry delay chain. Traditional optimization methods for the iterative compression step include rewriting the compression function and inserting registers on the critical path to increase the computation frequency. Another method is to merge multiple compression rounds into a single round using loop unrolling. Unlike traditional methods, the iterative compression module in this embodiment employs a round-based compression approach, completing multiple iterative compression calculations within one clock cycle, thus shortening the computation time required for iterative compression.
[0141] Meanwhile, traditional techniques only consider optimizing the iterative compression process, neglecting the impact of message padding and message expansion on subsequent iterative compression. In this embodiment, by placing a message buffer in the message expansion module, the message padding module can pre-input data into the message expansion module when each group of iterative compression is about to be completed. The purpose is to immediately start the iterative compression calculation of the next group of 512 bits after completing the iterative compression of the current 512-bit group. Furthermore, in the hardware design of the device used to implement the SM3 algorithm in this embodiment, the dependency relationship between message padding and message expansion in the SM3 algorithm is fully considered. Therefore, when the message being hashed is very long, the average processing time for each 512-bit group will be significantly shortened, further reducing the processing time required by the SM3 algorithm.
[0142] The modules in the aforementioned apparatus for implementing the SM3 algorithm can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device, or stored in the memory of a computer device in software form, so that the processor can call and execute the operations corresponding to each module.
[0143] In one embodiment, a computer device is provided, which may be a terminal, and its internal structure diagram may be as follows: Figure 10 As shown, the computer device includes a processor, memory, input / output interfaces, a communication interface, a display unit, and an input device. The processor, memory, and input / output interfaces are connected via a system bus, and the communication interface, display unit, and input device are also connected to the system bus via the input / output interfaces. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The input / output interfaces are used for exchanging information between the processor and external devices. The communication interface is used for wired or wireless communication with external terminals; wireless communication can be achieved through Wi-Fi, mobile cellular networks, NFC (Near Field Communication), or other technologies. When the computer program is executed by the processor, it implements a data encryption method. The display unit is used to form a visually visible image and can be a display screen, projection device, etc. The display screen can be an LCD screen or an e-ink screen. The input device of the computer device can be a touch layer covering the display screen, or buttons, trackballs, or touchpads set on the casing of the computer device, or external keyboards, touchpads, or mice, etc.
[0144] Those skilled in the art will understand that Figure 10The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.
[0145] In one embodiment, a computer device is also provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps in the above method embodiments.
[0146] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon that, when executed by a processor, implements the steps in the above method embodiments.
[0147] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, implements the steps in the above method embodiments.
[0148] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, etc., and are not limited to these.
[0149] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0150] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.
Claims
1. A data encryption method, characterized in that, The method includes: The data to be compressed is padded until the length of the padded data reaches the preset length, thus obtaining the first data. The first data is iteratively expanded, and a first number of word groups are selected from the first data after each round of iterative expansion. After compressing the target character group selected from the first number of character groups, repeat the following steps until the first number of character groups are all compressed: obtain the compression result and select a new target character group from the character groups of the first data, and compress the compression result and the new target character group; If the total number of selected character groups after iterative expansion reaches the second number, stop iteratively expanding the first data; The compression of the target character group selected from the first number of character groups includes: The first and second functions are obtained based on the iteration and expansion rounds; Retrieve predefined working variables, state variables, and constants; Obtain the first value calculated based on the first function and the first working variable, and the second value calculated based on the second function on the first state variable; The first value, the second working variable, and the first word in the target word group are calculated based on the first carry-adder retainer. The second value, the second state variable, and the second word in the target word group are calculated using the second carry-adder retainer. The constant quantity, the third working variable, and the third state variable are calculated based on the third carry-adder retainer; The compression result is obtained based on the output values of the first carry-adder, the second carry-adder, and the third carry-adder. The predefined working variable is A. i B i C i and D i The first working variable is A. i B i and C i The second working variable is D. i The third working variable is A. i .
2. The method according to claim 1, characterized in that, After iteratively expanding the first data and selecting a first number of word groups from the first data after each round of iterative expansion, the method further includes: If the number of iterations reaches a preset number, new data to be compressed is received from upstream. The new data to be compressed is filled until the length of the filled data reaches the preset length, thus obtaining the second data. Cache the second data; If the iterative expansion of the first data is stopped, the second data is obtained and iterative expansion of the second data is performed.
3. The method according to claim 1, characterized in that, The process of filling the data to be compressed until the length of the filled data reaches a preset length to obtain the first data includes: In response to a first signal at a first level, the system receives the data to be compressed input from upstream. The data to be compressed is padded until the length of the padded data reaches the preset length, thus obtaining the first data. Adjust the first signal to the second level to stop receiving data input from the upstream.
4. The method according to claim 1 or 3, characterized in that, The data to be compressed is constructed from at least one data block; The process of filling the data to be compressed until the length of the filled data reaches a preset length to obtain the first data includes: Sequentially obtain the data blocks from the data to be compressed; Upon receiving the last data block of the data to be compressed, determine whether the data in the last data block is valid; If all the data in the last data block is valid, then the end of the data to be compressed is filled with the first bit value and the bit value corresponding to the amount of data to be compressed, until the length of the data to be compressed after filling reaches the preset length, thus obtaining the first data; If invalid data exists in the last data block, then if the amount of data to be compressed is equal to the specified quantity, a bit value corresponding to the amount of data to be compressed is added to the end of the data to be compressed; if the amount of data to be compressed is not equal to the specified quantity, a second bit value is added to the end of the data to be compressed.
5. The method according to claim 4, characterized in that, After sequentially acquiring the data blocks from the data to be compressed, the method further includes: Determine whether the data in at least one of the received data blocks is valid; If the data in the data block is valid, then the step of determining whether the data in the last data block is valid is executed when the last data block in the data to be compressed is received.
6. A data encryption device, characterized in that, The device includes: a message filling module, a message expansion module, and an iterative compression module; wherein... The message filling module is used to fill the data to be compressed until the length of the data to be compressed after filling reaches the preset length, so as to obtain the first data. The message expansion module is used to iteratively expand the first data and select a first number of word groups from the first data after each round of iterative expansion; when it is determined that the total number of word groups selected after iterative expansion has reached a second number, the iterative expansion of the first data is stopped. The iterative compression module is used to, after acquiring the first number of data and compressing the target word group selected from the word group of the first data, repeatedly execute the following steps until the first number of word groups are all compressed: acquire the compression result, and select a new target word group from the compression result and the word group of the first data for compression. The iterative compression module is further configured to: obtain a first function and a second function according to the iteration expansion rounds; obtain predefined working variables, state variables, and constant quantities; obtain a first value calculated based on the first function and the first working variable, and a second value calculated based on the second function on the first state variable; calculate the first value, the second working variable, and the first word in the target word group using a first carry-adder; calculate the second value, the second state variable, and the second word in the target word group using a second carry-adder; calculate the constant quantity, the third working variable, and the third state variable using a third carry-adder; and obtain the compression result based on the output values of the first carry-adder, the second carry-adder, and the third carry-adder; wherein the predefined working variable is A. i B i C i and D i The first working variable is A. i B i and C i The second working variable is D. i The third working variable is A. i .
7. The apparatus according to claim 6, characterized in that, The iterative compression module includes the first number of compressors, and each compressor is connected in series.
8. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 5.
9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 5.
Citation Information
Patent Citations
CN112367158A