Error code detection method and device for data transmission link and electronic equipment

Abstract

The invention relates to the technical field of data centers, in particular to an error code detection method and device for a data transmission link and electronic equipment, and the method comprises the steps: determining a plurality of operation scenes of the data transmission link; setting a plurality of error code counting periods and corresponding error code counting thresholds according to the plurality of operation scenes; and obtaining the error code count of the data transmission link in the error code counting period, and determining the error code detection results of the data transmission link in the plurality of operation scenes based on the error code counts corresponding to the plurality of error code counting periods and the error code count threshold. Therefore, the problems of poor applicability of data transmission link error code detection and the like in related technologies are solved.

Description

Technical Field

[0001] The present application relates to the technical field of data centers, and in particular to a method, device and electronic equipment for detecting bit errors in a data transmission link. Background Art

[0002] The data transmission link is a physical path for transmitting data in a data communication system. It is the medium for transmitting data from the sending end to the receiving end. In actual use, errors may occur in the data transmission link when transmitting data, resulting in bit errors. In related technologies, when it is detected that the bit error of the data transmission link reaches the bit error threshold, the data transmission link is actively disconnected for fault isolation.

[0003] However, for devices connected by data transmission links, especially those that need to run for a long time, if the bit error threshold is too low, long-term accumulation may cause the bit error count to gradually exceed the bit error count threshold, triggering unnecessary link disconnection; on the contrary, if the bit error count threshold is too high, it may not be possible to promptly detect and respond to the rapid increase of bit errors in a short period of time, resulting in failure to effectively isolate the fault. Summary of the invention

[0004] The present application provides a method, device and electronic device for detecting a bit error in a data transmission link, so as to solve technical problems such as poor applicability of bit error detection in a data transmission link in related technologies.

[0005] The first aspect of the present application provides a method for detecting a bit error of a data transmission link, comprising the following steps: determining multiple operating scenarios of the data transmission link; setting multiple bit error counting periods and corresponding bit error counting thresholds according to the multiple operating scenarios; obtaining the bit error count of the data transmission link within the bit error counting period, and determining the bit error detection results of the data transmission link under the multiple operating scenarios based on the bit error counts and the bit error counting thresholds corresponding to the multiple bit error counting periods.

[0006] Optionally, the data transmission link includes an uplink port and a downlink port, and further includes: setting a plurality of bit error counting periods for the uplink port and the downlink port respectively.

[0007] Optionally, based on the error counts and error count thresholds corresponding to multiple error counting periods, the error detection results of the data transmission link in multiple operating scenarios are determined, including: within the error counting periods corresponding to the multiple operating scenarios, calculating the count difference between the current error count and the previous error count, and generating the error detection result according to the count difference and the error count threshold.

[0008] Optionally, generating the bit error detection result according to the count difference and the bit error count threshold includes: accumulating the count difference within the bit error counting period; and generating the bit error detection result according to the accumulated value of the count difference and the bit error count threshold.

[0009] Optionally, an error detection result is generated based on the cumulative value of the count difference and the error count threshold, including: if the cumulative value of the count difference is greater than the error count threshold, then the error detection result is determined to be that there is a fault in the data transmission link; if the cumulative value of the count difference is less than or equal to the error count threshold, then the error detection result is determined to be that there is no fault in the data transmission link.

[0010] Optionally, after determining that the error detection result is that there is no fault in the data transmission link, it also includes: determining the error counting basis of the next error counting cycle according to the accumulated value of the counting difference, and entering the next error counting cycle of the data transmission link.

[0011] Optionally, the error counting basis for the next error counting cycle is determined according to the cumulative value of the count difference, including: judging whether the cumulative value of the count difference is greater than the error counting threshold of the current error counting cycle; if the cumulative value of the count difference is greater than the error counting threshold of the current error counting cycle, generating an alarm event for the data transmission link and disconnecting the data transmission link; if the cumulative value of the count difference is less than or equal to the error counting threshold of the current error counting cycle, determining a preset value of the current error counting cycle according to the error counting threshold, wherein the preset value is less than the error counting threshold; when the cumulative value of the count difference is greater than the preset value of the current error counting cycle, using the preset value of the current error counting cycle as the error counting basis for the next error counting cycle, and when the cumulative value of the count difference is less than or equal to the preset value of the current error counting cycle, using the cumulative value of the count difference as the error counting basis for the next error counting cycle.

[0012] Optionally, the method further includes: setting a bit error interference threshold according to a bit error count threshold; if the count difference is greater than the interference threshold, using the interference threshold as the count difference.

[0013] The second aspect of the present application provides an error detection device for a data transmission link, including: a first determination module, used to determine multiple operating scenarios of the data transmission link; a setting module, used to set multiple error counting periods and corresponding error counting thresholds according to the multiple operating scenarios; a second determination module, used to obtain the error count of the data transmission link within the error counting period, and determine the error detection results of the data transmission link under multiple operating scenarios based on the error counts and error counting thresholds corresponding to the multiple error counting periods.

[0014] Optionally, the data transmission link includes an uplink port and a downlink port, and further includes: a first setting module, used to set multiple bit error counting periods of the uplink port and the downlink port respectively.

[0015] Optionally, the second determination module is further used to: calculate a count difference between a current bit error count and a previous bit error count within a bit error counting period corresponding to a plurality of operating scenarios, and generate a bit error detection result according to the count difference and a bit error count threshold.

[0016] Optionally, the second determination module is further used to: accumulate count differences within a bit error counting period; and generate a bit error detection result according to the accumulated value of the count differences and a bit error counting threshold.

[0017] Optionally, the second determination module is further used to: if the cumulative value of the count difference is greater than the error count threshold, determine that the error detection result is that there is a fault in the data transmission link; if the cumulative value of the count difference is less than or equal to the error count threshold, determine that the error detection result is that there is no fault in the data transmission link.

[0018] Optionally, it also includes: a third determination module, which is used to determine the error counting basis of the next error counting cycle according to the accumulated value of the count difference after determining that the error detection result is that there is no fault in the data transmission link, and enter the next error counting cycle of the data transmission link.

[0019] Optionally, the third determination module is further used to: determine whether the cumulative value of the count difference is greater than the error count threshold of the current error count cycle; if the cumulative value of the count difference is greater than the error count threshold of the current error count cycle, generate an alarm event for the data transmission link and disconnect the data transmission link; if the cumulative value of the count difference is less than or equal to the error count threshold of the current error count cycle, determine the preset value of the current error count cycle according to the error count threshold, wherein the preset value is less than the error count threshold; when the cumulative value of the count difference is greater than the preset value of the current error count cycle, use the preset value of the current error count cycle as the error count basis for the next error count cycle, and when the cumulative value of the count difference is less than or equal to the preset value of the current error count cycle, use the cumulative value of the count difference as the error count basis for the next error count cycle.

[0020] Optionally, it also includes: a judgment module, used to set the bit error interference threshold according to the bit error count threshold; if the count difference is greater than the interference threshold, the interference threshold is used as the count difference.

[0021] The third aspect of the present application provides an electronic device, including: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement a method for detecting bit errors in a data transmission link as in the above embodiment.

[0022] The fourth aspect of the present application provides a computer-readable storage medium on which a computer program or instruction is stored. The computer program or instruction is executed by a processor to implement a method for error detection in a data transmission link as in the above embodiment.

[0023] The fifth aspect of the present application provides a computer program product, including a computer program or instructions. When the computer program or instructions are executed, they are used to implement the error detection method for the data transmission link as described in the above embodiment.

[0024] Therefore, this application includes the following beneficial effects:

[0025] The embodiment of the present application can set corresponding error counting cycles for different operation scenarios, and multiple error counting cycles can be used to set multiple error counting thresholds. Error detection in different operation scenarios can be achieved through multiple error counting thresholds. For example, the error counting threshold in the short-term operation scenario can be used to timely discover and respond to the rapid increase of errors in a short period of time. For example, the error counting threshold in the long-term operation scenario can be used to avoid unnecessary disconnection of the data transmission link, so that different operation scenarios can use corresponding error counting thresholds to avoid the inapplicability problem caused by the shared error counting threshold. While ensuring the accuracy of error detection, the applicability of error detection in the data transmission link can be effectively improved, and different error detection requirements in different operation scenarios can be effectively taken into account, thereby improving the user experience. Therefore, technical problems such as poor applicability of error detection in the data transmission link in the related technology are solved.

[0026] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0028] Figure 1 A flowchart of a method for detecting bit errors in a data transmission link according to an embodiment of the present application;

[0029] Figure 2 A flowchart of a method for detecting bit errors in a SAS (Serial Attached SCSI) link according to an embodiment of the present application;

[0030] Figure 3 This is an example diagram of a bit error detection device for a data transmission link provided according to an embodiment of the present application;

[0031] Figure 4 It is a schematic diagram of the structure of an electronic device provided according to an embodiment of the present application. DETAILED DESCRIPTION

[0032] The embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present application, and should not be construed as limiting the present application.

[0033] Specifically, Figure 1 A flowchart of a method for detecting bit errors in a data transmission link provided in an embodiment of the present application.

[0034] like Figure 1 As shown, the error detection method of the data transmission link includes the following steps:

[0035] In step S101, multiple operation scenarios of a data transmission link are determined.

[0036] It is understandable that the operation scenarios may include multiple ones, such as short-cycle operation scenarios and long-cycle operation scenarios. In the short-cycle operation scenario, there may be a rapid increase in bit errors, and in the long-cycle operation scenario, the equipment needs to run for a long time. Those skilled in the art can set the operation scenarios according to the actual situation. For another example, between the short-cycle operation scenario and the long-cycle operation scenario, a longer-cycle operation scenario can be set to enrich the operation scenarios and increase the personalized needs of bit error detection of the data transmission link.

[0037] In some embodiments, the types of data transmission links may include many types, such as wired transmission links and wireless transmission links, wired transmission links such as twisted pair, coaxial cable and optical fiber, wireless transmission links such as Bluetooth, infrared and radio waves, etc. Taking SAS as an example, SAS can be used for data transmission between upper layer devices and lower layer devices, upper layer devices such as CPU or host, etc., and lower layer devices such as storage devices, etc.

[0038] In some embodiments, the data transmission link may include an upstream port and a downstream port. The upstream port is connected to the port of the upper-layer device and is used to transmit data from the lower-layer device to the processing unit of the upper-layer device; the downstream port is connected to the port of the lower-layer device and is used to pass data from the upper-layer device to the lower-layer device.

[0039] Therefore, the executor of the method in the embodiment of the present application is an electronic device, which can be the upper-layer device and the lower-layer device mentioned above, or other devices that can run the program corresponding to the method. For example, the program of the method in the embodiment of the present application can be deployed on the corresponding device, and can be deployed separately on the upper-layer device or the lower-layer device, or can be deployed on the upper-layer device and the lower-layer device at the same time to realize error detection of the data transmission link.

[0040] In step S102, a plurality of bit error counting periods and corresponding bit error counting thresholds are set according to a plurality of operation scenarios.

[0041] It should be noted that different operating scenarios require different error counting periods. For example, in a short-cycle operating scenario, there may be a rapid increase in errors. In order to monitor the rapid increase in errors, the embodiment of the present application will set a shorter error counting period, such as 1 minute, 2 minutes or 3 minutes, to achieve rapid error detection; for example, in a long-cycle operating scenario, the device needs to run for a long time. If the set error counting period is short, it is easy to trigger the interruption of the data transmission link, affecting the normal operation of the device and not meeting the user's usage requirements. Therefore, the embodiment of the present application will set a longer error counting period, such as 12 hours, 13 hours or 14 hours, to ensure the stable operation of the equipment while achieving error monitoring.

[0042] It is precisely because the error counting periods required for different operating scenarios are different that the error counting thresholds required for different operating scenarios are also different. The embodiments of the present application set different error counting thresholds for different operating scenarios. The error counting threshold for short-cycle operating scenarios can be set to 10 times, 11 times or 12 times, etc., and a smaller error counting threshold is set to promptly discover and respond to the rapid increase of errors in a short period of time; the error counting threshold for long-cycle operating scenarios can be set to 30 times, 31 times or 32 times, etc., and a larger error counting threshold is set to avoid unnecessary disconnection of the data transmission link.

[0043] Therefore, the embodiments of the present application adopt different error count thresholds in different operating scenarios to avoid the inapplicability problem caused by the shared error count threshold. While ensuring the accuracy of error detection, it can effectively improve the applicability of error detection in the data transmission link, effectively take into account the different error detection requirements in different operating scenarios, and improve the user experience.

[0044] For ease of description, in the following embodiments, the bit error counting period in the short cycle operation scenario is a short bit error counting period, and the bit error counting period in the long cycle operation scenario is a long bit error counting period.

[0045] In some embodiments, the embodiments of the present application not only set multiple bit error counting periods based on multiple operating scenarios, but also set multiple bit error counting periods based on the uplink port and the downlink port.

[0046] It can be understood that, when the uplink and downlink ports are actually running, the uplink port carries the data stream converged from multiple lower-layer devices, and its data transmission volume is larger and more complex. The downlink port is responsible for distributing data to specific lower-layer devices, and the data transmission volume is relatively stable. Therefore, the error detection requirements of the uplink and downlink ports are different. The embodiments of the present application can formulate different error counting periods for different data transmission volumes of the uplink and downlink ports, effectively meet the actual error detection requirements, and improve the applicability of error detection.

[0047] For example, the short bit error counting period and the long bit error counting period are set for the upstream port and the downstream port respectively. For example, the short bit error counting period of the upstream port is set to 1 minute, and the long bit error counting period is set to 12 hours; the short bit error counting period of the downstream port is set to 2 minutes, and the long bit error counting period is set to 6 hours.

[0048] In step S103, the bit error count of the data transmission link is obtained within the bit error counting period, and based on the bit error counts and bit error count thresholds corresponding to multiple bit error counting periods, the bit error detection results of the data transmission link in multiple operation scenarios are determined.

[0049] Among them, the error detection results under multiple operation scenarios include the detection results of long-cycle operation scenarios and the detection results of short-cycle operation scenarios.

[0050] It can be understood that the embodiments of the present application can obtain the error count of the data transmission link within the error counting period, and determine the error detection results of the data transmission link in multiple operating scenarios based on the error counts and error counting thresholds corresponding to multiple error counting periods. Taking into account the error characteristics, user usage requirements and other aspects, different error counting periods and error counting thresholds are set for different operating scenarios to avoid the inapplicability problem caused by the shared error counting threshold. While ensuring the accuracy of error detection, the applicability of error detection in the data transmission link can be effectively improved, and the different error detection requirements in different operating scenarios are effectively taken into account to improve the user experience.

[0051] In an embodiment of the present application, based on the error counts and error count thresholds corresponding to multiple error count periods, the error detection results of the data transmission link in multiple operating scenarios are determined, including: within the error count periods corresponding to the multiple operating scenarios, calculating the count difference between the current error count and the previous error count, and generating the error detection result according to the count difference and the error count threshold.

[0052] It can be understood that the present application can calculate the count difference between the current bit error count and the previous bit error count within the bit error counting cycle corresponding to multiple operating scenarios, and then generate the bit error detection result based on the count difference and the bit error technical threshold. The bit error detection result is obtained by monitoring the pre-set bit error count threshold and comparing it with the calculated count difference, thereby improving the accuracy of the bit error detection result.

[0053] Specifically, the embodiment of the present application can read the error counts of the upstream port and the downstream port in different error counting cycles at preset time intervals (for example, 10 seconds), and generate an error detection result based on the count difference between the current error count and the previous error count, as well as the error count threshold.

[0054] In an embodiment of the present application, an error detection result is generated based on a count difference and an error count threshold, including: accumulating count differences within an error count period; and generating an error detection result based on the accumulated value of the count difference and the error count threshold.

[0055] It can be understood that the embodiment of the present application can accumulate counting errors within the bit error counting period, and generate a bit error detection result according to the accumulated value of the counting difference and the bit error counting threshold.

[0056] In an embodiment of the present application, an error detection result is generated based on the cumulative value of the count difference and the error count threshold, including: if the cumulative value of the count difference is greater than the error count threshold, then the error detection result is determined to be that there is a fault in the data transmission link; if the cumulative value of the count difference is less than or equal to the error count threshold, then the error detection result is determined to be that there is no fault in the data transmission link.

[0057] The error counting threshold is a counting threshold set in advance according to specific circumstances, and is not specifically limited thereto. For example, the error counting threshold in the uplink port error counting period is 5 or 6 times, and the error counting threshold in the long error counting period is 25 or 30 times.

[0058] It can be understood that in the embodiment of the present application, when the accumulated value of the count difference is greater than the error count threshold, the error detection result is determined to be that there is a fault in the data transmission link; otherwise, the error detection result is determined to be that there is no fault in the data transmission link. By comparing the accumulated error count difference in different error count periods with the error count threshold, it is possible to more accurately determine whether there is a fault in the data transmission link, thereby avoiding frequent reading and processing of unnecessary error information.

[0059] It should be noted that, after determining that the error detection result is that the data transmission link has a fault, the embodiment of the present application reports an alarm event of too many bit errors in the data transmission link and disconnects the data transmission link.

[0060] In an embodiment of the present application, after determining that the error detection result is that there is no fault in the data transmission link, it also includes: determining the error counting basis of the next error counting cycle according to the accumulated value of the count difference, and entering the next error counting cycle of the data transmission link.

[0061] It can be understood that the embodiment of the present application can determine the error counting basis of the next error counting cycle according to the accumulated value of the count difference, and enter an error counting cycle of the data transmission link, and dynamically adjust the error counting basis of the next error counting cycle according to the accumulated value of the count difference, so as to flexibly adapt to the changes in the errors and improve the accuracy of error detection.

[0062] In an embodiment of the present application, an error count basis for the next error count cycle is determined according to the accumulated value of the count difference, including: whether the accumulated value of the count difference is greater than the error count threshold of the current error count cycle; if the accumulated value of the count difference is greater than the error count threshold of the current error count cycle, an alarm event for the data transmission link is generated, and the data transmission link is disconnected; if the accumulated value of the count difference is less than or equal to the error count threshold of the current error count cycle, a preset value of the current error count cycle is determined according to the error count threshold, wherein the preset value is less than the error count threshold; when the accumulated value of the count difference is greater than the preset value of the current error count cycle, the preset value of the current error count cycle is used as the error count basis for the next error count cycle, and when the accumulated value of the count difference is less than or equal to the preset value of the current error count cycle, the accumulated value of the count difference is used as the error count basis for the next error count cycle.

[0063] The preset value may be determined according to the bit error counting threshold, for example, it may be half or one quarter of the bit error counting threshold, and the preset value is smaller than the bit error counting threshold.

[0064] It can be understood that the embodiments of the present application can determine whether the cumulative value of the count difference is greater than the error count threshold of the current error count cycle. If the cumulative value of the count difference is greater than the error count threshold of the current error count cycle, an alarm event for the data transmission link is generated and the data transmission link is disconnected. Otherwise, the preset value of the current error count cycle is determined according to the error count threshold, that is, the preset value can be determined according to the error count threshold, for example, it can be half, one quarter of the error count threshold, etc., the preset value is less than the error count threshold, and when the cumulative value of the count difference is greater than the preset value of the current error count cycle, the preset value of the current error count cycle is used as the error count basis for the next error count cycle, and when the cumulative value of the count difference is less than or equal to the preset value of the current error count cycle, the cumulative value of the count difference is used as the error count basis for the next error count cycle.

[0065] For example, in a SAS link environment, the error count threshold of the short error count cycle is 10 times. If the cumulative value of the count difference is 15 times, which is greater than 10 times, an alarm event of the SAS link is generated and the data transmission link is disconnected; if the current cumulative value of the count difference is 6 times, which is less than 10 times, taking the preset value as half of the error count threshold as an example, the preset value is 5 times, and the current cumulative value of the count difference is 6 times, which is greater than 5 times, then 5 times will be used as the error count basis for the next error count cycle; if the current cumulative value of the count difference is 3 times, then 3 times will be used as the error count basis for the next error count cycle.

[0066] This method of reducing the next count processing takes into account the error history in the previous error counting cycle and provides a certain buffer space. It can adjust its monitoring strategy more flexibly without affecting normal operations. This helps to avoid premature alarm triggering due to long-term accumulation of small errors, while also ensuring sufficient responsiveness to sudden increases in errors.

[0067] In an embodiment of the present application, it also includes: setting a bit error interference threshold according to the bit error count threshold; if the count difference is greater than the interference threshold, then using the interference threshold as the count difference.

[0068] Among them, the error interference threshold is determined according to the set error count threshold. Usually, the interference threshold is set to a part of the error count threshold of the short error count period, such as half of the error count threshold of the short error count period, so as to distinguish occasional errors in normal operation from significant error increases that may be caused by external factors.

[0069] It can be understood that the embodiment of the present application can indicate that the increase in bit errors may be caused by external interference or other reasons when the counting difference is greater than the interference threshold, such as a scenario in which the bit error count surges within 10 seconds due to human external interference. Therefore, the counting error is not directly used for accumulation, and the interference threshold is used as the counting difference for subsequent accumulation. By setting the bit error interference threshold and adjusting it when the counting difference exceeds the interference threshold, it is possible to filter out accidental bit error events without affecting normal operations, ensure timely and accurate response to real bit error problems, and improve the accuracy of subsequent bit error detection results.

[0070] For example, within a short error counting cycle, the error counting threshold is 10 times, then the interference threshold can be set to 5 times. If the calculated difference is 7, 7 is directly used as the counting difference for accumulation. If the calculated difference is 12, the interference threshold 5 is used as the counting difference for accumulation instead of the actual 12.

[0071] In some embodiments, the error interference threshold is set according to the error count threshold, including: identifying the error count period in which error interference exists, obtaining a correspondence table of the error count period in which error interference exists, the correspondence table being a correspondence between the error count threshold and the error interference threshold, and determining the error interference threshold of the error count period based on the correspondence table.

[0072] It can be understood that the embodiments of the present application can pre-determine the error counting period in which error interference exists, such as the error counting period in a short-cycle operation scenario, which is prone to short-term internal and external interference leading to a surge in error counts. For this reason, the embodiments of the present application pre-calibrate the corresponding relationship table. Since the error count threshold can be specifically set, the error interference threshold can be accurately determined through the corresponding relationship table to improve the anti-interference capability.

[0073] The following describes the bit error detection method of the data transmission link of the embodiment of the present application through a specific embodiment. Taking the SAS link as an example, the overall process of the bit error detection method of the SAS link is as follows: Figure 2 As shown, including:

[0074] 1. Multiple error periods, such as 2 or 3, are set for the upstream and downstream ports in the SAS link. This embodiment takes two error counting periods as an example, a long error counting period and a short error counting period and the corresponding error counting threshold. For example, the long error counting period of the upstream port is 12 hours, the error threshold is 30, the short error counting period is 1 minute, and the error threshold is 10; the long error counting period of the downstream port is 6 hours, the error threshold is 30, the short error counting period is 2 minutes, and the counting threshold is 20.

[0075] 2. Start the timer and set the program to obtain the error count from the SAS expander at a preset interval, such as every 10 seconds.

[0076] 3. Set the SAS link error statistics algorithm, that is, the error detection method of the embodiment of the present application. Both the long error counting cycle (long tick) and the short error counting cycle (short tick) can use the error statistics algorithm, as follows:

[0077] The initial error count is based on the error count of the SAS expander read for the first time when the program is run. The current error count (newcount) is read from the SAS expander every 10 seconds. If the current error count is greater than the previous error count (lastcount), and the difference (diff) between newcount and lastcount is greater than half of the short-cycle error count threshold (short threshold), it is considered that the error count has increased by half of the short-cycle error count threshold (in order to exclude the scenario where the error count surges within 10 seconds due to human external interference). The diff value is accumulated within the error counting cycle. When the accumulated diff difference is greater than the error count threshold of the counting cycle, an alarm event of too many SAS link errors is reported, and the corresponding SAS link is disconnected, that is, the port corresponding to this SAS link is closed, and the errors of this port are no longer concerned. After the port is closed, data can no longer be transmitted, and the errors will no longer increase. If the accumulated diff difference within the counting cycle is not greater than the error count threshold of the counting cycle, the accumulated diff value is halved as the basis for the error count to restart the error accumulation and fault judgment of the new counting cycle.

[0078] 4. Deploy the program to the storage device and run the SAS link error detection algorithm.

[0079] According to the error detection method for a data transmission link proposed in an embodiment of the present application, corresponding error counting periods can be set for different operating scenarios, and multiple error counting thresholds can be set corresponding to multiple error counting periods. Error detection in different operating scenarios can be achieved through multiple error counting thresholds. For example, through the error counting threshold in a short-cycle operating scenario, the situation of rapid increase in errors in a short period of time can be discovered and responded to in a timely manner. For another example, through the error counting threshold in a long-cycle operating scenario, unnecessary disconnection of the data transmission link can be avoided, so that different operating scenarios can adopt corresponding error counting thresholds to avoid the inapplicability problem caused by the shared error counting threshold. While ensuring the accuracy of error detection, the applicability of error detection in the data transmission link can be effectively improved, and the different error detection requirements in different operating scenarios can be effectively taken into account, thereby improving the user experience.

[0080] Next, the error detection device for a data transmission link proposed in an embodiment of the present application is described with reference to the accompanying drawings.

[0081] Figure 3 It is a block diagram of a bit error detection device for a data transmission link in an embodiment of the present application.

[0082] like Figure 3 As shown, the bit error detection device 10 for the data transmission link includes: a first determination module 200 , a setting module 200 and a second determination module 300 .

[0083] Among them, the first determination module 100 is used to determine multiple operating scenarios of the data transmission link; the setting module 200 is used to set multiple error counting periods and corresponding error counting thresholds according to multiple operating scenarios; the second determination module 300 is used to obtain the error count of the data transmission link within the error counting period, and based on the error counts and error counting thresholds corresponding to the multiple error counting periods, determine the error detection results of the data transmission link under multiple operating scenarios.

[0084] In the embodiment of the present application, the data transmission link includes an uplink port and a downlink port.

[0085] In the embodiment of the present application, the device 10 of the embodiment of the present application further includes: a first setting module.

[0086] Wherein, the first setting module is used to set multiple bit error counting periods of the upstream port and the downstream port respectively.

[0087] In an embodiment of the present application, the second determination module 300 is further used to: calculate the count difference between the current bit error count and the previous bit error count within the bit error counting period corresponding to multiple operating scenarios, and generate a bit error detection result based on the count difference and the bit error count threshold.

[0088] In the embodiment of the present application, the second determination module 300 is further used to: accumulate count differences within a bit error counting period; and generate a bit error detection result according to the accumulated value of the count differences and a bit error counting threshold.

[0089] In an embodiment of the present application, the second determination module 300 is further used to: if the cumulative value of the count difference is greater than the error count threshold, determine that the error detection result is that there is a fault in the data transmission link; if the cumulative value of the count difference is less than or equal to the error count threshold, determine that the error detection result is that there is no fault in the data transmission link.

[0090] In the embodiment of the present application, the device 10 of the embodiment of the present application further includes: a third determination module.

[0091] Among them, the third determination module is used to determine the error counting basis of the next error counting cycle according to the accumulated value of the count difference after determining that the error detection result is that there is no fault in the data transmission link, and enter the next error counting cycle of the data transmission link.

[0092] In an embodiment of the present application, the third determination module is further used to: determine whether the cumulative value of the count difference is greater than the error count threshold of the current error count cycle; if the cumulative value of the count difference is greater than the error count threshold of the current error count cycle, generate an alarm event for the data transmission link and disconnect the data transmission link; if the cumulative value of the count difference is less than or equal to the error count threshold of the current error count cycle, determine the preset value of the current error count cycle according to the error count threshold, wherein the preset value is less than the error count threshold; when the cumulative value of the count difference is greater than the preset value of the current error count cycle, use the preset value of the current error count cycle as the error count basis for the next error count cycle, and when the cumulative value of the count difference is less than or equal to the preset value of the current error count cycle, use the cumulative value of the count difference as the error count basis for the next error count cycle.

[0093] In the embodiment of the present application, the device 10 of the embodiment of the present application further includes: a judgment module.

[0094] The judgment module is used to set the bit error interference threshold according to the bit error count threshold; if the count difference is greater than the interference threshold, the interference threshold is used as the count difference.

[0095] It should be noted that the above explanation of the embodiment of the method for detecting bit errors in a data transmission link is also applicable to the device for detecting bit errors in a data transmission link of this embodiment, and will not be described in detail here.

[0096] According to the error detection device for the data transmission link proposed in the embodiment of the present application, corresponding error counting periods can be set for different operating scenarios, and multiple error counting thresholds are set corresponding to multiple error counting periods. Error detection in different operating scenarios can be achieved through multiple error counting thresholds. For example, through the error counting threshold in the short-cycle operating scenario, the situation of rapid increase of errors in a short period of time can be discovered and responded to in time. For another example, through the error counting threshold in the long-cycle operating scenario, unnecessary disconnection of the data transmission link can be avoided, so that different operating scenarios can adopt corresponding error counting thresholds, avoiding the inapplicability problem caused by the shared error counting threshold. While ensuring the accuracy of error detection, the applicability of error detection in the data transmission link can be effectively improved, and the different error detection requirements in different operating scenarios can be effectively taken into account, thereby improving the user experience.

[0097] Figure 4 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. The electronic device may include:

[0098] Memory 401 , processor 402 , and a computer program stored in the memory 401 and executable on the processor 402 .

[0099] When the processor 402 executes the program, the bit error detection method for the data transmission link provided in the above embodiment is implemented.

[0100] Furthermore, the electronic device further comprises:

[0101] The communication interface 403 is used for communication between the memory 401 and the processor 402 .

[0102] The memory 401 is used to store computer programs that can be executed on the processor 402 .

[0103] The memory 401 may include a high-speed RAM (Random Access Memory) memory, and may also include a non-volatile memory, such as at least one disk memory.

[0104] If the memory 401, the processor 402 and the communication interface 403 are implemented independently, the communication interface 403, the memory 401 and the processor 402 can be connected to each other through a bus and communicate with each other. The bus can be an ISA (Industry Standard Architecture) bus, a PCI (Peripheral Component Interconnect) bus or an EISA (Extended Industry Standard Architecture) bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 4 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.

[0105] Optionally, in a specific implementation, if the memory 401, the processor 402 and the communication interface 403 are integrated on a chip, the memory 401, the processor 402 and the communication interface 403 can communicate with each other through an internal interface.

[0106] The processor 402 may be a CPU (Central Processing Unit), or an ASIC (Application Specific Integrated Circuit), or one or more integrated circuits configured to implement the embodiments of the present application.

[0107] An embodiment of the present application further provides a computer-readable storage medium having a computer program or instruction stored thereon, which implements the above-mentioned method for detecting bit errors in a data transmission link when the computer program or instruction is executed by a processor.

[0108] An embodiment of the present application also provides a computer program product, including a computer program or instructions, which, when executed, is used to implement the above-mentioned method for detecting bit errors in a data transmission link.

[0109] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms are not necessarily directed to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or N embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.

[0110] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of this application, "N" means at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0111] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, fragment or portion of code comprising one or N executable instructions for implementing the steps of a custom logical function or process, and the scope of the preferred embodiments of the present application includes alternative implementations in which functions may not be performed in the order shown or discussed, including performing functions in a substantially simultaneous manner or in reverse order depending on the functions involved, which should be understood by technicians in the technical field to which the embodiments of the present application belong.

[0112] It should be understood that the various parts of the present application can be implemented in hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, the steps or methods can be implemented in software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array, a field programmable gate array, etc.

[0113] A person of ordinary skill in the art may understand that all or part of the steps carried by the method for implementing the above-mentioned embodiment may be completed by instructing related hardware through a program, and the above-mentioned program may be stored in a computer-readable storage medium, which, when executed, includes one of the steps of the method embodiment or a combination thereof.

[0114] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in the field can change, modify, replace and modify the above embodiments within the scope of the present application.

Claims

1. A method for detecting bit errors in a data transmission link, characterized in that: The following steps are involved: Determine multiple operating scenarios for data transmission links; Setting a plurality of bit error counting periods and corresponding bit error counting thresholds according to the plurality of operation scenarios; The bit error count of the data transmission link is obtained within a bit error counting period, and based on the bit error counts and bit error counting thresholds corresponding to the multiple bit error counting periods, the bit error detection results of the data transmission link in multiple operation scenarios are determined.

2. The method for detecting bit errors in a data transmission link according to claim 1, characterized in that: The data transmission link includes an uplink port and a downlink port, and also includes: A plurality of bit error counting periods are respectively set for the uplink port and the downlink port.

3. The method for detecting bit errors in a data transmission link according to claim 1, characterized in that: The determining, based on the error counts and error count thresholds corresponding to the multiple error counting periods, error detection results of the data transmission link in multiple operation scenarios includes: In the bit error counting cycles corresponding to the multiple operation scenarios, a count difference between a current bit error count and a previous bit error count is calculated, and a bit error detection result is generated according to the count difference and the bit error count threshold.

4. The method for detecting bit errors in a data transmission link according to claim 3, characterized in that: The generating the bit error detection result according to the count difference and the bit error count threshold comprises: Accumulating the count difference within a bit error counting period; A bit error detection result is generated according to the accumulated value of the count difference and the bit error count threshold.

5. The method for detecting bit errors in a data transmission link according to claim 4, characterized in that: The generating the bit error detection result according to the accumulated value of the count difference and the bit error count threshold comprises: If the accumulated value of the count difference is greater than the bit error count threshold, determining that the bit error detection result is that there is a fault in the data transmission link; If the accumulated value of the count difference is less than or equal to the bit error count threshold, it is determined that the bit error detection result is that there is no fault in the data transmission link.

6. The method for detecting bit errors in a data transmission link according to claim 5, characterized in that: After determining that the error detection result indicates that there is no fault in the data transmission link, the method further includes: The bit error counting basis of the next bit error counting cycle is determined according to the accumulated value of the counting difference, and the next bit error counting cycle of the data transmission link is entered.

7. The method for detecting bit errors in a data transmission link according to claim 6, characterized in that: The step of determining the bit error counting basis of the next bit error counting cycle according to the accumulated value of the counting difference comprises: Determine whether the accumulated value of the count difference is greater than the bit error count threshold of the current bit error count period; If the accumulated value of the count difference is greater than the bit error count threshold of the current bit error count period, an alarm event of the data transmission link is generated, and the data transmission link is disconnected; If the accumulated value of the count difference is less than or equal to the error count threshold of the current error count period, determining a preset value of the current error count period according to the error count threshold, wherein the preset value is less than the error count threshold; When the accumulated value of the count difference is greater than the preset value of the current bit error counting cycle, the preset value of the current bit error counting cycle is used as the error counting basis for the next bit error counting cycle; when the accumulated value of the count difference is less than or equal to the preset value of the current bit error counting cycle, the accumulated value of the count difference is used as the error counting basis for the next bit error counting cycle.

8. The method for detecting bit errors in a data transmission link according to claim 4, characterized in that: Also includes: Setting a bit error interference threshold according to the bit error count threshold; If the count difference is greater than the interference threshold, the interference threshold is used as the count difference.

9. A bit error detection device for a data transmission link, characterized in that: include: A first determination module, used to determine multiple operation scenarios of the data transmission link; A setting module, used to set multiple bit error counting periods and corresponding bit error counting thresholds according to the multiple operation scenarios; The second determination module is used to obtain the bit error count of the data transmission link within the bit error counting period, and determine the bit error detection results of the data transmission link in multiple operation scenarios based on the bit error counts and bit error count thresholds corresponding to the multiple bit error counting periods.

10. An electronic device, characterized in that: include: A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the method for error detection of a data transmission link according to any one of claims 1 to 8.

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