Communication system, ultrasonic radar and vehicle
By designing a communication system including configuration registers, timers and data shift registers, data transmission is realized in ultrasonic radar through pure hard mode, solving the problem of delay or packet loss in the ultrasonic communication system in the prior art, and improving the reliability and efficiency of the system.
Patent Information
- Application Number
- CN202510424966.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-07
- Publication Date
- 2025-05-06
- Estimated Expiration
- 2045-04-07
AI Technical Summary
The communication systems of existing ultrasonic radars are prone to delay or packet loss in ultrasonic communications with strict timing requirements, and the equipment load rate is high, which may lead to delay or packet loss in other controls and communications.
A communication system is designed, which includes configuration registers, timers and data shift registers, which realizes data transmission through pure hardware, frees the MCU, reduces the possibility of delay or packet loss, and avoids timing deviations caused by software operations.
Data transmission is realized through pure hardware, which reduces the possibility of delay or packet loss, avoids timing deviations caused by software operations, and thus improves the reliability and efficiency of the communication system.
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Figure CN119946095A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of communication technology, and in particular to a communication system, an ultrasonic radar, and a vehicle. Background Art
[0002] With the popularization of intelligent vehicles, ultrasonic radars are installed in almost every vehicle. The ultrasonic sensors on the market basically use single-line communication protocols. The ultrasonic communication protocol has strict timing requirements, and any deviation may cause communication failure. The commonly used control method is to use preemptive control in software, and ultrasonic communication control has the highest priority, which may cause delays or packet loss in other controls and communications, and the load rate of processors, controllers and other devices is very high. Summary of the invention
[0003] The present invention aims to solve one of the technical problems in the related art at least to a certain extent. To this end, a first object of the present invention is to provide a communication system to reduce the possibility of delay or packet loss and reduce the load.
[0004] A second objective of the present invention is to provide an ultrasonic radar.
[0005] A third object of the present invention is to provide a vehicle.
[0006] To achieve the above-mentioned purpose, the first aspect of the present invention proposes a communication system, which includes: a configuration register for receiving and storing configuration data generated by an external data source, wherein the configuration data includes data to be sent and baud rate configuration data for determining the data transmission rate; a timer connected to the configuration register and a clock source, for determining the trigger signal sending time according to the baud rate configuration data, and sending an internal trigger signal when the current time reaches the trigger signal sending time determined by the clock source; a data shift register, which is connected to the configuration register, for receiving and storing the data to be sent, and when receiving the internal trigger signal, outputting target data to a sending device, wherein the target data is a bit of data in the data shift register that is closest to the output port during the shifting process; and the sending device, for sending the target data to a receiving device.
[0007] In addition, the communication system according to the embodiment of the present invention may also have the following additional technical features: In one embodiment of the present invention, the system also includes a first-in-first-out controller and a static random access memory, the first-in-first-out controller is connected to the configuration register, and the static random access memory is connected to the first-in-first-out controller and the data shift register; wherein the first-in-first-out controller is used to obtain the data to be sent from the configuration register, write the data to be sent into the static random access memory, and control the static random access memory to write the data to be sent into the data shift register.
[0008] In one embodiment of the present invention, the number of the data shift registers is N, N is a positive integer, and the output configurations of any two of the data shift registers are different. The first-in-first-out controller is also used to: determine the target register from the N data shift registers according to the output configuration, and obtain multiple data frames according to the data to be sent, and when the target register is in an idle state, write one frame of the multiple data frames into the target register until the multiple data frames are written into the target register.
[0009] In one embodiment of the present invention, the timer is an N-channel timer, and the N channels of the timer are connected to the N data shift registers in a one-to-one correspondence.
[0010] In one embodiment of the present invention, the system also includes: a multiplexer, which is connected to the timer, the external trigger device and the data shift register, and the multiplexer is used to send the received trigger signal to the data shift register when receiving the internal trigger signal sent by the timer or the external trigger signal sent by the external trigger device.
[0011] In one embodiment of the present invention, there are multiple sending devices, and the system also includes a sending device selector and a configuration selector, and the sending device selector is connected to the data shift register, the configuration selector and the multiple sending devices; wherein the configuration selector is used to determine the target sending device from the multiple sending devices, and when the sending device selector receives the target data output by the data shift register, controls the sending device selector to output the target data to the target sending device.
[0012] In one embodiment of the present invention, the sending device is configured with multiple input and output ports, each of the input and output ports is configured with a corresponding route, and the sending device is specifically used to: determine a target route from the multiple routes, and when receiving the target data, send the target data to the receiving device through the input and output port corresponding to the target route.
[0013] In one embodiment of the present invention, the system also includes: an interrupt control device, which is used to output an interrupt signal to the outside when at least one of the configuration register and the first-in-first-out controller fails, so that the external interrupt control device can interrupt the communication system according to the interrupt signal, and when the data to be sent is sent to the receiving device, output a sending completion signal to the outside.
[0014] To achieve the above object, a second embodiment of the present invention provides an ultrasonic radar, including an ultrasonic sensor and the above communication system.
[0015] To achieve the above objectives, a third aspect of the present invention provides a vehicle comprising the above ultrasonic radar.
[0016] According to the communication system, ultrasonic radar, and vehicle of the embodiment of the present invention, the communication system includes a configuration register for receiving and storing configuration data, wherein the configuration data includes data to be sent and baud rate configuration data for determining the data transmission rate; a timer connected to the configuration register and a clock source, for determining the trigger signal sending time according to the baud rate configuration data, and sending an internal trigger signal when the current time reaches the trigger signal sending time according to the clock source; a data shift register, the data shift register is connected to the configuration register, for receiving and storing data to be sent, and when receiving the internal trigger signal, outputting the target data to the sending device, wherein the target data is a bit of data in the data shift register that is closest to the output port during the shifting process; a sending device, for sending the target data to the receiving device. Through the communication system, after the configuration data is generated, data transmission can be realized by pure hardware, thereby freeing the controller, and the controller has sufficient time to handle other tasks and interrupts, reducing the possibility of delay or packet loss in other communications and controls, and there will be no timing deviation caused by software operation, which will lead to communication failure.
[0017] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Figure 1 is a structural block diagram of a communication system according to an embodiment of the present invention; Figure 2 is a schematic diagram of the structure of a communication system of an example of the present invention; Figure 3 is a working flow chart of a communication system of an example of the present invention; Figure 4 is a structural block diagram of an ultrasonic radar according to an embodiment of the present invention; Figure 54 is a structural block diagram of a vehicle according to an embodiment of the present invention. DETAILED DESCRIPTION
[0019] The communication system, ultrasonic radar, and vehicle of the embodiments of the present invention are described below with reference to the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described with reference to the accompanying drawings are exemplary and should not be construed as limiting the present invention.
[0020] Figure 1 It is a structural block diagram of a communication system according to an embodiment of the present invention.
[0021] like Figure 1 As shown, the communication system 100 includes: a configuration register 101, which is used to receive and store configuration data generated by an external data source, wherein the configuration data includes data to be sent and baud rate configuration data for determining the data transmission rate; a timer 102, which is connected to the configuration register 101 and the clock source, and is used to determine the trigger signal sending time according to the baud rate configuration data, and send an internal trigger signal when the current time reaches the trigger signal sending time determined according to the clock source; a data shift register 103, which is connected to the configuration register 101, and is used to receive and store the data to be sent, and when receiving the internal trigger signal, outputs the target data to the sending device 104, wherein the target data is a bit of data in the data shift register 103 that is closest to the output port during the shifting process; and the sending device 104 is used to send the target data to the receiving device.
[0022] Specifically, in order to realize the generation of required communication waveforms according to configuration and reduce the load requirement of MCU, a communication system 100 is designed. The communication system 100 includes a configuration register 101, a timer 102 and a data shift register 103.
[0023] The configuration register 101 is used to receive and store configuration data, where the configuration data includes data to be sent and baud rate configuration data for determining a data transmission rate.
[0024] The configuration data received by the above-mentioned configuration register 101 is data sent by the data source that generates the configuration data. For example, assuming that the above-mentioned communication system 100 is used for an ultrasonic radar, the external data source that sends the configuration data to the configuration register 101 is the processor in the ultrasonic radar, that is, after the ultrasonic probe generates a signal, the processor in the ultrasonic radar generates the configuration data sent to the configuration register 101 according to the signal generated by the ultrasonic probe.
[0025] The baud rate configuration data is used to configure the baud rate. Since the baud rate is a unit for measuring the data transmission rate, indicating the number of symbols transmitted per second, the transmission time interval between two adjacent data symbols when sending the data to be sent can be obtained according to the baud rate configuration data.
[0026] Therefore, since the sending time interval is known, the timer 102 can obtain the trigger signal sending time accordingly, and then send an internal trigger signal when the current time reaches the trigger signal sending time according to the clock source. The internal trigger signal is sent to the data shift register 103.
[0027] That is to say, firstly, the configuration register 101 stores the data to be sent and the baud rate configuration data.
[0028] According to the baud rate configuration data, the sending time interval for the data shift register 103 to send data can be obtained.
[0029] The configuration register 101 writes the data to be sent into the data shift register 103, and the data shift register 103 outputs the data to be sent data by data, and when the data shift register 103 sends data, it needs to be sent according to the above-mentioned sending time interval under the control of the timer 102. For example, assuming that the data to be sent is 010, the sending time interval determined by the baud rate configuration data is 1s, and assuming that the data shift register 103 is a register with only one output port, the data shift register 103 will send the data to be sent in the order of 0, 1, 0, and it is necessary to send 1 bit of data every 1s under the control of the timer 102, that is, after sending 0, send 1 at an interval of 1s, and then send 0 at an interval of 1s.
[0030] After receiving the data to be sent, the sending device 104 can send the data to be sent to the receiving device. For example, if analog signal sending is required, the sending device 104 can generate an analog signal waveform according to the data to be sent. For example, if the data to be sent is 101, the generated analog signal waveform is high level, low level, and high level, and then the analog signal waveform is sent to the receiving device. For another example, if digital signal sending is required, the sending device 104 can generate a data packet to be actually sent according to the data to be sent, and then send the data packet to the receiving device.
[0031] The communication system 100 is described by taking ultrasonic radar as an example.
[0032] Specifically, the ultrasonic probe in the ultrasonic radar usually uses a single-line communication protocol. In order to realize the probe's functions such as emitting waves, receiving ultrasonic waves, and configuring parameters, it is necessary to communicate according to the established communication protocol. The communication timing requirements of the ultrasonic chip are relatively high. If the waveform time deviation is large, it will cause communication failure. Usually, software is used to implement it. The main process is as follows: An ultrasonic ranging may require communication with multiple probes. First, the communication data needs to be unpacked and decomposed into the time sequence that needs to be sent.
[0033] The MCU (Microcontroller Unit) interrupt needs to support preemption, and a timer 102 is set, and the timer 102 has the highest priority.
[0034] When communication is required, the timer 102 is started.
[0035] Enter the timer 102 interrupt and make a judgment according to the timing logic of the transmission. The transmission status of multiple probes needs to be judged, and the corresponding input and output ports are controlled according to the comparison value.
[0036] Determine whether the output is completed, and turn off the timer 102 after completion.
[0037] It can be seen that after the ultrasonic probe in the ultrasonic radar generates a signal, it needs to be preempted and interrupted when communicating through software. The software-implemented ultrasonic communication has high requirements for the MCU, which must support preemption and frequent interrupts. If the sending timing is deviated due to software deviation, communication failure may occur.
[0038] However, if the ultrasonic radar adopts the communication system 100 of the embodiment of the present invention, after obtaining the signal generated by the ultrasonic probe, the data to be sent and the baud rate configuration data are obtained according to the signal, and then the data to be sent and the baud rate configuration data are written into the configuration register 101, and the communication system 100 of the embodiment of the present invention can subsequently complete the communication.
[0039] It can be seen that the communication system 100 of the embodiment of the present invention is implemented by pure hardware when communicating, without the intervention of software, and there will be no timing deviation caused by software operation, which will lead to communication failure. In addition, since the specific communication is implemented by pure hardware, the MCU can be freed up, and the MCU has sufficient time to handle other tasks and interrupts, reducing the possibility of delay or packet loss in other communications and controls.
[0040] Thus, the communication system 100 is set to include a configuration register 101, which is used to receive and store configuration data, wherein the configuration data includes data to be sent and baud rate configuration data for determining the data transmission rate; a timer 102, which is connected to the configuration register 101 and the clock source, and is used to determine the trigger signal sending time according to the baud rate configuration data, and send an internal trigger signal when the current time reaches the trigger signal sending time determined according to the clock source; a data shift register 103, which is connected to the configuration register 101, and is used to receive and store data to be sent, and when receiving the internal trigger signal, outputs the target data to the sending device 104, wherein the target data is a bit of data in the data shift register 103 that is closest to the output port during the shifting process; and a sending device 104, which is used to send the target data to the receiving device. Through the communication system 100, after the configuration data is generated, data transmission can be achieved by pure hardware, thereby freeing up the MCU. The MCU has sufficient time to handle other tasks and interrupts, reducing the possibility of delays or packet loss in other communications and controls. Moreover, there will be no timing deviations caused by software operations, which will lead to communication failures.
[0041] In some embodiments of the present invention, the communication system 100 also includes a first-in-first-out controller and a static random access memory, the first-in-first-out controller is connected to the configuration register 101, and the static random access memory is connected to the first-in-first-out controller and the data shift register 103; wherein the first-in-first-out controller is used to obtain the data to be sent from the configuration register 101, write the data to be sent into the static random access memory, and control the static random access memory to write the data to be sent into the data shift register 103.
[0042] In some embodiments of the present invention, the number of data shift registers 103 is N, where N is a positive integer, and the output configurations of any two data shift registers 103 are different. The first-in-first-out controller is also used to: determine the target register from the N data shift registers 103 according to the output configuration, and obtain multiple data frames according to the data to be sent, and when the target register is in an idle state, write one frame of the multiple data frames into the target register until the multiple data frames are written into the target register.
[0043] The above output configuration may be the output rate, format, level, timing, etc.
[0044] That is to say, the above-mentioned N data shift registers 103 correspond to N outputs, each output has a different output configuration. The first-in-first-out controller needs to select the output configuration it needs according to the output configuration of each data shift register 103, and determine the corresponding data shift register 103 as the target register. The first-in-first-out controller also needs to obtain multiple data frames based on the data to be sent.
[0045] Furthermore, the FIFO controller needs to select a data frame from the above multiple data frames and write the data frame into the target register when the target register is in an idle state. The target register outputs the data frame bit by bit.
[0046] After the target register completes the output of the data frame, the target register enters the idle state again. At this time, the FIFO controller selects another data frame and writes the data frame into the target register so that the target register sends the data frame. The above process is repeated until the above multiple data frames are written into the target register.
[0047] In some embodiments of the present invention, the timer 102 is an N-channel timer 102 , and the N channels of the timer 102 are connected to the N data shift registers 103 in a one-to-one correspondence.
[0048] In some embodiments of the present invention, the communication system 100 also includes: a multiplexer, the multiplexer is connected to the timer 102, the external trigger device and the data shift register 103, and the multiplexer is used to send the received trigger signal to the data shift register 103 when receiving an internal trigger signal sent by the timer 102 or an external trigger signal sent by the external trigger device.
[0049] In some embodiments of the present invention, there are multiple sending devices 104, and the system also includes a sending device selector and a configuration selector, and the sending device selector is connected to the data shift register 103, the configuration selector and the multiple sending devices 104; wherein the configuration selector is used to determine the target sending device 104 from the multiple sending devices 104, and when the sending device selector receives the target data output by the data shift register 103, the sending device selector is controlled to output the target data to the target sending device 104.
[0050] In some embodiments of the present invention, the sending device 104 is configured with multiple input and output ports, each of which is configured with a corresponding route. The sending device 104 is specifically used to: determine a target route from multiple routes, and when receiving target data, send the target data to the receiving device through the input and output port corresponding to the target route.
[0051] In some embodiments of the present invention, the communication system 100 also includes: an interrupt control device, which is used to output an interrupt signal to the outside when at least one of the configuration register 101 and the first-in-first-out controller fails, so that the external interrupt control device can interrupt the communication system 100 according to the interrupt signal, and when the data to be sent is sent to the receiving device, a sending completion signal is output to the outside.
[0052] Among them, an interrupt control device can be set to be connected to the configuration register 101 and the first-in-first-out controller, and is used to send an interrupt signal to the external interrupt control device when at least one of the configuration register 101 and the first-in-first-out controller fails, so that the external interrupt control device can interrupt the communication system 100 when receiving the interrupt signal.
[0053] Furthermore, the interrupt control device may be configured to not only determine whether the configuration register 101 and the FIFO controller are faulty, but also determine whether other parts of the communication system 100 are faulty. In this case, the configuration register 101 or the FIFO controller may be configured to also obtain the current status of other parts of the communication system 100 and send the current status to the interrupt control device, or the interrupt control device may directly obtain the current status of other parts of the communication system 100.
[0054] Combine the following Figure 2 The specific example shown is used for explanation.
[0055] exist Figure 2 In the specific example shown, the communication system 100 includes a configuration register 101, a timer 102, two data shift registers 103, a first-in-first-out controller 105, a static random access memory 106, a multiplexer 107, two sending devices 104, and an interrupt control device 108. The sending device 104 includes a routing management module, which is used to manage the routing table to implement routing management according to the routing table.
[0056] Specifically, the configuration register 101 is mainly a part configured by the user, which involves the data bit length configuration of the channel communication output. The data is stored in the configuration register 101. The configuration data stored in the configuration register 101 may include address configuration, waveform polarity configuration (the above-mentioned data to be sent), baud rate configuration data, routing table configuration, etc. The routing table configuration can be used to indicate which input and output ports 109 a data shift register 103 outputs to.
[0057] exist Figure 2 In the embodiment, the configuration register 101 obtains configuration data through an Advanced Peripheral Bus (APB BUS).
[0058] The FIFO controller 105 transfers data into the data shift register 103 according to the actual state of the data shift register 103 by configuring parameters such as the data frame size, and outputs the working state of the FIFO controller 105 according to the overall data.
[0059] The static random access memory 106 mainly stores the data of the single-line communication. Because the module supports multiple configurations and outputs at the same time, the address of the static random access memory 106 can be split into multiple parts to support configurability. The address allocation of the static random access memory 106 supports multiple types of configurations. For example, the configurable static random access memory 106 becomes a whole and is fixedly moved to the first data shift register 103. For another example, the configurable static random access memory 106 is divided into two parts and moved to two data shift registers 103 respectively. For another example, the configurable static random access memory 106 is divided into four parts and moved to four data shift registers 103 respectively.
[0060] The timer 102 mainly provides the clock for single-line communication, configures the data according to the set baud rate, and drives the data of the data shift register 103 to be output to the routing management module based on the clock sent by the clock source 112. An external trigger can also be used as the output driver of the routing management module.
[0061] Optionally, the timer 102 may be set as a multi-channel timer 102, so that each channel can drive an independent data shift register 103. In this case, the multiplexer 107 may not be set. Moreover, it may be set that after the data output of the corresponding channel is completed, control information may be output to realize the enable control of the corresponding channel of the timer 102.
[0062] The data shift register 103 realizes data output through the drive of the clock source. When the data in the data shift register 103 is completed, the data shift register 103 can be updated according to the actual output data state. The data shift register 103 needs to be configured to which routing management module each data shift register 103 outputs, and the routing management module can realize the control of the input and output port 109.
[0063] The routing management module selects, according to the actually configured input / output port 109 , to route the data outputted by the data shift register 103 to the input / output port 109 configured for output.
[0064] Furthermore, when output is performed through the input / output port 109, the output can be performed through one input / output port 109 or through multiple input / output ports 109. In other words, the target data can be sent using one route or multiple routes. When the target data is output through multiple input / output ports 109, the data on each input / output port 109 is the same.
[0065] Each data shift register 103 supports multiple routing output configurations, and the pins supporting the input and output ports 109 can be fixed in the design. Figure 2In the , PIN is used to represent the pin, Figure 2 PIN A, ..., PIN E in the figure are the specific numbers of the pins.
[0066] Moreover, in Figure 2 In the example shown, a transmission device selector 110 and a configuration selector 111 are also provided.
[0067] Specifically, in Figure 2 In the example, the number of sending devices 104 is 2, and N in the N data shift registers 103 is also set to 2.
[0068] Furthermore, different sending devices 104 are provided, and the configured routes thereof are consistent, that is, it is required to realize that when a certain route is set to be used for data transmission, both sending devices 104 can realize the data transmission.
[0069] At this time, since there are two data shift registers 103 , the sending device 104 to be used is selected by configuring the selector 111 , and data transmission is implemented through the sending device selector 110 , so that the data output by any data shift register 103 can be input to any sending device 104 .
[0070] The interrupt control device 108 may be used to send an interrupt signal to the external interrupt control device 108 when at least one of the configuration register 101 and the FIFO controller 105 fails. The failure may be, for example, a trigger error. That is, if the interrupt control device 108 finds that the configuration register 101 fails, or the FIFO controller 105 fails, or both the configuration register 101 and the FIFO controller 105 fail, an interrupt signal is sent.
[0071] Furthermore, the interrupt control device 108 may also be used to send feedback information to the client after the main channel data output is completed.
[0072] For detailed workflow, please refer to Figure 3 .exist Figure 3 In the embodiment, the communication system 100 is a single-line communication module.
[0073] First, configure the single-wire communication module registers.
[0074] Specifically, the data to be sent and the data length are written into the static random access memory 106 , and information such as output polarity, baud rate configuration data, and routing configuration are configured into the configuration register 101 .
[0075] Enable the single-line communication module and start communication.
[0076] The data in the static random access memory 106 is transferred to the shift register (the data shift register 103 mentioned above).
[0077] The shift register shifts under the trigger signal, and the data is output to the sending device 104. The trigger signal can be sent by the timer 102 or externally triggered.
[0078] The sending device 104 includes a plurality of routing modules (the above-mentioned routing management modules). The sending device 104 outputs data to the configured input and output ports according to the configured routing allocation.
[0079] After all the data in the shift register are shifted out, the set output data length is used to determine whether to continue to move data from the static random access memory 106 to the shift register. If the output is not completed, return to the above step of moving the data to the shift register.
[0080] When all outputs are completed, the channel output is turned off. If it is an internal trigger, a control signal is sent to timer 102 to turn off the channel count of timer 102. When it is an external trigger, the external trigger source is turned off through the interrupt software. When the interrupt is enabled, an interrupt signal is sent to the client.
[0081] In summary, the communication system of the embodiment of the present invention is provided with a communication system including a configuration register for receiving and storing configuration data, wherein the configuration data includes data to be sent and baud rate configuration data for determining the data transmission rate; a timer connected to the configuration register and a clock source, for determining the trigger signal sending time according to the baud rate configuration data, and sending an internal trigger signal when the current time reaches the trigger signal sending time according to the clock source; a data shift register, the data shift register is connected to the configuration register, for receiving and storing data to be sent, and when receiving the internal trigger signal, outputting the target data to the sending device, wherein the target data is a bit of data in the data shift register that is closest to the output port during the shifting process; a sending device, for sending the target data to the receiving device. Through the communication system, after the configuration data is generated, data transmission can be realized by pure hardware, thereby liberating the MCU, and the MCU has sufficient time to handle other tasks and interrupts, reducing the possibility of delays or packet loss in other communications and controls, and there will be no timing deviations caused by software operations, thereby causing communication failures.
[0082] Furthermore, the present invention provides an ultrasonic radar.
[0083] Figure 4 4 is a structural block diagram of an ultrasonic radar according to an embodiment of the present invention.
[0084] like Figure 4 As shown, the ultrasonic radar 1000 includes an ultrasonic sensor 200 and the above-mentioned communication system 100 .
[0085] The ultrasonic radar of the embodiment of the present invention, through the communication system of the above embodiment, can realize data sending by pure hardware after the configuration data is generated, thereby freeing up the MCU. The MCU has sufficient time to handle other tasks and interrupts, reducing the possibility of delays or packet loss in other communications and controls. Moreover, there will be no timing deviation caused by software operation, which will lead to communication failure.
[0086] Furthermore, the present invention provides a vehicle.
[0087] Figure 5 4 is a structural block diagram of a vehicle according to an embodiment of the present invention.
[0088] like Figure 5 As shown, the vehicle 10 includes the ultrasonic radar 1000 mentioned above.
[0089] The vehicle of the embodiment of the present invention, through the above-mentioned ultrasonic radar, can realize data sending by pure hardware after the configuration data is generated, thereby freeing up the MCU. The MCU has sufficient time to handle other tasks and interrupts, reducing the possibility of delays or packet loss in other communications and controls. Moreover, there will be no timing deviation caused by software operation, which will lead to communication failure.
[0090] It should be noted that the logic and / or steps represented in the flowchart or described in other ways herein can be considered as a sequenced list of executable instructions for implementing logical functions, and can be specifically implemented in any computer-readable medium for use by an instruction execution system, device or equipment (such as a computer-based system, a system including a processor, or other system that can fetch instructions from an instruction execution system, device or equipment and execute instructions), or in combination with these instruction execution systems, devices or equipment. For the purpose of this specification, "computer-readable medium" can be any device that can contain, store, communicate, propagate or transmit a program for use by an instruction execution system, device or equipment, or in combination with these instruction execution systems, devices or equipment. More specific examples (non-exhaustive list) of computer-readable media include the following: an electrical connection portion with one or more wirings (electronic device), a portable computer disk box (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable and editable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disk read-only memory (CDROM). In addition, the computer-readable medium may even be paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium and then editing, interpreting or processing in other suitable ways if necessary, and then stored in a computer memory.
[0091] It should be understood that the various parts of the present invention can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiment, multiple steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. If implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.
[0092] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.
[0093] In the description of this specification, the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and cannot be understood as a limitation on the present invention.
[0094] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of the present invention, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.
[0095] In the description of this specification, unless otherwise specified, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0096] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being "above", "above" or "above" a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being "below", "below" or "below" a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.
[0097] Although the embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and are not to be construed as limitations of the present invention. A person skilled in the art may change, modify, replace and vary the above embodiments within the scope of the present invention.
Claims
1. A communication system, characterized in that: The system comprises: A configuration register, used to receive and store configuration data generated by an external data source, wherein the configuration data includes data to be sent and baud rate configuration data for determining a data transmission rate; A timer connected to the configuration register and the clock source, for determining a trigger signal sending time according to the baud rate configuration data, and sending an internal trigger signal when the current time reaches the trigger signal sending time as determined by the clock source; A data shift register, the data shift register being connected to the configuration register, and being used to receive and store the data to be sent, and output target data to a sending device upon receiving the internal trigger signal, wherein the target data is a bit of data in the data shift register that is closest to the output port during the shifting process; The sending device is used to send the target data to the receiving device.
2. The communication system according to claim 1, characterized in that: The system further comprises a first-in-first-out controller and a static random access memory, wherein the first-in-first-out controller is connected to the configuration register, and the static random access memory is connected to the first-in-first-out controller and the data shift register; wherein, The first-in-first-out controller is used to obtain the data to be sent from the configuration register, write the data to be sent into the static random access memory, and control the static random access memory to write the data to be sent into the data shift register.
3. The communication system according to claim 2, characterized in that: The number of the data shift registers is N, where N is a positive integer, and the output configurations of any two of the data shift registers are different. The first-in-first-out controller is further used for: A target register is determined from the N data shift registers according to the output configuration, and a plurality of data frames are obtained according to the data to be sent, and when the target register is in an idle state, one frame of the plurality of data frames is written into the target register until all the plurality of data frames are written into the target register.
4. The communication system according to claim 3, characterized in that: The timer is an N-channel timer, and the N channels of the timer are connected to the N data shift registers in a one-to-one correspondence.
5. The communication system according to claim 1, characterized in that: The system further comprises: A multiplexer, the multiplexer is connected to the timer, the external trigger device and the data shift register, and the multiplexer is used to send the received trigger signal to the data shift register when receiving an internal trigger signal sent by the timer or an external trigger signal sent by the external trigger device.
6. The communication system according to claim 1, characterized in that: The number of the transmitting devices is multiple, and the system further includes a transmitting device selector and a configuration selector, wherein the transmitting device selector is connected to the data shift register, the configuration selector and the multiple transmitting devices; The configuration selector is used to determine a target sending device from the plurality of sending devices, and when the sending device selector receives the target data output by the data shift register, controls the sending device selector to output the target data to the target sending device.
7. The communication system according to claim 1, characterized in that: The sending device is configured with a plurality of input and output ports, each of which is configured with a corresponding route, and the sending device is specifically used for: A target route is determined from the plurality of routes, and when the target data is received, the target data is sent to the receiving device through an input and output port corresponding to the target route.
8. The communication system according to claim 2, characterized in that: The system further comprises: An interrupt control device is used to output an interrupt signal to the outside when at least one of the configuration register and the first-in-first-out controller fails, so that an external interrupt control device can interrupt the communication system according to the interrupt signal, and when the data to be sent is sent to the receiving device, output a sending completion signal to the outside.
9. An ultrasonic radar, characterized in that: The invention comprises an ultrasonic sensor and a communication system according to any one of claims 1 to 8.
10. A vehicle, characterized in that: Comprising the ultrasonic radar according to claim 9.
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