Display device

Abstract

A display device includes: a panel layer including pixels in a display area; a light blocking layer over the panel layer and defining a light blocking area surrounding at least a portion of the display area; and an input sensing layer defining a sensing area between the panel layer and the light blocking layer, and including: a first conductive layer including a first constant voltage electrode layer, at least a portion of the first constant voltage electrode layer being in a non-light blocking area between the light blocking area and the display area; a second conductive layer including a second constant voltage electrode layer, at least a portion of the second constant voltage electrode layer being in the non-light blocking region, and electrically contacting the first constant voltage electrode layer through a plurality of first vias in the non-light blocking region; and a sensing insulating layer between the first conductive layer and the second conductive layer and defining the plurality of first vias wherein a distance between adjacent first vias varies.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2023-0150986 filed in the Korean Intellectual Property Office on November 3, 2023, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] The present disclosure relates to a display device. Background Art

[0004] The display device may include a display area where an image is displayed and a frame area where no image is displayed.

[0005] Meanwhile, external light reflected by various components (eg, electrodes, wires, etc.) included in the display device may be visible to a user of the display device between the display region and the bezel region, thereby reducing visibility of the display device. Summary of the invention

[0006] An aspect of the present disclosure provides a display device having improved visibility.

[0007] A display device includes: a panel layer including pixels in a display area; a light blocking layer above the panel layer, and the light blocking layer defines a light blocking area surrounding at least a portion of the display area in a plan view; and an input sensing layer between the panel layer and the light blocking layer, the input sensing layer defines a sensing area corresponding to the display area, and the input sensing layer includes: a first conductive layer including a first constant voltage electrode layer, at least a portion of the first constant voltage electrode layer is in a non-light blocking area between the light blocking area and the display area in a plan view; a second conductive layer including a second constant voltage electrode layer, at least a portion of the second constant voltage electrode layer is in the non-light blocking area, and the second constant voltage electrode layer electrically contacts the first constant voltage electrode layer through a plurality of first through holes in the non-light blocking area; and a sensing insulating layer between the first conductive layer and the second conductive layer, and the sensing insulating layer defines the plurality of first through holes, wherein respective distances between adjacent first through holes in the plurality of first through holes vary.

[0008] In a plan view, the plurality of first through holes may have a planar shape including a circle, an ellipse, or a polygon.

[0009] The plurality of first through holes may have the same planar shape.

[0010] In a plan view, an area occupied by the plurality of first through holes in the non-light blocking region may be approximately 0.5% or more and approximately 10% or less of an area in which the first constant voltage electrode layer and the second constant voltage electrode layer overlap each other in the non-light blocking region.

[0011] The first constant voltage electrode layer may include a first constant voltage electrode pattern and a second constant voltage electrode pattern spaced apart in a plan view, and the first constant voltage electrode pattern and the second constant voltage electrode pattern electrically contact the second constant voltage electrode layer through the plurality of first via holes.

[0012] The first conductive layer may further include a first transmission line layer having at least a portion in the non-light blocking area, wherein the second conductive layer further includes a second transmission line layer having at least a portion in the non-light blocking area, and wherein the first transmission line layer and the second transmission line layer are in electrical contact with each other in the non-light blocking area through a plurality of second through holes defined in the sensing insulating layer.

[0013] In a plan view, the second constant voltage electrode layer may be between the second transmission line layer and the sensing area, wherein the first transmission line layer includes a portion extending in a direction toward the sensing area through a space between the first constant voltage electrode pattern and the second constant voltage electrode pattern.

[0014] The first transmission line layer and the second transmission line layer may be electrically insulated from the first constant voltage electrode layer and the second constant voltage electrode layer.

[0015] Respective distances between adjacent second through-holes in the plurality of second through-holes may vary.

[0016] One of the first conductive layer and the second conductive layer may further include a plurality of first sensing electrode patterns in the sensing area, a plurality of second sensing electrode patterns, and a second connection pattern electrically connecting the plurality of second sensing electrode patterns, wherein the other of the first conductive layer and the second conductive layer further includes a first connection pattern, the first connection pattern being in the sensing area and electrically connecting the plurality of first sensing electrode patterns.

[0017] The plurality of first sensing electrode patterns may be electrically insulated from the plurality of second sensing electrode patterns.

[0018] The display device according to an embodiment of the present disclosure includes: a panel layer including pixels in a display area; a light blocking layer above the panel layer, and the light blocking layer defines a light blocking area surrounding at least a portion of the display area in a plan view; and an input sensing layer between the panel layer and the light blocking layer, the input sensing layer defines a sensing area corresponding to the display area, and the input sensing layer includes: a first conductive layer including a first constant voltage electrode layer, the first constant voltage electrode layer having at least a portion in a non-light blocking area between the light blocking area and the display area in a plan view; a second conductive layer including a first constant voltage electrode layer, two constant voltage electrode layers, the second constant voltage electrode layer having at least a portion in the non-light blocking area, and the second constant voltage electrode layer electrically contacts the first conductive layer through a plurality of first through holes in the non-light blocking area; and a sensing insulating layer between the first conductive layer and the second conductive layer, and the sensing insulating layer defines the plurality of first through holes, wherein, in a plan view, an area in the non-light blocking area occupied by the plurality of first through holes is approximately 0.5% or greater and approximately 5% or less of an area in which the first constant voltage electrode layer and the second constant voltage electrode layer overlap with each other in the non-light blocking area.

[0019] Respective distances between adjacent first through holes among the plurality of first through holes may be constant.

[0020] In a plan view, the plurality of first through holes may have a planar shape including a circle, an ellipse, or a polygon.

[0021] The plurality of first through holes may have the same planar shape.

[0022] The first constant voltage electrode layer may include a first constant voltage electrode pattern and a second constant voltage electrode pattern spaced apart in a plan view, wherein the first constant voltage electrode pattern and the second constant voltage electrode pattern electrically contact the second constant voltage electrode layer through the plurality of first vias.

[0023] The first conductive layer may further include a first transmission line layer having at least a portion in the non-light blocking area, wherein the second conductive layer further includes a second transmission line layer having at least a portion in the non-light blocking area, and wherein, in the non-light blocking area, the first transmission line layer and the second transmission line layer are in electrical contact with each other through a second through hole defined in the sensing insulating layer.

[0024] In a plan view, the second constant voltage electrode layer may be between the second transmission line layer and the sensing area, wherein the first transmission line layer includes a portion extending in a direction toward the sensing area through a space between the first constant voltage electrode pattern and the second constant voltage electrode pattern.

[0025] The first transmission line layer and the second transmission line layer may be electrically insulated from the first constant voltage electrode layer and the second constant voltage electrode layer.

[0026] In a plan view, an area occupied by the second through hole in the non-light blocking region may be about 0.5% or more and about 5% or less of an area in which the first and second transmission line layers overlap each other in the non-light blocking region.

[0027] In a display device according to an embodiment of the present disclosure, in order to make the first constant voltage electrode layer electrically contact the second constant voltage electrode layer in the non-light blocking area between the light blocking area and the display area (in a plan view), a plurality of first through holes defined in the sensing insulating layer between the first constant voltage electrode layer and the second constant voltage electrode layer can be arbitrarily positioned. Therefore, even when external light incident on the non-light blocking area is reflected by the second constant voltage electrode layer formed along the cross-sectional profile of the plurality of first through holes, the interference phenomenon caused by the external light can be reduced or minimized. Therefore, the visibility of the display device can be improved.

[0028] In a display device according to an embodiment of the present disclosure, in order to make the first constant voltage electrode layer and the second constant voltage electrode layer electrically contact each other in the non-light blocking area between the light blocking area and the display area in a plan view, a plurality of first through holes defined in a sensing insulating layer between the first constant voltage electrode layer and the second constant voltage electrode layer can be positioned at a relatively low density. Therefore, even when external light incident on the non-light blocking area is reflected by the second constant voltage electrode layer formed along the cross-sectional profile of the plurality of first through holes, the interference phenomenon caused by the external light can be reduced or minimized. Therefore, the visibility of the display device can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 is a diagram for describing a display device according to an embodiment of the present disclosure.

[0030] Figure 2 and Figure 3 It is used to describe the Figure 1 Diagram of the panel layers in a display device.

[0031] Figure 4 is along Figure 3 A cross-sectional view taken along line XX'.

[0032] Figure 5 and Figure 6 It is used to describe the Figure 1 A diagram of one or more embodiments of an input sensing layer in a display device.

[0033] Figure 7 yes Figure 6 An enlarged plan view of area B.

[0034] Figure 8 is along Figure 7 A cross-sectional view taken along line Y1-Y1'.

[0035] Fig. 9 is along Figure 7 A cross-sectional view taken along line Y2-Y2'.

[0036] Fig.10 is used to describe Figure 6 Area A is included in Figure 5 A plan view of the various electrodes and lines implemented in the first conductive layer of the input sensing layer.

[0037] Fig.11 is used to describe Figure 6 Area A is included in Figure 5 A plan view of the various electrodes and lines implemented in the second conductive layer of the input sensing layer.

[0038] Fig.12 yes Figure 6 2 is an enlarged plan view of a region A of FIG. 1 and is a plan view for describing a first embodiment among one or more embodiments of the present disclosure.

[0039] Fig.13 is along Fig.12 Cross-sectional views taken along line II', line II-II' and line III-III'.

[0040] Fig.14 yes Figure 6 2 is an enlarged plan view of a region A of FIG. 1 and is a plan view for describing a second embodiment among one or more embodiments of the present disclosure.

[0041] Fig.15 yes Figure 6 2 is an enlarged plan view of a region A of FIG. 1 and is a plan view for describing a third embodiment among one or more embodiments of the present disclosure.

[0042] Fig.16 yes Figure 6 2 is an enlarged plan view of a region A of FIG. 1 and is a plan view for describing a fourth embodiment among one or more embodiments of the present disclosure.

[0043] Fig.17yes Figure 6 2 is an enlarged plan view of a region A of FIG. 1 and is a plan view for describing a fifth embodiment among one or more embodiments of the present disclosure.

[0044] Fig.18 yes Figure 6 2 is an enlarged plan view of a region A of FIG. 1 and is a plan view for describing a sixth embodiment among one or more embodiments of the present disclosure.

[0045] Fig.19 yes Figure 6 2 is an enlarged plan view of a region A of FIG. 1 and is a plan view for describing a seventh embodiment among one or more embodiments of the present disclosure.

[0046] Fig. 20 It is used to describe the Figure 1 Figures of other embodiments among one or more embodiments of an input sensing layer in a display device.

[0047] Fig.21 is used to describe Figure 6 Area A is included in Fig. 20 A plan view of the various electrodes and lines implemented in the second conductive layer of the input sensing layer.

[0048] Fig. 22 is used to describe Figure 6 Area A is included in Fig. 20 A plan view of the various electrodes and lines implemented in the first conductive layer of the input sensing layer.

[0049] Fig.23 yes Figure 6 2 is an enlarged plan view of a region A of FIG. 1 and is a plan view for describing an eighth embodiment among one or more embodiments of the present disclosure.

[0050] Fig.24 is along Fig.23 Cross-sectional views taken along line IV-IV', line VV' and line VI-VI'. DETAILED DESCRIPTION

[0051] By referring to the detailed description of the embodiments and the accompanying drawings, it is easier to understand the various aspects of some embodiments of the present disclosure and the method for realizing it. The described embodiments are provided as examples so that the present disclosure will be detailed and complete, and will fully convey the various aspects of the present disclosure to those skilled in the art. Therefore, redundant, irrelevant or unrelated to the description of the embodiments, or processes, elements and techniques that are not necessary for a complete understanding of the various aspects of the present disclosure for those of ordinary skill in the art can be omitted. Unless otherwise stated, in the entire drawings and written descriptions, the same reference numerals, characters or combinations thereof represent the same elements, and therefore, repeated descriptions thereof can be omitted.

[0052] The described embodiments may have various modifications and may be implemented in different forms, and should not be construed as being limited to the embodiments shown herein. The use of "may", "can" or "may not" when describing one or more embodiments corresponds to one or more embodiments of the present disclosure. The present disclosure encompasses all modifications, equivalents and alternatives within the scope of the ideas and techniques of the present disclosure. In addition, each of the features of the various embodiments of the present disclosure may be partially or fully assembled to each other, and various interlocks and drives in technology are possible. Each embodiment may be implemented independently of one another or may be implemented together in association.

[0053] In the drawings, the relative sizes of elements, layers, and regions may be exaggerated for clarity and / or descriptive purposes. In addition, the use of cross-hatching and / or shading in the drawings is generally provided to clarify the boundaries between adjacent elements. Thus, unless otherwise specified, neither the presence nor the absence of cross-hatching or shading conveys or indicates any preference or requirement for a particular material, material property, size, ratio, commonality between the elements shown, and / or any other characteristic, attribute, property, etc. of an element.

[0054] In this article, various embodiments are described with reference to cross-sectional illustrations as schematic illustrations of embodiments and / or intermediate structures. In this way, changes in the shapes of the illustrations due to, for example, manufacturing techniques and / or tolerances will be expected. In addition, for the purpose of describing embodiments according to the concepts of the present disclosure, the specific structural descriptions or specific functional descriptions disclosed herein are merely illustrative. Therefore, the embodiments disclosed herein should not be interpreted as being limited to the illustrated shapes of elements, layers, or regions, but include deviations in shapes, such as those caused by manufacturing.

[0055] For example, an implanted region illustrated as a rectangle will, typically, have rounded or curved features and / or a gradient of implant concentration at the edges of the implanted region rather than a binary change from implanted to non-implanted region. Likewise, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation takes place.

[0056] For ease of explanation, spatially relative terms such as "under ...", "below ...", "lower", "under ...", "below ...", "above ...", "upper", and "upper side" may be used herein to describe the relationship between an element or feature and another element (or elements) or feature (or features) as shown in the accompanying drawings. It will be understood that, in addition to the orientations depicted in the accompanying drawings, spatially relative terms are also intended to cover different orientations of the device in use or operation. For example, if the device in the accompanying drawings is turned over, the element described as "under" other elements or features "under" or "below" will then be oriented "above" other elements or features. Therefore, the example terms "under ..." and "under ..." can cover both upper and lower orientations. The device can be oriented otherwise (e.g., rotated 90 degrees or at other orientations), and the spatially relative terms used herein should be interpreted accordingly. Similarly, when a first component is described as being arranged "on" a second component, this indicates that the first component is arranged at the upper or lower side of the second component, without being limited to the upper side of the second component based on the direction of gravity.

[0057] In addition, the phrase "in a plan view" means when an object portion is observed from above, and the phrase "in a schematic cross-sectional view" means when a schematic cross-section obtained by vertically cutting an object portion is observed from the side. The term "overlap" means that the first object can be above or below the second object or on one side of the second object, and vice versa. In addition, the term "overlap" may include stacking, facing or facing, extending on ..., covering or partially covering, or any other suitable term as will be appreciated and understood by a person of ordinary skill in the art. The expression "non-overlapping" may include meanings such as "spaced apart from ... ", "offset from ... ", "separated from ... ", or any other suitable equivalents as will be appreciated and understood by a person of ordinary skill in the art. The terms "facing" and "facing" may mean that the first object may be directly or indirectly opposite to the second object. In the case where a third object is between the first object and the second object, the first object and the second object may be understood to be indirectly opposite to each other, but still facing each other.

[0058] It will be understood that when an element, layer, region, or component is referred to as being "formed on," "on," "connected to," or "(operably or communicatively) coupled to" another element, layer, region, or component, the element, layer, region, or component may be formed directly on, directly on, directly connected to, or directly coupled to, or indirectly formed on, indirectly on, indirectly connected to, or indirectly coupled to, such that one or more intervening elements, layers, regions, or components may be present. Furthermore, this may collectively mean directly coupled or indirectly coupled or directly connected or indirectly connected as well as integrally coupled or non-integrally coupled or integrally connected or non-integrally connected. For example, when a layer, region, or component is referred to as being "electrically connected" or "electrically coupled" to another layer, region, or component, the layer, region, or component may be directly electrically connected to or directly electrically coupled to the other layer, region, or component, or there may be one or more intervening layers, regions, or components. One or more intervening components may include switches, resistors, and / or capacitors, etc. When describing embodiments, unless explicitly described as being directly connected, the statement of connection indicates an electrical connection, and "directly connected / directly coupled" or "directly on..." means that one component is directly connected or directly coupled to another component or is on another component without intermediate components.

[0059] In addition, in this specification, when a part of a layer, film, region, plate, etc. is formed on another part, the formation direction is not limited to the upper direction but includes forming the part on the side surface or in the lower direction. On the contrary, when a part of a layer, film, region, plate, etc. is formed "below" another part, this includes not only the case where the part is "directly below" another part but also the case where there is another part between the part and the other part. At the same time, other expressions describing the relationship between components (such as "between...", "directly between..." or "adjacent to..." and "directly adjacent to...") can be similarly interpreted. It will be understood that when an element or layer is referred to as "between" two elements or layers, the element or layer may be the only element or layer between the two elements or layers, or one or more intermediate elements or layers may also be present.

[0060] For the purposes of this disclosure, expressions such as “at least one of…” or “any one of…” or “one or more of…” when following a list of elements modify the entire list of elements and do not modify the individual elements in the list. For example, “at least one of X, Y, and Z”, “at least one of X, Y, and Z”, “at least one selected from the group consisting of X, Y, and Z”, and “at least one selected from the group consisting of X, Y, and Z” may be interpreted as only X, only Y, only Z, any combination of two or more of X, Y, and Z, such as XYZ, XY, YZ, and XZ, or any variation thereof. Similarly, the expressions “at least one of A and B” and “at least one of A and B” may include A, B, or A and B. As used herein, "or" generally means "and / or", and the term "and / or" includes any and all combinations of one or more of the associated listed items. For example, the expression "A and / or B" may include A, B, or A and B. Similarly, expressions such as "at least one of", "a plurality of", "one of", and other prepositional phrases, when following a list of elements, modify the entire list of elements and do not modify the individual elements in the list.

[0061] It will be understood that, although the terms "first", "second", "third", etc. can be used in this article to describe various elements, components, areas, layers and / or sections, these elements, components, areas, layers and / or sections should not be limited by these terms. These terms do not correspond to a specific order, position or superiority, and are used only to distinguish an element, member, component, area, region, layer, section or part from another element, member, component, area, region, layer, section or part. Therefore, without departing from the spirit and scope of the present disclosure, the first element, component, area, layer or section described below can be referred to as the second element, component, area, layer or section. Describing an element as a "first" element may not require or imply the presence of a second element or other elements. The terms "first", "second", etc. can also be used to distinguish elements of different categories or different groups in this article. For the sake of brevity, the terms "first", "second", etc. can respectively represent "first category (or first group)", "second category (or second group)", etc.

[0062] In the example, the x-axis, y-axis and / or z-axis are not limited to the three axes of the rectangular coordinate system, and can be interpreted in a broader sense. For example, the x-axis, y-axis and z-axis can be perpendicular to each other, or can represent different directions that are not perpendicular to each other. The same applies to the first direction, the second direction and / or the third direction.

[0063] The terms used herein are for the purpose of describing the embodiments only and are not intended to limit the present disclosure. Unless the context clearly indicates otherwise, as used herein, the singular forms "a" and "one (kind / person)" are also intended to include the plural forms. It will also be understood that when used in this specification, the terms "comprises, comprising", "have, having" and "includes, including" illustrate the presence of stated features, wholes, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or their groups.

[0064] As used herein, the terms "substantially", "approximately", "approximately" and similar terms are used as terms of approximation rather than terms of degree, and are intended to illustrate the inherent deviations in measured or calculated values ​​that will be recognized by those of ordinary skill in the art. For example, "substantially" may include a range of + / -5% of the corresponding value. Taking into account the measurement in question and the errors associated with the measurement of a particular quantity (i.e., the limitations of the measurement system), "approximately" or "approximately" as used herein include the stated values ​​and mean within the range of acceptable deviations for a particular value as determined by those of ordinary skill in the art. For example, "approximately" may mean within one or more standard deviations, or within ±30%, ±20%, ±10%, or ±5% of the stated value. In addition, when describing embodiments of the present disclosure, the use of "may" refers to "one or more embodiments of the present disclosure".

[0065] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the present disclosure belongs. It will also be understood that, unless explicitly defined as such herein, terms (such as those defined in general dictionaries) should be interpreted as having a meaning consistent with their context in the relevant art and / or the meaning in this specification, and should not be interpreted in an idealized or overly formal sense.

[0066] Figure 1 is a diagram for describing a display device according to an embodiment of the present disclosure.

[0067] Reference Figure 1 , the display device DD may include a panel layer PNL, an input sensing layer TSL, a light blocking layer LBL, and a window WD.

[0068] The panel layer PNL may include a plurality of pixels PX. Each of the plurality of pixels PX may emit light, and the display device DD may display an image by combining the light emitted from the plurality of pixels PX.

[0069] The area in the panel layer PNL where the plurality of pixels PX are located may be referred to as a display area DA. Meanwhile, the area in the panel layer PNL where the plurality of pixels PX are not located may be referred to as a first peripheral area PA1. Various components (e.g., electrodes, circuits, wires, etc.) may be located in the first peripheral area PA1 to provide electrical signals to the plurality of pixels PX.

[0070] The input sensing layer TSL may be positioned on the panel layer PNL. The input sensing layer TSL may be integrally formed with the panel layer PNL, or may be formed separately from the panel layer PNL and then attached on the panel layer PNL.

[0071] The input sensing layer TSL may include a plurality of sensing electrodes TE. The plurality of sensing electrodes TE may detect a touch input of a user of the display device DD.

[0072] The region in the input sensing layer TSL where the plurality of sensing electrodes TE are positioned may be referred to as a sensing region SA. Meanwhile, the region in the input sensing layer TSL where the plurality of sensing electrodes TE are not positioned may be referred to as a second peripheral region PA2. Various components (e.g., electrodes, circuits, lines, etc.) for transmitting input signals sensed from the plurality of sensing electrodes TE or for providing electrical signals to the plurality of sensing electrodes TE and / or the plurality of pixels PX may be positioned in the second peripheral region PA2.

[0073] At the same time, if Figure 1 As shown in FIG. 1 , the display area DA of the panel layer PNL and the sensing area SA of the input sensing layer TSL may substantially overlap. Therefore, a touch input of a user of the display device DD in the display area DA displaying an image may be sensed.

[0074] In this case, the plurality of sensing electrodes TE may be formed of a transparent conductive material, or may be formed in a mesh pattern that does not overlap with the plurality of pixels PX in a plan view. Here, the "plane" may refer to a plane that is perpendicular to a third direction DR3 and defined by a first direction DR1 and a second direction DR2 that intersect each other, the third direction DR3 being a stacking direction of a panel layer PNL, an input sensing layer TSL, a light blocking layer LBL, and a window WD included in the display device DD. Therefore, light emitted from the plurality of pixels PX may not be substantially blocked by the plurality of sensing electrodes TE.

[0075] The light blocking layer LBL may be positioned on the input sensing layer TSL. The light blocking layer LBL may include a material that blocks light. Therefore, the area where the light blocking layer LBL is positioned may be referred to as a light blocking area LBA.

[0076] The light blocking area LBA may not substantially overlap with the display area DA. For example, the light blocking area LBA may be formed to surround at least a portion of the display area DA. In this case, a user of the display device DD may perceive the light blocking area LBA as a border area where no image is displayed.

[0077] As described above, the light blocking area LBA may not substantially overlap the display area DA. Therefore, the light blocking layer LBL positioned in the light blocking area LBA may not substantially block the light emitted from the plurality of pixels PX. In this case, the light blocking layer LBL positioned in the light blocking area LBA may play a role in blocking external light incident from outside the display device DD.

[0078] In one or more embodiments, Figure 1 As shown in , the non-light blocking area NBA may be defined as an area between the light blocking area LBA and the display area DA. That is, the light blocking area LBA may not completely overlap with the first peripheral area PA1 and / or the second peripheral area PA2. This means that when the light blocking area LBA completely overlaps with the first peripheral area PA1 and / or the second peripheral area PA2, the area of ​​the frame area perceived by the user of the display device DD becomes relatively large. Here, when the area of ​​the frame area becomes relatively large, the convenience of use for the user of the display device DD may be reduced.

[0079] Because of the reasons mentioned above, since the non-light-blocking area NBA is defined as the area between the display area DA and the light-blocking area LBA, the external light L1 and L2 may enter through the non-light-blocking area NBA. The external light L1 and L2 may be reflected by various components (e.g., electrodes, circuits, wires, etc.) positioned in the second peripheral area PA2 of the input sensing layer TSL. In this case, various patterns (e.g., rainbow patterns, etc.) may be visible due to interference phenomena caused by the reflected external light L1 and L2. Therefore, the visibility or quality of the display device DD may be reduced.

[0080] The window WD may be positioned on the input sensing layer TSL and the light blocking layer LBL. The window WD may include a material having relatively high rigidity and relatively high light transmittance.

[0081] Next, a configuration of the present disclosure for preventing the above-mentioned reduction in visibility will be described.

[0082] Figure 2 and Figure 3 It is used to describe the Figure 1 A diagram of a panel layer in a display device, and Figure 4 is along Figure 3 A cross-sectional view taken along line XX'.

[0083] Reference Figure 2 , the panel layer PNL may include a substrate SUB, a circuit layer CIR, a light emitting element layer EEL and an encapsulation layer ENL.

[0084] The substrate SUB may be rigid or flexible. The substrate SUB may include various materials, such as glass, plastic, etc.

[0085] The circuit layer CIR may be positioned on the substrate SUB ("on" as used herein may also mean "above"). The circuit layer CIR may include at least one transistor and at least one capacitor. In addition, the circuit layer CIR may also include at least one line and at least one electrode. To this end, the circuit layer CIR may include a plurality of insulating layers and a conductive layer between two adjacent insulating layers among the plurality of insulating layers sequentially stacked in the third direction DR3.

[0086] The light emitting element layer EEL may include various components capable of emitting light based on an electrical signal provided from the circuit layer CIR. For example, when the display device DD is an organic light emitting display device, the light emitting element layer EEL may include an anode electrode, a cathode electrode, and an organic light emitting layer interposed therebetween.

[0087] The encapsulation layer ENL may be positioned on the light emitting element layer EEL. The encapsulation layer ENL may cover the light emitting element layer EEL and the circuit layer CIR, and may play a role in protecting the light emitting element layer EEL and the circuit layer CIR from moisture penetrating from the outside.

[0088] Reference Figure 3 , the unit pixel PXU and the plurality of lines may be positioned in the display area DA of the panel layer PNL, and the first pad array PD1 may be positioned in the first peripheral area PA1.

[0089] The unit pixel PXU may include a plurality of pixels arranged according to a corresponding rule. The plurality of unit pixels PXU may be provided in the display area DA. In this case, the plurality of unit pixels PXU may fill the display area DA without a blank space.

[0090] In one or more embodiments, the unit pixel PXU may include a first pixel PX1, a second pixel PX2, a third pixel PX3, and a fourth pixel PX4. The first pixel PX1, the second pixel PX2, the third pixel PX3, and the fourth pixel PX4 may correspond to four vertices of a virtual rhombus. The third pixel PX3 and the fourth pixel PX4 may have a relatively small plane area and may emit light of a first color, the second pixel PX2 may have a relatively large plane area and may emit light of a second color, and the first pixel PX1 may emit light of a third color. However, the description of the plurality of pixels included in the above-mentioned unit pixel PXU is an example, and the unit pixel PXU may include two or more pixels having different shapes, sizes, and arrangements in a plan view.

[0091] In one or more embodiments, the plurality of lines positioned in the display area DA may include scan lines SL, data lines DL, and power lines PL.

[0092] The scan line SL may extend in the first direction DR1 in the display area DA. Meanwhile, the scan line SL may extend in a direction opposite to the first direction DR1, and thus, the scan line SL may extend in the first peripheral area PA1. In this case, the scan line SL may be electrically connected to a driving circuit (e.g., a gate driving circuit) positioned in the first peripheral area PA1.

[0093] The data line DL may extend in the second direction DR2 in the display area DA. Meanwhile, the data line DL may extend in a direction opposite to the second direction DR2, and thus, the data line DL may extend in the first peripheral area PA1. In this case, the data line DL may be electrically connected to a driving circuit (e.g., an integrated circuit (IC) chip or a data driving circuit) positioned in the first peripheral area PA1.

[0094] The power line PL may extend in the first direction DR1 in the display area DA. Meanwhile, the power line PL may extend in a direction opposite to the first direction DR1, and thus, the power line PL may extend in the first peripheral area PA1. In this case, the power line PL may be electrically connected to a driving circuit (e.g., a power supply circuit) positioned in the first peripheral area PA1.

[0095] exist Figure 3In the figure, for the convenience of description, only one scan line SL, one power line PL, and one data line DL are shown. However, a plurality of scan lines SL, a plurality of power lines PL, and a plurality of data lines DL may be provided. In this case, a plurality of scan lines SL may be arranged in the second direction DR2 in the display area DA, a plurality of data lines DL may be arranged in the first direction DR1 in the display area DA, and a plurality of power lines PL may be arranged in the second direction DR2 in the display area DA. Meanwhile, according to an embodiment, the plurality of power lines PL in the display area DA may have a mesh structure including a plurality of first power lines extending in the first direction DR1 and a plurality of second power lines electrically connected to the first power lines and extending in the second direction DR2.

[0096] The first pad array PD1 may include a plurality of pads. The plurality of pads may be electrically connected to a driving circuit (e.g., a gate driving circuit, an IC chip, a data driving circuit, a power supply circuit, etc.). In addition, in one or more embodiments, the plurality of pads may be electrically connected to an electronic device that supplies various electrical signals.

[0097] In one or more embodiments, the panel layer PNL may be bent in the first peripheral area PA1. Figure 3 Unlike what is shown in FIG. 2 , the first pad array PD1 may be positioned on the rear surface of the panel layer PNL.

[0098] Reference Figure 4 , also refer to Figure 1 and Figure 3 , when the display device DD is an organic light-emitting display device, the panel layer PNL may include a pixel circuit PXC, a pixel electrode PXE, a pixel defining layer PDL, an organic light-emitting layer EL, and a common electrode layer CE. However, this is an example, and the display device DD of the present disclosure is not limited to an organic light-emitting display device. For example, the display device DD may be an inorganic light-emitting display device or a liquid crystal display device.

[0099] The pixel circuit PXC may be defined by a plurality of conductive layers and a plurality of insulating layers included in the circuit layer CIR. The pixel circuit PXC may include at least one transistor and at least one capacitor. In an embodiment, the pixel circuit PXC may further include lines (e.g., scan lines SL, power lines PL, and / or data lines DL).

[0100] The pixel electrode PXE may be positioned on the circuit layer CIR. The pixel electrode PXE may be electrically connected to the pixel circuit PXC through a through hole penetrating at least a portion of a plurality of insulating layers included in the circuit layer CIR. In one or more embodiments, the pixel electrode PXE may be referred to as an anode electrode.

[0101] The pixel defining layer PDL may be positioned on the circuit layer CIR and may define a pixel opening exposing at least a portion of the pixel electrode PXE. The pixel defining layer PDL may include an organic insulating material and / or an inorganic insulating material.

[0102] The organic light emitting layer EL may be positioned on the pixel electrode PXE within the pixel opening. The organic light emitting layer EL may emit light having a brightness corresponding to a voltage difference between the pixel electrode PXE and the common electrode layer CE.

[0103] The common electrode layer CE may cover the organic light emitting layer EL and the pixel defining layer PDL. In one or more embodiments, the common electrode layer CE may be referred to as a cathode electrode.

[0104] The common electrode layer CE may be covered by the encapsulation layer ENL. In this case, in one or more embodiments, the encapsulation layer ENL may include a first inorganic insulating layer, an organic insulating layer, and a second inorganic insulating layer sequentially positioned in the third direction DR3 on the common electrode layer CE.

[0105] Figure 5 and Figure 6 It is used to describe the Figure 1 A diagram of one or more embodiments of an input sensing layer in a display device.

[0106] Reference Figure 5 , the input sensing layer TSL may include a first conductive layer CL1 , a sensing insulating layer TIL, a second conductive layer CL2 , and a cover layer CVL.

[0107] In one or more embodiments, the first conductive layer CL1, the sensing insulating layer TIL, the second conductive layer CL2, and the cover layer CVL may be sequentially stacked in the third direction DR3. That is, the second conductive layer CL2 may be positioned on the first conductive layer CL1, and the sensing insulating layer TIL may be interposed between the first conductive layer CL1 and the second conductive layer CL2.

[0108] In one or more other embodiments, the first conductive layer CL1 may be positioned on the second conductive layer CL2. In this case, reference will be made later to Figures 7 to 19 The described various components included in the first conductive layer CL1 may be interposed between the sensing insulating layer TIL and the cover layer CVL, and the various components included in the second conductive layer CL2 may be interposed between the sensing insulating layer TIL and the panel layer PNL.

[0109] Hereinafter, the display device DD of the present disclosure and components included in the display device DD of the present disclosure will be described based on one or more embodiments in which the second conductive layer CL2 is positioned on the first conductive layer CL1. Figure 20 to Figure 24One or more embodiments in which the first conductive layer CL1 is positioned on the second conductive layer CL2 are described in detail.

[0110] Reference Figure 6 , also refer to Figure 1 , a plurality of sensing electrodes TE may be positioned in the sensing area SA of the input sensing layer TSL, and a constant voltage electrode CVE, first, second, and third transmission lines SL1, SL2, and SL3 may be positioned in the second peripheral area PA2.

[0111] The plurality of sensing electrodes TE may include first sensing electrodes TE1 and second sensing electrodes TE2 .

[0112] The first sensing electrode TE1 may include a plurality of first sensing electrode patterns Tx and a first connection pattern BR_Tx electrically connecting the plurality of first sensing electrode patterns Tx to each other. The first sensing electrode TE1 may extend in a first direction DR1 in a sensing area SA. The first sensing electrode TE1 may function to convert a touch input of a user of the display device DD into an electrical signal.

[0113] The second sensing electrode TE2 may include a plurality of second sensing electrode patterns Rx and a second connection pattern BR_Rx electrically connecting the plurality of second sensing electrode patterns Rx to each other. The second sensing electrode TE2 may extend in the second direction DR2 in the sensing area SA. Like the first sensing electrode TE1, the second sensing electrode TE2 may function to convert a touch input of a user of the display device DD into an electrical signal.

[0114] The first sensing electrode TE1 and the second sensing electrode TE2 may be electrically insulated from each other. In other words, the first sensing electrode pattern Tx included in the first sensing electrode TE1 may be electrically insulated from the second sensing electrode pattern Rx included in the second sensing electrode TE2.

[0115] The constant voltage electrode CVE (for example, in a plan view) may surround at least a portion of the sensing area SA. A constant voltage may be applied to the constant voltage electrode CVE. For example, a ground voltage may be applied to the constant voltage electrode CVE, and a sensing electrode TE positioned in the sensing area SA or a sensing electrode TE positioned in the display area ( Figure 3 The common electrode layer ( Figure 4 A ground voltage is applied to the common electrode layer CE in the display area. For another example, a power voltage may be applied to the constant voltage electrode CVE, and a power voltage may be applied to the common electrode layer CE in the display area ( Figure 3 The electric field lines PL in the display area DA) or to the common electrode layer ( Figure 4 A power supply voltage is applied to the common electrode layer CE) in the circuit.

[0116] The first transmission line SL1 may be electrically connected to the first sensing electrode TE1 at a boundary between the sensing area SA and the second peripheral area PA2. The first transmission line SL1 may be electrically connected to the first sensing electrode TE1 located in the second peripheral area PA2 or the first peripheral area ( Figure 3 The first transmission line SL1 may function to transmit an electrical signal generated in the first sensing electrode TE1 based on a touch input of a user of the display device DD.

[0117] The second transmission line SL2 may be electrically connected to the second sensing electrode TE2 at a boundary between the sensing area SA and the second peripheral area PA2. The second transmission line SL2 may be electrically connected to the second sensing electrode TE2 located in the second peripheral area PA2 or in the first peripheral area ( Figure 3 The second transmission line SL2 may function to transmit an electrical signal generated in the second sensing electrode TE2 based on a touch input of a user of the display device DD.

[0118] The third transmission line SL3 may be electrically connected to the constant voltage electrode CVE. The third transmission line SL3 may be electrically connected to the first peripheral area ( Figure 3 A separate power supply unit or a ground pad unit in the first peripheral area PA1).

[0119] exist Figure 6 In the embodiment, for the convenience of description, only one first sensing electrode TE1 and one second sensing electrode TE2 are shown, but a plurality of first sensing electrodes TE1 and a plurality of second sensing electrodes TE2 may be provided. In addition, a plurality of first transmission lines SL1 may be provided in one-to-one correspondence with the plurality of first sensing electrodes TE1, and a plurality of second transmission lines SL2 may be provided in one-to-one correspondence with the plurality of second sensing electrodes TE2.

[0120] In this case, a plurality of first sensing electrodes TE1 may be arranged in the second direction DR2 in the sensing area SA, and a plurality of second sensing electrodes TE2 may be arranged in the first direction DR1 in the sensing area SA. Therefore, the first sensing electrodes TE1 and the second sensing electrodes TE2 may be completely positioned in the sensing area SA.

[0121] Figure 7 yes Figure 6 An enlarged plan view of area B, Figure 8 is along Figure 7 A cross-sectional view taken along the line Y1-Y1', and Fig. 9 is along Figure 7 A cross-sectional view taken along line Y2-Y2'.

[0122] Reference Figure 7 , also refer to Figure 6 , the plurality of first sensing electrode patterns Tx may include two first sensing electrode patterns Txa and Txb positioned adjacent to each other, and the plurality of second sensing electrode patterns Rx may include two second sensing electrode patterns Rxa and Rxb positioned adjacent to each other.

[0123] The first sensing electrode patterns Txa and Txb may be electrically connected to each other through the first connection pattern BR_Tx, and the second sensing electrode patterns Rxa and Rxb may be electrically connected to each other through the second connection pattern BR_Rx. Figure 7 As shown in , the second sensing electrode patterns Rxa and Rxb and the second connection pattern BR_Rx may be integrally formed.

[0124] Reference Figure 8 and Fig. 9 Each of the first sensing electrode patterns Txa and Txb, the second sensing electrode patterns Rxa and Rxb, and the second connection pattern BR_Rx may be positioned on the panel layer PNL, and the first connection pattern BR_Tx may be positioned on the sensing insulation layer TIL. That is, the first sensing electrode patterns Txa and Txb, the second sensing electrode patterns Rxa and Rxb, and the second connection pattern BR_Rx may be included in the first conductive layer ( Figure 5 The first conductive layer CL1 in the embodiment of the present invention is a component in the first conductive layer CL2, and the first connection pattern BR_Tx may be a component included in the second conductive layer ( Figure 5 Components in the second conductive layer CL2).

[0125] The first connection pattern BR_Tx may electrically contact each of the first sensing electrode patterns Txa and Txb through a via defined in the sensing insulation layer TIL. In this case, the first connection pattern BR_Tx may be electrically insulated from the second connection pattern BR_Rx by the sensing insulation layer TIL.

[0126] At the same time, Figures 7 to 9 Unlike that shown in FIG. 1 , each of the first sensing electrode patterns Txa and Txb, the second sensing electrode patterns Rxa and Rxb, and the second connection patterns BR_Rx may be positioned on the sensing insulation layer TIL, and the first connection patterns BR_Tx may be positioned on the panel layer PNL.

[0127] That is to say, Figures 7 to 9 Unlike the example shown in FIG. 1 , the first sensing electrode patterns Txa and Txb, the second sensing electrode patterns Rxa and Rxb, and the second connection pattern BR_Rx may be included in the second conductive layer ( Figure 5 The first connection pattern BR_Tx may be a component included in the first conductive layer ( Figure 5 Components in the first conductive layer CL1).

[0128] Fig.10 is used to describe Figure 6 Area A is included in Figure 5 A plan view of the various electrodes and lines implemented in the first conductive layer of the input sensing layer, and Fig.11 is used to describe Figure 6 Area A is included in Figure 5 A plan view of the various electrodes and lines implemented in the second conductive layer of the input sensing layer.

[0129] Reference Fig.10 , the first conductive layer ( Figure 5 The first conductive layer CL1) in the embodiment may include a first constant voltage electrode layer CVE1 and a first transmission line layer SL1_L.

[0130] The first constant voltage electrode layer CVE1 can be connected to the second constant voltage electrode layer ( Fig.11 The second constant voltage electrode layer CVE2 in the Figure 6 The first transmission line layer SL1_L can be connected to the constant voltage electrode CVE in the embodiment of the present invention, which will be described later. Fig.12 The second transmission line layer SL1_U in the first transmission line ( Figure 6 The first transmission line SL1 in FIG. 1 is a first transmission line SL2, which will be described later.

[0131] In one or more embodiments, the first constant voltage electrode layer CVE1 may include a first constant voltage electrode pattern CVE1 a and a second constant voltage electrode pattern CVE1 b positioned to be spaced apart from each other.

[0132] In one or more embodiments, the first transmission line layer SL1_L may include a plurality of first transmission line layers SL1a_L, SL1b_L, SL1c_L, and SL1d_L. In this case, the plurality of first transmission line layers SL1a_L, SL1b_L, SL1c_L, and SL1d_L may be electrically insulated from each other. Hereinafter, for ease of description, the description will be based on the first transmission line layer SL1a_L, and the following description of the first transmission line layer SL1a_L may be substantially the same or similarly applied to the first transmission line layers SL1b_L, SL1c_L, and SL1d_L.

[0133] The first transmission line layer SL1a_L may include a first extension portion P1 extending in the second direction DR2 and a second extension portion P2 extending from the first extension portion P1 in a direction opposite to the first direction DR1. Here, the second extension portion P2 of the first transmission line layer SL1a_L may be directed toward the sensing region ( Figure 6 Therefore, the second extension portion P2 of the first transmission line layer SL1a_L can be electrically connected to the sensing area ( Figure 6 The first sensing electrode TE1 in the sensing area SA in FIG.

[0134] In this case, if Figure 6 and Fig.10 As shown in , the second extension portion P2 of the first transmission line layer SL1a_L may extend toward the sensing area SA through the space between the first constant voltage electrode pattern CVE1a and the second constant voltage electrode pattern CVE1b. Here, the second extension portion P2 of the first transmission line layer SL1a_L may be spaced apart from each of the first constant voltage electrode pattern CVE1a and the second constant voltage electrode pattern CVE1b.

[0135] Reference Fig.11 , the second conductive layer ( Figure 5 The second conductive layer CL2) in the embodiment may include a second constant voltage electrode layer CVE2 and a second transmission line layer SL1_U.

[0136] As described above, the second constant voltage electrode layer CVE2 can be connected to the first constant voltage electrode layer ( Fig.10 The first constant voltage electrode layer CVE1 in the Figure 6 In addition, the second transmission line layer SL1_U can be connected to the first transmission line layer ( Fig.10 The first transmission line layer SL1_L in the Figure 6 The first transmission line SL1 in the embodiment.

[0137] In one or more embodiments, the second transmission line layer SL1_U may include a plurality of second transmission line layers SL1a_U, SL1b_U, SL1c_U, and SL1d_U. In this case, the plurality of second transmission line layers SL1a_U, SL1b_U, SL1c_U, and SL1d_U may be electrically insulated from each other.

[0138] Fig.12 yes Figure 6 2 is an enlarged plan view of a region A of FIG. 1 and is a plan view for describing a first embodiment among one or more embodiments of the present disclosure. Fig.13 is along Fig.12 Cross-sectional views taken along line II', line II-II' and line III-III'.

[0139] Reference Fig.12 and Fig.13, the first constant voltage electrode layer CVE1 and the second constant voltage electrode layer CVE2 may be electrically contacted with each other through a plurality of first through holes CNT1a defined in the sensing insulating layer TIL. For example, each of the first constant voltage electrode pattern CVE1a and the second constant voltage electrode pattern CVE1b may be electrically contacted with each other through a plurality of first through holes CNT1a.

[0140] Here, the first constant voltage electrode layer CVE1 and the second constant voltage electrode layer CVE2 electrically contacting each other through the plurality of first through holes CNT1a may define a constant voltage electrode CVE. At the same time, since the constant voltage electrode CVE includes two electrode layers CVE1 and CVE2 electrically contacting each other, the resistance of the constant voltage electrode CVE may be relatively low, thereby improving the driving efficiency of the display device DD.

[0141] In one or more embodiments, at least a portion of each of the first constant voltage electrode layer CVE1 and the second constant voltage electrode layer CVE2 may be positioned in the non-light blocking area NBA. That is, at least a portion of the constant voltage electrode CVE may be positioned in the non-light blocking area NBA.

[0142] In this case, in the non-light blocking area NBA, the plurality of first through holes CNT1a may be arbitrarily arranged / positioned. That is, the distance between two adjacent first through holes CNT1a among the plurality of first through holes CNT1a may not be constant. Therefore, the external light ( Figure 1 This is an interference phenomenon that occurs when external light L1 and L2 in the first through holes CNT1a is reflected and generated by the second constant voltage electrode layer CVE2 positioned along the cross-sectional profile of the plurality of first through holes CNT1a.

[0143] In one or more embodiments, the plurality of first through holes CNT1a may be circular in a plan view. In one or more embodiments, each of the plurality of first through holes CNT1a may have a circular shape having a different diameter. That is, one of the plurality of first through holes CNT1a may have a circular plan shape having a first diameter, and another first through hole CNT1a may have a circular plan shape having a second diameter different from the first diameter.

[0144] Alternatively, the plurality of first through holes CNT1a may have the same planar shape. For example, each of the plurality of first through holes CNT1a may have a circular planar shape having a first diameter.

[0145] In one or more embodiments, the plane area occupied by the plurality of first through holes CNT1a in the non-light blocking area NBA may be about 0.5% or more and about 10% or less of the area in which the first constant voltage electrode layer CVE1 and the second constant voltage electrode layer CVE2 overlap each other in the non-light blocking area NBA. Here, when the plane area occupied by the plurality of first through holes CNT1a satisfies the above-mentioned range, the first constant voltage electrode layer CVE1 and the second constant voltage electrode layer CVE2 may be in sufficient contact with each other, not only ensuring sufficiently low resistance of the constant voltage electrode layer CVE, but also reducing or minimizing the damage caused by external light ( Figure 1 Interference phenomenon caused by external light L1 and L2).

[0146] At the same time, the first transmission line layer SL1_L and the second transmission line layer SL1_U may be electrically contacted with each other through a plurality of second through holes CNT2a defined in the sensing insulating layer TIL. For example, the first transmission line layers SL1a_L, SL1b_L, SL1c_L, and SL1d_L may be electrically contacted with the second transmission line layers SL1a_U, SL1b_U, SL1c_U, and SL1d_U overlapped in a plan view through a plurality of second through holes CNT2a, respectively.

[0147] Here, the first transmission line layer SL1_L and the second transmission line layer SL1_U electrically contacting each other through the plurality of second through holes CNT2a may define the first transmission line SL1. At the same time, since the first transmission line SL1 includes two transmission line layers SL1_L and SL1_U electrically contacting each other, the resistance of the first transmission line SL1 may be relatively low, thereby improving the driving efficiency of the display device DD.

[0148] In one or more embodiments, at least a portion of each of the first transmission line layer SL1_L and the second transmission line layer SL1_U may be positioned in the non-light blocking area NBA. That is, at least a portion of the first transmission line SL1 may be positioned in the non-light blocking area NBA. For example, each of the first transmission line SL1a defined by the first transmission line layer SL1a_L and the second transmission line layer SL1a_U electrically contacting each other through a plurality of second through holes CNT2a and the first transmission line SL1b defined by the first transmission line layer SL1b_L and the second transmission line layer SL1b_U electrically contacting each other through a plurality of second through holes CNT2a may be positioned in the non-light blocking area NBA.

[0149] In this case, in the non-light blocking area NBA, the plurality of second through holes CNT2a may be positioned arbitrarily. That is, the distance between two adjacent second through holes CNT2a among the plurality of second through holes CNT2a may not be constant. Therefore, the external light ( Figure 1 This is an interference phenomenon that occurs when external light L1 and L2 in the second through holes CNT2a is reflected and generated by the second transmission line layer SL1_U positioned along the cross-sectional profile of the plurality of second through holes CNT2a.

[0150] In one or more embodiments, the plurality of second through holes CNT2a may be circular in plan view. In one or more embodiments, each of the plurality of second through holes CNT2a may have a circular shape with a different diameter. That is, one of the plurality of second through holes CNT2a may have a circular plan shape with a third diameter, and another second through hole CNT2a may have a circular plan shape with a fourth diameter different from the third diameter.

[0151] Alternatively, the plurality of second through holes CNT2a may have the same planar shape. For example, each of the plurality of second through holes CNT2a may have a circular planar shape having the third diameter.

[0152] In one or more embodiments, the plane area occupied by the plurality of second through holes CNT2a in the non-light-blocking area NBA may be about 0.5% or more and about 10% or less of the area in which the first transmission line layer SL1_L and the second transmission line layer SL1_U overlap each other in the non-light-blocking area NBA. Here, when the plane area occupied by the plurality of second through holes CNT2a satisfies the above-mentioned range, the first transmission line layer SL1_L and the second transmission line layer SL1_U may be in sufficient contact with each other, not only ensuring sufficiently low resistance of the transmission line SL1, but also reducing or minimizing the damage caused by external light ( Figure 1 Interference phenomenon caused by external light L1 and L2).

[0153] In one or more embodiments, Fig.12 and Fig.13 As shown in , each of the first transmission line layer SL1_L and the second transmission line layer SL1_U may be electrically insulated from the first constant voltage electrode layer CVE1 and the second constant voltage electrode layer CVE2 .

[0154] In the following, reference will be made to Figures 14 to 19 Describe various embodiments of the present disclosure. Here, because Figures 14 to 19 The various embodiments of the present disclosure shown in Figure 12 to Figure 13 The first embodiment among one or more embodiments of the present disclosure described differs only in the planar shape and / or planar arrangement of each of the multiple first through holes and / or the multiple second through holes, so the description of overlapping content will be omitted below.

[0155] Fig.14 yes Figure 62 is an enlarged plan view of a region A of FIG. 1 and is a plan view for describing a second embodiment among one or more embodiments of the present disclosure.

[0156] Reference Fig.14 , also refer to Fig.10 , Fig.11 and Fig.13 , the first constant voltage electrode layer CVE1 and the second constant voltage electrode layer CVE2 may electrically contact each other through a plurality of first through holes CNT1b, and the first transmission line layer SL1_L and the second transmission line layer SL1_U may electrically contact each other through a plurality of second through holes CNT2b.

[0157] In one or more embodiments, the plurality of first through holes CNT1b may be arbitrarily positioned in a plan view. In this case, the plane area occupied by the plurality of first through holes CNT1b in the non-light blocking area NBA may be about 0.5% or more and about 10% or less of the area in which the first constant voltage electrode layer CVE1 and the second constant voltage electrode layer CVE2 overlap each other in the non-light blocking area NBA.

[0158] In one or more embodiments, the plurality of first through holes CNT1b may have an elliptical shape in a plan view. In this case, the light emitted by external light ( Figure 1 Interference phenomenon caused by external light L1 and L2).

[0159] At the same time, Fig.14 Unlike that shown in FIG. 1 , the plurality of first through holes CNT1b may be polygonal in plan view. Also in this case, the light emitted by external light ( Figure 1 Interference phenomenon caused by external light L1 and L2).

[0160] In one or more embodiments, when the plurality of first through holes CNT1b are elliptical in a plan view, the major axis directions of the elliptical shapes may be arbitrarily aligned along the plurality of first through holes CNT1b.

[0161] In one or more embodiments, the plurality of second through holes CNT2b may be arbitrarily positioned in a plan view. In this case, the plane area occupied by the plurality of second through holes CNT2b in the non-light-blocking area NBA may be about 0.5% or more and about 10% or less of the area in which the first transmission line layer SL1_L and the second transmission line layer SL1_U in the non-light-blocking area NBA overlap with each other.

[0162] In one or more embodiments, the plurality of second through holes CNT2b may be elliptical in a plan view. In this case, the major axis direction of the ellipse may be randomly aligned along the plurality of second through holes CNT2b.

[0163] At the same time, Fig.14 Unlike the one shown in FIG. 1 , the plurality of second through holes CNT2 b may be polygonal in plan view. In this case, the light emitted by external light ( Figure 1 Interference phenomenon caused by external light L1 and L2).

[0164] Fig.15 yes Figure 6 2 is an enlarged plan view of a region A of FIG. 1 and is a plan view for describing a third embodiment among one or more embodiments of the present disclosure.

[0165] Reference Fig.15 , also refer to Fig.10 , Fig.11 and Fig.13 , the first constant voltage electrode layer CVE1 and the second constant voltage electrode layer CVE2 may electrically contact each other through a plurality of first through holes CNT1a and CNT1b, and the first transmission line layer SL1_L and the second transmission line layer SL1_U may electrically contact each other through a plurality of second through holes CNT2a and CNT2b.

[0166] In one or more embodiments, the plurality of first through holes CNT1a and CNT1b may be randomly positioned in a plan view. In this case, the plane area occupied by the plurality of first through holes CNT1a and CNT1b in the non-light-blocking area NBA may be about 0.5% or more and about 10% or less of the area in which the first constant voltage electrode layer CVE1 and the second constant voltage electrode layer CVE2 overlap each other in the non-light-blocking area NBA.

[0167] In one or more embodiments, the first through holes CNT1a and CNT1b may include various types of through holes having different shapes in a plan view. Fig.15 As shown in FIG. 1 , the first through holes CNT1 a and CNT1 b may include a first through hole CNT1 a having a circular shape in a plan view and a first through hole CNT1 b having an elliptical shape in a plan view.

[0168] However, the above are examples and are not Fig.15 Unlike what is shown in FIG. 1 , the first through holes CNT1a and CNT1b may include two or more selected from the group consisting of a through hole having a circular shape in a plan view, a through hole having an elliptical shape in a plan view, and / or a through hole having a polygonal shape in a plan view.

[0169] In one or more embodiments, the plurality of second through holes CNT2a and CNT2b may be arbitrarily positioned in a plan view. In this case, the plane area occupied by the plurality of second through holes CNT2a and CNT2b in the non-light-blocking area NBA may be about 0.5% or more and about 10% or less of the area in which the first transmission line layer SL1_L and the second transmission line layer SL1_U in the non-light-blocking area NBA overlap with each other.

[0170] In one or more embodiments, the second through holes CNT2a and CNT2b may include various types of through holes having different shapes in a plan view. Fig.15 As shown in FIG. 1 , the second through holes CNT2 a and CNT2 b may include a second through hole CNT2 a having a circular shape in a plan view and a second through hole CNT2 b having an elliptical shape in a plan view.

[0171] However, the above are examples and are not Fig.15 Unlike what is shown in FIG. 2 , the second through holes CNT2 a and CNT2 b may include two or more selected from the group consisting of a through hole having a circular shape in a plan view, a through hole having an elliptical shape in a plan view, and / or a through hole having a polygonal shape in a plan view.

[0172] Fig.16 yes Figure 6 2 is an enlarged plan view of a region A of FIG. 1 and is a plan view for describing a fourth embodiment among one or more embodiments of the present disclosure.

[0173] Reference Fig.16 , also refer to Fig.10 , Fig.11 and Fig.13 , the first constant voltage electrode layer CVE1 and the second constant voltage electrode layer CVE2 may electrically contact each other through a plurality of first through holes CNT1c, and the first transmission line layer SL1_L and the second transmission line layer SL1_U may electrically contact each other through a plurality of second through holes CNT2c.

[0174] In one or more embodiments, the plurality of first through holes CNT1c may be arranged according to a corresponding rule in a plan view. For example, a separation distance between two adjacent first through holes among the plurality of first through holes CNT1c may be substantially constant.

[0175] In one or more embodiments, the area occupied by the plurality of first through holes CNT1c in the non-light blocking area NBA may be about 0.5% or more and about 5% or less of the area in which the first constant voltage electrode layer CVE1 and the second constant voltage electrode layer CVE2 overlap each other in the non-light blocking area NBA. In this way, regardless of the arrangement form of the plurality of first through holes CNT1c in a plan view, the density of the plurality of first through holes CNT1c may be relatively low, thereby reducing or minimizing the amount of light caused by external light ( Figure 1 Interference phenomenon caused by external light L1 and L2).

[0176] In one or more embodiments, the plurality of first through holes CNT1c may be circular in a plan view. In one or more embodiments, each of the plurality of first through holes CNT1c may have a circular shape having a different diameter. That is, one of the plurality of first through holes CNT1c may have a circular plan shape having a first diameter, and another first through hole CNT1c may have a circular plan shape having a second diameter different from the first diameter.

[0177] Alternatively, the plurality of first through holes CNT1c may have the same planar shape. For example, each of the plurality of first through holes CNT1c may have a circular planar shape having a first diameter.

[0178] In one or more embodiments, the plurality of second through holes CNT2c may also be arranged according to a corresponding rule in a plan view. For example, a separation distance between two adjacent second through holes CNT2c among the plurality of second through holes CNT2c may be substantially constant.

[0179] In one or more embodiments, the area occupied by the plurality of second through holes CNT2c in the non-light-blocking area NBA may be about 0.5% or more and about 5% or less of the area in which the first transmission line layer SL1_L and the second transmission line layer SL1_U overlap each other in the non-light-blocking area NBA. In this way, regardless of the arrangement form of the plurality of second through holes CNT2c in a plan view, the density of the plurality of second through holes CNT2c may be relatively low, thereby reducing or minimizing the amount of light caused by external light ( Figure 1 Interference phenomenon caused by external light L1 and L2).

[0180] In one or more embodiments, the plurality of second through holes CNT2c may be circular in plan view. In one or more embodiments, each of the plurality of second through holes CNT2c may have a circular shape with a different diameter. That is, one of the plurality of second through holes CNT2c may have a circular plan shape with a third diameter, and another second through hole CNT2c may have a circular plan shape with a fourth diameter different from the third diameter.

[0181] Alternatively, the plurality of second through holes CNT2c may have the same planar shape. For example, each of the plurality of second through holes CNT2c may have a circular planar shape having the third diameter.

[0182] Fig.17 yes Figure 6 2 is an enlarged plan view of a region A of FIG. 1 and is a plan view for describing a fifth embodiment among one or more embodiments of the present disclosure.

[0183] Reference Fig.17 , also refer to Fig.10 , Fig.11 and Fig.13 , the first constant voltage electrode layer CVE1 and the second constant voltage electrode layer CVE2 may electrically contact each other through a plurality of first through holes CNT1d, and the first transmission line layer SL1_L and the second transmission line layer SL1_U may electrically contact each other through a plurality of second through holes CNT2d.

[0184] In one or more embodiments, the plurality of first through holes CNT1d may be positioned / arranged according to a corresponding rule in a plan view.

[0185] In one or more embodiments, the area occupied by the plurality of first through holes CNT1d in the non-light-blocking area NBA may be about 0.5% or more and about 5% or less of the area in which the first constant-voltage electrode layer CVE1 and the second constant-voltage electrode layer CVE2 overlap each other in the non-light-blocking area NBA. In this way, regardless of the arrangement form of the plurality of first through holes CNT1d in a plan view, the density of the plurality of first through holes CNT1d may be relatively low, thereby reducing or minimizing the amount of light caused by external light ( Figure 1 Interference phenomenon caused by external light L1 and L2).

[0186] In one or more embodiments, the plurality of first through holes CNT1d may have an elliptical shape in a plan view. In this case, the light emitted by external light ( Figure 1 Interference phenomenon caused by external light L1 and L2).

[0187] At the same time, Fig.17 Unlike the one shown in FIG. 1 , the plurality of first through holes CNT1d may be polygonal in plan view. In this case, the light emitted by external light ( Figure 1 Interference phenomenon caused by external light L1 and L2).

[0188] In one or more embodiments, when the plurality of first through holes CNT1d are elliptical in a plan view, the major axis directions of the elliptical shapes may be arbitrarily aligned along the plurality of first through holes CNT1d.

[0189] In one or more embodiments, the plurality of second through holes CNT2d may also be arranged according to a corresponding rule in a plan view. For example, a separation distance between two adjacent second through holes among the plurality of second through holes CNT2d may be substantially constant.

[0190] In one or more embodiments, the area occupied by the plurality of second through holes CNT2d in the non-light blocking area NBA may be about 0.5% or more and about 5% or less of the area in which the first constant voltage electrode layer CVE1 and the second constant voltage electrode layer CVE2 overlap each other in the non-light blocking area NBA. In this way, regardless of the arrangement form of the plurality of second through holes CNT2d in a plan view, the density of the plurality of second through holes CNT2d may be relatively low, thereby reducing or minimizing the amount of light caused by external light ( Figure 1 Interference phenomenon caused by external light L1 and L2).

[0191] In one or more embodiments, the plurality of second through holes CNT2d may be elliptical in plan view. In this case, the light emitted by external light ( Figure 1 Interference phenomenon caused by external light L1 and L2).

[0192] At the same time, Fig.17 Unlike the one shown in FIG. 1 , the plurality of second through holes CNT2d may be polygonal in plan view. In this case, the light emitted by external light ( Figure 1 Interference phenomenon caused by external light L1 and L2).

[0193] In one or more embodiments, when the plurality of second through holes CNT2d are elliptical in a plan view, directions of major axes of the elliptical shapes of the plurality of second through holes CNT2d may be arbitrarily aligned.

[0194] Fig.18 yes Figure 6 2 is an enlarged plan view of a region A of FIG. 1 and is a plan view for describing a sixth embodiment among one or more embodiments of the present disclosure.

[0195] Reference Fig.18 , also refer to Fig.10 , Fig.11 and Fig.13 , the first constant voltage electrode layer CVE1 and the second constant voltage electrode layer CVE2 may electrically contact each other through a plurality of first through holes CNT1c and CNT1d, and the first transmission line layer SL1_L and the second transmission line layer SL1_U may electrically contact each other through a plurality of second through holes CNT2c and CNT2d.

[0196] In one or more embodiments, the plurality of first through holes CNT1c and CNT1d may be arranged in a plan view according to a corresponding rule. In this case, the plane area occupied by the plurality of first through holes CNT1c and CNT1d in the non-light-blocking area NBA may be about 0.5% or more and about 5% or less of the area in which the first constant voltage electrode layer CVE1 and the second constant voltage electrode layer CVE2 overlap each other in the non-light-blocking area NBA.

[0197] In one or more embodiments, the plurality of first through holes CNT1c and CNT1d may include various types of through holes having different shapes in a plan view. Fig.18 As shown in FIG. 1 , the first through holes CNT1 c and CNT1 d may include a first through hole CNT1 c having a circular shape in a plan view and a first through hole CNT1 d having an elliptical shape in a plan view.

[0198] However, the above are examples and are not Fig.18 Unlike what is shown in FIG. 1 , the first through holes CNT1c and CNT1d may include two or more selected from the group consisting of a through hole having a circular shape in a plan view, a through hole having an elliptical shape in a plan view, and / or a through hole having a polygonal shape in a plan view.

[0199] In one or more embodiments, the plurality of second through holes CNT2c and CNT2d may be arranged in a plan view according to a corresponding rule. In this case, the plane area occupied by the plurality of second through holes CNT2c and CNT2d in the non-light-blocking area NBA may be about 0.5% or more and about 5% or less of the area in which the first transmission line layer SL1_L and the second transmission line layer SL1_U in the non-light-blocking area NBA overlap with each other.

[0200] In one or more embodiments, the plurality of second through holes CNT2c and CNT2d may include various types of through holes having different shapes in a plan view. Fig.18 As shown in FIG. 2 , the second through holes CNT2 c and CNT2 d may include a second through hole CNT2 c having a circular shape in a plan view and a second through hole CNT2 d having an elliptical shape in a plan view.

[0201] However, the above are examples and are not Fig.18 Unlike what is shown in FIG. 2 , the second through holes CNT2 c and CNT2 d may include two or more selected from the group consisting of a through hole having a circular shape in a plan view, a through hole having an elliptical shape in a plan view, and / or a through hole having a polygonal shape in a plan view.

[0202] Fig.19 yes Figure 62 is an enlarged plan view of a region A of FIG. 1 and is a plan view for describing a seventh embodiment among one or more embodiments of the present disclosure.

[0203] Reference Fig.19 , also refer to Fig.10 , Fig.11 and Fig.13 , the first constant voltage electrode layer CVE1 and the second constant voltage electrode layer CVE2 may electrically contact each other through a plurality of first through holes CNT1a, and the first transmission line layer SL1_L and the second transmission line layer SL1_U may electrically contact each other through a plurality of second through holes CNT2c.

[0204] Here, the plurality of first through holes CNT1a may be Fig.12 The plurality of first through holes CNT1a described above are substantially the same, and the plurality of second through holes CNT2c may be the same as those described above. Fig.16 The described plurality of second through holes CNT2c are substantially the same, and therefore, repeated description of overlapping contents will be omitted.

[0205] Fig. 20 It is used to describe the Figure 1 Figures of other embodiments among one or more embodiments of an input sensing layer in a display device.

[0206] Reference Fig. 20 The input sensing layer TSL' may include a second conductive layer CL2', a sensing insulating layer TIL, a first conductive layer CL1' and a cover layer CVL. The second conductive layer CL2', the sensing insulating layer TIL, the first conductive layer CL1' and the cover layer CVL may be sequentially stacked in the third direction DR3.

[0207] Here, except that the second conductive layer CL2′ is positioned below the sensing insulating layer TIL, the second conductive layer CL2′ may be aligned with the reference layer CL2′. Figure 5 The second conductive layer CL2 described above is substantially the same, and thus, the second conductive layer CL2′ may include the same as that included in reference Figures 6 to 19 Various components in the second conductive layer CL2 are described as being substantially the same or similar components.

[0208] Likewise, except that the first conductive layer CL1′ is positioned on the sensing insulating layer TIL, the first conductive layer CL1′ may be aligned with the reference layer CL1′. Figure 5 The first conductive layer CL1 described above is substantially the same, and thus, the first conductive layer CL1′ may include the same as that included in reference Figures 6 to 19 The various components in the first conductive layer CL1 are described as being substantially the same or similar components.

[0209] Fig.21 is used to describe Figure 6Area A is included in Fig. 20 A plan view of the various electrodes and lines implemented in the second conductive layer of the input sensing layer, and Fig. 22 is used to describe Figure 6 Area A is included in Fig. 20 A plan view of the various electrodes and lines implemented in the first conductive layer of the input sensing layer.

[0210] Reference Fig.21 , the second conductive layer CL2' may include a second constant voltage electrode layer CVE2' and a second transmission line layer SL1'_U. In one or more embodiments, the second transmission line layer SL1'_U may include a plurality of second transmission line layers SL1a'_U, SL1b'_U, SL1c'_U, and SL1d'_U. In this case, the plurality of second transmission line layers SL1a'_U, SL1b'_U, SL1c'_U, and SL1d'_U may be electrically insulated from each other.

[0211] Here, in addition to the second constant voltage electrode layer CVE2′ being positioned below the sensing insulating layer TIL, the second constant voltage electrode layer CVE2′ may be aligned with the reference electrode layer CVE2′. Fig.11 The described second constant voltage electrode layer CVE2 is substantially the same or similar.

[0212] Likewise, except that the second transmission line layer SL1′_U is positioned below the sensing insulating layer TIL, the second transmission line layer SL1′_U may be aligned with the reference Fig.11 The described second transmission line layer SL1_U is substantially the same or similar.

[0213] Reference Fig. 22 , the first conductive layer CL1' may include a first constant voltage electrode layer CVE1' and a first transmission line layer SL1'_L. In one or more embodiments, the first transmission line layer SL1'_L may include a plurality of first transmission line layers SL1a'_L, SL1b'_L, SL1c'_L, and SL1d'_L. In this case, the plurality of first transmission line layers SL1a'_L, SL1b'_L, SL1c'_L, and SL1d'_L may be electrically insulated from each other.

[0214] Here, in addition to the first constant voltage electrode layer CVE1′ being positioned on the sensing insulating layer TIL, the first constant voltage electrode layer CVE1′ may be aligned with the reference electrode layer CVE1′. Fig.10 The described first constant voltage electrode layer CVE1 is substantially the same or similar. In one or more embodiments, the first constant voltage electrode layer CVE1 ′ may include a first constant voltage electrode pattern CVE1 a ′ and a second constant voltage electrode pattern CVE1 b ′ positioned to be spaced apart from each other.

[0215] Likewise, except that the first transmission line layer SL1′_L is positioned on the sensing insulating layer TIL, the first transmission line layer SL1′_L may be aligned with the reference Fig.10 The described first transmission line layers SL1_L are substantially the same or similar.

[0216] Fig.23 yes Figure 6 2 is an enlarged plan view of a region A of FIG. 1 and is a plan view for describing an eighth embodiment among one or more embodiments of the present disclosure. Fig.24 is along Fig.23 Cross-sectional views taken along line IV-IV', line VV' and line VI-VI'.

[0217] Reference Fig.23 and Fig.24 The constant voltage electrode CVE' may include a first constant voltage electrode layer CVE1' and a second constant voltage electrode layer CVE2', and the first constant voltage electrode layer CVE1' and the second constant voltage electrode layer CVE2' may be electrically contacted with each other through a plurality of first through holes CNT1a' defined in the sensing insulating layer TIL, and the second transmission line layer SL1'_U and the first transmission line layer SL1'_L may be electrically contacted with each other through a plurality of second through holes CNT2a' defined in the sensing insulating layer TIL.

[0218] Here, the plurality of first through holes CNT1a' and the plurality of second through holes CNT2a' may be referred to as Fig.12 The described plurality of first through-holes CNT1a and the plurality of second through-holes CNT2a are substantially the same or similar.

[0219] At the same time, Fig.23 The differences shown in Figures 14 to 19 The shapes and / or arrangements in the various embodiments described may be identically or similarly applied to the plurality of first through-holes CNT1 a ′ and the plurality of second through-holes CNT2 a ′.

[0220] While the present disclosure has been shown and described with reference to particular embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present disclosure as defined by the appended claims and their functional equivalents to be included therein.

Claims

1. A display device, wherein: The display device comprises: a panel layer, including pixels in the display area; a light blocking layer over the panel layer, the light blocking layer defining a light blocking area surrounding at least a portion of the display area in a plan view; and An input sensing layer, between the panel layer and the light blocking layer, the input sensing layer defines a sensing area corresponding to the display area, and the input sensing layer includes: a first conductive layer including a first constant voltage electrode layer, at least a portion of the first constant voltage electrode layer being in a non-light blocking area between the light blocking area and the display area in a plan view; a second conductive layer including a second constant voltage electrode layer, at least a portion of the second constant voltage electrode layer being in the non-light blocking area, and the second constant voltage electrode layer being electrically in contact with the first constant voltage electrode layer through a plurality of first through holes in the non-light blocking area; and a sensing insulating layer between the first conductive layer and the second conductive layer, wherein the sensing insulating layer defines the plurality of first through holes, Wherein, respective distances between adjacent first through holes in the plurality of first through holes vary.

2. The display device according to claim 1, wherein: In a plan view, the plurality of first through holes have a planar shape including a circle, an ellipse, or a polygon.

3. The display device according to claim 2, wherein: The plurality of first through holes have the same planar shape.

4. The display device according to claim 1, wherein: In a plan view, an area occupied by the plurality of first through holes in the non-light blocking region is 0.5% or more and 10% or less of an area in which the first constant voltage electrode layer and the second constant voltage electrode layer overlap each other in the non-light blocking region.

5. The display device according to claim 1, wherein: The first constant voltage electrode layer includes a first constant voltage electrode pattern and a second constant voltage electrode pattern spaced apart in a plan view, and the first constant voltage electrode pattern and the second constant voltage electrode pattern electrically contact the second constant voltage electrode layer through the plurality of first via holes.

6. The display device according to claim 5, wherein: The first conductive layer further includes a first transmission line layer having at least a portion in the non-light blocking area, Wherein, the second conductive layer further includes a second transmission line layer, the second transmission line layer has at least a portion in the non-light blocking area, and Wherein, the first transmission line layer and the second transmission line layer are electrically contacted with each other in the non-light blocking area through a plurality of second through holes defined in the sensing insulating layer.

7. The display device according to claim 6, wherein: In a plan view, the second constant voltage electrode layer is between the second transmission line layer and the sensing area, and The first transmission line layer includes a portion extending in a direction toward the sensing area through a space between the first constant voltage electrode pattern and the second constant voltage electrode pattern.

8. The display device according to claim 6, wherein: The first transmission line layer and the second transmission line layer are electrically insulated from the first constant voltage electrode layer and the second constant voltage electrode layer.

9. The display device according to claim 6, wherein: Respective distances between adjacent second through holes in the plurality of second through holes vary.

10. The display device according to claim 1, wherein: One of the first conductive layer and the second conductive layer further includes a plurality of first sensing electrode patterns, a plurality of second sensing electrode patterns, and a second connection pattern electrically connecting the plurality of second sensing electrode patterns in the sensing area, and The other of the first conductive layer and the second conductive layer further includes a first connection pattern, which is in the sensing region and electrically connects the plurality of first sensing electrode patterns.

11. The display device according to claim 10, wherein: The plurality of first sensing electrode patterns are electrically insulated from the plurality of second sensing electrode patterns.

12. A display device, wherein: The display device comprises: a panel layer, including pixels in the display area; a light blocking layer over the panel layer, the light blocking layer defining a light blocking area surrounding at least a portion of the display area in a plan view; and An input sensing layer, between the panel layer and the light blocking layer, the input sensing layer defines a sensing area corresponding to the display area, and the input sensing layer includes: a first conductive layer including a first constant voltage electrode layer having at least a portion in a non-light blocking area between the light blocking area and the display area in a plan view; a second conductive layer including a second constant voltage electrode layer, the second constant voltage electrode layer having at least a portion in the non-light blocking area, and the second constant voltage electrode layer electrically contacts the first conductive layer through a plurality of first through holes in the non-light blocking area; and a sensing insulating layer between the first conductive layer and the second conductive layer, wherein the sensing insulating layer defines the plurality of first through holes, Wherein, in a plan view, an area occupied by the plurality of first through holes in the non-light blocking region is 0.5% or more and 5% or less of an area where the first constant voltage electrode layer and the second constant voltage electrode layer overlap each other in the non-light blocking region.

13. The display device according to claim 12, wherein: Respective distances between adjacent first through holes among the plurality of first through holes are constant.

14. The display device according to claim 12, wherein: In a plan view, the plurality of first through holes have a planar shape including a circle, an ellipse, or a polygon.

15. The display device according to claim 14, wherein: The plurality of first through holes have the same planar shape.

16. The display device according to claim 12, wherein: The first constant voltage electrode layer includes a first constant voltage electrode pattern and a second constant voltage electrode pattern spaced apart in a plan view, and The first constant voltage electrode pattern and the second constant voltage electrode pattern are electrically in contact with the second constant voltage electrode layer through the plurality of first through holes.

17. The display device according to claim 16, wherein: The first conductive layer further includes a first transmission line layer having at least a portion in the non-light blocking area, Wherein, the second conductive layer further includes a second transmission line layer, the second transmission line layer has at least a portion in the non-light blocking area, and Wherein, in the non-light blocking area, the first transmission line layer and the second transmission line layer are electrically contacted with each other through a second through hole defined in the sensing insulating layer.

18. The display device according to claim 17, wherein: In a plan view, the second constant voltage electrode layer is between the second transmission line layer and the sensing area, and The first transmission line layer includes a portion extending in a direction toward the sensing area through a space between the first constant voltage electrode pattern and the second constant voltage electrode pattern.

19. The display device according to claim 17, wherein: The first transmission line layer and the second transmission line layer are electrically insulated from the first constant voltage electrode layer and the second constant voltage electrode layer.

20. The display device according to claim 17, wherein: In a plan view, an area occupied by the second through hole in the non-light blocking region is 0.5% or more and 5% or less of an area in which the first transmission line layer and the second transmission line layer overlap each other in the non-light blocking region.

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