Static flow control method based on longitudinal expansion networking, electronic equipment and medium

Abstract

The invention relates to the technical field of computers, in particular to a static flow control method based on longitudinal extension networking, electronic equipment and a medium, and the method comprises the following steps: S1, setting a corresponding static register group for the mth chip Am in the longitudinal extension networking; s2, setting an initial value corresponding to each Uim, wherein the Uim satisfies # imgabs0 #; s3, the Am obtains a data packet Bmi to be sent to the Ai, whether the current Uim is larger than or equal to the flow control credit value needed by the Bmi is judged, if yes, S4 is executed, and if not, S4 is executed when the Uim is larger than or equal to the flow control credit value needed by the Bmi; and S4, sending the Bmi to the Ai, updating Uim = Uim-1, and when the Am receives reply information of the Ai for the Bmi, updating Uim = Uim + 1. According to the invention, the demand on the physical memory under the condition that the networking scale of the longitudinal expansion networking is increased is reduced.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a static flow control method, electronic equipment and medium based on vertical expansion networking. Background Art

[0002] In traditional scale-up networking, the flow control mechanism corresponds to the physical cache space. When the number of networks in the scale-up networking increases, the linear increase in physical cache will introduce significant physical cache. For example, 100 cards correspond to hundreds of KB to several megabytes, and 1,000 cards correspond to several megabytes to tens of megabytes. If the network has tens of thousands of cards, the physical cache required is greater than hundreds of megabytes to match the current internationally most advanced network scale of 200,000 cards. The existing flow control mechanism based on scale-up networking has at least the following disadvantages: 1. Physical implementation difficulties: The physical cache of the chip is too large, which brings too much difficulty to physical implementation. The difficulty of front-end design and DFT design increases exponentially. There are great challenges in layout and routing and production testing. 2. Chip yield is difficult to guarantee: Too much physical memory will involve a series of engineering problems such as yield and cache repair, which will lead to a decrease in chip yield. It can be seen from this that how to reduce the demand for physical memory when the scale of the network in the scale-up networking increases, reduce the difficulty of physical implementation, and improve chip yield has become a technical problem that needs to be solved urgently. Summary of the invention

[0003] The purpose of the present invention is to provide a static flow control method, electronic device and medium based on vertical expansion networking, which reduces the demand for physical memory when the network scale of the vertical expansion networking increases.

[0004] According to a first aspect of the present invention, a static flow control method based on vertical expansion networking is provided, comprising: Step S1: For the mth chip A in the vertical expansion network m Set a corresponding set of static registers {G 1 m ,G 2 m ,...,G i m ,...,G M m}, G i m A m The corresponding i-th static register, i ranges from 1 to M, m ranges from 1 to M, M is the total number of chips in the vertical expansion network, G i m For configuration A m Able to provide the i-th chip A i The flow control credit value U of the sent data packeti m ; Step S2: Set each U i m The corresponding initial value, U i m The corresponding initial value is G i m The corresponding maximum flow control credit value, U i m satisfy , H m A m The corresponding control granularity, Q i A i The corresponding physical cache; Step S3, A m Get pending A i Packet B sent mi , determine the current U i m Is it greater than or equal to B? mi Required flow control credit value, if yes, then execute step S4, otherwise, wait for U i m Satisfies greater than or equal to B mi When the required flow control credit value is reached, step S4 is executed; Step S4: mi Send to A i , update U i m =U i m -C mi , when A m Receive A i For B mi When replying to the message, update U i m =U i m +C mi .

[0005] According to a second aspect of the present invention, there is provided an electronic device, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions to be executed by the at least one processor, the instructions being configured to execute the method described in the first aspect of the present invention.

[0006] According to a third aspect of the present invention, there is provided a computer-readable storage medium storing computer-executable instructions, wherein the computer instructions are used to execute the method described in the first aspect of the present invention.

[0007] Compared with the prior art, the present invention has obvious advantages and beneficial effects. By means of the above technical solution, the static flow control method, electronic device and medium based on vertical expansion networking provided by the present invention can achieve considerable technical advancement and practicality, and has wide industrial utilization value, and has at least the following beneficial effects: The present invention sets a corresponding static register group for each chip in the vertical expansion network, configures a flow control credit value capable of sending a data packet to a target chip in each register, and controls the sending of the data packet based on the flow control credit value in the register. Based on the method described in the present invention, when the network scale of the vertical expansion network increases, each chip can be reconfigured to set a corresponding static register group, without linearly increasing the physical cache, reducing the demand for physical memory when the network scale of the vertical expansion network increases, reducing the difficulty of physical implementation, and improving the chip yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0009] Figure 1 A flow chart of a static flow control method based on vertical expansion networking provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0010] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0011] The embodiment of the present invention provides a static flow control method based on vertical expansion networking, such as Figure 1 As shown, including: Step S1: For the mth chip A in the vertical expansion network m Set a corresponding set of static registers {G 1 m ,G 2 m ,...,G i m ,...,G M m}, G i m Am The corresponding i-th static register, i ranges from 1 to M, m ranges from 1 to M, M is the total number of chips in the vertical expansion network, G i m For configuration A m Able to provide the i-th chip A i The flow control credit value U of the sent data packet i m .

[0012] Among them, all chips in the vertical expansion network are connected to the same switch, and the chips communicate with each other through the switch. Set a static register group with the same structure for all chips in the vertical expansion network to facilitate the configuration of the data packet flow control credit value. The static register group can be specifically set in the adaptation layer. Each chip is set with a corresponding MAC (Media Access Control Address). The flow control credit value specifically refers to the number of data packets. During the system startup phase or the quasi-static phase, the system completes the configuration of the static register group. By setting each A m Set a corresponding set of static registers {G 1 m ,G 2 m ,...,G i m ,...,G M m}, to achieve point-to-point flow control.

[0013] Step S2: Set each U i m The corresponding initial value, U i m The corresponding initial value is G i m The corresponding maximum flow control credit value, U i m satisfy , H m A m The corresponding control granularity, Q i A i The corresponding physical cache.

[0014] Among them, U i m The value of is dynamically changed according to the data packet transmission situation, and is used to identify the current A m Able to provide the i-th chip A i The maximum value of the data packet sent. i m satisfy Indicates that the sum of the physical cache space corresponding to the control credit values ​​in the static register group of a chip is less than or equal to the physical cache space. In addition, the physical cache space can be expanded according to the flexibility of the physical implementation, such as 1.2 times or multiple times, so the value of the corresponding static register group can also be increased synchronously. The implementation method is flexible, which is convenient for the front-end of the chip and the back-end to implement iterative adjustments. Since the static register group can be statically modified, when the scene on the system side changes, only the value of the static register needs to be changed to complete the scene switching. The rest of the hardware does not need to be changed. In addition, all H m The values ​​can be set to be equal or set separately according to specific application requirements.

[0015] Step S3, A m Get pending A i Packet B sent mi , determine the current U i m Is it greater than or equal to B? mi Required flow control credit value C mi If yes, then execute step S4, otherwise, wait for U i m Satisfies greater than or equal to B mi When the required flow control credit value is reached, step S4 is executed.

[0016] Step S4: mi Send to A i , update U i m =U i m -C mi , when A m Receive A i For B mi When replying to the message, update U i m =U i m +C mi .

[0017] The present invention makes full use of the mapping of static flow control and physical cache. When the network scale reaches hundreds, thousands or even tens of thousands of cards, the corresponding physical cache only increases several times. For example, in the above example, in a 128-card network, the physical cache will not increase linearly, that is, it will not increase by 128 times, but will increase by several times. Compared with the linear growth of the physical cache, it has better feasibility and rationality. The present invention uses static registers. Compared with the traditional solution of increasing physical memory, there is no need to implement complex protocols and other processes. The required flow control mechanism is simple, and other access processes are similar to traditional access, which significantly improves the utilization rate of system resources and communication efficiency.

[0018] As an embodiment, the step S1 includes: Step S11: Get A i The corresponding physical cache Q i , each A m Able to i The target physical cache proportion P corresponding to the sent data packets mi , each A m The corresponding control granularity H m .

[0019] It should be noted that Q i and P mi All are known quantities, determined according to the specific application scenario, so they can be directly obtained. Control particle size H m Set according to specific application scenarios.

[0020] Step S12: If i=m, then i m The initial value of is set to 0. If i≠m, then U i m The initial value is set to (P mi ×Q i ) / H m .

[0021] It should be noted that if i=m, then U i m It means A i Able to provide the i-th chip A i The flow control credit value of the sent data packet can be directly set to 0.

[0022] As an embodiment, the method further includes: step S10, when the M value increases, re-execute steps S1 to S4 based on the updated M value and the control granularity and physical cache corresponding to the newly added chip.

[0023] It should be noted that when the M value increases, it means that the network scale of the vertically expanded network increases. The embodiment of the present invention does not need to linearly increase the physical cache, but only needs to re-execute steps S1-S4 based on the updated M value and the control granularity and physical cache corresponding to the newly added chip.

[0024] In some application scenarios, when the network scale of the vertically expanded network increases, it is necessary to increase the physical cache corresponding to some chips, but the increase is not linear. Usually, increasing it several times can meet the needs. As an embodiment, the method also includes: step C10, when the M value increases, adjusting the physical cache of other chips based on the control granularity and physical cache corresponding to the newly added chip, and re-executing steps S1-S4 based on the updated M value and the control granularity and physical cache corresponding to the newly added chip and the adjusted physical cache of other chips.

[0025] It should be noted that, in actual situations, there is an error between the actual physical cache ratio and the target physical cache ratio. When the error is within a certain range, it is tolerable, but when the error exceeds a preset error threshold, it needs to be adjusted to meet the error requirement, which is explained below through several embodiments.

[0026] Embodiment 1 After step S3, the following steps are also included: Step S4: Get each A m Able to i The actual physical cache ratio R corresponding to the sent data packets mi , if R mi and P mi If the difference is greater than the preset error threshold, step S5 is executed.

[0027] It should be noted that a time interval can be set, and each A m Able to i The actual physical cache ratio R corresponding to the sent data packets mi .

[0028] Step S5: According to R mi and P mi The difference adjustment A m The corresponding control granularity H m , return to execute step S2.

[0029] It should be noted that the specific mi and P mi The difference determines A m The corresponding control granularity adjustment step size and other parameters are used to adjust A m The corresponding control granularity H m , if different A m With different H m , multiple A m The corresponding R mi and P mi The difference between A m The corresponding control granularity H m If all H m If the values ​​are the same, then multiple A m The corresponding R mi and P mi The difference is used to adjust H m The existing strategies for adjusting parameters according to the difference all fall within the protection scope of the present invention and will not be described in detail here.

[0030] Embodiment 2 After step S3, the following steps are also included: Step S4: Get each A m Able to i The actual physical cache ratio R corresponding to the sent data packets mi , if R mi and P mi If the difference is greater than the preset error threshold, step S5 is executed.

[0031] It should be noted that a time interval can be set, and each A m Able to i The actual physical cache ratio R corresponding to the sent data packets mi .

[0032] Step S5: According to R mi and P mi The difference adjustment A m The corresponding control granularity H m , return to execute step S2.

[0033] It should be noted that the specific mi and P mi The difference determines A m The corresponding control granularity adjustment step size and other parameters are used to adjust A m The corresponding control granularity H m , if different A m With different H m , multiple A m The corresponding R mi and P mi The difference between A m The corresponding control granularity H m If all H m If the values ​​are the same, then multiple A m The corresponding R mi and P mi The difference is used to adjust H m The existing strategies for adjusting parameters according to the difference all fall within the protection scope of the present invention and will not be described in detail here.

[0034] Step S6: If the number of times of returning to execute step S2 is greater than the preset number threshold, execute step S7.

[0035] Step S7: According to R mi and P mi The difference adjustment A i The corresponding physical cache Q i size, and returns to execute step S2.

[0036] The method described in the second embodiment first adjusts the control granularity. If the number of times the granularity is adjusted is greater than the preset number threshold and still cannot meet the requirements, then adjust A i The corresponding physical cache Q i The size of R mi and P mi The difference adjustment A i The corresponding physical cache Q i The existing strategies for adjusting parameters according to the difference all fall within the protection scope of the present invention and will not be described in detail here.

[0037] Embodiment 3 After step S3, the following steps are also included: Step C4: Get each A m Able to i The actual physical cache ratio R corresponding to the sent data packets mi , if R mi and P mi If the difference is greater than the preset error threshold, step C5 is executed.

[0038] Step C5: According to R mi and P mi The difference adjustment A i The corresponding physical cache Q i size, and returns to execute step S2.

[0039] The method described in Example 2 is directly based on R mi and P mi The difference adjustment A i The corresponding physical cache Q i The existing strategies for adjusting parameters according to the difference all fall within the protection scope of the present invention and will not be described in detail here.

[0040] Specifically, different methods can be selected for adjustment according to application requirements. Through multiple iterations, the error between the actual physical cache ratio and the target physical cache ratio can meet the requirements.

[0041] It should be noted that some exemplary embodiments are described as processes or methods depicted as flow charts. Although the flow charts describe the steps as sequential processes, many of the steps can be implemented in parallel, concurrently or simultaneously. In addition, the order of the steps can be rearranged. The process can be terminated when its operation is completed, but it can also have additional steps not included in the accompanying drawings. The process can correspond to a method, function, procedure, subroutine, subprogram, etc.

[0042] An embodiment of the present invention also provides an electronic device, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executed by the at least one processor, and the instructions are configured to execute the method described in the embodiment of the present invention.

[0043] The embodiment of the present invention further provides a computer-readable storage medium storing computer-executable instructions, wherein the computer instructions are used to execute the method described in the embodiment of the present invention.

[0044] The embodiment of the present invention sets a corresponding static register group for each chip in the vertical expansion network, configures a flow control credit value capable of sending a data packet to a target chip in each register, and controls the sending of the data packet based on the flow control credit value in the register. Based on the method described in the present invention, when the network scale of the vertical expansion network increases, each chip can be reconfigured to set a corresponding static register group, without linearly increasing the physical cache, reducing the demand for physical memory when the network scale of the vertical expansion network increases, reducing the difficulty of physical implementation, and improving the chip yield.

[0045] The above description is only a preferred embodiment of the present invention and does not limit the present invention in any form. Although the present invention has been disclosed as a preferred embodiment as above, it is not used to limit the present invention. Any technician familiar with this profession can make some changes or modifications to equivalent embodiments of equivalent changes using the technical contents disclosed above without departing from the scope of the technical solution of the present invention. However, any simple modification, equivalent change and modification made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention still falls within the scope of the technical solution of the present invention.

Claims

1. A static flow control method based on vertical expansion networking, characterized in that: include: Step S1: For the mth chip A in the vertical expansion network m Set a corresponding set of static registers {G1 m ,G2 m ,...,G i m ,...,G M m }, G i m A m The corresponding i-th static register, i ranges from 1 to M, m ranges from 1 to M, M is the total number of chips in the vertical expansion network, G i m For configuration A m Able to provide the i-th chip A i The flow control credit value U of the sent data packet i m ; Step S2: Set each U i m The corresponding initial value, U i m The corresponding initial value is G i m The corresponding maximum flow control credit value, U i m satisfy , H m A m The corresponding control granularity, Q i A i The corresponding physical cache; Step S3, A m Get pending A i Packet B sent mi , determine the current U i m Is it greater than or equal to B? mi Required flow control credit value, if yes, then execute step S4, otherwise, wait for U i m Satisfies greater than or equal to B mi When the required flow control credit value is reached, step S4 is executed; Step S4: B mi Send to A i , update U i m =U i m -C mi , when A m Receive A i For B mi When replying to the message, update U i m =U i m +C mi .

2. The method according to claim 1, characterized in that The step S1 comprises: Step S11: Get A i Corresponding physical cache Q i , each A m Able to i The target physical cache proportion P corresponding to the sent data packets mi , each A m The corresponding control granularity H m ; Step S12: If i=m, then i m The initial value of is set to 0. If i≠m, then U i m The initial value is set to (P mi ×Q i ) / H m .

3. The method according to claim 1, characterized in that All H m The values ​​are equal.

4. The method according to claim 1, characterized in that: The method further includes: step S10, when the M value increases, re-executing steps S1 to S4 based on the updated M value and the control granularity and physical cache corresponding to the newly added chip.

5. The method according to claim 1, characterized in that The method also includes: step C10, when the M value increases, adjusting the physical cache of other chips based on the control granularity and physical cache corresponding to the newly added chip, and re-executing steps S1 to S4 based on the updated M value and the control granularity and physical cache corresponding to the newly added chip and the adjusted physical cache of other chips.

6. The method according to claim 1, characterized in that After step S3, the following steps are also included: Step S4: Get each A m Able to i The actual physical cache ratio R corresponding to the sent data packets mi , if R mi and P mi If the difference is greater than a preset error threshold, step S5 is executed; Step S5: According to R mi and P mi The difference adjustment A m The corresponding control granularity H m , return to execute step S2.

7. The method according to claim 6, characterized in that After step S5, the following steps are also included: Step S6: If the number of times of returning to execute step S2 is greater than the preset number threshold, execute step S7; Step S7: According to R mi and P mi The difference adjustment A i Corresponding physical cache Q i size, and returns to execute step S2.

8. The method according to claim 1, characterized in that After step S3, the following steps are also included: Step C4: Get each A m Able to i The actual physical cache ratio R corresponding to the sent data packets mi , if R mi and P mi If the difference is greater than the preset error threshold, execute step C5; Step C5: According to R mi and P mi The difference adjustment A i Corresponding physical cache Q i size, and returns to execute step S2.

9. An electronic device, characterized in that: include: at least one processor; and, a memory communicatively coupled to the at least one processor; The memory stores instructions to be executed by the at least one processor, wherein the instructions are configured to execute the method according to any one of claims 1 to 8.

10. A computer-readable storage medium, characterized in that: Computer executable instructions are stored, and the computer executable instructions are used to execute the method of any one of the preceding claims 1-8.

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