High voltage interlock loop system, related method, apparatus, controller, vehicle and medium

Abstract

Embodiments provided herein relate to high voltage interlock loop systems, related methods, devices, controllers, vehicles, and media. The high voltage interlock loop system includes a controller configured to emit a detection signal having a default mode. The system also includes a first high voltage component configured to change the detection signal from the default mode to the first mode. The system also includes a second high voltage component configured to change the detection signal from the first mode to a second mode. The controller is further configured to determine a current mode of the detection signal. Further, the controller is further configured to determine a failed high voltage component based on the default mode, the first mode, the second mode, and the current mode. Through the mode, the embodiment of the invention can accurately determine the high-voltage component with the fault when the fault occurs in the high-voltage interlocking loop system, so that the manpower and time cost can be saved, and the fault detection efficiency is improved.

Description

Technical Field

[0001] The present disclosure relates generally to vehicle fault detection, and more particularly to high voltage interlock circuit systems, related methods, devices, apparatus, vehicles, and media. Background Art

[0002] The high voltage interlock circuit is a feature used to improve the safety of high voltage circuits. It uses a low voltage circuit to monitor the integrity of the high voltage circuit. The high voltage interlock circuit system is designed to protect personnel who may come into contact with high voltage components in the vehicle. The main electrical components used in the high voltage interlock circuit system of hydrogen energy vehicles include the high voltage interlock connector and the manual maintenance disconnect connector.

[0003] From the perspective of system safety, appropriate technology needs to be used to monitor every possible risk to reduce the probability of risk occurrence. For example, in hydrogen-powered vehicles, the risks that may be encountered include sudden power outages, and power failures may cause the vehicle to lose power. In addition, when the connection between high-voltage components is disconnected, the entire circuit voltage will be applied to both ends of the disconnection point at the moment of disconnection. This transient voltage will break through the air, causing damage to surrounding personnel and equipment. The high-voltage interlock circuit can act as a circuit breaker. If the connection between the high-voltage components is loose, disconnected, or damaged when the hydrogen-powered vehicle is running, the controller will send an alarm to the driver. Summary of the invention

[0004] Embodiments of the present disclosure provide a high-voltage interlocking loop system, and a method, device, controller, vehicle, and medium for determining a fault in a high-voltage interlocking loop system. In an embodiment of the present disclosure, the high-voltage interlocking loop system includes a controller, which can send a detection signal, which can have multiple modes and has a default mode when it is just sent. The high-voltage interlocking loop system can also include multiple high-voltage components, and each of the multiple high-voltage components can change the detection signal to a mode corresponding to the high-voltage component. For example, a high-voltage component located downstream of the controller can change the detection signal from the default mode to a first mode, and another high-voltage component located downstream of the high-voltage component can change the detection signal from the first mode to the second mode, and so on. When all high-voltage components in the high-voltage interlocking loop system are well connected, the detection signal is also changed in turn when passing through each high-voltage component. However, when a certain high-voltage component fails, the detection signal will not be changed to the expected mode. At this time, the controller in the high-voltage interlocking loop system can obtain the current mode of the detection signal, and determine the high-voltage component that has failed based on which mode of the current mode matches the mode of the high-voltage component. In this way, the embodiments of the present disclosure can accurately determine the faulty high-voltage component when a fault occurs in the high-voltage interlocking loop system, without the need to manually inspect each high-voltage component in the system in turn, thereby saving manpower and time costs and improving the efficiency of fault detection.

[0005] In a first aspect of the present disclosure, a high-voltage interlocking loop system is provided. The high-voltage interlocking loop system includes a controller configured to send a detection signal having a default mode. The high-voltage interlocking loop system also includes a first high-voltage component configured to change the detection signal from the default mode to the first mode. The high-voltage interlocking loop system also includes a second high-voltage component configured to change the detection signal from the first mode to the second mode. In addition, the controller in the high-voltage interlocking loop system is also configured to determine the current mode of the detection signal. In addition, the controller is also configured to determine a high-voltage component that has failed based on the default mode, the first mode, the second mode, and the current mode.

[0006] In a second aspect of the present disclosure, a method for determining a fault in a high-voltage interlocking loop system is provided. The method includes a detection signal sent by a controller in the high-voltage interlocking loop system, and the detection signal has a default mode. The method also includes obtaining a first mode and a second mode for the detection signal by the controller, the first mode corresponding to the first high-voltage component, and the second mode corresponding to the second high-voltage component. The method also includes determining the current mode of the detection signal by the controller. In addition, the method also includes determining, by the controller, a high-voltage component that has failed based on the default mode, the first mode, the second mode, and the current mode.

[0007] In a third aspect of the present disclosure, a device is provided. The device includes a signal sending unit configured to send a detection signal, the detection signal having a default mode. The device also includes a mode acquisition unit configured to acquire a first mode and a second mode for the detection signal, the first mode corresponding to the first high-voltage component, and the second mode corresponding to the second high-voltage component. The device also includes a mode determination unit configured to determine the current mode of the detection signal. In addition, the device also includes a fault determination unit configured to determine a high-voltage component that has failed based on the default mode, the first mode, the second mode, and the current mode.

[0008] In a fourth aspect of the present disclosure, a controller is provided, which includes at least one processor and a memory, which is coupled to the at least one processor and has instructions stored thereon, and when the instructions are executed by the at least one processor, the controller executes the method provided according to the second aspect of the present disclosure.

[0009] In a fifth aspect of the present disclosure, a vehicle is provided, comprising the high-voltage interlocking circuit system provided according to the first aspect of the present disclosure.

[0010] In a sixth aspect of the present disclosure, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer-executable instructions, wherein the computer-executable instructions are executed by a processor to implement the method provided according to the second aspect of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] The above and other features, advantages and aspects of the embodiments of the present disclosure will become more apparent with reference to the following detailed description in conjunction with the accompanying drawings. In the accompanying drawings, the same or similar reference numerals represent the same or similar elements, wherein:

[0012] Figure 1 A schematic diagram illustrating an example high voltage interlock loop system in which various embodiments of the present disclosure may be implemented;

[0013] Figure 2 A schematic diagram showing an example of the internal structure of a high voltage component according to some embodiments of the present disclosure;

[0014] FIG. 3A to FIG. 3C A schematic diagram showing an example of a default mode of a detection signal, a first mode corresponding to a first high voltage component, and a second mode corresponding to a second high voltage component according to some embodiments of the present disclosure;

[0015] FIG. 4A to FIG. 4C A schematic diagram showing an example of determining a failed high voltage component based on a current pattern of a detection signal according to some embodiments of the present disclosure;

[0016] Figure 5 A flow chart showing a method for determining a fault in a high voltage interlock loop system according to some embodiments of the present disclosure; and

[0017] Figure 6 A block diagram of an apparatus for determining a fault in a high voltage interlock loop system according to some embodiments of the present disclosure is shown. DETAILED DESCRIPTION

[0018] Embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although certain embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be construed as being limited to the embodiments set forth herein, but rather these embodiments are provided for a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are only for exemplary purposes and are not intended to limit the scope of protection of the present disclosure. The embodiments of the present disclosure described below with reference to the accompanying drawings are only for exemplary purposes.

[0019] There are various high-voltage components in electric vehicles (e.g., hydrogen-powered vehicles), and the high-voltage interlock mechanism helps to improve the safety of the vehicle. For example, in the fuel cell system of a hydrogen-powered vehicle, there is a high-voltage interlock check mechanism that can check the integrity of the high-voltage circuit including multiple high-voltage components to ensure the safety of the high-voltage circuit.

[0020] For example, in the high-voltage interlocking loop of the fuel cell system, the high-voltage components may include a direct current-to-direct current (DC-DC) converter, an electric air compressor (EAC), an electric water pump (EWP), a positive temperature coefficient (PTC) heater, etc. In some conventional schemes, the DC-DC converter may send a pulse width modulation (PWM) signal to check whether a fault occurs in the high-voltage interlocking loop (e.g., a connector associated with the high-voltage component is loose or disconnected), and then the DC-DC converter may check whether the received PWM signal matches the transmitted signal. If the signal does not match (i.e., the transmitted detection signal is not received), the DC-DC converter may report that a high-voltage interlocking error has occurred.

[0021] However, when a problem occurs in a high-voltage circuit, it is not enough to simply report that a high-voltage interlock error has occurred. Engineers also need to determine the part (or component) in the high-voltage circuit that has failed. It is difficult to find out which component has a circuit problem or which type of problem has occurred in the circuit in traditional solutions. Therefore, engineers must disconnect all high-voltage components and use detection equipment to manually check each high-voltage component in the high-voltage circuit one by one to determine which high-voltage component has failed, which wastes a lot of manpower and time. Typically, most high-voltage interlock errors are caused by loose connectors of high-voltage components, so a method is needed to determine which high-voltage component has a circuit breaker problem.

[0022] To this end, an embodiment of the present disclosure provides a scheme for a high-voltage interlocking loop system. In this scheme, the high-voltage interlocking loop system includes a controller, which can send a detection signal, which can have multiple modes and has a default mode when it is just sent. The high-voltage interlocking loop system can also include multiple high-voltage components, and each of the multiple high-voltage components can change the detection signal to a mode corresponding to the high-voltage component. For example, a high-voltage component located downstream of the controller can change the detection signal from the default mode to a first mode, and another high-voltage component located downstream of the high-voltage component can change the detection signal from the first mode to the second mode, and so on. When all high-voltage components in the high-voltage interlocking loop system are well connected, the detection signal is also changed in turn when passing through each high-voltage component. However, when a certain high-voltage component fails, the detection signal will not be changed to the expected mode. At this time, the controller in the high-voltage interlocking loop system can obtain the current mode of the detection signal, and determine the high-voltage component that has failed based on which mode of the current mode matches the high-voltage component. In this way, when a high-voltage component in the high-voltage interlocking loop system fails, the controller can not only report a high-voltage interlocking error, but also report a specific high-voltage component that has failed. In this way, the embodiments of the present disclosure can accurately determine the faulty high-voltage component when a fault occurs in the high-voltage interlocking loop system, without the need to manually inspect each high-voltage component in the system in turn, thereby saving manpower and time costs and improving the efficiency of fault detection.

[0023] Figure 1 Schematic diagram of an example high voltage interlock circuit system 100 in which various embodiments of the present disclosure may be implemented is shown. As an example, Figure 1 The high-voltage interlocking circuit system 100 shown is a high-voltage interlocking circuit system in a fuel cell system of a hydrogen energy vehicle, and the high-voltage components included therein may be various high-voltage components involved in the fuel cell system. However, the solution provided by the embodiments of this invention may be used in any system with a high-voltage interlocking circuit, for example, a high-voltage interlocking circuit system other than a fuel cell system in a hydrogen energy vehicle, a high-voltage interlocking circuit system in other electric vehicles, or even a high-voltage interlocking circuit system in other fields other than the automotive field.

[0024] like Figure 1As shown, the high-voltage interlocking loop system 100 includes a fuel cell control unit (i.e., controller) 102 and a plurality of high-voltage components, the plurality of high-voltage components including a DC-DC converter 108 (also referred to as a first high-voltage component), an electric air compressor 114 (also referred to as a second high-voltage component), an electric water pump 120 (also referred to as a third high-voltage component), and a PTC heater 126 (also referred to as a fourth high-voltage component). It should be noted that the above-mentioned high-voltage components are an example of a high-voltage interlocking loop, and other high-voltage components in the high-voltage interlocking loop may be included in other embodiments. Figure 1 As shown, the fuel cell control unit 102 includes an output pin 104 and an input pin 106, and the output pin 104 can send a detection signal 105 with a default mode 132 on the high-voltage interlocking loop. In the high-voltage interlocking loop system 100, the detection signal 105 is a PWM signal, and the detection signals with different modes have different durations of being at a low level in a specific cycle, and the corresponding durations of being at a high level are also different. In addition, the output pin 104 can also obtain the current mode of the detection signal 105 on the high-voltage interlocking loop, and the current mode of the acquired detection signal 105 can be, for example, mode 132, 134, 136, 138 or 140. If all high-voltage components in the high-voltage interlocking loop system 100 are not faulty, the input pin 106 of the fuel cell control unit 102 can receive the detection signal 105 sent by the output pin 104. On the contrary, if any of the multiple high-voltage components in the high-voltage interlocking loop system 100 fails, the input pin 106 will not be able to receive the detection signal 105.

[0025] like Figure 1 As shown, the fuel cell control unit 102 can be connected to the DC-DC converter 108, and the DC-DC converter 108 has a controller 110 and a signal adjustment component 112. When the DC-DC converter 108 receives the detection signal 105 with a default mode 132, the controller 110 can use the signal adjustment component 112 to change the mode of the detection signal 105, such as Figure 1 As shown, the mode of the detection signal 105 is changed from the default mode 132 to the mode 134. In some embodiments, the signal adjustment component 112 can change the mode of the detection signal 105 by changing the high level of the detection signal 105 to a low level, so that after the mode of the detection signal 105 is changed by the signal adjustment component 112, the low level time length of the mode 134 within the fixed window duration is greater than the low level time length of the default mode 132 within the fixed window duration.

[0026] like Figure 1As shown, in the high-voltage interlocking loop system 100, the DC-DC converter 108 is connected to the electric air compressor 114, and the electric air compressor 114 has a controller 116 and a signal adjustment component 118. When the electric air compressor 114 receives the detection signal 105 having a mode 134, the controller 116 can use the signal adjustment component 118 to change the mode of the detection signal 105 from mode 134 to mode 136. The signal adjustment component 118 is a component similar to the signal adjustment component 112, and it can also change the mode of the detection signal 105 by changing the high level of the detection signal 105 to a low level, so that the time length of the mode 136 being at a low level within the fixed window duration is greater than the time length of the mode 134 being at a low level within the fixed window duration. Similarly, the electric air compressor 114 can be connected to the electric water pump 120, and the electric water pump 120 has a controller 122 and a signal adjustment component 124. The controller 122 can use the signal adjustment component 124 to change the mode of the detection signal 105 from mode 136 to mode 138 with a longer low level duration within a fixed window duration. In addition, the electric water pump 120 can be connected to the PTC heater 126, and the PTC heater 126 has a controller 128 and a signal adjustment component 130. The controller 128 can use the signal adjustment component 130 to change the mode of the detection signal 105 from mode 138 to mode 140 with a longer low level duration within a fixed window duration.

[0027] During the normal operation of the high-voltage interlocking loop system 100 (i.e., no high-voltage components such as the DC-DC converter 108, the electric air compressor 114, the electric water pump 120, and the PTC heater 126 have failed), the input pin 106 of the fuel cell control unit 102 can receive the detection signal 105 issued by the output pin 104, so it can be determined that no high-voltage components have failed. When the connector associated with a certain high-voltage component is loose or disconnected, the input pin 106 of the fuel cell control unit 102 will not be able to receive the detection signal 105, and the output pin 104 can obtain the current mode of the detection signal 105 on the high-voltage interlocking loop, and then the fuel cell control unit 102 can determine the high-voltage component that has failed based on the current mode of the detection signal 105, the default mode 132, and multiple modes corresponding to each high-voltage component (e.g., modes 134, 136, 138, and 140).

[0028] Since each high-voltage component can adjust the detection signal 105, thereby changing the mode of the detection signal 105 to a mode corresponding to the high-voltage component, when the fuel cell control unit 102 obtains the current mode of the detection signal 105 through the output pin 104, the high-voltage component that has failed can be determined based on the current mode. In this way, the fuel cell control unit 102 can not only report high-voltage interlock loop errors, but also report specific high-voltage components that have failed, thereby eliminating the need to manually check multiple high-voltage components in the high-voltage interlock loop system one by one, saving a lot of manpower and time costs.

[0029] In order to enable each high-voltage component to adjust the detection signal, it is necessary to change the hardware structure inside the high-voltage component to support this function. In some embodiments, the high-voltage component includes a signal adjustment component and a controller, and the controller is configured to use the signal adjustment component to change the duration of the detection signal being at a low level in a predetermined window duration. In some embodiments, the signal adjustment component can be a triode, and the signal adjustment component can be configured to receive the detection signal, and change the duration of the detection signal being at a low level in a predetermined window duration by grounding the detection signal.

[0030] Figure 2 Schematic diagram showing an example 200 of the internal structure of a high voltage component according to some embodiments of the present disclosure. Figure 2 As shown, in example 200, the high voltage component 202 includes a controller 204 and a transistor (signal conditioning component) 206. The controller 204 can control the conduction time of the transistor 206 according to a predetermined mode. Figure 2 As shown, triode 206 can receive the PWM detection signal with mode 210, and then controller 204 can periodically conduct triode 206 for a predetermined duration according to a predetermined mode. During the conduction of triode 206, the detection signal is connected to ground 208, so that the high level of the detection signal is changed to a low level. After the predetermined duration, controller 204 can disconnect triode 206 so that the detection signal stops being connected to ground 208, thereby keeping the high level (or low level) unchanged. Like this, by periodically conducting triode 206 according to a predetermined mode so that the detection signal is grounded, the duration that the detection signal is in a low level can be changed, thereby the mode of the detection signal is changed from mode 210 to mode 212.

[0031] There are many benefits to changing the mode of the detection signal by using the controller 204 and the transistor 206. For example, the control accuracy of the transistor element is high and the response can be fast, so that the time for which the detection signal is at a low level can be accurately controlled, and the time consumed in the process of adjusting the detection signal can be reduced. In addition, the transistor element has a small size and low cost, so it can be widely used in various high-voltage components.

[0032] After the hardware of the high-voltage component can support the mode of changing the detection signal, the mode of the appropriate detection signal can be designed for each component. In some embodiments, a unified window duration for each high-voltage component can be predetermined, and the duration of the detection signal being at a low level in the window duration is different, indicating different detection signal modes. In some embodiments, the controller of the high-voltage component can obtain a pre-stored mode of the detection signal for the high-voltage component, which indicates the duration of the detection signal being at a low level in a predetermined window duration. In some embodiments, the first high-voltage component connected to the fuel cell control unit can change the duration of the detection signal being at a low level in a predetermined window duration from a default duration to a first duration based on a mode pre-stored in the first high-voltage component, and the first duration is greater than the default duration. In some embodiments, the second high-voltage component connected to the first high-voltage component can change the duration of the detection signal being at a low level in a predetermined window duration from a first duration to a second duration based on a mode pre-stored in the second high-voltage component, and the second duration is greater than the first duration.

[0033] FIG. 3A to FIG. 3C Schematic diagrams showing examples 300 , 320 , and 340 of a default mode, a first mode corresponding to a first high voltage component, and a second mode corresponding to a second high voltage component of a detection signal according to some embodiments of the present disclosure. Figure 3A Schematic diagram showing an example 300 of a default mode for detecting a signal according to some embodiments of the present disclosure. The default mode may be, for example, Figure 1 The mode of the detection signal 105 sent by the output pin 104 of the fuel cell control unit 102 in the high-voltage interlocking loop system 100 shown in FIG. Figure 3A As shown, in example 300, the detection signal (eg, Figure 1 The detection signal 105) in FIG. 1 is a PWM signal, and the period between time 302 and time 304 is a PWM signal cycle.

[0034] like Figure 3AAs shown, in the default mode, each cycle of the PWM signal includes a high level of a specific duration. Between time 306 and time 308 is a predetermined window duration 310, which can be, for example, 500 milliseconds, 1 second, 2 seconds, etc. In example 300, window duration 310 includes ten PWM signal cycles. It should be understood that for simplicity, Figure 3A Only ten PWM signal cycles are shown in FIG. 3 , but in actual implementation, the window duration may include more or fewer PWM signal cycles. For example, when the window duration 310 is 1 second and the PWM signal cycle is 20 milliseconds, the window duration 310 may include fifty PWM signal cycles. Figure 3A As shown, the ten PWM signal cycles in the window duration 310 all include a high level for a specific duration, so it can be said that within the window duration 310, the duration during which the detection signal remains normal (i.e., the PWM signal is not changed to a low level by the signal adjustment component) is ten cycles (e.g., 200 milliseconds), and the duration during which the detection signal is changed to a low level by the signal adjustment component is zero.

[0035] Figure 3B A schematic diagram showing an example 320 of a first pattern of a detection signal corresponding to a first high voltage component according to some embodiments of the present disclosure. The first high voltage component is a high voltage component connected to a controller, for example, the first high voltage component may be Figure 1 The DC-DC converter 108 connected to the fuel cell control unit 102 is shown in FIG. 1 , and the first mode may be a mode 134 corresponding to the DC-DC converter 108. Figure 3B As shown, between time 322 and time 326 is a window duration 328, and the window duration 328 should be consistent with Figure 3A The window duration 310 shown in FIG. 1 is equal to (ie, also ten PWM signal cycles). Figure 3A The default mode shown is different. Figure 3B In the first mode shown, the two PWM signal cycles between time 322 and time 324 can be designed to be continuously low level, and the eight PWM signal cycles between time 324 and time 326 can be kept at high level. Therefore, it can be said that within the window duration 328, the duration 330 during which the detection signal is changed to low level by the signal adjustment component is two cycles (e.g., 40 milliseconds), and the duration 332 during which the detection signal remains normal is eight cycles (e.g., 160 milliseconds).

[0036] Figure 3C A schematic diagram showing an example 340 of a second mode of a detection signal corresponding to a second high voltage component according to some embodiments of the present disclosure. The second high voltage component is a high voltage component connected to the first high voltage component. For example, the second high voltage component may be Figure 1, and the second mode may be a mode 136 corresponding to the electric air compressor 114. Figure 3C As shown, between time 342 and time 346 is a window duration 348, and the window duration 348 should be consistent with Figure 3A The window durations 310 and 310 shown in Figure 3B The window duration 328 shown in is equal (i.e., also ten PWM signal periods). Figure 3C In the second mode shown, the four PWM signal cycles between time 342 and time 344 can be designed to be continuously low level, and the six PWM signal cycles between time 344 and time 346 can be kept at high level. Therefore, it can be said that within the window duration 348, the duration 350 during which the detection signal is changed to low level by the signal adjustment component is four cycles (e.g., 80 milliseconds), and the duration 352 during which the detection signal remains normal is six cycles (e.g., 120 milliseconds).

[0037] This design simplifies the hardware support for implementing the design (for example, Figure 2 The internal structure of the high-voltage component shown in FIG. 1 is shown in FIG. 1 ), thereby improving applicability and saving hardware costs. In addition, the design can also determine the corresponding high-voltage component based on the pattern of the detection signal, thereby saving manpower and time consumed in determining the faulty high-voltage component.

[0038] After determining the corresponding detection signal mode for each high-voltage component, the corresponding detection signal mode can be configured in each high-voltage component, and then the controller of the high-voltage component changes the detection signal mode passing through the high-voltage component to the configured predetermined mode based on the configured detection signal mode and using the signal adjustment component of the high-voltage component. In addition, the controller (e.g., Figure 1 The fuel cell control unit 102 in the system can obtain a mapping relationship between multiple pre-stored high-voltage components and multiple detection signal patterns, and then determine the faulty high-voltage component based on the current pattern of the detection signal on the high-voltage interlocking loop and the mapping relationship.

[0039] In some embodiments, the first high-voltage component connected to the controller is configured to change the detection signal from the default mode to the first mode, and the second high-voltage component connected to the first high-voltage component is configured to change the detection signal from the first mode to the second mode. In some embodiments, the current mode of the detection signal on the high-voltage interlock loop obtained by the output pin of the controller is compared with the default mode, the first mode and the second mode of the detection signal. If the current mode is the same as the default mode, it can be determined that the first high-voltage component has failed; if the current mode is the same as the first mode, it can be determined that the second high-voltage component has failed; if the current mode is the same as the second mode, it can be determined that the first high-voltage component and the second high-voltage component have not failed.

[0040] FIG. 4A to FIG. 4C Schematic diagrams showing examples 400, 420, and 440 of determining a failed high voltage component based on a current pattern of a detection signal according to some embodiments of the present disclosure. FIG. 4A to FIG. 4C In the examples 400, 420 and 440 shown, the high voltage interlock loop system includes a fuel cell control unit 102, a DC-DC converter 108, an electric air compressor 114, an electric water pump 120 and a PTC heater 126, wherein the fuel cell control unit 102 includes an output pin 104 and an input pin 106. In the examples 400, 420 and 440, the output pin 104 of the fuel cell control unit 102 can send a detection signal having a default mode, and the default mode is the same as the above. Figure 3A The default mode of the example 300 shown is the same. The controller of the DC-DC converter 108 (e.g., Figure 1 The controller 110 in the embodiment may change the detection signal from the default mode to the first mode, and the first mode is similar to the Figure 3B The first mode of the illustrated example 320 is the same. The controller of the electric air compressor 114 (e.g., Figure 1 The controller 116 in the embodiment may change the detection signal from the first mode to the second mode, and the second mode is similar to the Figure 3C The second mode of the illustrated example 340 is the same.

[0041] In such Figure 4A In the example 400 shown, the output pin 104 of the fuel cell control unit 102 can obtain the current mode 402 of the detection signal on the high voltage interlock loop. Within a predetermined window duration 404 (i.e., ten PWM signal cycles), the duration of the detection signal being at a low level is zero, and the duration 406 of being at a high level is ten PWM signal cycles. When the low level duration (i.e., zero) within the window duration 404 is compared with the default mode of the detection signal (e.g., Figure 3A The low level duration shown is zero), corresponding to the first mode of the DC-DC converter 108 (such as Figure 3B The low level duration 330 shown is two PWM signal cycles), and corresponds to the second mode of the electric air compressor 114 (such as Figure 3C After comparing the low level duration 350 shown in FIG. 1 with four PWM signal cycles), it can be determined that the current mode 402 of the detection signal matches the default mode. Since the mode of the detection signal can be changed from the default mode to the first mode when the DC-DC converter 108 does not fail, it can be inferred that the DC-DC converter 108 fails based on the current mode 402 matching the default mode. At this time, the fuel cell control unit 102 can not only report that an error has occurred in the high-voltage interlocking loop, but also accurately report that a fault has occurred at the DC-DC converter 108.

[0042] In such Figure 4B In the example 420 shown, the output pin 104 of the fuel cell control unit 102 can obtain the current mode 422 of the detection signal on the high-voltage interlock loop. Also in the predetermined window duration 404 (i.e., ten PWM signal cycles), the duration 426 of the detection signal being at a low level is two PWM signal cycles, and the duration 428 being at a high level is eight PWM signal cycles. After comparing the low level duration 426 in the window duration 404 with the default mode (i.e., zero) of the detection signal, the first mode (i.e., two PWM signal cycles) corresponding to the DC-DC converter 108, and the second mode (i.e., four PWM signal cycles) corresponding to the electric air compressor 114, it can be determined that the current mode 422 of the detection signal matches the first mode corresponding to the DC-DC converter 108. This means that the DC-DC converter 108 successfully changes the mode of the detection signal from the default mode to the first mode, so the DC-DC converter 108 does not fail. However, since the electric air compressor 114 fails to change the detection signal from the first mode to the second mode, it can be inferred that the electric air compressor 114 has failed. At this time, the fuel cell control unit 102 can not only report that the high voltage interlock circuit has an error, but also accurately report that the fault occurs at the electric air compressor 114.

[0043] In such Figure 4CIn the example 440 shown, the output pin 104 of the fuel cell control unit 102 can obtain the current mode 442 of the detection signal on the high-voltage interlock loop. Also within the predetermined window duration 404 (i.e., ten PWM signal cycles), the duration 446 of the detection signal at a low level is four PWM signal cycles, and the duration 448 at a high level is six PWM signal cycles. After comparing the low level duration 446 within the window duration 404 with the default mode of the detection signal (i.e., zero) and the second mode corresponding to the electric air compressor 114 (i.e., four PWM signal cycles), it can be determined that the current mode 442 of the detection signal matches the second mode corresponding to the electric air compressor 114. This means that the DC-DC converter 108 successfully changes the mode of the detection signal from the default mode to the first mode, and the electric air compressor 114 successfully changes the mode of the detection signal from the first mode to the second mode, so it can be inferred that neither the DC-DC converter 108 nor the electric air compressor 114 has failed (and it can be further inferred that the electric water pump 120 has failed).

[0044] In this way, when a fault occurs in the high-voltage interlocking loop system, the faulty high-voltage component can be accurately determined without the need to manually inspect each high-voltage component in the system one by one, thereby saving labor and time costs and improving the efficiency of fault detection.

[0045] In some embodiments, in order to improve the fault tolerance of the high-voltage interlocking loop system, the current duration of the low level in the predetermined window duration in the current mode of the detection signal can be determined, and then the current duration is compared with the default duration range corresponding to the default mode, the first duration range corresponding to the first mode, and the second duration range corresponding to the second mode. If the current duration is within the default duration range, it means that the current mode is the same as the default mode; if the current duration is within the first duration range, it means that the current mode is the same as the first mode; if the current duration is within the second duration range, it means that the current mode is the same as the second mode.

[0046] exist FIG. 4A to FIG. 4CIn the examples 400, 420 and 440 shown, the low level duration range corresponding to the default mode can be, for example, 0 to 100 milliseconds (for example, each PWM signal cycle is 100 milliseconds), the low level duration range corresponding to the first mode can be, for example, 100 milliseconds to 300 milliseconds, and the low level duration range corresponding to the second mode can be, for example, 300 milliseconds to 500 milliseconds, and so on. If the output pin 104 of the fuel cell control unit 102 obtains the low level duration of the current mode of the detection signal between 0 and 100 milliseconds, it can be determined that the current mode matches the default mode. If the low level duration of the current mode is between 100 milliseconds and 300 milliseconds, it can be determined that the current mode matches the first mode. If the low level duration of the current mode is between 300 milliseconds and 500 milliseconds, it can be determined that the current mode matches the second mode. In this way, the fault tolerance of the high-voltage interlocking loop system can be improved, and the situation where the high-voltage component that fails cannot be determined can be reduced.

[0047] Figure 5 FIG. 5 is a flow chart showing a method 500 for determining a fault in a high voltage interlock circuit system according to some embodiments of the present disclosure. Figure 5 As shown, at block 502, the method 50 may include a detection signal from a controller in a high voltage interlock loop system, the detection signal having a default mode. Figure 1 In the high-voltage interlock loop system 100 shown, the fuel cell control unit 102 can send a detection signal 105 through an output pin 104, and the detection signal 105 has a default mode 132. In some embodiments provided herein, the detection signal 105 can be a PWM signal, but the detection signal 105 can also be other signals, which need to be able to be adjusted to different modes to correspond to different high-voltage components.

[0048] At block 504, method 500 may obtain, by the controller, a first pattern and a second pattern for the detection signal, wherein the first pattern corresponds to the first high voltage component and the second pattern corresponds to the second high voltage component. Figure 1 In the high-voltage interlock loop system 100 shown, the controller 110 of the DC-DC converter 108 can be configured to control the signal adjustment component 112 according to the mode 134 to change the mode of the detection signal 105 to the mode 134, and the controller 116 of the electric air compressor 114 can be configured to control the signal adjustment component 118 according to the mode 136 to change the mode of the detection signal 105 to the mode 136. Accordingly, the fuel cell control unit 102 can obtain the modes 134 and 136.

[0049] At block 506, method 500 may determine, by the controller, the current mode of the detection signal. Figure 1In the high-voltage interlocking loop system 100 shown, the fuel cell control unit 102 can obtain the current mode of the detection signal 105 on the high-voltage interlocking loop through the output pin 104. When any one or more high-voltage components in the high-voltage interlocking loop system 100 fail (for example, the connector becomes loose or a circuit is broken at the high-voltage component), the detection signal 105 cannot be obtained at the input pin 106 of the fuel cell control unit 102, and therefore, the current mode of the detection signal 105 needs to be determined through the output pin 104.

[0050] At block 508, method 500 may determine, by the controller, a failed high voltage component based on the default mode, the first mode, the second mode, and the current mode. Figure 1 In the high-voltage interlock loop system 100 shown, when the fuel cell control unit 102 obtains the current mode of the detection signal 105, it can determine which of the DC-DC converter 108 and the electric air compressor 114 the faulty high-voltage component is by comparing the current mode with the default mode 132, mode 134 and mode 136.

[0051] It should be understood that for the sake of simplicity, only the process of determining the high-voltage component that has failed between the DC-DC converter 108 and the electric air compressor 114 is described in method 500, but the solution provided herein can be used to determine which one of all high-voltage components has failed. For example, in box 504, the mode 138 corresponding to the electric water pump 120 and the mode 140 corresponding to the PTC heater can also be obtained, and in box 508, it can be determined which one of all high-voltage components has failed based on the current mode, the default mode 132, the mode 134, the mode 136, the mode 138, and the mode 140.

[0052] In this way, when a fault occurs in the high-voltage interlocking loop system, the faulty high-voltage component can be accurately determined without the need to manually inspect each high-voltage component in the system one by one, thereby saving manpower and time costs and improving the efficiency of fault detection.

[0053] Figure 6 FIG. 6 is a block diagram of an apparatus 600 for controlling a fuel cell system according to some embodiments of the present disclosure. Figure 6As shown, the device 600 includes a signal sending unit 602, which is configured to send a detection signal, and the detection signal has a default mode. The device 600 also includes a mode acquisition unit 604, which is configured to acquire a first mode and a second mode for the detection signal, the first mode corresponds to the first high-voltage component, and the second mode corresponds to the second high-voltage component. The device 600 also includes a mode determination unit 606, which is configured to determine the current mode of the detection signal. In addition, the device 600 also includes a fault determination unit 608, which is configured to determine the high-voltage component that has failed based on the default mode, the first mode, the second mode, and the current mode.

[0054] In some embodiments, the fault determination unit 608 is further configured to compare the current mode with the default mode, the first mode, and the second mode; in response to the current mode being the same as the default mode, determine that the first high-voltage component has failed; in response to the current mode being the same as the first mode, determine that the second high-voltage component has failed; and in response to the current mode being the same as the second mode, determine that the first high-voltage component and the second high-voltage component have not failed.

[0055] It can be understood that by using the device 600 of the present disclosure, at least one of the advantages that can be achieved by the method or process described above can be achieved. For example, the device 600 can accurately determine the high-voltage component that has failed when a failure occurs in the high-voltage interlocking loop system, without the need to manually detect each high-voltage component in the system in turn, thereby saving manpower and time costs and improving the efficiency of fault detection.

[0056] The functions described above herein may be performed at least in part by one or more hardware logic components. For example, without limitation, exemplary types of hardware logic components that may be used include: field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chip systems (SOCs), load programmable logic devices (CPLDs), and the like.

[0057] The program code for implementing the method of the present disclosure may be written in any combination of one or more programming languages. These program codes may be provided to a processor or controller of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that the program code, when executed by the processor or controller, enables the functions / operations specified in the flow chart and / or block diagram to be implemented. The program code may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.

[0058] In the context of the present disclosure, a machine-readable medium may be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, device, or equipment. A machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or equipment, or any suitable combination of the foregoing. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In addition, although each operation is depicted in a specific order, this should be understood as requiring such operations to be performed in the specific order shown or in a sequential order, or requiring that all illustrated operations should be performed to obtain the desired result. In certain environments, multitasking and parallel processing may be advantageous. Similarly, although several specific implementation details are included in the above discussion, these should not be interpreted as limiting the scope of the present disclosure. Certain features described in the context of separate embodiments can also be implemented in a single implementation in combination. On the contrary, the various features described in the context of a single implementation can also be implemented in multiple implementations individually or in any suitable sub-combination.

[0059] Although the subject matter has been described in language specific to structural features and / or methodological logical actions, it should be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or actions described above. On the contrary, the specific features and actions described above are merely example forms of implementing the claims.

Claims

1. A high voltage interlocking circuit system, comprising: a controller configured to issue a detection signal having a default pattern; a first high voltage component configured to change the detection signal from the default mode to a first mode; a second high voltage component configured to change the detection signal from the first mode to a second mode; The controller is also configured to: determining a current mode of the detection signal; as well as A failed high voltage component is determined based on the default mode, the first mode, the second mode, and the current mode.

2. The system of claim 1 , wherein determining a failed high voltage component comprises: comparing the current mode with the default mode, the first mode, and the second mode; In response to the current mode being the same as the default mode, determining that the first high-voltage component fails; In response to the current mode being the same as the first mode, determining that the second high-voltage component fails; as well as In response to the current mode being the same as the second mode, it is determined that the first high voltage component and the second high voltage component are not malfunctioning.

3. The system of claim 2, wherein the detection signal is a pulse width modulated signal, and changing the detection signal from the default mode to the first mode by the first high voltage component in the high voltage interlock loop system comprises: The first high-voltage component changes the duration during which the detection signal is at a low level in a predetermined window duration from a default duration to a first duration, The first duration is greater than the default duration.

4. The system of claim 3, wherein changing the detection signal from the first mode to the second mode by the second high voltage component in the high voltage interlock loop system comprises: The second high-voltage component changes the duration during which the detection signal is at a low level in the predetermined window duration from the first duration to a second duration, The second duration is greater than the first duration.

5. The system of claim 4, wherein comparing the current mode to the default mode, the first mode, and the second mode comprises: Determine a current duration during which the detection signal is at a low level within the predetermined window duration in the current mode; as well as The current duration is compared with a default duration range, a first duration range, and a second duration range, wherein the default duration range corresponds to the default mode, the first duration range corresponds to the first mode, and the second duration range corresponds to the second mode.

6. A system according to claim 5, wherein the current duration indicates that the current mode is the same as the default mode within the default duration range, the current duration indicates that the current mode is the same as the first mode within the first duration range, and the current duration indicates that the current mode is the same as the second mode within the second duration range.

7. The system of claim 4, wherein the second high voltage component comprises: signal conditioning components; as well as The second controller is configured to use the signal adjustment component to change the duration during which the detection signal is at a low level within the predetermined window duration.

8. The system of claim 7, wherein the signal conditioning component is a triode, and the signal conditioning component is further configured to: receiving the detection signal; and The duration during which the detection signal is at a low level in the predetermined window duration is changed by grounding the detection signal.

9. The system of claim 1, wherein the controller is a fuel cell control unit, the first high voltage component is a DC-DC converter, the second high voltage component is an electric air compressor, and the high voltage interlock loop system further includes an electric water pump and a heater.

10. A method for determining a fault in a high voltage interlock circuit system, comprising: A detection signal is sent by a controller in the high-voltage interlocking loop system, wherein the detection signal has a default mode; Acquiring, by the controller, a first mode and a second mode for the detection signal, wherein the first mode corresponds to a first high-voltage component, and the second mode corresponds to a second high-voltage component; determining, by the controller, a current mode of the detection signal; as well as A failed high voltage component is determined by the controller based on the default mode, the first mode, the second mode, and the current mode.

11. The method of claim 10, wherein determining a failed high voltage component comprises: comparing the current mode with the default mode, the first mode, and the second mode; In response to the current mode being the same as the default mode, determining that the first high-voltage component fails; In response to the current mode being the same as the first mode, determining that the second high-voltage component fails; as well as In response to the current mode being the same as the second mode, it is determined that the first high voltage component and the second high voltage component are not malfunctioning.

12. An apparatus for determining a fault in a high voltage interlock circuit system, comprising: a signal issuing unit, configured to issue a detection signal, wherein the detection signal has a default mode; a mode acquisition unit configured to acquire a first mode and a second mode for the detection signal, wherein the first mode corresponds to the first high-voltage component and the second mode corresponds to the second high-voltage component; a mode determination unit, configured to determine a current mode of the detection signal; as well as The fault determination unit is configured to determine a faulty high voltage component based on the default mode, the first mode, the second mode, and the current mode.

13. A controller comprising: at least one processor; as well as A memory coupled to the at least one processor and having instructions stored thereon, the instructions, when executed by the at least one processor, causing the controller to perform the method according to any one of claims 10-11.

14. A vehicle comprising the high voltage interlock circuit system according to claims 1-9.

15. A computer-readable storage medium having computer-executable instructions stored thereon, wherein the computer-executable instructions are executed by a processor to implement the method according to any one of claims 10 to 11.

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