Stroke sensor, brake system and brake control method

Abstract

The invention discloses a stroke sensor, a braking system and a braking control method, the stroke sensor comprises a signal generation unit and a first control circuit, the first control circuit comprises a comparison circuit and a wake-up circuit, one end of the comparison circuit is connected with the signal generation unit, and the other end of the comparison circuit is connected with the wake-up circuit; the signal generation unit is used for acquiring pedal position information and outputting a pulse signal to the comparison circuit according to the pedal position information; the comparison circuit is used for outputting counting information corresponding to the pulse signal and outputting a target high-level signal to the wake-up circuit under the condition that the counting information meets a preset condition; the counting information is used for representing the number of preset signal durations in the level duration of the pulse signal; and the wake-up circuit is used for outputting a brake wake-up signal under the condition that the target high-level signal is received so as to perform brake wake-up. According to the embodiment of the invention, the braking accuracy can be improved, and the stroke sensor is simple in circuit and high in integration level.

Description

Technical Field

[0001] The present invention relates to the technical field of brake systems, and in particular to a travel sensor, a brake system and a brake control method. Background Art

[0002] The usual automobile braking system is connected to the pedal. The braking system detects whether the pedal is pressurized and the degree of pressurization through the PTS (Pedal Travel Sensor). The ECU (Electronic Control Unit) receives the output signal from the PTS to perform vehicle braking. When force is applied to the pedal, a wake-up signal can be sent to the ECU of the vehicle braking system to brake. The existing vehicle brake pedal wake-up switch uses an external dedicated sensor placed on the side of the brake pedal, which not only requires an additional electromagnet, but also has high installation space requirements, and the accuracy of brake wake-up control is insufficient. Therefore, a travel sensor with a simpler structure and greater versatility is needed to improve braking accuracy at the same time. Summary of the invention

[0003] In view of the above problems in the prior art, the present invention discloses a travel sensor, a braking system and a braking control method, which can improve the braking accuracy. The travel sensor circuit is simple, has a high degree of integration and has strong applicability. The technical solution disclosed in the present invention is as follows:

[0004] According to one aspect of the disclosed embodiment of the present invention, a travel sensor is provided, the travel sensor comprising a signal generating unit and a first control circuit, the first control circuit comprising a comparison circuit and a wake-up circuit, one end of the comparison circuit is connected to the signal generating unit, and the other end of the comparison circuit is connected to the wake-up circuit;

[0005] The signal generating unit is used to obtain pedal position information, and output a pulse signal to the comparison circuit according to the pedal position information;

[0006] The comparison circuit is used to output the counting information corresponding to the pulse signal, and output the target high level signal to the wake-up circuit when the counting information meets the preset conditions; the counting information is used to characterize the number of preset signal durations within the level duration of the pulse signal;

[0007] The wake-up circuit is used to output a braking wake-up signal to perform braking wake-up when receiving the target high-level signal.

[0008] Optionally, the comparison circuit includes a counter and a trigger, and the wake-up circuit includes a first resistor, a second resistor, a third resistor, a first transistor, a second transistor and a first power supply;

[0009] One end of the counter is connected to the signal generating unit, the other end of the counter is connected to one end of the trigger, the other end of the trigger is connected to one end of the first resistor, the other end of the first resistor is connected to the first end of the first transistor, the second end of the first transistor is connected to one end of the second resistor, the third end of the first transistor is grounded, one end of the third resistor and the first end of the second transistor are both connected to the other end of the second resistor, the other end of the third resistor and the second end of the second transistor are both connected to the first power supply, and the second end of the second transistor is connected to the receiver of the brake wake-up signal;

[0010] The counter is used to determine the counting information corresponding to the pulse signal, and to output a high-level signal to the trigger when the counting information meets the preset condition. The trigger is used to output the target high-level signal to the wake-up circuit when receiving the high-level signal output by the counter.

[0011] Optionally, the counter includes a first counter, the trigger includes a first trigger, one end of the first counter is connected to the signal generating unit, the other end of the first counter is connected to one end of the first trigger, and the other end of the first trigger is connected to one end of the first resistor;

[0012] The first counter is used to determine the first counting information corresponding to the pulse signal, and to output a first high-level signal to the first trigger when the first counting information satisfies a first preset condition. The first trigger is used to output the target high-level signal to the wake-up circuit when receiving the first high-level signal. The first counting information is used to characterize the number of preset signal durations within the first level duration of the pulse signal.

[0013] Optionally, the counter includes a first counter and a second counter, the trigger includes a first trigger, a second trigger and a third trigger, the comparison circuit also includes a first inverter, one end of the first counter and one end of the first inverter are both connected to the signal generating unit, one end of the second counter is connected to the other end of the first inverter, the other end of the first counter is connected to one end of the first trigger, the other end of the second counter is connected to one end of the second trigger, the other end of the first trigger and the other end of the second trigger are both connected to one end of the third trigger, and the other end of the third trigger is connected to one end of the first resistor;

[0014] The first counter is used to determine the first counting information corresponding to the pulse signal, and is used to output a first high-level signal to the first trigger when the first counting information meets a first preset condition. The second counter is used to determine the second counting information corresponding to the pulse signal, and is used to output a second high-level signal to the second trigger when the second counting information meets a second preset condition. The first trigger is used to output a third high-level signal to the third trigger when the first high-level signal is received. The second trigger is used to output a fourth high-level signal to the third trigger when the second high-level signal is received. The third trigger is used to output the target high-level signal to the wake-up circuit when the third high-level signal and the fourth high-level signal are received;

[0015] The first counting information is used to characterize the number of preset signal durations within the first level duration of the pulse signal, and the second counting information is used to characterize the number of preset signal durations within the second level duration of the pulse signal.

[0016] Optionally, the comparison circuit further includes a resistor combination and a second power supply, the resistor combination is connected to the counter and the second power supply, and the resistor combination is used to determine the preset condition;

[0017] The resistor combination includes a first resistor combination and a second resistor combination, the first resistor combination and the second resistor combination are connected to the first counter and the second counter, the first resistor combination and the second resistor combination correspond to the first counter and the second counter respectively, one of the first resistor combination and the second resistor combination is connected to the second power supply, and the other of the first resistor combination and the second resistor combination is grounded;

[0018] The first resistor combination and the second resistor combination are used to determine the first preset condition and the second preset condition respectively.

[0019] Optionally, the first control circuit further includes a frequency generating circuit, the frequency generating circuit is connected to the comparison circuit, and the frequency generating circuit is used to determine the preset signal duration;

[0020] The frequency generating circuit includes a fourth resistor, a first capacitor and a second inverter, one end of the fourth resistor and one end of the second inverter are both connected to one end of the counter, the other end of the fourth resistor and the other end of the second inverter are both connected to one end of the first capacitor, and the other end of the first capacitor is grounded.

[0021] Optionally, the first control circuit further includes a power conversion circuit and a third power supply, the power conversion circuit is connected to the comparison circuit, and the power conversion circuit is used to convert the voltage of the third power supply and provide it to the first control circuit;

[0022] The power conversion circuit includes a fifth resistor, a second capacitor and a third transistor, one end of the second capacitor and a first end of the third transistor are both connected to the trigger, the second end of the third transistor and one end of the fifth resistor are both connected to the third power supply, and the third end of the third transistor, the other end of the fifth resistor and the other end of the second capacitor are all grounded.

[0023] According to another aspect of the disclosed embodiment of the present invention, a braking system is provided, the braking system comprising a second control circuit and a travel sensor as described in any one of the above items, the signal generating unit, the comparison circuit, and the wake-up circuit are all connected to the second control circuit;

[0024] The comparison circuit includes a counter, a trigger and a resistor combination, the wake-up circuit includes a second triode, the counter and the resistor combination are connected to the second control circuit through a first line, the trigger is connected to the second control circuit through a second line, and the second end of the second triode is connected to the second control circuit through a third line;

[0025] The second control circuit is used to send pedal position information to the signal generating unit, to determine the preset condition corresponding to the counter, and to control braking when the brake wake-up signal is received.

[0026] According to another aspect of the disclosed embodiment of the present invention, a braking control method based on the above braking system is provided, the method comprising:

[0027] The signal generating unit receives the pedal position information sent by the second control circuit;

[0028] The signal generating unit outputs a pulse signal to the comparison circuit according to the pedal position information;

[0029] The comparison circuit determines the counting information corresponding to the pulse signal, and outputs a target high-level signal to the wake-up circuit when the counting information meets a preset condition; the counting information is used to characterize the number of preset signal durations within the level duration of the pulse signal;

[0030] The wake-up circuit outputs a braking wake-up signal to the second control circuit when receiving the target high-level signal;

[0031] The second control circuit controls braking when receiving a brake wake-up signal.

[0032] Optionally, the comparison circuit includes a counter and a trigger, the comparison circuit determines counting information corresponding to the pulse signal, and when the counting information satisfies a preset condition, outputting a target high-level signal to the wake-up circuit includes:

[0033] The counter determines the counting information corresponding to the pulse signal, and outputs a high level signal to the trigger when the counting information satisfies the preset condition;

[0034] When receiving the high level signal output by the counter, the trigger outputs the target high level signal to the wake-up circuit.

[0035] According to another aspect of the disclosed embodiment of the present invention, a computer-readable storage medium is provided, wherein at least one instruction is stored in the computer storage medium, and the at least one instruction is loaded and executed by a processor to implement the above-mentioned braking control method.

[0036] According to another aspect of the disclosed embodiment of the present invention, a computer program product including instructions is provided, which, when executed on a computer, enables the computer to execute the above-mentioned braking control method in the disclosed embodiment of the present invention.

[0037] The technical solution provided by the present invention has the following technical effects:

[0038] The stroke sensor provided by the present invention includes a signal generating unit and a first control circuit, wherein the first control circuit includes a comparison circuit and a wake-up circuit, wherein one end of the comparison circuit is connected to the signal generating unit, and the other end of the comparison circuit is connected to the wake-up circuit. The signal generating unit is used to obtain pedal position information, and output a pulse signal to the comparison circuit according to the pedal position information; the comparison circuit is used to output counting information corresponding to the pulse signal, and output a target high-level signal to the wake-up circuit when the counting information meets a preset condition, wherein the counting information is used to characterize the number of preset signal durations within the level duration of the pulse signal; the wake-up circuit is used to output a braking wake-up signal when receiving a target high-level signal, so as to perform braking wake-up. Thus, the stroke sensor can output a corresponding pulse signal according to the pedal position depth, and determine the level state of the output signal by the counting information corresponding to the pulse signal, and then the wake-up circuit outputs a braking wake-up signal when receiving a target high-level signal, so as to perform braking wake-up, thereby improving the braking accuracy, and the stroke sensor circuit is simple, highly integrated, and has strong applicability.

[0039] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative work.

[0041] Figure 1 is a schematic diagram showing a circuit structure of a travel sensor according to an exemplary embodiment;

[0042] Figure 2 is a schematic diagram showing a circuit structure of a braking system according to an exemplary embodiment. DETAILED DESCRIPTION

[0043] In order to enable ordinary persons in the art to better understand the technical solutions disclosed in the present invention, the technical solutions in the embodiments disclosed in the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by ordinary persons in the art without making creative work are within the scope of protection of the present invention.

[0044] It should be noted that the terms "first", "second", etc. in the specification and claims disclosed in the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments disclosed in the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product, or server that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products, or devices.

[0045] See also Figure 1 , Figure 1This is a schematic diagram of a travel sensor circuit structure according to an exemplary embodiment. This specification provides method operation steps as described in the embodiment or flowchart, but more or fewer operation steps may be included based on conventional or non-creative labor. The order of steps listed in the embodiment is only one way of executing the order of many steps and does not represent the only execution order. When the actual system or server product is executed, it can be executed in sequence or in parallel according to the method shown in the embodiment or the figure (for example, in a parallel processor or multi-threaded processing environment).

[0046] Specifically, Figure 1 As shown, the travel sensor includes a signal generating unit and a first control circuit, the first control circuit includes a comparison circuit and a wake-up circuit, one end of the comparison circuit is connected to the signal generating unit, and the other end of the comparison circuit is connected to the wake-up circuit; the signal generating unit is used to obtain pedal position information, and output a pulse signal to the comparison circuit according to the pedal position information; the comparison circuit is used to output counting information corresponding to the pulse signal, and output a target high-level signal to the wake-up circuit when the counting information meets the preset conditions; the counting information is used to characterize the number of preset signal durations within the level duration of the pulse signal; the wake-up circuit is used to output a braking wake-up signal when receiving a target high-level signal to perform braking wake-up.

[0047] In a specific embodiment, the pedal position information may be the position information of the brake pedal, and the pedal position information may indicate the depth at which the brake pedal is depressed. The signal generating unit may be a linear magnetic sensor chip, and the signal generating unit may output pulse signals (PWM (Pulse-width modulation) signals) with different duty cycles to the comparison circuit according to different pedal depths.

[0048] Specifically, the pulse signal can have a high level state and a low level state, the level duration of the pulse signal can be the duration of the pulse signal in any of the above-mentioned level states, and the preset signal duration can be regarded as the duration of the reference signal. The comparison circuit is based on the number of reference signal durations contained in the duration of the received pulse signal in the high level state and / or the low level state, that is, the level duration of the pulse signal is divided by the reference signal duration to obtain the above-mentioned counting information. When the number meets the preset condition (such as being greater than or equal to the preset number threshold), the above-mentioned target high level signal is output to the wake-up circuit.

[0049] Optionally, the first control circuit also includes a frequency generating circuit, a power conversion circuit and a third power supply. The frequency generating circuit is connected to the comparison circuit, and the power conversion circuit is connected to the comparison circuit. The frequency generating circuit is used to determine the preset signal duration, and the power conversion circuit is used to convert the voltage of the third power supply and provide it to the first control circuit.

[0050] Specifically, the power conversion circuit is used to convert the voltage of the third power supply into a preset voltage and provide it to the first control circuit. The preset voltage can be set according to actual application requirements, such as 5V. The frequency generating circuit can be used to output the above-mentioned reference signal (i.e., the preset signal) to the comparison circuit, and the duration of the reference signal is determined by setting the frequency of the reference signal, for example, setting the frequency to 20k to ensure that the level duration of the above-mentioned pulse signal at least includes the duration of two reference signals.

[0051] In an optional embodiment, the comparison circuit includes a counter and a trigger, and the wake-up circuit includes a first resistor R13, a second resistor R11, a third resistor R12, a first triode Q3, a second triode Q2 and a first power supply; one end of the counter is connected to the signal generating unit, the other end of the counter is connected to one end of the trigger, the other end of the trigger is connected to one end of the first resistor R13, the other end of the first resistor R13 is connected to the first end of the first triode Q3, the second end of the first triode Q3 is connected to one end of the second resistor R11, the third end of the first triode Q3 is grounded, one end of the third resistor R12 and the first end of the second triode Q2 are both connected to the other end of the second resistor R11, the other end of the third resistor R12 and the second end of the second triode Q2 are both connected to the first power supply, and the second end of the second triode Q2 is connected to the receiver of the brake wake-up signal; the counter is used to determine the counting information corresponding to the pulse signal, and is used to output a high-level signal to the trigger when the counting information meets a preset condition, and the trigger is used to output a target high-level signal to the wake-up circuit when receiving the high-level signal output by the counter.

[0052] In a specific embodiment, the counter determines the duration of the pulse signal sent by the received linear magnetic sensor chip in the high level state and / or the duration of the pulse signal in the low level state, the number of reference signal durations included, and outputs a high level signal to the trigger when the number is greater than or equal to the preset number threshold. Afterwards, the trigger outputs the above-mentioned target high level signal when receiving the high level signal output by the counter, and turns on the first transistor Q3 through the first resistor R13. At this time, the first power supply is divided by the second resistor R11 and the third resistor R12, so that the second transistor Q2 is turned on, and then the brake wake-up signal (high level signal) is output for brake wake-up. Specifically, the wake-up circuit also includes a sixth resistor R14, that is, after the second transistor Q2 is turned on, the brake wake-up signal is output through the sixth resistor R14 for brake wake-up.

[0053] Optionally, the above-mentioned frequency generating circuit includes a fourth resistor R9, a first capacitor C1 and a second inverter NOT1, one end of the fourth resistor R9 and one end of the second inverter NOT1 are both connected to one end of the counter, the other end of the fourth resistor R9 and the other end of the second inverter NOT1 are both connected to one end of the first capacitor C1, and the other end of the first capacitor C1 is grounded.

[0054] Specifically, in the initial state, the voltage at the first capacitor C1 terminal is low, and the second inverter NOT1 outputs a high level. At this time, the second inverter NOT1 outputs a high level to charge the first capacitor C1 through the fourth resistor R9. When the preset high input voltage corresponding to the second inverter NOT1 is reached, the second inverter NOT1 outputs a low level. At this time, the first capacitor C1 is discharged to the low end of the second inverter NOT1 output through the fourth resistor R9, and then oscillates periodically to generate a square wave with a frequency of f=1 / RC. For example, the frequency can be set to 20k to ensure that the level duration of the above-mentioned pulse signal at least includes the duration of two reference signals. Correspondingly, the resistance value of the fourth resistor R9 is 5kΩ, and the capacitance value of the first capacitor C1 is 10nf.

[0055] Optionally, the power conversion circuit includes a fifth resistor R10, a second capacitor C2 and a third transistor Q1, one end of the second capacitor C2 and a first end of the third transistor Q1 are both connected to the trigger, the second end of the third transistor Q1 and one end of the fifth resistor R10 are both connected to the third power supply, and the third end of the third transistor Q1, the other end of the fifth resistor R10, and the other end of the second capacitor C2 are all grounded.

[0056] Specifically, the third power supply is input, and the third transistor Q1 is turned on through the fifth resistor R10. Due to the limit of the base voltage regulator of the third transistor Q1, the output voltage of the third transistor Q1 is 0.7V (that is, the transistor is turned on and the base voltage is limited), and the preset voltage is provided to the first control circuit. The power conversion circuit also includes a voltage regulator Z1, where the voltage regulator Z1 can be 5.7V, that is, the output preset voltage can be 5V, to ensure the normal state and sleep state of the sensor.

[0057] In some embodiments, the counter includes a first counter 1, the trigger includes a first trigger D1, one end of the first counter 1 is connected to the signal generating unit, the other end of the first counter 1 is connected to one end of the first trigger D1, and the other end of the first trigger D1 is connected to one end of the first resistor R13; the first counter 1 is used to determine the first counting information corresponding to the pulse signal, and is used to output a first high-level signal to the first trigger D1 when the first counting information meets a first preset condition, the first trigger D1 is used to output a target high-level signal to the wake-up circuit when receiving the first high-level signal, and the first counting information is used to characterize the number of preset signal durations within the first level duration of the pulse signal.

[0058] In a specific embodiment, the first level duration can be the high level (or low level) duration of the pulse signal, that is, the duration of the pulse signal in the high level state (or low level state), that is, the positive duty cycle (or negative duty cycle) pulse width duration of the pulse signal. When the number of preset signal durations contained in this duration is greater than or equal to the first preset number threshold, the first counter 1 outputs a first high level signal to the first trigger D1; the first preset number threshold can be set according to actual application requirements.

[0059] In a specific embodiment, when the duration of the first level is the duration of the high level of the pulse signal, when the pulse signal is input to the reset terminal (Reset) of the first counter 1 and is in a high level state, the first counter 1 counts the frequency of the input frequency generating circuit, that is, the frequency generating circuit inputs a pulse, and the first counter 1 counts plus 1. When the count reaches the first preset number threshold, the output terminal of the first counter 1 is high, and the first trigger D1 is triggered by AND1 to output high, thereby turning on the first resistor R13 in the wake-up circuit, and then turning on the second transistor Q2, thereby braking and wake-up.

[0060] In practical applications, the initial count value corresponding to the counter can be set, and the first preset quantity threshold value is determined by the difference between the preset value and the initial count value. For example, if the initial count value is set to 0100, the first quantity threshold value is 1111B-0100B=1011B, that is, 11. On the other hand, the initial count value can also be set by a resistor combination, and the resistor combination can include four resistors set in sequence. The above 0100B can correspond to the second resistor being in a welding state, and the remaining resistors being in a non-welding state.

[0061] Optionally, the first control circuit may further include a buffer Buff, one end of the buffer Buff is connected to the signal generating unit, and the other end is connected to the counter, and the pulse signal output by the signal generating unit passes through the buffer Buff to the counter.

[0062] In some embodiments, the counter includes a first counter 1 and a second counter 2, the trigger includes a first trigger D1, a second trigger D2 and a third trigger D3, the comparison circuit also includes a first inverter NOT2, one end of the first counter 1 and one end of the first inverter NOT2 are connected to the signal generating unit, one end of the second counter 2 is connected to the other end of the first inverter NOT2, the other end of the first counter 1 is connected to one end of the first trigger D1, the other end of the second counter 2 is connected to one end of the second trigger D2, the other end of the first trigger D1 and the other end of the second trigger D2 are connected to one end of the third trigger D3, and the other end of the third trigger D3 is connected to one end of the first resistor;

[0063] The first counter 1 is used to determine the first counting information corresponding to the pulse signal, and is used to output a first high-level signal to the first trigger D1 when the first counting information meets the first preset condition. The second counter 2 is used to determine the second counting information corresponding to the pulse signal, and is used to output a second high-level signal to the second trigger D2 when the second counting information meets the second preset condition. The first trigger D1 is used to output a third high-level signal to the third trigger D3 when receiving the first high-level signal. The second trigger D2 is used to output a fourth high-level signal to the third trigger D3 when receiving the second high-level signal. The third trigger D3 is used to output a target high-level signal to the wake-up circuit when receiving the third high-level signal and the fourth high-level signal;

[0064] The first counting information is used to characterize the number of preset signal durations within the first level duration of the pulse signal, and the second counting information is used to characterize the number of preset signal durations within the second level duration of the pulse signal.

[0065] In a specific embodiment, the first level duration and the second level duration can be the duration of the high level and the low level of the pulse signal, respectively, that is, the duration of the pulse signal in the high level state and the low level state, respectively. The first counter 1 and the second counter 2 count the frequency generated by the frequency generating circuit in the first level duration and the second level duration, respectively. When the number of preset signal durations included in the first duration is greater than or equal to the first preset number threshold, the first counter 1 outputs a first high level signal to the first trigger D1, and when the number of preset signal durations included in the second duration is greater than or equal to the second preset number threshold, the second counter 2 outputs a second high level signal to the first trigger D1; the first preset number threshold and the second preset number threshold can be set according to actual application requirements, and the specific setting of the second preset number threshold can refer to the setting of the first preset number threshold mentioned above, which will not be repeated here.

[0066] In a specific embodiment, when the pedal is pressed, the magnetic sensor chip outputs a PWM wave of the corresponding stroke. After passing through the buffer Buff, the PWM wave is input into the reset port of the first counter 1 in one path and input into the reset port of the second counter 2 in the other path through the second inverter NOT1.

[0067] In a specific embodiment, when the duration of the first level is the duration of the high level of the pulse signal, when the pulse signal is input to the reset terminal (Reset) of the first counter 1 and is in a high level state, the first counter 1 counts the frequency of the input frequency generating circuit, that is, the frequency generating circuit inputs a pulse, the first counter 1 counts plus 1, and when the count reaches the first preset number threshold, the output terminal of the first counter 1 is high, and the first trigger D1 is triggered by AND1 to output high. And, when the duration of the second level is the duration of the high level of the pulse signal, when the pulse signal is input to the reset terminal (Reset) of the second counter 2 and is in a high level state, the second counter 2 counts the frequency of the input frequency generating circuit, that is, the frequency generating circuit inputs a pulse, the second counter 2 counts plus 1, and when the count reaches the second preset number threshold, the output terminal of the first counter 2 is high, and the second trigger D2 is triggered by AND2 to output high. The first trigger D1 and the second trigger D2 output high, and then AND3 outputs high and triggers the third trigger D3 to output high, thereby turning on the first resistor R13 in the wake-up circuit, and then turning on the second transistor Q2, thereby braking and waking up.

[0068] Optionally, the above-mentioned comparison circuit also includes a resistor combination and a second power supply, the resistor combination is connected to the counter and the second power supply, and the resistor combination is used to determine the preset condition; the resistor combination includes a first resistor combination R1-4 and a second resistor combination R5-8, the first resistor combination R1-4 and the second resistor combination R5-8 are connected to the first counter and the second counter, the first resistor combination R1-4 and the second resistor combination R5-8 correspond to the first counter and the second counter respectively, one of the first resistor combination R1-4 and the second resistor combination R5-8 is connected to the second power supply, and the other of the first resistor combination R1-4 and the second resistor combination R5-8 is grounded; the first resistor combination R1-4 and the second resistor combination are used to determine the first preset condition and the second preset condition respectively.

[0069] Specifically, the specific details of setting the preset conditions through the resistor combination can refer to the above steps of setting the preset quantity threshold through the resistor combination, which will not be repeated here.

[0070] It can be seen from the technical solutions provided in the above embodiments of this specification that the stroke sensor provided in this specification includes a signal generating unit and a first control circuit, and the first control circuit includes a comparison circuit and a wake-up circuit, one end of the comparison circuit is connected to the signal generating unit, and the other end of the comparison circuit is connected to the wake-up circuit. Among them, the signal generating unit is used to obtain pedal position information, and output a pulse signal to the comparison circuit according to the pedal position information; the comparison circuit is used to output counting information corresponding to the pulse signal, and when the counting information meets the preset conditions, output a target high-level signal to the wake-up circuit, and the counting information is used to characterize the number of preset signal durations within the level duration of the pulse signal; the wake-up circuit is used to output a brake wake-up signal when receiving a target high-level signal, so as to perform brake wake-up. Therefore, the stroke sensor can output a corresponding pulse signal according to the pedal position depth, determine the level state of the output signal by the counting information corresponding to the pulse signal, and then the wake-up circuit outputs a brake wake-up signal when receiving the target high-level signal, so as to perform brake wake-up, thereby improving the braking accuracy, and the stroke sensor circuit is simple, highly integrated, and has strong applicability.

[0071] An embodiment of the present invention also provides a braking system, which includes a second control circuit and the above-mentioned stroke sensor, wherein a signal generating unit, a comparison circuit, and a wake-up circuit are all connected to the second control circuit; the comparison circuit includes a counter, a trigger, and a resistor combination, and the wake-up circuit includes a second transistor Q2, the counter and the resistor combination are connected to the second control circuit through a first line 1, the trigger is connected to the second control circuit through a second line 2, and the second end of the second transistor Q2 is connected to the second control circuit through a third line 3; the second control circuit is used to send pedal position information to the signal generating unit, and to determine a preset condition corresponding to the counter, and to control braking when a braking wake-up signal is received.

[0072] In a specific embodiment, the first line 1 is used for the second control circuit to control the resistor combination to determine the preset condition corresponding to the counter, the second line 2 is used for the second control circuit to control the trigger to reset its output low after the brake wake-up, and the third line 3 is used for the wake-up circuit to output a brake wake-up signal to the second control circuit. The second control circuit can be a control circuit of the brake execution unit, and can include an MCU.

[0073] In actual applications, the travel sensor outputs a brake wake-up signal to the MCU through the third line 3. After the MCU controls the brake system to wake up, it outputs a high level through the first line 1 to load the counter with an initial value, and resets the trigger through the second line 2 to make its output low. At the same time, the wake-up signal output through the wake-up circuit is low, and the system goes into sleep and waits for the next wake-up.

[0074] Regarding the brake system in the above embodiment, the various circuit structure settings in the travel sensor have been described in detail in the embodiment related to the sensor, and will not be elaborated here.

[0075] The embodiment of the present invention further provides a braking method based on the above braking system, which may include:

[0076] The signal generating unit receives the pedal position information sent by the second control circuit;

[0077] The signal generating unit outputs a pulse signal to the comparison circuit according to the pedal position information;

[0078] The comparison circuit determines the counting information corresponding to the pulse signal, and outputs a target high-level signal to the wake-up circuit when the counting information meets the preset conditions; the counting information is used to characterize the number of preset signal durations within the level duration of the pulse signal;

[0079] The wake-up circuit outputs a braking wake-up signal to the second control circuit when receiving the target high-level signal;

[0080] The second control circuit controls braking when receiving the brake wake-up signal.

[0081] In an optional embodiment, the comparison circuit includes a counter and a trigger, the comparison circuit determines the counting information corresponding to the pulse signal, and when the counting information satisfies a preset condition, outputting a target high level signal to the wake-up circuit may include:

[0082] The counter determines the counting information corresponding to the pulse signal, and outputs a high level signal to the trigger when the counting information meets a preset condition;

[0083] When receiving the high level signal output by the counter, the trigger outputs a target high level signal to the wake-up circuit.

[0084] The braking method in the above embodiment has been described in detail in the embodiment related to the stroke sensor, and will not be elaborated here.

[0085] In an exemplary embodiment, a computer-readable storage medium is further provided, in which at least one instruction is stored. The at least one instruction is loaded and executed by a processor to implement the braking control method in the disclosed embodiment of the present invention.

[0086] In an exemplary embodiment, a computer program product including instructions is also provided. When the computer program product is run on a computer, the computer is enabled to perform the brake control method in the disclosed embodiment of the present invention.

[0087] Those of ordinary skill in the art will appreciate that all or part of the processes in the above-mentioned embodiments can be implemented by instructing related hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided by the present invention may include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in a variety of forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate (DDR), and the like.

[0088] SDRAM (DDRSDRAM), Enhanced SDRAM (ESDRAM), Synchlink DRAM (SLDRAM), Rambus direct RAM (RDRAM), direct RAM bus dynamic RAM (DRDRAM), and RAM bus dynamic RAM (RDRAM), etc.

[0089] Those skilled in the art will readily appreciate other embodiments of the present disclosure after considering the specification and practicing the invention disclosed herein. The present invention is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary techniques in the art that are not disclosed in the present disclosure. The description and examples are to be considered exemplary only, and the true scope and spirit of the present disclosure are indicated by the following claims.

[0090] It should be understood that the present disclosure is not limited to the exact structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. A travel sensor, characterized in that: The travel sensor includes a signal generating unit and a first control circuit, the first control circuit includes a comparison circuit and a wake-up circuit, one end of the comparison circuit is connected to the signal generating unit, and the other end of the comparison circuit is connected to the wake-up circuit; The signal generating unit is used to obtain pedal position information, and output a pulse signal to the comparison circuit according to the pedal position information; The comparison circuit is used to output the counting information corresponding to the pulse signal, and output the target high level signal to the wake-up circuit when the counting information meets the preset conditions; the counting information is used to characterize the number of preset signal durations within the level duration of the pulse signal; The wake-up circuit is used to output a braking wake-up signal to perform braking wake-up when receiving the target high-level signal.

2. The travel sensor according to claim 1, characterized in that: The comparison circuit includes a counter and a trigger, and the wake-up circuit includes a first resistor, a second resistor, a third resistor, a first transistor, a second transistor and a first power supply; One end of the counter is connected to the signal generating unit, the other end of the counter is connected to one end of the trigger, the other end of the trigger is connected to one end of the first resistor, the other end of the first resistor is connected to the first end of the first transistor, the second end of the first transistor is connected to one end of the second resistor, the third end of the first transistor is grounded, one end of the third resistor and the first end of the second transistor are both connected to the other end of the second resistor, the other end of the third resistor and the second end of the second transistor are both connected to the first power supply, and the second end of the second transistor is connected to the receiver of the brake wake-up signal; The counter is used to determine the counting information corresponding to the pulse signal, and to output a high-level signal to the trigger when the counting information meets the preset condition. The trigger is used to output the target high-level signal to the wake-up circuit when receiving the high-level signal output by the counter.

3. The travel sensor according to claim 2, characterized in that: The counter includes a first counter, the trigger includes a first trigger, one end of the first counter is connected to the signal generating unit, the other end of the first counter is connected to one end of the first trigger, and the other end of the first trigger is connected to one end of the first resistor; The first counter is used to determine the first counting information corresponding to the pulse signal, and to output a first high-level signal to the first trigger when the first counting information satisfies a first preset condition. The first trigger is used to output the target high-level signal to the wake-up circuit when receiving the first high-level signal. The first counting information is used to characterize the number of preset signal durations within the first level duration of the pulse signal.

4. The travel sensor according to claim 2, characterized in that: The counter includes a first counter and a second counter, the trigger includes a first trigger, a second trigger and a third trigger, the comparison circuit also includes a first inverter, one end of the first counter and one end of the first inverter are both connected to the signal generating unit, one end of the second counter is connected to the other end of the first inverter, the other end of the first counter is connected to one end of the first trigger, the other end of the second counter is connected to one end of the second trigger, the other end of the first trigger and the other end of the second trigger are both connected to one end of the third trigger, and the other end of the third trigger is connected to one end of the first resistor; The first counter is used to determine the first counting information corresponding to the pulse signal, and is used to output a first high-level signal to the first trigger when the first counting information meets a first preset condition. The second counter is used to determine the second counting information corresponding to the pulse signal, and is used to output a second high-level signal to the second trigger when the second counting information meets a second preset condition. The first trigger is used to output a third high-level signal to the third trigger when the first high-level signal is received. The second trigger is used to output a fourth high-level signal to the third trigger when the second high-level signal is received. The third trigger is used to output the target high-level signal to the wake-up circuit when the third high-level signal and the fourth high-level signal are received; The first counting information is used to characterize the number of preset signal durations within the first level duration of the pulse signal, and the second counting information is used to characterize the number of preset signal durations within the second level duration of the pulse signal.

5. The travel sensor according to claim 4, characterized in that: The comparison circuit further includes a resistor combination and a second power supply, wherein the resistor combination is connected to the counter and the second power supply, and the resistor combination is used to determine the preset condition; The resistor combination includes a first resistor combination and a second resistor combination, the first resistor combination and the second resistor combination are connected to the first counter and the second counter, the first resistor combination and the second resistor combination correspond to the first counter and the second counter respectively, one of the first resistor combination and the second resistor combination is connected to the second power supply, and the other of the first resistor combination and the second resistor combination is grounded; The first resistor combination and the second resistor combination are used to determine the first preset condition and the second preset condition respectively.

6. The travel sensor according to claim 2, characterized in that: The first control circuit further includes a frequency generating circuit, the frequency generating circuit is connected to the comparison circuit, and the frequency generating circuit is used to determine the duration of the preset signal; The frequency generating circuit includes a fourth resistor, a first capacitor and a second inverter, one end of the fourth resistor and one end of the second inverter are both connected to one end of the counter, the other end of the fourth resistor and the other end of the second inverter are both connected to one end of the first capacitor, and the other end of the first capacitor is grounded.

7. The travel sensor according to claim 2, characterized in that: The first control circuit further includes a power conversion circuit and a third power supply, wherein the power conversion circuit is connected to the comparison circuit, and the power conversion circuit is used to convert the voltage of the third power supply and provide it to the first control circuit; The power conversion circuit includes a fifth resistor, a second capacitor and a third transistor, one end of the second capacitor and a first end of the third transistor are both connected to the trigger, the second end of the third transistor and one end of the fifth resistor are both connected to the third power supply, and the third end of the third transistor, the other end of the fifth resistor and the other end of the second capacitor are all grounded.

8. A braking system, characterized in that: The braking system comprises a second control circuit and a travel sensor according to any one of claims 1 to 7, wherein the signal generating unit, the comparison circuit and the wake-up circuit are all connected to the second control circuit; The comparison circuit includes a counter, a trigger and a resistor combination, the wake-up circuit includes a second triode, the counter and the resistor combination are connected to the second control circuit through a first line, the trigger is connected to the second control circuit through a second line, and the second end of the second triode is connected to the second control circuit through a third line; The second control circuit is used to send pedal position information to the signal generating unit, to determine the preset condition corresponding to the counter, and to control braking when the brake wake-up signal is received.

9. A braking control method based on the braking system according to claim 8, characterized in that: The method comprises: The signal generating unit receives the pedal position information sent by the second control circuit; The signal generating unit outputs a pulse signal to the comparison circuit according to the pedal position information; The comparison circuit determines the counting information corresponding to the pulse signal, and outputs a target high-level signal to the wake-up circuit when the counting information meets a preset condition; the counting information is used to characterize the number of preset signal durations within the level duration of the pulse signal; The wake-up circuit outputs a braking wake-up signal to the second control circuit when receiving the target high-level signal; The second control circuit controls braking when receiving a brake wake-up signal.

10. The method according to claim 9, characterized in that The comparison circuit includes a counter and a trigger, the comparison circuit determines the counting information corresponding to the pulse signal, and when the counting information meets a preset condition, outputting a target high level signal to the wake-up circuit includes: The counter determines the counting information corresponding to the pulse signal, and outputs a high level signal to the trigger when the counting information satisfies the preset condition; When receiving the high level signal output by the counter, the trigger outputs the target high level signal to the wake-up circuit.

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