Integrated circuit design evaluation method and system based on model analysis

Abstract

The invention discloses an integrated circuit design evaluation method and system based on model analysis. Firstly, processing image data of N processing flows are acquired, preprocessed and standardized, and multi-region division is carried out according to circuit design. Based on a processing flow, color, texture and contour features of each circuit area are extracted, a DBSCAN clustering model is constructed, and parameters are initialized. Then, feature data of each circuit region is imported for clustering, continuous regions are merged, a merged image region is generated, and an image window is dynamically set; and finally, based on the image window of each processing flow, introducing SSIM similarity index calculation, comparing circuit characteristic data with defect characteristics, and evaluating circuit design processing defects of different processing flows. According to the invention, fine evaluation of circuit processing defects can be realized, information mining and change analysis of defect characteristics in a plurality of processing flows can be realized, and processing early warning and design optimization can be effectively realized.

Description

Technical Field

[0001] The present invention relates to the field of model analysis, and more specifically, to an integrated circuit design evaluation method and system based on model analysis. Background Art

[0002] During the design of integrated circuits, a comprehensive evaluation of the design and processing is required to ensure its performance, reliability and stability during manufacturing and use. Traditional evaluation methods mainly rely on manual experience and simple analysis. In addition, traditional technologies often lack refined defect monitoring of integrated circuits and regional processing evaluation of circuits, making it difficult to achieve automated and intelligent integrated circuit production defect evaluation and design optimization. Therefore, there is an urgent need for an efficient and intelligent integrated circuit design and processing evaluation method. Summary of the invention

[0003] The present invention overcomes the defects of the prior art and proposes an integrated circuit design evaluation method and system based on model analysis.

[0004] A first aspect of the present invention provides an integrated circuit design evaluation method based on model analysis, comprising:

[0005] According to N integrated circuit processing processes, processing image data of each processing process is obtained;

[0006] Perform image preprocessing and standardization on the processed image data, divide the circuit diagram into multiple regions based on the circuit design, and form multiple circuit regions;

[0007] Based on a processing flow, analysis is performed, and features based on color, texture, and contour are extracted for each circuit area to obtain circuit feature data, a clustering model based on DBSCAN is constructed, and clustering model parameters are initialized to obtain circuit processing reference features corresponding to the processing flow, and the circuit processing reference features are imported into the clustering model to generate data points, and the data points are used as initial core points;

[0008] The circuit characteristic data of each circuit area is imported into the clustering model and the data points in the clustering model are clustered based on the initial core point. Based on the clustering result, multiple area groups are obtained, continuous areas are merged based on the multiple area groups, and multiple merged image areas are generated. The window is positioned according to the merged image area, and the image window is dynamically set;

[0009] Based on setting the corresponding image window for each processing flow, the SSIM similarity index calculation method is introduced through the image window to calculate the integrated circuit defects of different processing flows. The calculation process is to extract the corresponding circuit feature data and defect comparison features based on the set image window to perform SSIM similarity analysis. According to the calculation results, the circuit design and processing defects of different processing flows are evaluated.

[0010] In this solution, the processing image data of each processing flow is obtained according to N integrated circuit processing flows, specifically:

[0011] Obtaining an overall processing task of a target integrated circuit, dividing the overall processing task into multiple processes, and forming N integrated circuit processing processes;

[0012] Acquire the processed image data for each processing process.

[0013] In this solution, the image preprocessing and standardization are performed on the processed image data, and the circuit diagram is divided into multiple regions based on the circuit design to form multiple circuit regions, specifically:

[0014] Perform image denoising, transformation, enhancement preprocessing and image standardization on processed image data;

[0015] According to the processed image data, a circuit diagram area is selected, and based on the circuit design information, the circuit diagram is divided into multiple areas to form multiple circuit areas;

[0016] Each circuit region includes at least one circuit element.

[0017] In this solution, among the multiple circuit regions, the area size and outline of each circuit region are within a preset range.

[0018] In this solution, the analysis is performed based on a processing flow, and features based on color, texture, and contour are extracted for each circuit area to obtain circuit feature data, a clustering model based on DBSCAN is constructed, and clustering model parameters are initialized to obtain circuit processing reference features corresponding to the processing flow, import the circuit processing reference features into the clustering model and generate data points, and use the data points as initial core points, specifically:

[0019] Select a processing flow to analyze;

[0020] Get the current processing image data corresponding to a processing flow,

[0021] According to the current processed image data, the edge detection operator is used to extract the features of each circuit area based on color, texture, and contour to form circuit feature data;

[0022] Obtain design layout information of a processing flow, and obtain circuit processing reference features from the system database through the design layout information;

[0023] Construct a clustering model based on DBSCAN and initialize the clustering model parameters, including the radiation radius of the sample point and the minimum number of neighbors;

[0024] The circuit processing reference features are imported into the clustering model to form reference data points, and the reference data points are used as the initial core points of the clustering model.

[0025] In this solution, the reference data point and the initial core point each include at least one.

[0026] In this solution, the circuit feature data of each circuit area is imported into the clustering model and the data points in the clustering model are clustered based on the initial core point. Based on the clustering results, multiple area groups are obtained, continuous areas are merged based on the multiple area groups, and multiple merged image areas are generated. Window positioning is performed according to the merged image area, and the image window is dynamically set, specifically:

[0027] Importing circuit characteristic data of each circuit area into a clustering model and forming a plurality of cluster data points;

[0028] In the clustering model, for each cluster data point and initial core point, find all the data points that can be reached by density, label these data points and their core points to form a cluster, calculate all data points, divide the boundary points and remove the noise points, and finally form the clustering result;

[0029] Based on the clustering results, mapping the division results of the multiple circuit regions is performed to form multiple region groups, each region group including at least one circuit region;

[0030] Analyze each area group, and merge circuit areas with continuous positions in one area group to form a merged image area;

[0031] forming a plurality of merged image regions according to the plurality of region groups;

[0032] Pixel window positioning is performed based on the merged image area, and the image window is dynamically set in the circuit diagram area.

[0033] In this solution, the corresponding image window is set based on each processing flow, and the SSIM similarity index calculation method is introduced through the image window to calculate the integrated circuit defects of different processing flows. The calculation process is based on the set image window, extracting the corresponding circuit feature data and defect comparison features to perform SSIM similarity analysis, and according to the calculation results, the circuit design and processing defects of different processing flows are evaluated, specifically:

[0034] Set the corresponding image window based on each processing process;

[0035] Obtain defect comparison features from the system database;

[0036] Perform image uniform transformation and standardization on circuit feature data and defect comparison features;

[0037] Based on the SSIM similarity index calculation method, in the set image window, the average brightness, variance, and covariance of the window pixels are calculated for the circuit feature data and the defect comparison features, and the SSIM similarity index is obtained through the average brightness, variance, and covariance;

[0038] The similarity index of different machining processes is calculated, and a comprehensive defect evaluation is performed on each machining process based on the SSIM similarity index.

[0039] The second aspect of the present invention further provides an integrated circuit design evaluation system based on model analysis, the system comprising: a memory, a processor, the memory comprising an integrated circuit design evaluation program based on model analysis, the integrated circuit design evaluation program based on model analysis being executed by the processor to implement the following steps:

[0040] According to N integrated circuit processing processes, processing image data of each processing process is obtained;

[0041] Perform image preprocessing and standardization on the processed image data, divide the circuit diagram into multiple regions based on the circuit design, and form multiple circuit regions;

[0042] Based on a processing flow, analysis is performed, and features based on color, texture, and contour are extracted for each circuit area to obtain circuit feature data, a clustering model based on DBSCAN is constructed, and clustering model parameters are initialized to obtain circuit processing reference features corresponding to the processing flow, and the circuit processing reference features are imported into the clustering model to generate data points, and the data points are used as initial core points;

[0043] The circuit characteristic data of each circuit area is imported into the clustering model and the data points in the clustering model are clustered based on the initial core point. Based on the clustering result, multiple area groups are obtained, continuous areas are merged based on the multiple area groups, and multiple merged image areas are generated. The window is positioned according to the merged image area, and the image window is dynamically set;

[0044] Based on setting the corresponding image window for each processing flow, the SSIM similarity index calculation method is introduced through the image window to calculate the integrated circuit defects of different processing flows. The calculation process is to extract the corresponding circuit feature data and defect comparison features based on the set image window to perform SSIM similarity analysis. According to the calculation results, the circuit design and processing defects of different processing flows are evaluated.

[0045] The third aspect of the present invention also provides a computer-readable storage medium, which includes an integrated circuit design evaluation program based on model analysis. When the integrated circuit design evaluation program based on model analysis is executed by a processor, the steps of the integrated circuit design evaluation method based on model analysis as described in any one of the above items are implemented.

[0046] The present invention discloses an integrated circuit design evaluation method and system based on model analysis. First, the processing image data of N processing flows are obtained and preprocessed and standardized, and multi-region division is performed according to the circuit design. Based on a processing flow, the color, texture, and contour features of each circuit area are extracted, a DBSCAN clustering model is constructed, and the parameters are initialized. Subsequently, the feature data of each circuit area is imported for clustering, continuous areas are merged, a merged image area is generated, and an image window is dynamically set. Finally, based on the image window of each processing flow, the SSIM similarity index calculation is introduced, the circuit feature data and the defect features are compared, and the circuit design processing defects of different processing flows are evaluated. Through the present invention, it is possible to achieve a refined evaluation of circuit processing defects, realize information mining and change analysis of defect features in multiple processing flows, and effectively realize processing early warning and design optimization. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] Figure 1 A flow chart of an integrated circuit design evaluation method based on model analysis of the present invention is shown;

[0048] Figure 2 A block diagram of an integrated circuit design evaluation system based on model analysis of the present invention is shown. DETAILED DESCRIPTION

[0049] In order to more clearly understand the above-mentioned purpose, features and advantages of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the embodiments of the present application and the features in the embodiments can be combined with each other without conflict.

[0050] In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention may also be implemented in other ways different from those described herein. Therefore, the protection scope of the present invention is not limited to the specific embodiments disclosed below.

[0051] Figure 1 A flow chart of an integrated circuit design evaluation method based on model analysis of the present invention is shown.

[0052] like Figure 1 As shown, the first aspect of the present invention provides an integrated circuit design evaluation method based on model analysis, comprising:

[0053] S102, according to N integrated circuit processing processes, obtaining processing image data of each processing process;

[0054] S104, performing image preprocessing and standardization on the processed image data, and dividing the circuit diagram into multiple regions based on the circuit design to form multiple circuit regions;

[0055] S106, performing analysis based on a processing flow, extracting features based on color, texture, and contour for each circuit area, obtaining circuit feature data, building a clustering model based on DBSCAN, and initializing clustering model parameters, obtaining circuit processing reference features corresponding to the processing flow, importing the circuit processing reference features into the clustering model and generating data points, and using the data points as initial core points;

[0056] S108, importing the circuit feature data of each circuit area into the clustering model and clustering the data points in the clustering model based on the initial core point, obtaining multiple area groups through the clustering results, merging continuous areas based on the multiple area groups, and generating multiple merged image areas, positioning the window according to the merged image area, and dynamically setting the image window;

[0057] S110, based on each processing flow, a corresponding image window is set, and the SSIM similarity index calculation method is introduced through the image window to calculate the integrated circuit defects of different processing flows. The calculation process is to extract the corresponding circuit feature data and the defect comparison features based on the set image window to perform SSIM similarity analysis. According to the calculation results, the circuit design and processing defects of different processing flows are evaluated.

[0058] According to an embodiment of the present invention, the process of acquiring the processing image data of each processing flow according to N integrated circuit processing flows is specifically as follows:

[0059] Obtaining an overall processing task of a target integrated circuit, dividing the overall processing task into multiple processes, and forming N integrated circuit processing processes;

[0060] Acquire the processed image data for each processing process.

[0061] It should be noted that the overall processing task of the target integrated circuit includes the entire processing flow. Since integrated circuits often include multiple processing flows, splitting and analyzing each sub-flow can enable refined inference and analysis of processing defects. The design and processing of integrated circuits generally include design, layout analysis, printed circuit boards, component installation, welding, cleaning, packaging, etc. Different processing steps produce different circuit states and design layout states. In N integrated circuit processing flows, generally, there are differences in component states and processing states corresponding to different processing steps. There are also differences in the characteristics and types of defects produced by different processing flows.

[0062] According to an embodiment of the present invention, the image preprocessing and standardization of the processed image data is performed, and the circuit diagram is divided into multiple regions based on the circuit design to form multiple circuit regions, specifically:

[0063] Perform image denoising, transformation, enhancement preprocessing and image standardization on processed image data;

[0064] According to the processed image data, a circuit diagram area is selected, and based on the circuit design information, the circuit diagram is divided into multiple areas to form multiple circuit areas;

[0065] Each circuit region includes at least one circuit element.

[0066] It should be noted that the division of circuit areas is used to perform detailed analysis on processing elements in the subdivided circuits.

[0067] According to an embodiment of the present invention, among the multiple circuit regions, the area size and the outline of each circuit region are within a preset range.

[0068] It should be noted that the preset range is a range set by the user, which is used to ensure that the divided area meets the expected analysis standards.

[0069] According to an embodiment of the present invention, the analysis is performed based on a processing flow, and features based on color, texture, and contour are extracted for each circuit area to obtain circuit feature data, a clustering model based on DBSCAN is constructed, and clustering model parameters are initialized, and circuit processing reference features corresponding to the processing flow are obtained, and the circuit processing reference features are imported into the clustering model and data points are generated, and the data points are used as initial core points, specifically:

[0070] Select a processing flow to analyze;

[0071] Get the current processing image data corresponding to a processing flow,

[0072] According to the current processed image data, the edge detection operator is used to extract the features of each circuit area based on color, texture, and contour to form circuit feature data;

[0073] Obtain design layout information of a processing flow, and obtain circuit processing reference features from a system database through the design layout information;

[0074] Construct a clustering model based on DBSCAN and initialize the clustering model parameters, including the radiation radius of the sample point and the minimum number of neighbors;

[0075] The circuit processing reference features are imported into the clustering model to form reference data points, and the reference data points are used as the initial core points of the clustering model.

[0076] It should be noted that the circuit processing reference features are circuit image features corresponding to the circuit under standardized design, and have certain reference significance. In the present invention, the reference features are used as the initial core data points of the clustering model. During the clustering process, the collected feature data can be automatically clustered with core features, thereby screening out the core image analysis areas in the circuit design, realizing clustering grouping of dynamic key areas, and dynamically setting the corresponding image windows in the subsequent process.

[0077] According to an embodiment of the present invention, the reference data point and the initial core point each include at least one.

[0078] According to an embodiment of the present invention, the circuit feature data of each circuit area is imported into the clustering model and the data points in the clustering model are clustered based on the initial core point, multiple area groups are obtained through the clustering results, continuous areas are merged based on the multiple area groups, and multiple merged image areas are generated, window positioning is performed according to the merged image area, and the image window is dynamically set, specifically:

[0079] Importing circuit characteristic data of each circuit area into a clustering model and forming a plurality of cluster data points;

[0080] In the clustering model, for each cluster data point and initial core point, find all the data points that can be reached by density, label these data points and their core points to form a cluster, calculate all data points, divide the boundary points and remove the noise points, and finally form the clustering result;

[0081] Based on the clustering results, mapping the division results of the multiple circuit regions is performed to form multiple region groups, each region group including at least one circuit region;

[0082] Analyze each area group, and merge circuit areas with continuous positions in one area group to form a merged image area;

[0083] forming a plurality of merged image regions according to the plurality of region groups;

[0084] Pixel window positioning is performed based on the merged image area, and the image window is dynamically set in the circuit diagram area.

[0085] It should be noted that in each processing flow, due to the difference in processed image data, it corresponds to an independent clustering process, and different processing flows correspond to different regional classification results.

[0086] It is worth mentioning that in traditional technology, circuit processing design and defect analysis often rely on manual experience, and for different processing flows, due to the differences in the corresponding core analysis areas, the corresponding defect characteristics and processing element characteristics are different, so the core analysis area has certain changes, and the current technology lacks the annotation and analysis extraction of the corresponding core analysis area, lacks the useful information mining of the circuit area, resulting in low defect analysis efficiency and poor analysis effect. Therefore, the present invention divides each processing flow, obtains corresponding reference features for the corresponding design conditions, constructs a clustering model and forms core data points according to the reference features. In the clustering model, the features of different areas are clustered. Through the clustering process, the core analysis area can be aggregated and extracted for the circuit area of ​​different processing flows. Further, by clustering the corresponding areas, the corresponding window size can be dynamically set. In the subsequent, the SSIM index calculation and circuit defect analysis are performed based on the window information, effectively improving the precision defect analysis capability of complex circuits, while traditional technology often relies on manual experience to analyze the circuit area, lacking intelligent means. The present invention can dynamically set image windows for different processing flows and perform defect feature comparison analysis, thereby improving the defect recognition rate of complex circuits. At the same time, it can subsequently realize serialized defect prediction, thereby improving the defect analysis accuracy for different processing flows and the ability to mine defect information and defect areas.

[0087] According to an embodiment of the present invention, a corresponding image window is set based on each processing flow, and an SSIM similarity index calculation method is introduced through the image window to calculate integrated circuit defects for different processing flows. The calculation process is based on the set image window, extracting corresponding circuit feature data and defect comparison features to perform SSIM similarity analysis, and according to the calculation results, circuit design processing defect evaluation is performed on different processing flows, specifically:

[0088] Set the corresponding image window based on each processing process;

[0089] Obtain defect comparison features from the system database;

[0090] Perform image uniform transformation and standardization on circuit feature data and defect comparison features;

[0091] Based on the SSIM similarity index calculation method, in the set image window, the average brightness, variance, and covariance of the window pixels are calculated for the circuit feature data and the defect comparison features, and the SSIM similarity index is obtained through the average brightness, variance, and covariance;

[0092] The similarity index of different machining processes is calculated, and a comprehensive defect evaluation is performed on each machining process based on the SSIM similarity index.

[0093] It should be noted that the circuit feature data and the defect comparison feature are uniformly transformed and standardized to keep the image format, size, and image attributes of the two images consistent, so as to facilitate the calculation of the SSIM index. The defect comparison feature is the corresponding image feature data of defects that may exist in the corresponding processing flow, which is used for SSIM similarity comparison analysis.

[0094] According to an embodiment of the present invention, it also includes:

[0095] Among N integrated circuit processing flows, a comprehensive defect evaluation is performed on each processing flow using the SSIM similarity index, and the evaluation order is based on the processing time dimension;

[0096] The SSIM similarity index is judged in real time. If the similarity index is greater than the preset range, the image window based on the judgment process is marked to obtain the defect window area;

[0097] Judging N integrated circuit processing flows, obtaining multiple defect window areas;

[0098] Acquire circuit feature data of each processing flow, extract corresponding defect features from the circuit feature data according to multiple defect window areas, and generate multiple marking feature data;

[0099] sorting the plurality of marking feature data based on the processing time dimension to form ordered marking feature data;

[0100] Through the autoencoder model, feature learning is performed on the ordered labeled feature data, and the ordered labeled feature data is mapped to a preset low-dimensional space for data representation and data reconstruction to generate low-dimensional feature data;

[0101] Serialize low-dimensional feature data to form feature sequence data, perform feature learning and prediction on the feature sequence data through the LSTM prediction model, and generate predicted feature sequence data;

[0102] Based on the predicted feature sequence data, early warning assessment is performed on the processing defect distribution and defect type of the integrated circuit, and circuit processing early warning assessment information is generated.

[0103] It should be noted that multiple defect window areas correspond one to one with multiple marking feature data. Low-dimensional feature data still has the orderliness of the time dimension. The predicted feature sequence data is the defect feature data predicted based on the corresponding serialized feature data, which is used to simulate the defect feature changes of the circuit and perform defect warning analysis. The present invention performs window area screening on the defect assessment, and learns and serializes based on the corresponding features, thereby realizing information mining and change analysis of defect features in multiple processing flows, and effectively performing processing warning and design optimization.

[0104] According to an embodiment of the present invention, it also includes:

[0105] In the second processing cycle, second circuit characteristic data of each processing flow is obtained; the second circuit characteristic data is imported into the clustering model and a plurality of second data points are generated;

[0106] Obtain the clustering results of the clustering model in the first processing cycle;

[0107] Obtaining a plurality of clustered data points through the clustering results, and calculating an average deviation of the plurality of clustered data points and a plurality of second data points;

[0108] The deviation calculation is specifically to calculate the spatial distance from each cluster data point to the second data point closest to it, and average multiple distance values ​​to obtain the average deviation;

[0109] If the average deviation is greater than the preset value, the initial core point of the clustering model is reset.

[0110] It should be noted that the same integrated circuit and product processing tasks generally include multiple repeated processing cycles. In multiple processing cycles, due to the complexity of the processing environment and circuits, the defect characteristics have certain changes, and the core area analysis process of the complex circuit requires certain dynamic adjustments. The present invention extracts features from the processing flow image data under the second cycle, and analyzes whether there is a deviation between the corresponding core points and the historical clustering results in the clustering model. If there is a large deviation, it means that the initial state of the clustering model is difficult to meet the current processing cycle, and the clustering effect may be unsatisfactory. It is necessary to reset the core points of the clustering model or adjust the parameters, for example, reinitialize the clustering core points based on the corresponding features, so as to ensure the applicability of the clustering model.

[0111] The second data point is a second cluster data point.

[0112] Figure 2 A block diagram of an integrated circuit design evaluation system based on model analysis of the present invention is shown.

[0113] The second aspect of the present invention further provides an integrated circuit design evaluation system 2 based on model analysis, the system comprising: a memory 21, a processor 22, the memory 21 comprising an integrated circuit design evaluation program based on model analysis, the integrated circuit design evaluation program based on model analysis when executed by the processor 22 implements the following steps:

[0114] According to N integrated circuit processing processes, processing image data of each processing process is obtained;

[0115] Perform image preprocessing and standardization on the processed image data, divide the circuit diagram into multiple regions based on the circuit design, and form multiple circuit regions;

[0116] Based on a processing flow, analysis is performed, and features based on color, texture, and contour are extracted for each circuit area to obtain circuit feature data, a clustering model based on DBSCAN is constructed, and clustering model parameters are initialized to obtain circuit processing reference features corresponding to the processing flow, and the circuit processing reference features are imported into the clustering model to generate data points, and the data points are used as initial core points;

[0117] The circuit characteristic data of each circuit area is imported into the clustering model and the data points in the clustering model are clustered based on the initial core point. Based on the clustering result, multiple area groups are obtained, continuous areas are merged based on the multiple area groups, and multiple merged image areas are generated. The window is positioned according to the merged image area, and the image window is dynamically set;

[0118] Based on setting the corresponding image window for each processing flow, the SSIM similarity index calculation method is introduced through the image window to calculate the integrated circuit defects of different processing flows. The calculation process is to extract the corresponding circuit feature data and defect comparison features based on the set image window to perform SSIM similarity analysis. According to the calculation results, the circuit design and processing defects of different processing flows are evaluated.

[0119] According to an embodiment of the present invention, the process of acquiring the processing image data of each processing flow according to N integrated circuit processing flows is specifically as follows:

[0120] Obtaining an overall processing task of a target integrated circuit, dividing the overall processing task into multiple processes, and forming N integrated circuit processing processes;

[0121] Acquire the processed image data for each processing process.

[0122] It should be noted that the overall processing task of the target integrated circuit includes the entire processing flow. Since integrated circuits often include multiple processing flows, splitting and analyzing each sub-flow can enable refined inference and analysis of processing defects. The design and processing of integrated circuits generally include design, layout analysis, printed circuit boards, component installation, welding, cleaning, packaging, etc. Different processing steps produce different circuit states and design layout states. In N integrated circuit processing flows, generally, there are differences in component states and processing states corresponding to different processing steps. There are also differences in the characteristics and types of defects produced by different processing flows.

[0123] According to an embodiment of the present invention, the image preprocessing and standardization of the processed image data is performed, and the circuit diagram is divided into multiple regions based on the circuit design to form multiple circuit regions, specifically:

[0124] Perform image denoising, transformation, enhancement preprocessing and image standardization on processed image data;

[0125] According to the processed image data, a circuit diagram area is selected, and based on the circuit design information, the circuit diagram is divided into multiple areas to form multiple circuit areas;

[0126] Each circuit region includes at least one circuit element.

[0127] It should be noted that the division of circuit areas is used to perform detailed analysis on processing elements in the subdivided circuits.

[0128] According to an embodiment of the present invention, among the multiple circuit regions, the area size and the outline of each circuit region are within a preset range.

[0129] It should be noted that the preset range is a range set by the user, which is used to ensure that the divided area meets the expected analysis standards.

[0130] According to an embodiment of the present invention, the analysis is performed based on a processing flow, and features based on color, texture, and contour are extracted for each circuit area to obtain circuit feature data, a clustering model based on DBSCAN is constructed, and clustering model parameters are initialized, and circuit processing reference features corresponding to the processing flow are obtained, and the circuit processing reference features are imported into the clustering model and data points are generated, and the data points are used as initial core points, specifically:

[0131] Select a processing flow to analyze;

[0132] Get the current processing image data corresponding to a processing flow,

[0133] According to the current processed image data, the edge detection operator is used to extract the features of each circuit area based on color, texture, and contour to form circuit feature data;

[0134] Obtain design layout information of a processing flow, and obtain circuit processing reference features from the system database through the design layout information;

[0135] Construct a clustering model based on DBSCAN and initialize the clustering model parameters, including the radiation radius of the sample point and the minimum number of neighbors;

[0136] The circuit processing reference features are imported into the clustering model to form reference data points, and the reference data points are used as the initial core points of the clustering model.

[0137] It should be noted that the circuit processing reference features are circuit image features corresponding to the circuit under standardized design, and have certain reference significance. In the present invention, the reference features are used as the initial core data points of the clustering model. During the clustering process, the collected feature data can be automatically clustered with core features, thereby screening out the core image analysis areas in the circuit design, realizing clustering grouping of dynamic key areas, and dynamically setting the corresponding image windows in the subsequent process.

[0138] According to an embodiment of the present invention, the reference data point and the initial core point each include at least one.

[0139] According to an embodiment of the present invention, the circuit feature data of each circuit area is imported into the clustering model and the data points in the clustering model are clustered based on the initial core point, multiple area groups are obtained through the clustering results, continuous areas are merged based on the multiple area groups, and multiple merged image areas are generated, window positioning is performed according to the merged image area, and the image window is dynamically set, specifically:

[0140] Importing circuit characteristic data of each circuit area into a clustering model and forming a plurality of cluster data points;

[0141] In the clustering model, for each cluster data point and initial core point, find all the data points that can be reached by density, label these data points and their core points to form a cluster, calculate all data points, divide the boundary points and remove the noise points, and finally form the clustering result;

[0142] Based on the clustering results, mapping the division results of the multiple circuit regions is performed to form multiple region groups, each region group including at least one circuit region;

[0143] Analyze each area group, and merge circuit areas with continuous positions in one area group to form a merged image area;

[0144] forming a plurality of merged image regions according to the plurality of region groups;

[0145] Pixel window positioning is performed based on the merged image area, and the image window is dynamically set in the circuit diagram area.

[0146] It should be noted that in each processing flow, due to the difference in processed image data, it corresponds to an independent clustering process, and different processing flows correspond to different regional classification results.

[0147] It is worth mentioning that in traditional technology, circuit processing design and defect analysis often rely on manual experience, and for different processing flows, due to the differences in the corresponding core analysis areas, the corresponding defect characteristics and processing element characteristics are different, so the core analysis area has certain changes, and the current technology lacks the annotation and analysis extraction of the corresponding core analysis area, lacks the useful information mining of the circuit area, resulting in low defect analysis efficiency and poor analysis effect. Therefore, the present invention divides each processing flow, obtains corresponding reference features for the corresponding design conditions, constructs a clustering model and forms core data points according to the reference features. In the clustering model, the features of different areas are clustered. Through the clustering process, the core analysis area can be aggregated and extracted for the circuit area of ​​different processing flows. Further, by clustering the corresponding areas, the corresponding window size can be dynamically set. In the subsequent, the SSIM index calculation and circuit defect analysis are performed based on the window information, effectively improving the precision defect analysis capability of complex circuits, while traditional technology often relies on manual experience to analyze the circuit area, lacking intelligent means. The present invention can dynamically set image windows for different processing flows and perform defect feature comparison analysis, thereby improving the defect recognition rate of complex circuits. At the same time, it can subsequently realize serialized defect prediction, thereby improving the defect analysis accuracy for different processing flows and the ability to mine defect information and defect areas.

[0148] According to an embodiment of the present invention, a corresponding image window is set based on each processing flow, and an SSIM similarity index calculation method is introduced through the image window to calculate integrated circuit defects for different processing flows. The calculation process is based on the set image window, extracting corresponding circuit feature data and defect comparison features to perform SSIM similarity analysis, and according to the calculation results, circuit design processing defect evaluation is performed on different processing flows, specifically:

[0149] Set the corresponding image window based on each processing process;

[0150] Obtain defect comparison features from the system database;

[0151] Perform image uniform transformation and standardization on circuit feature data and defect comparison features;

[0152] Based on the SSIM similarity index calculation method, in the set image window, the average brightness, variance, and covariance of the window pixels are calculated for the circuit feature data and the defect comparison features, and the SSIM similarity index is obtained through the average brightness, variance, and covariance;

[0153] The similarity index of different machining processes is calculated, and a comprehensive defect evaluation is performed on each machining process based on the SSIM similarity index.

[0154] It should be noted that the circuit feature data and the defect comparison feature are uniformly transformed and standardized to keep the image format, size, and image attributes of the two images consistent, so as to facilitate the calculation of the SSIM index. The defect comparison feature is the corresponding image feature data of defects that may exist in the corresponding processing flow, which is used for SSIM similarity comparison analysis.

[0155] The third aspect of the present invention also provides a computer-readable storage medium, which includes an integrated circuit design evaluation program based on model analysis. When the integrated circuit design evaluation program based on model analysis is executed by a processor, the steps of the integrated circuit design evaluation method based on model analysis as described in any one of the above items are implemented.

[0156] The present invention discloses an integrated circuit design evaluation method and system based on model analysis. First, the processing image data of N processing flows are obtained and preprocessed and standardized, and multi-region division is performed according to the circuit design. Based on a processing flow, the color, texture, and contour features of each circuit area are extracted, a DBSCAN clustering model is constructed, and the parameters are initialized. Subsequently, the feature data of each circuit area is imported for clustering, continuous areas are merged, a merged image area is generated, and an image window is dynamically set. Finally, based on the image window of each processing flow, the SSIM similarity index calculation is introduced, the circuit feature data and the defect features are compared, and the circuit design processing defects of different processing flows are evaluated. Through the present invention, it is possible to achieve a refined evaluation of circuit processing defects, realize information mining and change analysis of defect features in multiple processing flows, and effectively realize processing early warning and design optimization.

[0157] In the several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as: multiple units or components can be combined, or can be integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the components shown or discussed can be through some interfaces, and the indirect coupling or communication connection of the devices or units can be electrical, mechanical or other forms.

[0158] The units described above as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units; they may be located in one place or distributed on multiple network units; some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

[0159] In addition, all functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may be separately used as a unit, or two or more units may be integrated into one unit; the above-mentioned integrated units may be implemented in the form of hardware or in the form of hardware plus software functional units.

[0160] Those skilled in the art can understand that: all or part of the steps of implementing the above method embodiments can be completed by hardware related to program instructions, and the aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it executes the steps of the above method embodiments; and the aforementioned storage medium includes: mobile storage devices, read-only memories (ROM, Read-Only Memory), random access memories (RAM, Random Access Memory), disks or optical disks, and other media that can store program codes.

[0161] Alternatively, if the above-mentioned integrated unit of the present invention is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiment of the present invention can be essentially or partly reflected in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the methods described in each embodiment of the present invention. The aforementioned storage medium includes: various media that can store program codes, such as mobile storage devices, ROM, RAM, magnetic disks or optical disks.

[0162] The above description is only a specific implementation mode of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

Claims

1. An integrated circuit design evaluation method based on model analysis, characterized in that: include: According to N integrated circuit processing processes, processing image data of each processing process is obtained; Perform image preprocessing and standardization on the processed image data, divide the circuit diagram into multiple regions based on the circuit design, and form multiple circuit regions; Based on a processing flow, analysis is performed, and features based on color, texture, and contour are extracted for each circuit area to obtain circuit feature data, a clustering model based on DBSCAN is constructed, and clustering model parameters are initialized to obtain circuit processing reference features corresponding to the processing flow, and the circuit processing reference features are imported into the clustering model to generate data points, and the data points are used as initial core points; The circuit characteristic data of each circuit area is imported into the clustering model and the data points in the clustering model are clustered based on the initial core point. Based on the clustering result, multiple area groups are obtained, continuous areas are merged based on the multiple area groups, and multiple merged image areas are generated. The window is positioned according to the merged image area, and the image window is dynamically set; Based on setting the corresponding image window for each processing flow, the SSIM similarity index calculation method is introduced through the image window to calculate the integrated circuit defects of different processing flows. The calculation process is to extract the corresponding circuit feature data and defect comparison features based on the set image window to perform SSIM similarity analysis. According to the calculation results, the circuit design and processing defects of different processing flows are evaluated.

2. The integrated circuit design evaluation method based on model analysis according to claim 1, characterized in that: The step of obtaining the processing image data of each processing flow according to the N integrated circuit processing flows is specifically as follows: Obtaining an overall processing task of a target integrated circuit, dividing the overall processing task into multiple processes, and forming N integrated circuit processing processes; Acquire the processed image data for each processing process.

3. The integrated circuit design evaluation method based on model analysis according to claim 1, characterized in that: The image preprocessing and standardization of the processed image data, and the multi-region division of the circuit diagram based on the circuit design to form multiple circuit regions are specifically: Perform image denoising, transformation, enhancement preprocessing and image standardization on processed image data; According to the processed image data, a circuit diagram area is selected, and based on the circuit design information, the circuit diagram is divided into multiple areas to form multiple circuit areas; Each circuit region includes at least one circuit element.

4. The integrated circuit design evaluation method based on model analysis according to claim 1, characterized in that: Among the multiple circuit regions, the area size and outline of each circuit region are within a preset range.

5. The integrated circuit design evaluation method based on model analysis according to claim 1, characterized in that: The analysis is performed based on a processing flow, and features based on color, texture, and contour are extracted for each circuit area to obtain circuit feature data, a clustering model based on DBSCAN is constructed, and clustering model parameters are initialized to obtain circuit processing reference features corresponding to the processing flow, and the circuit processing reference features are imported into the clustering model to generate data points, and the data points are used as initial core points, specifically: Select a processing flow to analyze; Get the current processing image data corresponding to a processing flow, According to the current processed image data, the edge detection operator is used to extract the features of each circuit area based on color, texture, and contour to form circuit feature data; Obtain design layout information of a processing flow, and obtain circuit processing reference features from the system database through the design layout information; Construct a clustering model based on DBSCAN and initialize the clustering model parameters, including the radiation radius of the sample point and the minimum number of neighbors; The circuit processing reference features are imported into the clustering model to form reference data points, and the reference data points are used as the initial core points of the clustering model.

6. The integrated circuit design evaluation method based on model analysis according to claim 5, characterized in that: The reference data point and the initial core point each include at least one.

7. The integrated circuit design evaluation method based on model analysis according to claim 6, characterized in that: The circuit feature data of each circuit area is imported into the clustering model and the data points in the clustering model are clustered based on the initial core point. Multiple area groups are obtained through the clustering results. Continuous area merging is performed based on the multiple area groups, and multiple merged image areas are generated. Window positioning is performed according to the merged image area, and the image window is dynamically set, specifically: Importing circuit characteristic data of each circuit area into a clustering model and forming a plurality of cluster data points; In the clustering model, for each cluster data point and initial core point, find all the data points that can be reached by density, label these data points and their core points to form a cluster, calculate all data points, divide the boundary points and remove the noise points, and finally form the clustering result; Based on the clustering results, mapping the division results of the multiple circuit regions is performed to form multiple region groups, each region group including at least one circuit region; Analyze each area group, and merge circuit areas with continuous positions in one area group to form a merged image area; forming a plurality of merged image regions according to the plurality of region groups; Pixel window positioning is performed based on the merged image area, and the image window is dynamically set in the circuit diagram area.

8. The integrated circuit design evaluation method based on model analysis according to claim 7, characterized in that: The corresponding image window is set based on each processing flow, and the SSIM similarity index calculation method is introduced through the image window to calculate the integrated circuit defects of different processing flows. The calculation process is based on the set image window, extracting the corresponding circuit feature data and defect comparison features to perform SSIM similarity analysis, and according to the calculation results, the circuit design processing defect evaluation is performed on different processing flows, specifically: Set the corresponding image window based on each processing process; Obtain defect comparison features from the system database; Perform image uniform transformation and standardization on circuit feature data and defect comparison features; Based on the SSIM similarity index calculation method, in the set image window, the average brightness, variance, and covariance of the window pixels are calculated for the circuit feature data and the defect comparison features, and the SSIM similarity index is obtained through the average brightness, variance, and covariance; The similarity index of different machining processes is calculated, and a comprehensive defect evaluation is performed on each machining process based on the SSIM similarity index.

9. An integrated circuit design evaluation system based on model analysis, characterized in that: The system includes: a memory and a processor, wherein the memory includes an integrated circuit design evaluation program based on model analysis, and when the integrated circuit design evaluation program based on model analysis is executed by the processor, the following steps are implemented: According to N integrated circuit processing processes, processing image data of each processing process is obtained; Perform image preprocessing and standardization on the processed image data, divide the circuit diagram into multiple regions based on the circuit design, and form multiple circuit regions; Based on a processing flow, analysis is performed, and features based on color, texture, and contour are extracted for each circuit area to obtain circuit feature data, a clustering model based on DBSCAN is constructed, and clustering model parameters are initialized to obtain circuit processing reference features corresponding to the processing flow, and the circuit processing reference features are imported into the clustering model to generate data points, and the data points are used as initial core points; The circuit characteristic data of each circuit area is imported into the clustering model and the data points in the clustering model are clustered based on the initial core point. Based on the clustering result, multiple area groups are obtained, continuous areas are merged based on the multiple area groups, and multiple merged image areas are generated. The window is positioned according to the merged image area, and the image window is dynamically set; Based on setting the corresponding image window for each processing flow, the SSIM similarity index calculation method is introduced through the image window to calculate the integrated circuit defects of different processing flows. The calculation process is to extract the corresponding circuit feature data and defect comparison features based on the set image window to perform SSIM similarity analysis. According to the calculation results, the circuit design and processing defects of different processing flows are evaluated.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium includes an integrated circuit design evaluation program based on model analysis. When the integrated circuit design evaluation program based on model analysis is executed by a processor, the steps of the integrated circuit design evaluation method based on model analysis as described in any one of claims 1 to 8 are implemented.

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