PCIe Data Packet Sending Method, Electronic Device, and Medium

Abstract

The present invention relates to the field of computer technologies, and in particular, to a method for sending PCIe data packets, an electronic device, and a medium, including: S1, obtaining a currently to-be-sent PCIe data packet and the required credit value; S2, transmitting the currently to-be-sent PCIe data packet to the PCIe bus; S3, at the moment when all are transmitted to the PCIe bus, obtaining the remaining credit value of the current receiving end; S4, if the remaining credit value is less than the required credit value, then execute S5, otherwise, execute S6; S5, after marking the currently to-be-sent PCIe data packet with an invalid flag, send it to the receiving end, and execute S7; S6, directly send the currently to-be-sent PCIe data packet to the receiving end, and execute S7; S7, if it is marked with an invalid flag, then discard the currently to-be-sent PCIe data packet, otherwise, store it in the receiving end buffer, and return to S1. The present invention can avoid bandwidth waste and improve the utilization rate of the PCIe link.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and particularly to a method for sending PCIe data packets, an electronic device, and a medium. Background Art

[0002] PCIe (Peripheral Component Interconnect Express) is a high-speed serial bus standard widely used to connect peripherals in computer systems. To ensure the efficiency and reliability of data transmission, PCIe introduces a credit mechanism for managing the data flow control between the sender and the receiver. The core of the credit mechanism is to avoid data overflow and prevent the sender from sending data when the receiver's buffer is insufficient, thus ensuring the reliability of data transmission and link efficiency. The credit mechanism of PCIe realizes efficient and reliable data transmission by dynamically managing the buffer resources of the sender and the receiver. Its core lies in allocating credit limits on demand and updating credit information in real time to ensure that link resources are fully utilized while avoiding data overflow. This mechanism is an important basis for the high performance and low latency characteristics of PCIe.

[0003] However, there are at least the following disadvantages in sending PCIe data packets based on the credit mechanism: (1) The initial credit allocation depends on the receiver buffer capacity. The core of the credit mechanism is that the receiver notifies its buffer capacity through flow control packets. If the receiver buffer is small, the initially allocated credit value may be low, causing the sender to frequently pause due to insufficient credit and reducing link utilization. In burst traffic scenarios (such as high-throughput data transmission), insufficient buffer capacity may become a bottleneck. (2) Credit update latency affects throughput. Credit update depends on the receiver sending a flow control DLLP (Data Link Layer Packet), and the generation and transmission of DLLP take time. If the link latency is high (such as long-distance transmission) or the receiver processing speed is slow, the credit update may not reach the sender in time. The sender may enter an idle state waiting for the credit update, resulting in wasted bandwidth. It can be seen that how to avoid bandwidth waste and improve PCIe link utilization has become an urgent technical problem to be solved. Summary of the Invention

[0004] The object of the present invention is to provide a method for sending PCIe data packets, an electronic device, and a medium, which can avoid bandwidth waste and improve PCIe link utilization.

[0005] According to a first aspect of the present invention, there is provided a method for sending PCIe data packets, including:

[0006] Step S1: Obtain the currently to-be-sent PCIe data packet and the required credit value corresponding to the currently to-be-sent PCIe data packet from the sending end. The required credit value is the buffer space that the PCIe data packet needs to occupy in the receiving-end buffer.

[0007] Step S2: Transmit the currently to-be-sent PCIe data packet to the PCIe bus.

[0008] Step S3: At the moment when the currently to-be-sent PCIe data packet is completely transmitted to the PCIe bus, obtain the remaining credit value of the current receiving end. The current receiving-end remaining credit value is the remaining space in the current receiving-end buffer, and the receiving-end remaining credit value is updated in real time.

[0009] Step S4: If the remaining credit value of the current receiving end is less than the required credit value corresponding to the currently to-be-sent PCIe data packet, then execute Step S5; otherwise, execute Step S6.

[0010] Step S5: After marking the currently to-be-sent PCIe data packet with an invalid flag, send it to the receiving end, and execute Step S7.

[0011] Step S6: Directly send the currently to-be-sent PCIe data packet to the receiving end, and execute Step S7.

[0012] Step S7: If the currently to-be-sent PCIe data packet is marked with an invalid flag, then the receiving end will discard it; otherwise, the receiving end will store the currently to-be-sent PCIe data packet in the receiving-end buffer, and return to Step S1.

[0013] According to the second aspect of the present invention, there is provided an electronic device, including: at least one processor; and a memory communicatively connected to the at least one processor; wherein, the memory stores instructions executed by the at least one processor, and the instructions are configured to execute the method according to the first aspect of the present invention.

[0014] According to the third aspect of the present invention, there is provided a computer-readable storage medium storing computer-executable instructions, and the computer instructions are used to execute the method according to the first aspect of the present invention.

[0015] Compared with the prior art, the present invention has obvious advantages and beneficial effects. By means of the above technical solutions, a PCIe data packet sending method, an electronic device, and a medium provided by the present invention can achieve quite remarkable technical progressiveness and practicality, and have wide industrial utilization value. It has at least the following beneficial effects:

[0016] Instead of waiting for the remaining credit value of the current receiver to meet the required credit value before sending a PCIe data packet, the present invention directly sends the PCIe data packet to the PCIe data bus first. When the sending of the PCIe data packet is completed, it is judged whether the remaining credit value of the current receiver meets the required credit value. If it meets, it is directly sent; if not, the PCIe data is discarded. The present invention can avoid the transmission gap period generated under the PCIe credit mechanism, and significantly increases the throughput of PCIe and improves the data transmission efficiency on the premise of ensuring that the bandwidth and delay are not negatively affected. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0018] Figure 1 It is a flowchart of the method for sending a PCIe data packet provided by an embodiment of the present invention;

[0019] Figure 2 It is a timing diagram for sending a PCIe data packet based on the existing PCIe credit mechanism;

[0020] Figure 3 It is a timing diagram for sending a PCIe data packet in an embodiment of the present invention;

[0021] Figure 4 It is a timing diagram for a successful example of sending a PCIe data packet in an embodiment of the present invention;

[0022] Figure 5 It is a timing diagram for a failed example of sending a PCIe data packet in an embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0023] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the drawings in the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, rather than all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present invention.

[0024] An embodiment of the present invention provides a method for sending a PCIe data packet, as Figure 1 shown, including:

[0025] Step S1: Obtain the currently to-be-sent PCIe data packet and the required credit value corresponding to the currently to-be-sent PCIe data packet from the sending end. The required credit value is the buffer space that the PCIe data packet needs to occupy in the receiving end buffer.

[0026] Among them, the sending end and the receiving end are interconnected through the PCIe bus, and the sending end sends PCIe data packets to the receiving end through the PCIE bus.

[0027] Step S2: Transmit the currently to-be-sent PCIe data packet to the PCIe bus.

[0028] It should be noted that in the prior art, the data flow control between the sending end and the receiving end is managed based on the PCIe credit mechanism. Before sending a PCIe data packet, it is necessary to first determine whether the remaining credit value of the current receiving end is greater than or equal to the required credit value corresponding to the currently to-be-sent PCIe data packet. Only when the condition is met can the PCIe data packet be sent. Thus, it can be seen that under the existing PCIe credit mechanism, when the credit value is insufficient, the PCIe sending end will be restricted from sending data packets, resulting in a transmission gap period. The embodiment of the present invention breaks through this limitation and can realize the sending of PCIe data packets during the gap period when the credit value is insufficient.

[0029] Step S3: At the moment when all the currently to-be-sent PCIe data packets are transmitted to the PCIe bus, obtain the remaining credit value of the current receiving end. The remaining credit value of the current receiving end is the remaining space in the current receiving end buffer, and the remaining credit value of the receiving end is updated in real time.

[0030] Step S4: If the remaining credit value of the current receiving end is less than the required credit value corresponding to the currently to-be-sent PCIe data packet, then execute Step S5; otherwise, execute Step S6.

[0031] Step S5: After marking the currently to-be-sent PCIe data packet with an invalid flag, send it to the receiving end, and then execute Step S7.

[0032] Step S6: Directly send the currently to-be-sent PCIe data packet to the receiving end, and then execute Step S7.

[0033] Step S7: If the currently to-be-sent PCIe data packet is marked with an invalid flag, then the receiving end will discard it; otherwise, the receiving end will store the currently to-be-sent PCIe data packet in the receiving end buffer and return to Step S1.

[0034] It should be noted that if, when the transmission of the currently to-be-transmitted PCIe data packet ends, the remaining credit value of the current receiving end reaches the standard for transmitting the currently to-be-transmitted PCIe data packet, it means that the idle period that cannot be reached by the traditional PCIe credit mechanism is successfully utilized, thereby significantly increasing the throughput of PCIe and improving the data transmission efficiency. In addition, during the data transmission process of the present invention, it is ensured that there will be no negative effects on bandwidth and latency. Even if the credit mechanism requirements are not met at the end of the transmission, the PCIe data packet marked with an invalid identifier can be discarded to ensure that the main data path is not interfered with and the stable transmission of data is maintained.

[0035] The to-be-transmitted PCIe data packets may be data packets with the same priority or data packets with different priorities. The following will be described through two different specific embodiments.

[0036] Embodiment 1

[0037] The priorities of each to-be-transmitted PCIe data packet are the same, and the PCIe data is transmitted in the order of the to-be-transmitted PCIe data packet sequence. The to-be-transmitted PCIe data packet sequence is generated according to the order in which the to-be-transmitted PCIe data packets need to be transmitted. The PCIe data packet at the head of the to-be-transmitted PCIe data packet sequence is the currently to-be-transmitted PCIe data packet. For PCIe data packets with the same priority, the order in the to-be-transmitted PCIe data packet sequence remains unchanged. Each to-be-transmitted PCIe data packet is set with a transmission count, and the initial value of the transmission count corresponding to each to-be-transmitted PCIe data packet is set to 0.

[0038] On the premise that the priorities of each to-be-transmitted PCIe data packet are the same, as an example, step S1 includes:

[0039] Step S11: Obtain the required credit value corresponding to the first PCIe data packet in the to-be-transmitted PCIe data packet sequence.

[0040] Step S12: Determine whether the transmission count corresponding to the first PCIe data packet in the to-be-transmitted PCIe data packet sequence is equal to a preset transmission threshold. If it is equal, jump to step S14; otherwise, execute step S13.

[0041] Among them, the preset transmission threshold is an integer greater than or equal to 1, which is set according to specific application requirements.

[0042] Step S13: Determine the first PCIe data packet in the to-be-transmitted PCIe data packet sequence as the previous to-be-transmitted PCIe data packet, and execute step S2.

[0043] It should be noted that if the number of transmissions corresponding to the first PCIe data packet in the to-be-transmitted PCIe data packet sequence is less than the preset transmission threshold, the mechanism of steps S2 - S7 is still used to transmit the first PCIe data packet in the to-be-transmitted PCIe data packet sequence.

[0044] Step S14: When the remaining space in the receiver buffer is greater than or equal to the required credit value corresponding to the first PCIe data packet, send the first PCIe data packet to the buffer of the receiver, delete the first PCIe data packet from the to-be-transmitted PCIe data packet sequence, and return to step S11.

[0045] It should be noted that if the number of transmissions corresponding to the first PCIe data packet in the to-be-transmitted PCIe data packet sequence is equal to the preset transmission threshold, it is necessary to switch to the traditional PCIe credit mechanism to successfully transmit the first PCIe data packet in the to-be-transmitted PCIe data packet sequence to the buffer of the receiver, that is, to achieve this through step S14.

[0046] Embodiment 2

[0047] Each to-be-transmitted PCIe data packet has a corresponding priority. Therefore, the priorities corresponding to different to-be-transmitted PCIe data packets may be different. The to-be-transmitted PCIe data packet sequence is dynamically adjusted according to the priority of the PCIe data packet. Therefore, the order in the to-be-transmitted PCIe data packet sequence may change dynamically. Each to-be-transmitted PCIe data packet is set with the number of transmissions, and the initial value of the number of transmissions corresponding to each to-be-transmitted PCIe data packet is set to 0.

[0048] On the premise that each to-be-transmitted PCIe data packet has a corresponding priority, as an example, step S1 includes:

[0049] Step C11: Obtain the required credit value corresponding to the first PCIe data packet in the to-be-transmitted PCIe data packet sequence.

[0050] Step C12: Determine whether the first PCIe data packet in the to-be-transmitted PCIe data packet sequence is the previous currently to-be-transmitted PCIe data packet. If so, execute step C15; otherwise, execute step C14.

[0051] It should be noted that in the case where the previous currently to-be-transmitted PCIe data packet transmission fails and there is no PCIe data packet with a higher priority than the previous currently to-be-transmitted PCIe data packet temporarily, the first PCIe data packet in the to-be-transmitted PCIe data packet sequence is still the previous currently to-be-transmitted PCIe data packet.

[0052] Step C13: Determine whether the transmission count corresponding to the first PCIe data packet in the PCIe data packet sequence to be sent is equal to a preset transmission threshold. If it is equal, jump to step C15; otherwise, execute step C14.

[0053] The preset transmission threshold is an integer greater than or equal to 1 and is set according to specific application requirements.

[0054] Step C14: Determine the first PCIe data packet in the PCIe data packet sequence to be sent as the previous PCIe data packet to be sent, and execute step S2.

[0055] It should be noted that if the transmission count corresponding to the first PCIe data packet in the PCIe data packet sequence to be sent is less than the preset transmission threshold, the mechanism of steps S2 - S7 is still used to send the first PCIe data packet in the PCIe data packet sequence to be sent.

[0056] Step C15: When the remaining space in the receiver buffer is greater than or equal to the required credit value corresponding to the first PCIe data packet, send the first PCIe data packet to the buffer of the receiver, delete the first PCIe data packet from the PCIe data packet sequence to be sent, and return to step C11.

[0057] It should be noted that if the transmission count corresponding to the first PCIe data packet in the PCIe data packet sequence to be sent is equal to the preset transmission threshold, it is necessary to switch to the traditional PCIe credit mechanism to successfully send the first PCIe data packet in the PCIe data packet sequence to be sent to the buffer of the receiver, that is, to achieve it through step C15.

[0058] For Embodiment 1 or Embodiment 2, as an example, the step S7 includes:

[0059] Step S71: If the currently to-be-sent PCIe data packet is marked with an invalid flag, execute step S72; otherwise, execute step S73.

[0060] Step S72: The receiver will discard it, increment the transmission count corresponding to the currently to-be-sent PCIe data packet by 1, and return to step S1.

[0061] Among them, in the step S72, the Nullify mechanism in the PCIe protocol can be specifically adopted to discard the received end, that is, the present invention does not need to add an additional private mechanism, and the compatibility with other PCIe devices is guaranteed. The Nullify mechanism is a technology in the PCIe protocol used to actively discard invalid or unprocessable data packets. It allows the receiving end or intermediate nodes to quickly terminate the transmission of data packets in specific scenarios, avoiding unnecessary resource consumption or error diffusion. Correspondingly, the invalid identifier marked on the PCIe data packet is the Nullify flag.

[0062] Step S73: The receiving end stores the currently to-be-sent PCIe data packet into the receiving end buffer, deletes the currently to-be-sent PCIe data packet from the sequence of to-be-sent PCIe data packets, and returns to step S1.

[0063] It should be noted that after the PCIe data packet is successfully sent to the buffer of the receiving end, the currently to-be-sent PCIe data packet needs to be deleted from the sequence of to-be-sent PCIe data packets to ensure that the sequence of to-be-sent PCIe data packets contains only the to-be-sent PCIe data packets that have not been sent or have not been successfully sent.

[0064] In the existing PCIe credit mechanism, the timing diagram of the dependency relationship between the sending of PCIe data packets and the credit value is as Figure 2 shown, where the clock refers to the clock signal, the remaining credit value refers to the remaining credit value of the receiving end, and the credit value required to send a data packet refers to the credit value required for the to-be-sent PCIe data packet. Packet valid being 1 indicates that the packet header, packet tail, and packet are valid. Packet header being 1 indicates the start of sending the PCIe data packet, packet tail being 1 indicates the end of sending the PCIe data packet, and the packet refers to the content of the PCIe data packet. As Figure 2 can be seen, before the remaining credit value of the receiving end is greater than the credit value required for the to-be-sent PCIe data packet, the sending end cannot perform the sending operation, and the PCIe bus is in an idle state.

[0065] Figure 3 shows the timing diagram of the data packet with an invalid identifier implemented in steps S2 - S7 of the embodiment of the present invention. Taking the invalid identifier as the Nullify flag as an example, Figure 3 in it, packet invalid is the PCIe data packet invalid indication. Packet invalid is 1 when both the packet tail and the packet are 1, and when packet invalid is 1, it represents that the PCIe data packet is invalid.

[0066] Based on Figure 3For the corresponding PCIe data packet sending mechanism, when the sending end sends a PCIe data packet, it does not check the credit value of the corresponding transaction type first, but checks it at the same moment when the sending ends. If the remaining credit value of the receiving end >= the credit value required for the PCIe data packet to be sent at this time, the PCIe data packet can be directly sent without additional processing. The timing diagram is as Figure 4 shown. In the first clock cycle, although the remaining credit value of the receiving end is insufficient, the sending end can still send the PCIe data packet. In the third clock cycle, the remaining credit value of the receiving end already meets the requirement for sending the PCIe data packet, and at this time, the PCIe data packet can be normally sent. The remaining credit value of the receiving end is updated at the end of the sending.

[0067] Based on Figure 3 the corresponding PCIe data packet sending mechanism, when the sending end sends a PCIe data packet, it does not check the credit value of the corresponding transaction type first, but checks it at the same moment when the sending ends. If the remaining credit value of the receiving end is less than the credit value required for the PCIe data packet to be sent at this time, a Nullify flag is attached to the PCIe data packet to invalidate the currently sent PCIe data packet. The timing diagram is as Figure 5 shown. In the first clock cycle, although the remaining credit value is insufficient, the PCIe sending end can still send the data packet. In the fifth clock cycle, the PCIe data packet is about to be sent, but at this time, the remaining credit value of the receiving end is still insufficient. At this time, the sending end needs to pull up the data packet invalid at the same time to indicate that the data packet is invalid to prevent the sending of the PCIe data packet.

[0068] An embodiment of the present invention also provides an electronic device, including: at least one processor; and a memory communicatively connected to the at least one processor; wherein, the memory stores instructions executed by the at least one processor, and the instructions are configured to execute the method described in the embodiment of the present invention.

[0069] An embodiment of the present invention also provides a computer-readable storage medium storing computer-executable instructions, and the computer instructions are used to execute the method described in the embodiment of the present invention.

[0070] In the embodiment of the present invention, it is not necessary to wait for the remaining credit value of the current receiving end to meet the required credit value before sending the PCIe data packet. Instead, the PCIe data packet is directly sent to the PCIe data bus first. When the sending of the PCIe data packet ends, it is judged whether the remaining credit value of the current receiving end meets the required credit value. If it meets, it is directly sent; if it does not meet, the PCIe data is discarded. The present invention can avoid the transmission gap period generated under the PCIe credit mechanism, and significantly increase the throughput of PCIe and improve the data transmission efficiency on the premise of ensuring that the bandwidth and delay are not negatively affected.

[0071] As described above, it is only the preferred embodiment of the present invention and does not impose any formal restrictions on the present invention. Although the present invention has been disclosed above with the preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make some changes or modifications to equivalent embodiments by using the disclosed technical content within the scope of the technical solution of the present invention. However, as long as it does not depart from the content of the technical solution of the present invention, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention still fall within the scope of the technical solution of the present invention.

Claims

1. A method for sending PCIe data packets, characterized in that, Including: Step S1: Obtain the currently to-be-sent PCIe data packet and the required credit value corresponding to the currently to-be-sent PCIe data packet from the sending end. The required credit value is the buffer space that the PCIe data packet needs to occupy in the receiving end buffer; Step S2: Transmit the currently to-be-sent PCIe data packet to the PCIe bus; Step S3: At the moment when all the currently to-be-sent PCIe data packets are transmitted to the PCIe bus, obtain the remaining credit value of the current receiving end. The current receiving end remaining credit value is the remaining space in the current receiving end buffer, and the receiving end remaining credit value is updated in real time; Step S4: If the remaining credit value of the current receiving end is less than the required credit value corresponding to the currently to-be-sent PCIe data packet, execute Step S5; otherwise, execute Step S6; Step S5: After marking the currently to-be-sent PCIe data packet with an invalid flag, send it to the receiving end and execute Step S7; Step S6: Directly send the currently to-be-sent PCIe data packet to the receiving end and execute Step S7; Step S7: If the currently to-be-sent PCIe data packet is marked with an invalid flag, the receiving end will discard it; otherwise, the receiving end will store the currently to-be-sent PCIe data packet in the receiving end buffer and return to Step S1.

2. The method according to claim 1, wherein: The priorities of each to-be-sent PCIe data packet are the same. The PCIe data is sent in the order of the to-be-sent PCIe data packet sequence, and the initial value of the number of sending times corresponding to each to-be-sent PCIe data packet is set to 0.

3. The method according to claim 2, wherein: Step S1 includes: Step S11: Obtain the required credit value corresponding to the first PCIe data packet in the to-be-sent PCIe data packet sequence; Step S12: Determine whether the number of sending times corresponding to the first PCIe data packet in the to-be-sent PCIe data packet sequence is equal to the preset sending threshold. If it is equal, jump to Step S14; otherwise, execute Step S13; Step S13: Determine the first PCIe data packet in the to-be-sent PCIe data packet sequence as the previous to-be-sent PCIe data packet and execute Step S2; Step S14: When the remaining space in the receiving end buffer is greater than or equal to the required credit value corresponding to the first PCIe data packet, send the first PCIe data packet to the buffer of the receiving end, delete the first PCIe data packet from the to-be-sent PCIe data packet sequence, and return to Step S11.

4. The method according to claim 1, wherein: Each to-be-sent PCIe data packet has a corresponding priority. The to-be-sent PCIe data packet sequence is dynamically adjusted according to the priorities of the PCIe data packets, and the initial value of the number of sending times corresponding to each to-be-sent PCIe data packet is set to 0.

5. The method according to claim 4, wherein: Step S1 includes: Step C11: Obtain the required credit value corresponding to the first PCIe data packet in the to-be-sent PCIe data packet sequence; Step C12: Determine whether the first PCIe data packet in the PCIe data packet sequence to be sent is the previous currently to-be-sent PCIe data packet. If so, execute Step C15; otherwise, execute Step C14; Step C13: Determine whether the number of transmission times corresponding to the first PCIe data packet in the PCIe data packet sequence to be sent is equal to a preset transmission threshold. If equal, jump to Step C15; otherwise, execute Step C14; Step C14: Determine the first PCIe data packet in the PCIe data packet sequence to be sent as the previous to-be-sent PCIe data packet, and execute Step S2; Step C15: When the remaining space in the receiver buffer is greater than or equal to the required credit value corresponding to the first PCIe data packet, send the first PCIe data packet to the buffer of the receiver, delete the first PCIe data packet from the PCIe data packet sequence to be sent, and return to Step C11.

6. The method according to claim 3 or 5, wherein: The Step S7 includes: Step S71: If the currently to-be-sent PCIe data packet is marked with an invalid flag, execute Step S72; otherwise, execute Step S73; Step S72: The receiver will discard it, increment the number of transmission times corresponding to the currently to-be-sent PCIe data packet by 1, and return to Step S1; Step S73: The receiver stores the currently to-be-sent PCIe data packet in the receiver buffer, deletes the currently to-be-sent PCIe data packet from the PCIe data packet sequence to be sent, and returns to Step S1.

7. The method according to claim 6, wherein: In Step S72, the receiver will discard it by using the Nullify mechanism in the PCIe protocol.

8. An electronic device, characterized in that, Comprises: At least one processor; And a memory communicatively connected to the at least one processor; Wherein, the memory stores instructions executed by the at least one processor, and the instructions are configured to execute the method according to any one of the preceding claims 1-7.

9. A computer-readable storage medium, characterized in that, Stores computer-executable instructions for executing the method according to any one of the preceding claims 1-7.

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