Image sensor and optical signal generation method

Abstract

An image sensor and an optical signal generation method, the image sensor comprising a plurality of pixels and comprising: a photodiode configured to operate in one of a linear mode for responding to an amount of light incidence in a linear manner and a photovoltaic mode for generating an optical signal from the plurality of pixels; the photovoltaic mode is used for responding to the light incidence amount in a logarithmic mode; a source follower circuit configured to output a signal voltage according to a signal generated based on an output of the photodiode; an analog-to-digital converter configured to convert the signal voltage output from the source follower circuit into digital signal data; a frame memory configured to store signal data of one frame; and a conversion function configured to generate an optical signal related to the light incidence amount according to the signal data of the current frame and the signal data of the previous frame.

Description

Technical Field

[0001] The present disclosure relates to an image sensor and an optical signal generation method using a photodiode, wherein the photodiode operates in two modes: a linear mode and a photovoltaic mode. The linear mode is used to respond to the amount of incident light in a linear manner, and the photovoltaic mode is used to respond to the amount of incident light in a logarithmic manner. Background Art

[0002] The image sensor includes a photodiode in a pixel circuit and detects an amount of charge generated according to light incident on the photodiode.

[0003] The photodiode has a logarithmic region (in high illumination time) and a linear region (in low illumination time). In the logarithmic region, the photodiode operates with a forward bias, and in the linear region, the photodiode operates with a reverse bias and a portion of the forward bias. In the logarithmic region, the photodiode responds to the amount of light incident in a logarithmic manner. The operating mode at this time is called the photovoltaic mode. In the linear region, the photodiode responds to the amount of light incident in a linear manner. The operating mode at this time is called the linear mode.

[0004] Thermal noise called kTC noise occurs in the linear region where the photodiode operates under low illumination. kTC noise is noise generated due to the switching of the reset transistor that resets the accumulated charge of the photodiode. kTC noise is an offset shift whose offset direction is not fixed with respect to the output voltage of the photodiode after reset. Therefore, kTC noise deteriorates the quality of the reproduced image.

[0005] Therefore, it is desirable to remove kTC noise from the output of the image sensor. Summary of the invention

[0006] An image sensor according to the present disclosure is an image sensor including multiple pixels, the image sensor including: a photodiode configured to operate in two modes, a linear mode and a photovoltaic mode, the linear mode is used to respond to the amount of incident light in a linear manner, and the photovoltaic mode is used to respond to the amount of incident light in a logarithmic manner; a source follower circuit configured to output a signal voltage based on a signal generated based on an output of the photodiode; an AD converter configured to convert the signal voltage output from the source follower circuit into digital signal data; a frame memory configured to store signal data of a frame; and a conversion function configured to generate an optical signal related to the amount of incident light based on the signal data of a current frame and the signal data of a previous frame.

[0007] An optical signal generating method according to the present disclosure is an optical signal generating method for generating an optical signal related to the amount of light incident on a photodiode, wherein the photodiode operates in two modes, a linear mode and a photovoltaic mode, the linear mode is used to respond to the amount of light incident in a linear manner, and the photovoltaic mode is used to respond to the amount of light incident in a logarithmic manner, the optical signal generating method comprising: extracting the output of the photodiode frame by frame without resetting the accumulated charge of the photodiode; and using a pre-provided conversion function to generate an optical signal related to the amount of light incident in the current frame based on a signal of the current frame related to the output of the photodiode in the current frame and a signal of a previous frame related to the output of the photodiode in the frame immediately preceding the photodiode.

[0008] In the case of using the image sensor and the optical signal generation method according to the present disclosure, the reset transistor can be omitted and the occurrence of noise can be suppressed. That is, a signal can be obtained without connecting the reset transistor to the output terminal of the photodiode and without resetting the accumulated charge of the photodiode. Therefore, the occurrence of noise due to the reset can be prevented. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Embodiments of the present disclosure will be explained based on the following drawings.

[0010] Figure 1 is a diagram showing a configuration of a pixel circuit in an image sensor according to an embodiment.

[0011] Figure 2 It is shown Figure 1 The timing diagram of the operation of the circuit shown in FIG.

[0012] Figure 3 is a diagram showing a configuration of a comparative example.

[0013] Figure 4This is a diagram showing the relationship when a signal current corresponding to a signal of an immediately preceding frame and an optical signal is given and a signal of a current frame is calculated.

[0014] Figure 5 It is a graph showing S / N in the linear region and the logarithmic region when V1 = 0 V to -0.7 V.

[0015] Figure 6 is a diagram showing an image sensor in which pixels are two-dimensionally arranged in the embodiment.

[0016] Figure 7 is a timing diagram illustrating the operation of the image sensor.

[0017] Figure 8 is a diagram showing the configuration of Modification 1.

[0018] Fig. 9 is a timing chart showing the operation of Modification 1.

[0019] Fig.10 It is a diagram showing the relationship between a signal (output voltage) and a signal current and shows a case where no negative pulse is applied.

[0020] Fig.11 It is a diagram showing the relationship between a signal (output voltage) and a signal current and shows a case where a negative pulse is applied.

[0021] Fig.12 : is a graph showing dVout / dIsig when V1 = 0 V and V1 = -0.7 V in the case where the application period of the negative pulse is changed.

[0022] Fig.13 is a diagram showing a configuration of Modification 2 in which a modulation capacitor is coupled to a PD and a negative pulse is applied. DETAILED DESCRIPTION

[0023] The following describes an embodiment of the present disclosure with reference to the accompanying drawings. It should be noted that the embodiment described below does not limit the present disclosure. Configurations formed by selectively combining multiple examples are also included in the present disclosure.

[0024] Circuit Configuration

[0025] Figure 1 is a diagram showing a configuration of a pixel circuit in an image sensor according to an embodiment.

[0026] In the sensor chip 10, a plurality of pixels 12 are formed on a semiconductor substrate (eg, a silicon substrate). The sensor chip 10 includes the plurality of pixels 12 arranged in a matrix in the horizontal direction and the vertical direction. Figure 1 Only one pixel 12 is shown.

[0027] The pixel 12 includes a photodiode PD. The photodiode PD has a pn junction and generates charges with incident light. The photodiode PD in this example generates electrons using incident light. The larger the amount of incident light, the larger the output voltage of the photodiode PD is on the negative side.

[0028] The photodiode PD has two modes: a linear mode and a photovoltaic mode. The linear mode is used to respond to the incident light amount in a linear manner during the reverse bias time and the forward bias time, and the photovoltaic mode is used to respond to the incident light amount in a logarithmic manner during the forward bias time. The photodiode PD is in the linear mode when the incident light amount is small and in the photovoltaic mode when the incident light amount is large.

[0029] The source follower circuit 14 is connected to the output of the photodiode PD and includes a source follower transistor SF configured by an n-channel metal-oxide-semiconductor field-effect transistor (MOSFET) and a row selection transistor SEL configured by an n-channel MOSFET.

[0030] The output of the photodiode PD is connected to the gate of the source follower transistor SF. The drain of the source follower transistor SF is connected to a predetermined power supply. The drain of the row selection transistor SEL is connected to the source of the source follower transistor SF. The source of the row selection transistor SEL is connected to the bit line 16 as an output line. A row selection line connected to a vertical scanning circuit explained below is connected to the gate of the row selection transistor SEL.

[0031] Therefore, the row selection line changes to a high level (H level), whereby the row selection transistor SEL is turned on, and a voltage corresponding to the gate voltage of the source follower transistor SF is output to the bit line 16. The output of the photodiode PD is supplied to the gate of the source follower transistor SF. A signal voltage corresponding to the output voltage of the photodiode PD is output to the bit line 16. That is, a signal voltage related to the amount of incident light of the photodiode PD is output to the bit line 16. The bit line 16 is set to correspond to the column. The sources of the row selection transistors SEL of the plurality of pixels 12 arranged in the vertical direction are connected to one bit line 16.

[0032] One end of the load capacitor CL is connected to the bit line 16. The other end of the load capacitor CL is connected to a predetermined power source (e.g., ground). The bit line 16 is a wiring that is long in the vertical direction (column direction). The parasitic capacitance generated in the bit line 16 is quite large. Therefore, the parasitic capacitance can be made to function as the load capacitor CL.

[0033] The bit line 16 is connected to an AD converter (ADC) 20. Therefore, the signal voltages of the plurality of pixels 12 in a row selected by a row selection line are supplied to the AD converter 20.

[0034] The AD converter 20 converts the supplied analog signal voltage into digital signal data. The obtained signal data is supplied to both the frame memory 22 and the conversion function 24. The conversion function 24 may also be referred to as a signal converter 24. The frame memory 22 stores the signal data of one frame. The output of the frame memory 22 is connected to the conversion function 24. The signal data of the immediately preceding frame is supplied to the conversion function 24. It should be noted that a frame is described as Fr where appropriate.

[0035] The current signal V2 (signal V2 of the current frame) and the signal V1 of the immediately preceding frame (previous frame) are supplied to the conversion function 24. The conversion function 24 is configured by a Lambert W function and outputs an optical signal in the current frame in the pixel from two input data. That is, the conversion function 24 eliminates the influence of the previous signal V1 from the current signal V2 and obtains an optical signal corresponding to the incident light amount of the current frame.

[0036] In this embodiment, a reset circuit for resetting the output of the photodiode PD to a predetermined voltage is not provided. Therefore, the photodiode PD holds the accumulated charge in the previous frame at the first time point of one frame. The conversion function 24 obtains an optical signal corresponding to the incident light amount in the current frame based on the signal V2 of the current frame and the signal data of the previous frame. Here, such conversion cannot be calculated by an elementary function. If the Lambert W function is used, the conversion can be calculated.

[0037] The Lambert W function is a linear function x and an exponential function e. x That is, the Lambert W function is the inverse function of f(z) = ze z The general term of the function W obtained by branching the inverse relation of . Here, e z represents an exponential function, and z represents an arbitrary complex number. W satisfies z=f -1 (ze z )=W(ze z ).

[0038] Since the photodiode PD includes a linear region and a logarithmic region, the photodiode PD can determine a formula for obtaining a signal current Isig corresponding to two inputs of V1 and V2 by applying a Lambert W function. The Lambert W function is a popular function included in built-in functions of, for example, EXCEL (registered trademark) of Microsoft Corporation of the United States, and can be used in appropriate cases.

[0039] A numerical table for calculating the optical signal Isig from the two inputs (signals V1 and V2) can be created by various experiments, simulations, and the like, which is one solution. Therefore, the optical signal can be obtained by referring to the two tables. It is also possible to register an approximate value and output the operation result.

[0040] Figure 2 It is shown Figure 1 1 is a timing diagram of the operation of the circuit shown in . When the selection transistor SEL in the pixel 12 in one row (one horizontal line) is turned on, the signal corresponding to the output of the photodiode PD in the column where the row is located is read out to the bit line 16 corresponding to the selection transistor SEL. The read signal is supplied to the ADC 20 and the signal is AD-converted by the ADC 20, and the signal V2 of the current frame of the pixel 12 in one line is output. The signal V2 is supplied to the frame memory 22 and the conversion function 24. A signal related to the incident light amount of the current frame (the signal of one line) is output from the conversion function 24. The image signal of one frame can be obtained by repeating this operation for each horizontal line in the cycle of one frame.

[0041] About the configuration of the comparison instance

[0042] Figure 3 is a diagram showing a configuration of a comparative example. In this comparative example, the image sensor includes a reset transistor RST and includes a peak hold circuit 30. The image sensor can output a noise signal (a signal for KTC noise) alone immediately after being reset by the reset transistor RST and output an optical signal corresponding to the accumulated charge of the photodiode PD.

[0043] The photodiode PD accumulates electric charge (in this case, electrons) according to light incident thereon. The cathode side of the photodiode PD is an output terminal. The anode side of the photodiode PD is connected to a power source (e.g., ground). It should be noted that in this embodiment, a field effect transistor (FET) is used as a transistor.

[0044] One end (drain) of the reset transistor RST is connected to the output end of the photodiode PD. The other end (source) of the reset transistor RST is connected to a power source (eg, ground) via a reset power source B. In this example, the reset transistor RST is an n-channel transistor.

[0045] The cathode of the photodiode PD is connected to the gate of the peak holding transistor PH. The peak holding transistor PH is a p-channel transistor. The source of the peak holding transistor PH is connected to the injection power supply. The source of the first switching transistor SWrst and the source of the second switching transistor SWsig are connected to the drain of the peak holding transistor PH. One end of the first capacitor Crst is connected to the drain of the first switching transistor SWrst. One end of the second capacitor Csig is connected to the drain of the second switching transistor SWsig. The other end of the first capacitor Crst and the other end of the second capacitor Csig are connected to the power supply (e.g., ground). The first switching transistor SWrst and the second switching transistor SWsig are p-channel transistors.

[0046] The source of the first switch transistor SWrst is connected to the gate of the first source follower transistor SF1. The drain of the first source follower transistor SF1 is connected to the power supply, and the source of the first source follower transistor SF1 is connected to the drain of the first selection transistor SEL1. The source of the first selection transistor SEL1 is connected to the first bit line 16-1.

[0047] The source of the second switch transistor SWsig is connected to the gate of the second source follower transistor SF2. The drain of the second source follower transistor SF2 is connected to the power supply, and the source of the second source follower transistor SF2 is connected to the drain of the second selection transistor SEL2. The source of the second selection transistor SEL2 is connected to the second bit line 16-2.

[0048] The gate of the first selection transistor SEL1 and the gate of the second selection transistor SEL2 are connected together. A row selection signal is supplied to the gate. The row selection signal changes to an H level, whereby a signal corresponding to the gate voltage of the first source follower transistor SF1 is output to the bit line 16-1, and a signal corresponding to the gate voltage of the second source follower transistor SF2 is output to the second bit line 16-2.

[0049] As explained above, such a pixel circuit includes two switching transistors SWrst and SWsig and two capacitors Crst and Csig. The first capacitor Crst accumulates kTC noise only immediately after reset. The second capacitor Csig accumulates the optical signal and kTC noise (S+N) in one frame period. The noise (N) is output from the first capacitor Crst to the first bit line 16-1. The optical signal + noise S+N is output from the second capacitor Csig to the second bit line 16-2. The two output signals are supplied to an external circuit. The kTC noise is removed from the output signal of the second capacitor Csig by subtracting the noise (N) from the optical signal + noise S+N according to (S+N)-N=S.

[0050] Here, in such a pixel circuit, the sensitivity in the linear region is determined by the charge-voltage conversion capacitance C and the noise N of the circuit connected to the photodiode PD.

[0051] The charge-to-voltage conversion capacitor C is Cpd+Crg+Cdg+Csg. The value of Crg causes a relatively large degradation in sensitivity. Figure 3 In the case of , the noise N of PD and subsequent components is mainly determined by Crst and Csig, and is √(kT / 2Crst) and √(kT / 2Csig), respectively.

[0052] These noises are thermal noises, determined by the inverse square root of the capacitance value and are approximately 1 / 5 of the kTC noise of the photodiode PD.

[0053] about Figure 1 and Figure 3 The noise in the circuit shown in

[0054] Here, a reset transistor that supplies a predetermined reset voltage to the output terminal of the photodiode PD and resets the accumulated charge of the photodiode PD is not provided in this embodiment. Therefore, the charge voltage conversion capacitance C at the output terminal of the photodiode PD can be reduced.

[0055] In an image sensor using a related art photodiode PD, a transfer gate is often provided at the output of the photodiode PD. Figure 1 In the configuration shown in , since the image sensor does not include a transfer gate, the charge-to-voltage conversion capacitance C is reduced to approximately 1 / 2.

[0056] As explained above, in this embodiment, it is possible to reduce the charge voltage conversion capacitance C. Therefore, the sensitivity of the pixel circuit can be increased to approximately 1.4 times to twice as compared with the related art.

[0057] Figure 3 The configuration shown in includes a peak holding transistor PH and capacitors Crst and Csig connected to the peak holding transistor PH. On the other hand, Figure 1 The circuits shown in do not include these circuits.

[0058] Therefore, in Figure 1In the circuit shown in , the noise is determined by the capacitor CL of the source follower transistor SF. The value of the noise is √(kT / CL). The capacitance of the capacitor CL can be designed to be ten to twenty times larger than the capacitance of the capacitors Crst and Csig connected to the PH circuit. This is because, although the capacitors Crst and Csig are formed in narrow pixels, the capacitor CL is a long wiring because the capacitor CL is common to all pixels arranged in the vertical direction. Since the noise is proportional to the inverse of the square root of the capacitance, the noise is suppressed to 0.3 to 0.22 times.

[0059] About the influence of signal V1

[0060] Figure 4 : is a diagram showing the relationship in the case where the signal current Isig corresponding to the signal V1 and the optical signal of the immediately preceding frame is given and the signal V2 of the current frame is calculated. The horizontal axis indicates the logarithm (Isig), and the vertical axis indicates V2. V2 in the case where V1 varies between 0V and 0.7V is shown.

[0061] exist Figure 4 In the figure, the left area with small signal current is the linear area. Figure 4 As shown in , the signal V2 of the current frame depends on the value of the signal V1 of the immediately preceding frame. This is because the charge is integrated in the linear region. On the other hand, in the logarithmic region where the signal current is large, the output of the photodiode PD corresponds to the amount of incident light at that point in time. Therefore, the signal V2 of the current frame does not depend on the signal V1 of the previous frame. Therefore, it is not necessary to use the conversion function 24.

[0062] Figure 5 is a graph showing S / N in a linear region when V1 = 0 V to -0.7 V. The horizontal axis indicates the logarithm (Isig), and the vertical axis indicates S / N.

[0063] For example, when V1 is 0V (i.e., there is no signal in the immediately preceding Fr), the S / N is approximately 10 dB better than when CDS is performed in the PH circuit of the related art. As V1 increases, the S / N deteriorates. Here, the S / N in the circuit of the comparative example is the second S / N from the bottom and indicates substantially the same S / N as V1 = -0.2V. In this embodiment, when the S / N is closer to 0 than V1 = -0.2V, the S / N is better in this embodiment. Specifically, it can be seen that the S / N is improved in the dark region where the signal current Isig is small.

[0064] Image sensor configuration

[0065] Figure 61 is a diagram showing an image sensor 100 in which pixels are arranged two-dimensionally in an embodiment. A pixel array 110 includes the above-mentioned pixels 12 in m columns*n rows (m*n), that is, m pixels in the horizontal direction and n pixels in the vertical direction. A vertical scanning circuit (vertical scan circuit, V-Scan) 112 sequentially selects rows of pixels P in the vertical direction. The pixels in the column are connected to an AD converter (ADC) 20 through a readout line in the vertical direction. A horizontal scanning circuit (horizontal scan circuit, H-scan) 114 is connected to the ADC 20. Image signals of the pixels are sequentially output from the horizontal scanning circuit (H-scan) 114.

[0066] Figure 7 is a timing chart showing the operation of the image sensor 100 .

[0067] In the (k-1)th row, the selection transistor SEL is turned on, and the signal obtained in one vertical period (one Fr) in the photodiode (PD) 10 is supplied to the ADC 20. Then, the exposure of the next 1Fr is started. The readout signal is supplied to the ADC 20, and the readout signal is converted into a digital signal V2 in the ADC 20. This operation is performed simultaneously on the m pixels of one horizontal line. Thereafter, the horizontal scanning circuit (H-scan) 216 sequentially supplies the digital signals of the m pixels to the frame memory 22 and the conversion function 24. The signal V2 of the immediately preceding frame is read out from the frame memory 22 and the signal V2 is supplied to the conversion function 24. The conversion function 24 calculates the signal current Isig based on the supplied signals V1 and V2 and outputs the signal current Isig. The conversion function 24 calculates the signal current Isig in the immediately preceding Fr based on the digital signal V2 and the signal V1 stored in the frame memory 22 using the conversion function. This signal processing is performed on the m pixels.

[0068] Then, the horizontal cycle is shifted by 1H and the same operation is performed on the k-th row. By repeating the operation n times, readout from all m*n pixels can be performed.

[0069] The two signals may also be output to the outside from the image sensor 100 , and the noise may be removed from the optical signal+noise using an external circuit.

[0070] Here, if Figure 5 As shown in , in the region where V1 is large, S / N deteriorates. One reason for the S / N deterioration is that when V1 increases, the current-voltage conversion coefficient (dV2 / dIsig) decreases.

[0071] Modified form 1

[0072] Figure 8 is a diagram showing the configuration of Modification 1. Fig. 9 is a timing chart showing the operation of Modification 1.

[0073] A negative pulse is applied to the drain voltage VD of the source follower transistor SF. The voltage of PD is modulated by the drain-gate capacitor (gate capacitor) Cgd of the source follower transistor SF. That is, a negative pulse for reducing the voltage is applied to the voltage VD for a predetermined application period tmod. The voltage VD is typically 2.8V, assuming that V1 is 0V to -0.7V, and the negative pulse is set to -0.2V.

[0074] Fig.10 and Fig.11 It is a diagram showing the relationship between the signal (output voltage) V2 and the signal current Isig. Fig.10 The relationship in the case where no negative pulse is applied is shown. Fig.11 The relationship in the case of applying a negative pulse is shown. In this example, one frame period (one Fr) = 33 ms, and the negative pulse application period tmod = 8 ms.

[0075] When a negative pulse is applied to the voltage VD as explained above, the negative pulse is applied to the output terminal of the photodiode PD via the capacitor Cgd of the source follower transistor SF. The voltage at the output terminal of the photodiode PD drops. Therefore, the photodiode PD is placed in a state similar to the state in which the accumulated charge of the photodiode PD is large.

[0076] Therefore, if Fig.11 As shown in , the influence of V1 is reduced in the region where V1 is greater than 0.2 V. The gradient of V2 on Isig is improved.

[0077] Fig.12 dVout / dIsig at V1 = 0 V and V1 = -0.7 V is shown in the case of changing the negative pulse application period tmod. When tmod is set to be long, dVout / dIsig at V1 = 0 V deteriorates.

[0078] Therefore, it has been found that when the time of one frame is 33 ms, tmod is approximately 3 ms to 8 ms. That is, it is desirable to set tmod to a period shorter than half of one frame.

[0079] Modified form 2

[0080] Fig.13is a diagram showing the configuration of Modification 2. In Modification 1, the gate capacitor of the source follower transistor SF is used. In Modification 2, the capacitor Cc is connected to the output terminal of the photodiode PD. A negative pulse is applied to the output point of the photodiode PD via the capacitor Cc. Also in this case, it is desirable to apply the negative pulse in a period shorter than half the period of one frame.

[0081] Also in the case of using such a configuration, the same effects as those in Modification 1 are obtained.

Claims

1. An image sensor comprising a plurality of pixels, the image sensor comprising: a photodiode configured to operate in one of a linear mode for responding linearly to an amount of light incident thereon and a photovoltaic mode for responding logarithmically to the amount of light incident thereon; a source follower circuit configured to output a signal voltage according to a signal charge generated based on an output of the photodiode; an analog-to-digital converter configured to convert the signal voltage output from the source follower circuit into digital signal data; a frame memory configured to store signal data of one frame; as well as The signal converter is configured to generate an optical signal related to the incident light amount according to the signal data of the current frame and the signal data of the previous frame. 2 . The image sensor according to claim 1 , wherein the signal converter generates the optical signal according to the signal data of the current frame and the signal data of the previous frame using a Lambertian W function. 3 . The image sensor according to claim 1 , wherein the signal converter comprises a value table for obtaining the optical signal according to the signal data of the current frame and the signal data of the previous frame.

4. The image sensor according to claim 1, wherein The source follower circuit also includes a source follower transistor having a gate connected to the output of the photodiode, and A negative pulse having a period shorter than a half period of one frame is applied to the photodiode via a gate capacitor of the source follower transistor.

5. The image sensor of claim 1 , further comprising a capacitor connected to the photodiode, wherein A negative pulse having a period shorter than a half period of one frame is applied to the photodiode via the capacitor.

6. An image sensor, comprising: A pixel array comprises a plurality of pixels arranged in a matrix, Each of the plurality of pixels comprises: a photodiode configured to operate in one of a linear mode for responding linearly to an amount of light incident thereon and a photovoltaic mode for responding logarithmically to the amount of light incident thereon; and a source follower circuit configured to output a signal voltage according to a signal charge generated based on an output of the photodiode; a vertical scanning circuit configured to sequentially drive the plurality of pixels while moving in a vertical direction; an analog-to-digital converter configured to convert the signal voltage output from the source follower circuit into digital signal data; a frame memory configured to store signal data of one frame; a signal converter configured to generate an optical signal related to the incident light amount according to signal data of a current frame and signal data of a previous frame; and The horizontal scanning circuit is configured to sequentially output the optical signals of the pixels in one row among the plurality of pixels.

7. The image sensor according to claim 6, wherein The source follower circuit further includes a source follower transistor, the output of the photodiode being connected to a gate of the source follower transistor, and A negative pulse having a period shorter than a half period of one frame is applied to the photodiode via a gate capacitor of the source follower transistor.

8. The image sensor of claim 6, further comprising a capacitor connected to the photodiode, wherein A negative pulse having a period shorter than a half period of one frame is applied to the photodiode via the capacitor.

9. An optical signal generating method for generating an optical signal related to an amount of light incident on a photodiode, the photodiode operating in one of a linear mode for responding to the amount of light incident in a linear manner and a photovoltaic mode for responding to the amount of light incident in a logarithmic manner, The optical signal generating method comprises: extracting the output of the photodiode frame by frame without resetting the accumulated charge of the photodiode; as well as Using a pre-provided signal converter, an optical signal related to the light incident amount in the current frame is generated based on the signal of the current frame related to the output of the photodiode in the current frame and the signal of the previous frame related to the output of the photodiode in the immediately preceding frame. 10 . The optical signal generating method according to claim 9 , wherein the signal converter generates the optical signal according to the signal of the current frame and the signal of the previous frame using a Lambertian W function. 11 . The optical signal generating method according to claim 9 , wherein the signal converter generates the optical signal according to the signal of the current frame and the signal of the previous frame using a value table.

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