Method and apparatus for converting representations of values in different systems

Abstract

The embodiment of the invention provides a method and equipment for converting representation of a value between an RNS and a CRNS. The method and the device can be used for any product applying the RNS. The present application proposes a compact RNS (referred to as CRNS) and creates a bijection between an RNS representation and a CRNS representation. Bijection is mapped between an (n + 1)-bit RNS representation and an n-bit RNS representation by using a logic function. The bijection only maps 2n values corresponding to the n-bit BNS value in the dynamic range [0, 2n-1]. The proposed CRNS and bijection only enable n bits to represent all 2n BNS values of an n-bit BNS, which can reduce storage consumption and power consumption.

Description

Technical Field

[0001] Embodiments of the present invention relate to the field of residual number systems (RNS), and more particularly, to a method and apparatus for converting representations of values ​​in different systems. Background Art

[0002] A residual number system (RNS) is a number system that can obtain a set of remainders of a value by performing a remainder operation on a set of moduli. The dynamic range [0; M–1] is the number of values ​​that have a unique representation in RNS. M is the product of all moduli of RNS. There is no weight and propagation between channels corresponding to each remainder. Using RNS, operations on values ​​with long bit widths can be converted to operations on a set of remainders of values ​​with shorter bit widths. Compared with the bit binary number system (BNS), the hardware resources and delay required for a single operation are smaller, which improves the parallelism of operations. In addition, hardware resources can be saved. Due to these characteristics, RNS has been widely used after several years of development.

[0003] As is known, the representation of values ​​in BNS is different from that in RNS, and the representation in RNS is related to the modulus of RNS. Considering n-bit BNS, the dynamic range of BNS is 2 n , that is, n-bit BNS can represent a total of 2 n values, that is, values ​​[0; 2 n –1]. At least n+1 bits of RNS are required to represent a dynamic range of 2 n This difference between the representation of values ​​in BNS and that in RNS brings many disadvantages to the application of RNS. For example, the conversion between BNS representation and RNS representation will cause excessive storage overhead and memory bandwidth overhead. Summary of the invention

[0004] An embodiment of the present application provides a method for converting value representations in different systems, which can reduce storage consumption and memory bandwidth.

[0005] According to a first aspect, there is provided a method for converting representations of values ​​in different systems, comprising:

[0006] Receiving a first representation of a first value, wherein the first representation is a representation of the first value in a residual number system (RNS), and the first representation comprises n+1 bits;

[0007] converting the first representation into a second representation according to the truncated bits, wherein the second representation is a representation of the first value in a compact residual number system (CRNS), and the second representation comprises n bits,

[0008] The truncated bit is any one of the n+1 bits, if the truncated bit in the n+1 bits is equal to zero, then the second representation is a copy of the remaining bits of the n+1 bits contained in the first representation except the truncated bit, if the truncated bit in the n+1 bits is equal to 1, then the second representation is a copy of the re-encoded remaining n bits of the n+1 bits contained in the first representation except the truncated bit;

[0009] Among them, the first value is 2 n One of the values, the 2 n The value can be represented by n-bit BNS. n The value range is [0; 2 n –1], where n is an integer.

[0010] According to the present application, a compact RNS (referred to as CRNS in the present application) is proposed, and n+1-bit RNS representation and n-bit CRNS representation can be converted to each other. By storing n-bit CRNS representation, the storage consumption is reduced compared with storing n+1-bit RNS representation.

[0011] In addition, the inconvenience of conversion between n+1-bit RNS representation and n-bit BNS value can be solved, and power consumption can be reduced.

[0012] According to a second aspect, there is provided a method for converting representations of values ​​in different systems, comprising:

[0013] receiving a second representation of a first value, wherein the second representation is a representation of the first value in a compact residual number system (CRNS), the second representation comprising n bits;

[0014] determining whether the second representation is the same in the CRNS and the RNS;

[0015] Convert the second representation into a first representation, wherein the first representation is a representation of the first value in the RNS, and the first representation includes n+1 bits;

[0016] wherein, if the second representation is the same in the CRNS and the RNS, the first representation is a copy of the n bits of the second representation and the truncated bits with zeros added, and if the second representation is different in the CRNS and the RNS, the first representation is a copy of the re-encoded n bits of the second representation and the truncated bits with 1s added;

[0017] Among them, the first value is 2 n One of the values, the 2 n The value can be represented by n-bit BNS. n The value range is [0; 2 n –1], where n is an integer.

[0018] The technical effects of the method of the second aspect can refer to the technical effects of the first aspect and will not be repeated here.

[0019] In one embodiment of the first aspect or the second aspect, the 2 n The value corresponds to 2 in the RNS n The first representation is that n The value corresponds to 2 in the CRNS n The second means that the 2 n The first representation and the 2 n The second representation is a bijective mapping relationship.

[0020] According to this embodiment, a bijection is created between the RNS representation and the CRNS representation. Specifically, the bijection maps between the (n+1)-bit RNS representation and the n-bit CRNS representation by using a logical function. The bijection only maps to the range [0,2 n –1] corresponds to the 2 n Values ​​greater than or equal to 2 are ignored n The BNS values ​​of n bits are not used and are not needed. The bijection can only use n bits to represent all 2 n Storing the n-bit CRNS representation reduces storage consumption compared to storing the (n+1)-bit RNS representation of the value.

[0021] Considering n-bit BNS, the dynamic range of BNS is 2 n This application has proven that the dynamic range is [0; 2 n-1] always requires at least n+1 bits for the RNS representation of the BNS value. The conversion between the n-bit BNS representation and the (n+1)-bit RNS representation will result in memory storage consumption. For example, an 8-bit BNS representation becomes a 9-bit RNS representation, which actually occupies 2pcs of the 8-bit position in the memory. More memory space is required to store the RNS representation rather than the BNS representation. The solution proposed in this application can use the n-bit CRNS representation to map the n-bit BNS representation, thereby reducing memory consumption.

[0022] In one embodiment of the first aspect or the second aspect, the 2 n The first representation includes f first representations of the first type and (2 n f) a first representation, the truncated bits of the first representation of the first type being equal to 1 and the truncated bits of the first representation of the second type being equal to zero;

[0023] wherein the f first representations of the first type correspond to f second representations, each of the f second representations being a re-encoded copy of the remaining n bits of the corresponding first representation of the first type except for the truncated bits;

[0024] Wherein, the second type of (2 n –f) first representation corresponds to (2 n –f) second representation, and the (2 n - each of the f) second representations is a copy of the remaining n bits of the corresponding first representation of the second type except for the truncated bits.

[0025] In an embodiment of the first aspect or the second aspect, the bijective mapping relationship between the f first representations and the f second representations of the first type is adjustable.

[0026] According to this embodiment, the actual CRNS value is not important. The only important thing is that the mapping is a bijection. For logic optimization, only the re-encoded RNS representation is arranged, and the "copied" RNS representation is not arranged. In this way, the hardware complexity of the conversion between RNS and CRNS is reduced.

[0027] In an embodiment of the first aspect or the second aspect, the n+1 bits of the first representation include k parts, the k parts are residuals corresponding to k moduli of the RNS, and the k parts are arranged in one of the following orders:

[0028] Arrange in ascending order according to the corresponding values ​​of k moduli;

[0029] Arrange in descending order according to the corresponding values ​​of the k moduli; or

[0030] Arranged in random order.

[0031] In an embodiment of the first aspect or the second aspect, n+1 bits in the k parts are interleaved, and the truncated bit is one bit in the interleaved n+1 bits.

[0032] In one embodiment of the first aspect or the second aspect, the k parts include a first part, wherein the first part includes p i bits, the truncated bits are the p i Any one of the bits, m i is a modulus among the k moduli corresponding to the first part, the first part is any one of the k parts, 1≤i≤k, i and k are integers.

[0033] In an embodiment of the first aspect or the second aspect, the truncated bit is the p i The most significant bit (MSB) in a bit.

[0034] According to this embodiment, the MSB of the truncated modulus is used as the truncation bit, which usually results in RNS j = 1, that is, the number of RNS representations that need to be re-encoded is reduced, thereby reducing storage area, power consumption and conversion delay.

[0035] In one embodiment of the first aspect or the second aspect, wherein m i For the form 1≤i≤k, i is an integer, q i is an integer. Note that for a specific m i ,q i may not exist, since not every modulus may have That is, for the m modulus of the modulus set, only for modulus of the form, there exists q i For example, if the modulus set is {m1,m2} = {5 10 ,13 10}, then the modulus m1 is in the form of, specifically, q1 is equal to 2. For modulus m2, q2 does not exist.

[0036] According to this embodiment, the use form The truncated modulus and the modulus m iThe MSB of the modulus is used as the truncated bit, resulting in fewer RNS representations that need to be re-encoded, thereby reducing storage area, power consumption and conversion delay. Compared with using the MSB of the truncated modulus as the truncated bit, this embodiment results in fewer re-encoded RNS representations and further reduces storage area, power consumption and conversion delay.

[0037] In one embodiment of the first aspect or the second aspect, m i is the modulus having the maximum value among the k moduli.

[0038] According to this embodiment, the form of the highest value modulus in the modulus set is used. The MSB of the truncated modulus results in the fewest possible re-encoded values ​​in the bijection, and advantages such as storage area, power consumption, conversion delay, etc. are maximized.

[0039] According to a third aspect, a chip (or chip system) is provided. The chip has the function of implementing the method in the first aspect or the second aspect and any embodiment of the first aspect or the second aspect. The function can be implemented by using a hardware structure. Alternatively, the chip or chip system includes an interface and multiple circuits.

[0040] According to a fourth aspect, a device is provided, comprising the chip or chip system of the third aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] One or more embodiments are described exemplarily by corresponding drawings, and these exemplary descriptions and drawings do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings are shown as similar elements, and the drawings are not limited to scale. In the drawings:

[0042] Figure 1 is a schematic diagram of a method for converting a first representation of a value into a second representation;

[0043] Figure 2 is an example of multiple re-encoded RNS values ​​in 8-bit CRNS;

[0044] Figure 3 An example of a trend graph of f for n=8 is shown;

[0045] Figure 4 is a schematic diagram of a method for converting a second representation of a value into a first representation;

[0046] Figure 5 is a schematic diagram of an embodiment of converting from RNS to CRNS;

[0047] Figure 6 is a schematic diagram of an embodiment of converting from RNS to CRNS;

[0048] Figure 7 is a schematic diagram of an embodiment of converting from CRNS to RNS;

[0049] Figure 8 is a schematic diagram of an embodiment of converting from CRNS to RNS;

[0050] Fig. 9 is a schematic diagram of an embodiment of converting from CRNS to RNS;

[0051] Fig.10 is a schematic diagram of an embodiment of converting from CRNS to RNS;

[0052] Fig.11 It is a schematic block diagram of a chip or a chip system according to an embodiment of the present application. DETAILED DESCRIPTION

[0053] In order to understand the features and technical contents of the embodiments of the present invention in detail, the implementation of the embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings, which are only used for reference and illustration purposes and are not used to limit the embodiments of the present invention. In the following technical description, for ease of explanation, many details are described to provide a thorough understanding of the disclosed embodiments. However, one or more embodiments may be practiced without these details. In other cases, in order to simplify the drawings, known structures and devices may be simplified.

[0054] In order to better understand the technical solution proposed in this application, relevant technologies and concepts are first introduced.

[0055] 1. Residue Number System (RNS)

[0056] RNS consists of a set of k integers {m1,m2,…,m k Any two integers in the modulus set must be pairwise relatively prime, that is, GCD(m i ,m j )=1,i,j∈[1,k],i≠j. Let M be all The product of , then an integer x in the range [0, M-1] is represented in RNS by a set of remainders x under its Euclidean division by the modulus set → {x1, x2, …, x k} uniquely represents; that is, for each i, r i ≡x mod m i and 0≤r i <m i .

[0057] According to the Chinese Remainder Theorem (CRT), x can be reconstructed from RNS as:

[0058]

[0059] RNS has many advantages, such as independent (parallel) addition, subtraction, and multiplication operations between corresponding remainders:

[0060]

[0061] The lack of carry propagation is a major interesting aspect of RNS, as it reduces complexity, reduces power consumption, and speeds up computation compared to the usual binary number system (BNS) representation of bits.

[0062] RNS also has limitations. For example, non-modular operations (comparison, scaling, etc.) are usually complex in RNS, conversion between positioning and modular representation is slow, and overflow detection is difficult.

[0063] In this application, and in the rest of the document, the difference is understood and distinguished between the modulus m i and modulus m i The residual r i It is very important that where x is the BNS value represented.

[0064] Furthermore, it is important to distinguish between "representation" and "value". In BNS, the representation of a value x is the binary representation of x. The value x is the same in RNS and BNS, but the representation of the value x is different in RNS and BNS.

[0065] For example, the integer 99 10 In BNS it has the representation 11000112. In RNS, the representation of the value x depends on the modulus set of RNS.

[0066] For example, for RNS, when M=105 10 The given modulus set m = {3 10 ,5 10 ,7 10}, the value is 99 10 Under the modulus set, we get the representation r={0,4 10 ,1 10 For the RNS, the binary form of the residual becomes {002,1002,0012}.

[0067] From the above example, we can see that the residual r1=0 10 =002 occupies 2 bits, r2=4 10 =1002 occupies 3 bits, r3=1 10 = 0012 occupies 3 bits. A total of 210 +3 10 +3 10 =8 10 The residuals (i.e., r1, r2, and r3) are encoded into an 8-bit "RNS word" as shown in Table 1 below.

[0068] Table 1

[0069] RNS Bits 7 6 5 4 3 2 1 0 Residual Bits <![CDATA[r 3.2 ]]> <![CDATA[r 3.1 ]]> <![CDATA[r 3.0 ]]> <![CDATA[r 2.2 ]]> <![CDATA[r 2.1 ]]> <![CDATA[r 2.0 ]]> <![CDATA[r 1.1 ]]> <![CDATA[r 1.0 ]]> <![CDATA["99 10 "]]> 0 0 1 1 0 0 0 0

[0070] In Table 1, “r 3.2 " means "r3, bit 2", "r 2.1 ” means “r2, bit 1”, and so on.

[0071] According to Table 1, if we take the MSB of the RNS word as corresponding to the maximum modulus m k The residuals are arranged in the manner of the MSB of the residuals (in this example, m3), then the modulus set {3 10 ,5 10 ,7 10}The value "99 10 The RNS representation of " becomes "001100002", the LSB of the RNS word is the LSB of the residual corresponding to the minimum modulus m1, and the residual is in m k Sort between m1.

[0072] Consider a BNS with n bits. The dynamic range of BNS is 2 n , it can be shown that the RNS representation of an n-bit BNS always requires at least n+1 bits (the combined bit width of all residuals under the modulus set) to represent 2 n The full dynamic range of values.

[0073] As we all know, at least n bits are needed to represent 2 n Values ​​[0; 2 n –1]. Therefore, 2 is represented in n bits. n The only way to have multiple RNS values ​​is M=2 n Because if M>2 n , more than n bits are needed to represent M. If M = 2 n , then all factors of M must also be powers of 2. If all factors of M are powers of 2, then these factors themselves have 2 as a divisor, so these factors are not coprime. If these factors are not coprime, then these factors are not a modulus set. If at least n bits are required to represent the RNS representation, and it cannot be represented in n bits, then the RNS representation must have at least n+1 bits. For an 8-bit BNS value, the RNS representation will have at least 9 bits, for a 16-bit BNS value, the RNS representation will have at least 17 bits, and so on.

[0074] This is inconvenient because the extra bits cause additional data conversion between the main memory and the arithmetic logic unit (ALU), resulting in a bandwidth bottleneck while reducing performance and increasing energy consumption. In addition, more space is required to store RNS values ​​than BNS values. For example, an 8-bit BNS value becomes a 9-bit RNS value, so the value occupies 2 pcs 8-bit positions in the memory or register group. It is also inconvenient to convert BNS constants such as FIR filter coefficients and neural network weights every time they are used, because this conversion requires energy.

[0075] 2. Huffman Compression

[0076] Huffman compression relies on a non-uniform distribution of the values ​​used, so that frequently used values ​​are encoded with "small" codes and less frequently used values ​​are encoded with "larger" codes. The least frequently used codes are larger than the original value, so these codes are called "prefix codes".

[0077] Currently, there is some research on the application of Huffman compression in RNS, for example, Huffman compression of RNS residuals; the Huffman encoding of the entire RNS value (specifically, the RNS value) is regarded as a data set to be compressed by Huffman coding, and each residual value in the RNS residual values ​​used will be assigned a Huffman "code".

[0078] However, RNS values ​​have high entropy, and Huffman compression works very poorly on RNS values. Some RNS values ​​will be encoded as Huffman codes that are larger than the original RNS value, and not all encoded values ​​have the same size.

[0079] Example: The sentence "This is an example of a Huffman tree" contains 36 characters with 16 different values ​​(including the characters SPACE or "").

[0080] Since there are only 16 different values, we can use 4 bits to encode the character.

[0081] Table 2

[0082] character 4-bit code Appear Huffman Code character 4-bit code Appear Huffman Code SPACE 0000 7 111 S 1000 2 1011 A 0001 4 010 T 1001 2 0110 E 0010 4 000 L 1010 1 11001 F 0011 3 1101 O 1011 1 00110 H 0100 2 1010 P 1100 1 10011 I 0101 2 1000 R 1101 1 11000 M 0110 2 0111 U 1110 1 00111 N 0111 2 0010 X 1111 1 10010

[0083] Table 2 above shows the characters, 4-bit codes, number of occurrences in the sentence, and the generated Huffman codes. The most common letters (SPACE, A, E) all have 3-bit codes, while the least common letters have 5-bit codes. The 5-bit codes are larger than the "direct" 4-bit codes, which can be used to directly encode data values. It can also be noted that 8 combinations (codes) can be formed by 3 bits, but Huffman coding only uses 3 combinations, 16 combinations can be formed by 4 bits, but only 7 combinations are used, and so on. This is due to the "prefix code" requirement of Huffman codes.

[0084] The value distribution of the above-encoded sentence is not uniform. The direct encoding as 4-bit values consumes 36 * 4 = 144 bits. Huffman coding only consumes 135 bits. The bit consumption is reduced by approximately 6%.

[0085] Consider a string with a uniform distribution of values, where each of the 16 characters appears 2 times, for example, "AEFFXUXMNMHIST RORPLSTOPUNLHEIA". There are a total of 2 * 16 = 32 characters. Such a string requires 32 * 4 = 128 bits for direct encoding, while Huffman coding requires 134 bits. The bit consumption increases by more than 5%.

[0086] As is well known, Huffman coding requires non-uniform distribution of data in order to be less than the source data. The Huffman agenda is to compress natural language text. The letter distribution in most Western languages in natural language is not uniform, which makes Huffman compression feasible. It cannot be assumed that general data has such properties.

[0087] Typically, m i is much smaller than M, that is, m i << M, so, r i The sequence of values repeats itself within the range [0: M – 1] of the RNS times, where, m i is one of the moduli in the modulus set of the RNS, and 0 ≤ r i < m i . The values [0; m i -1] will be approximately uniformly represented in r i , and the frequency of the values is zero, where,

[0088] Even a non-uniform distribution of the values used in the RNS will result in the residuals r i under m i being approximately uniformly distributed for all m i in the modulus of the RNS, 0 ≤ r i < m i , where, m i< <M。

[0089] An example is given here.

[0090] Consider the modulus {m1,m2} = {11 10 ,13 10}, M = m1 × m2 = 143 10 Consider a data set with BNS values ​​[0; 10 10 ] Each appears 10 10 times, BNS value [11 10 ; 100 10 ] Each appears 5 10 times, BNS value [101 10 ; 142 10 ] each appears once. Such a dataset is highly non-uniform and BNS will compress it well using Huffman compression. However, the values ​​of the residuals r1 and r2 appear close to an ideal uniform distribution. In the case of r1, the values ​​0 and 1 appear 58 times each. 10 times, all other values ​​appear 54 times 10 times. In the case of r2, the value [0; 9 10 ] Each appears 48 10 times, and the other values ​​appear 44 times. 10 , 39 10 and 39 10 times. Using Huffman coding, the residual is not compressed into a smaller result.

[0091] It has been found that Huffman compression for encoding the residual is not useful for RNS values. In addition, if the range [0; 2 n –1], then Huffman compression will not hold because some codes will be larger than the RNS word. Dynamic Huffman compression will be very expensive (time, area, energy, etc.), so static Huffman coding must be used. This shows that when designing a chip, the statistical distribution of the values ​​of the data being processed must be known. This is not the case for general-purpose computing. Therefore, this approach is useless in general-purpose computing.

[0092] According to the above state, the representation of an n-bit BNS value in RNS requires at least n+1 bits, which leads to memory bandwidth issues and increases storage usage for the reasons mentioned above. Repeated conversion of values ​​(e.g., software constants) from BNS to RNS requires a lot of energy and reduces computation speed.

[0093] Additionally, storing intermediate values ​​from the RNS requires:

[0094] Storing in 9-bit RNS format (actually 2×8 bits), which will lead to increased power consumption, memory bandwidth issues and high usage of intermediate storage areas;

[0095] The reverse conversion from RNS to BNS, stored as 8 bits, and the forward conversion from BNS to RNS when re-reading the intermediate value will result in increased power consumption and potential latency.

[0096] In view of this, the present application proposes a compact residual number system (CRNS) and a method for converting value representations between RNS and CRNS. The CRNS representation is an alternative representation based on any normal RNS representation. CRNS only uses n bits to represent all 2 n values of an n-bit BNS.

[0097] The RNS value representing the BNS value x, where 2 n ≤x<M, cannot be represented by CRNS, but in the present application, these RNS values are not used and are not required.

[0098] The mapping between the RNS representation and the CRNS representation proposed in the present application is effective in terms of area and energy, and is more effective than the conventional forward conversion from BNS to RNS and the reverse conversion based on the Chinese Remainder Theorem (CRT) or the Mixed-Radix System (MRS).

[0099] The mapping is based on a bijective function between the RNS representation and the CRNS representation. The present application also proposes a method for optimizing the bijective function in order to reduce the area, power consumption, and latency of the conversion logic.

[0100] The present application can be applied to computing elements, such as a central processing unit (CPU), an arithmetic logic unit (ALU), a graphical processing unit (GPU), and a neural network (NN) acceleration unit. Generally, the solution proposed in the present application can be used for any product that applies RNS.

[0101] "Edge AI" seems to be a big trend already and will become even bigger in the near future. Here, the inference processing usually takes place in mobile devices, such as mobile phones, cameras, wearable devices and embedded devices. This shows that the use of RNS technology is beneficial, and therefore, the concept of compact RNS (CRNS) is also beneficial. Therefore, the CRNS of the present application is a number system that can use fewer bits to represent BNS values ​​compared to RNS. Specifically, CRNS can use n bits to represent the value of an n-bit BNS, where the value is in [0; 2 n –1], where n is an integer.

[0102] The solution proposed in this application is described in more detail below.

[0103] Figure 1 A method (200) for converting a first representation of a value into a second representation is shown in FIG.

[0104] Step 210: Receive a first representation of a first value, where the first representation is a representation of the first value in the RNS, and the first representation includes n+1 bits.

[0105] Step 220: Convert the first representation into a second representation according to the truncated bits, wherein the second representation is a representation of the first value in CRNS, and the second representation contains n bits.

[0106] The truncated bit is predetermined and may be any one of the n+1 bits of the first representation.

[0107] The first value is 2 which can be represented by n-bit BNS. n One of the values, 2 n The value range is [0; 2 n –1], where n is an integer greater than or equal to 1.

[0108] In step 220, when the truncated bit is equal to zero, the second representation is identical to the remaining n bits of the first representation except the truncated bit, and when the truncated bit is equal to 1, the second representation is identical to the re-encoded remaining n bits of the first representation except the truncated bit.

[0109] In other words, if the truncated bit is equal to zero, the second representation is a copy of the remaining n bits of the first representation except the truncated bit, and if the truncated bit is equal to 1, the second representation is a re-encoded copy of the remaining n bits of the first representation except the truncated bit.

[0110] In this application, 2 n The value corresponds to 2 in RNS n The first representation, 2n value corresponds to 2 in CRNS n second representation, 2 n first representation and 2 n the first and second representations have a bijective mapping relationship. In other words, 2 n any one of the values corresponds to the first representation in RNS and the second representation in CRNS.

[0111] Method 200 is a general description of performing a mapping from RNS representation to CRNS representation. It should be understood that the mapping from CRNS representation to RNS representation should also be included in this application. Examples of the mapping between CRNS and RNS will be specifically introduced later in the document.

[0112] Alternatively, "first representation" can also be replaced by "RNS representation", and "second representation" can also be replaced by "CRNS representation", without limitation in this application.

[0113] It should be understood that an n-bit BNS can represent 2 n unique values x, where 0 ≤ x < 2 n . Considering an (n + 1)-bit RNS with a dynamic range M, where 2 n ≤ M < 2 n+1 , the RNS can represent the value x, where 0 ≤ x < M, i.e., [0; M – 1]. In this application, a bijective mapping between (n + 1)-bit RNS representation and n-bit CRNS representation is proposed. A bijective is a static two-way one-to-one mapping function. The bijective only maps 2 n RNS values (including zero), which correspond to n-bit BNS values in the range of 0 ≤ x < 2 n . In this application, the RNS values corresponding to BNS values greater than or equal to 2 n are ignored, and any output result can be generated from the bijective mapping function, including but not limited to zero, constant value, random value, or any other value.

[0114] Table 3 shows examples of mapping from BNS to RNS and from RNS back to BNS.

[0115] Table 3

[0116]

[0117]

[0118] In Table 3, the modulus set is {3, 7}, m1 = 3, m2 = 7, m1 × m2 = 21, n = 4, 2 n=16. Columns A and B show the mapping from BNS to RNS, with some RNS values ​​having MSB=1, as shown in bold in column B. Columns C to F show the mapping from RNS back to BNS. The values ​​marked "unused" in columns D and F correspond to r1=3 or r2=7, where r1 is the residual under modulus m1 and r2 is the residual under modulus m2. "Unused" values ​​cannot occur because m1=3 means 0≤r1<3, and m2=7 means 0≤r2<7. The case where r2=7 represents binary combinations of RNS words that are not valid RNS values ​​and therefore not valid BNS values. This application is not concerned with these cases. The values ​​marked "BNS=16" correspond to BNS=16. This BNS value is in the value range [0;2 n –1]. The values ​​labeled BNS=17, 18, 19, or 20 are similar. These RNS values ​​are not used because they represent BNS values ​​that cannot be represented in an n-bit BNS.

[0119] As mentioned above, the bijective mapping 2 n The representation of RNS values ​​corresponds to 0≤x<2 in CRNS. n to 2 n n-bit BNS values ​​within the range.

[0120] The n-bit second representation is created by truncating a certain RNS bit of the RNS word (i.e., bit n+1 of the first representation) from the remaining n bits. In this application, the "truncated bit" is referred to as bit RNS j In other words, a certain RNS bit is selected from the first representation as the "truncated bit". n When any of the values ​​is converted from the first representation in RNS to the second representation in CRNS, if the bit RNS j (i.e. truncated bit) is equal to "0", then the second representation is the first representation minus the bit RNS j The remaining n bits of the second representation are the same as the first representation except for the bit RNS j If the remaining n bits are the same, then RNS j is equal to "1", the second representation is through the bit RNS j The remaining n bits of the RNS word except for the RNS word are re-encoded. j The remaining n bits of the RNS word except for the CRNS word are re-encoded into different, unused CRNS values, i.e., not used by the RNS bits. j =The CRNS value occupied by the RNS value of 0.

[0121] It can be shown that RNS j= 1 corresponds exactly to the number of "unused" CRNS values. The "used" CRNS values ​​correspond to the RNS j =RNS value of 0.

[0122] This application has proven to have 2 n Values ​​[0; 2 n –1] results in an n-bit BNS with (n+1) bits of RNS. n The h0 value of each value has RNS j =0, then h1=2 n –h0 value has RNS j =1. Then, the n-bit CRNS also indicates 2 n possible values. When the c0 CRNS value is mapped directly from the RNS, then c0 = h0. Then, c1 = 2 n –c0 value is reserved for use with RNS j =1. Therefore the number of "unused" positions within the CRNS will always correspond to the number of RNS j = the number of RNS values ​​of 1. In the present application, "remapping" is equivalent to "reencoding", so "remapped value" also means "reencoded value".

[0123] n-bit BNS can represent 2 n Value, 2 n The value corresponds to 2 in RNS n The first representation corresponds to 2 in CRNS n The second representation, 2 n The first representation and 2 n The second representation is a bijective mapping relationship.

[0124] 2 n The first representation includes f first representations of the first type and (2 n –f) first representations, the truncated bits of the first representation of the first type are equal to 1, and the truncated bits of the first representation of the second type are equal to zero.

[0125] If we consider m i A sequence of integers [0; m i –1], then the number of elements with MSB = 1 is h1, and h1 can be The number sequence is in the range [0; 2 n -1] is repeated times. Unless m i is a power of 2, otherwise the number It will not be an integer. Therefore, some values ​​may be close to M which also have MSB=1, but not the full amount of h1 above.

[0126] Let f be the number of values ​​to be remapped, that is, the number of RNS values, where RNS j = 1. Any m i The general formula for f is shown below. It is noteworthy that f depends neither on the other modulus nor on M, but only on n and m. i , where n is the number of bits represented in CRNS and BNS, and m i is the modulus to be truncated, p i is in m i The following represents r i The number of bits required (i.e. ).

[0127]

[0128] Example: Let the modulus set m = {m1,m2} = {5 10 ,13 10}, M = m1 × m2 = 65 10 , n=6, p1=3, p2=4, the 7-bit modulus set m has 65 values, which can represent the value range of 6-bit BNS [0; 63].

[0129] Look at the values ​​close to the useful range [0; 2 n –1]=[0;63] at the end of the value of x, r1, r2.

[0130] Table 4

[0131] x <![CDATA[r1=|x|5]]> <![CDATA[r2=|x| 13 ]]> <![CDATA[55 10 ]]> 000 0011 <![CDATA[56 10 ]]> 001 0100 <![CDATA[57 10 ]]> 010 0101 <![CDATA[58 10 ]]> 011 0110 <![CDATA[59 10 ]]> 100 0111 <![CDATA[60 10 ]]> 000 1000 <![CDATA[61 10 ]]> 001 1001 <![CDATA[62 10 ]]> 010 1010 <![CDATA[63 10 ]]> 011 1011 <![CDATA[2 n =64 10 ]]> 100 1100 <![CDATA[M=65 10 ]]> 000 0000

[0132] For example, we first assume that m1=5 is the truncated modulus and r1 is also called the truncated residual.

[0133] The last repetition of the sequence corresponding to m1 (which we call the "m1 sequence" in the text below) has only 4 out of 5 values, all of which have MSB=0. holds. So we have the upper part of the equation for f above.

[0134] is the number of complete repetitions of the m1 sequence. is the number of occurrences of MSB=1 in each repetition. The final repetition of the m1 sequence will not result in MSB=1 in r1, so f=12×1=12.

[0135] Now consider that m2 is a truncated modulus. The last repetition of the sequence corresponding to m2 (which we call "m2 sequence" in the following text) has only 12 values ​​out of 13, of which 4 have MSB=1.

[0136] is the number of complete repetitions of the m2 sequence. Therefore, in the first 4 repetitions of the m2 sequence, the number of occurrences of MSB=1 is 4×5=20. The last repetition of the m2 sequence reaches 2 n = 64, with the first of the 13 values ​​in the m2 sequence indivual.

[0137] p2 (p2 = 4) bits are needed to represent r2, so the first 8 of these 12 values ​​are With MSB = 0. The last The values ​​have MSB=1, therefore, f=4×5+4=24.

[0138] In addition, there are two special cases f:

[0139] For the form The modulus m i :

[0140] (minimum value f as a fraction of the number of BNS values);

[0141] For the form The modulus m i :

[0142] (maximum value f as a fraction of the number of BNS values).

[0143] exist Figure 2 The graph shows that n = 8 and m i The 23 smallest values ​​of f ≤ 128. The modulus of Figure 2 Marked in black. Figure 2 Examples of multiple re-encoded RNS values ​​f in 8-bit CRNS with corresponding 9-bit RNS and 9-bit BNS are shown.

[0144] according to Figure 2 , it can be shown that even though 9 is a fairly small number, the modulus of 9 will repeat many times in the 8-bit value range [0; 255] (specifically, times). Only 5 modulus values ​​result in a smaller f, and not form. Figure 3An example of a trend graph of f for n = 8 is shown. f continues to increase steadily, approaching form All moduli of Notice, Figure 3 It is only used to illustrate the trend of f, and the value of f is not shown.

[0145] Table 5 is an example of a method for converting a representation of a value from RNS to CRNS.

[0146] Table 5

[0147]

[0148]

[0149] In Table 5, m = {3, 7}, m1 = 3, m2 = 7, M = m1 × m2 = 21, n = 4, 2 n = 16. For n-bit BNS, where n = 4, only values ​​belonging to the value range [0; 15] are required.

[0150] In Table 5, as an example, the truncated bit is the MSB of r2. According to the method for converting the RNS representation to the CRNS representation proposed in the present application, if the truncated bit of the first representation is equal to zero, for example, the first representation of values ​​0, 1, 2, 3, 7, 8, 9 and 10, the second representation is the same as the remaining n bits of the corresponding first representation except the truncated bit, and if the truncated bit of the first representation is equal to 1, for example, the first representation of values ​​4, 5, 6, 11, 12 and 13, the second representation is the same as the remaining n bits of the corresponding first representation except the truncated bit. For example, the first representation of 4 is "10001" containing 5 bits, and the remaining 4 ((n+1)-1=5-1=n) bits of the first representation except the truncated bit are "0001", the second representation of 4 is the same as the re-encoded remaining 4 bits, specifically, the remaining 4 bits are re-encoded as "0011", and the second representation is the same as the re-encoded word, that is, "0011".

[0151] In the above embodiment, the truncated bits are selected from the residual, and we can refer to the residual as the truncated residual. The truncated residual is related to the modulus, and we refer to the modulus as the truncated modulus, even if the modulus is actually the truncated residual. The n+1 bits of the first representation include k parts, which are k residuals, and the k residuals correspond one-to-one to the k moduli in the modulus set. Alternatively, the k residuals are arranged in one of the following orders:

[0152] Arrange in ascending order according to the corresponding values ​​of k moduli;

[0153] Arrange in descending order according to the corresponding values ​​of the k moduli; or

[0154] Arranged in random order.

[0155] For example, in Table 5, the first representation (i.e., the RNS value) includes 5 bits, and the 5 bits include two parts. The two parts are two residuals r1 and r2, corresponding to two moduli m1 and m2, respectively. The two parts are arranged in descending order according to the values ​​of the two moduli, specifically, in the order of r2r1. The truncated bit can be any bit contained in r2 or r1, where r2 contains 3 bits and r1 contains 2 bits. As another example, according to the values ​​of the two moduli, the two parts are arranged in ascending order of r1r2. For example, if the modulus set includes k moduli, and k is greater than 2, the k parts of the first representation can be arranged in a random order. For example, the modulus set is {m1,m2,m3}={3 10 ,5 10 ,7 10}, where k=3. The three parts of the first representation can be arranged in the order of r1r2r3, r3r2r1, r2r1r3 or r2r3r1, etc., which are not listed here one by one.

[0156] Alternatively, as an example, the n+1 bits of the first representation may also be arranged in a random order instead of being arranged into k parts. That is, the n+1 bits of the k parts are interleaved, and the truncated bit is one of the interleaved n+1 bits.

[0157] Or, 2 n The first representation and 2 n The bijective mapping relationship between the second representations is adjustable.

[0158] Note that the output of the RNS to CRNS remapping function can be permuted. That is, the actual CRNS values ​​are not important. The only important thing is that the mapping is bijective. The bijective property is a necessary and sufficient condition to ensure that CRNS values ​​can be mapped back to RNS values ​​again. For the sake of logic optimization, for example, we will only permute the remapped (or "reencoded") RNS values, and we will not permute the "copied" RNS values. n The first representation includes f first representations of the first type and (2 n–f) first representations. The truncated bit of the first representation of the first type is equal to zero, and the truncated bit of the first representation of the second type is equal to 1. As an embodiment, the bijective mapping relationship between the f first representations of the first type and the corresponding f second representations can be arranged. Taking Table 5 as an example, the number of first representations of the first type is 6, and the 6 first representations of the first type correspond to values ​​4, 5, 6, 11, 12 and 13. The bijective mapping relationship shown in Table 5 is only an example, and the bijective mapping relationship between the 6 first representations of the first type and the corresponding 6 second representations can be adjusted. In other words, RNS in RNS representation j = 0 will not be sorted. j = 1 is recoded, and RNS j The fact that RNS values ​​of = 0 are not re-encoded helps to clearly distinguish this application from anything related to Huffman coding.

[0159] It should be noted that in Huffman coding, the Huffman code is usually different from the value it represents, and any occurrence of a Huffman code that is equal to the value it represents will be coincidental.

[0160] In other words, this embodiment is a permutation of the output of the remapping function so that any CRNS bit (e.g., CRNS j ) becomes any RNS bit in a logical expression (e.g., RNS t ) function: For any combination of j and t, CRNS j =RNS t or CRNS j =Non(RNS t ), we call this property "bit alignment".

[0161] Alternatively, this embodiment also covers the case where several combinations of RNS bits and CRNS bits are simultaneously "bit-aligned" by arranging the remapping values.

[0162] According to the above embodiment, by truncating the bits RNS of the RNS word j to create an n-bit CRNS representation. Alternatively, as an embodiment, the truncated bit is the MSB of the RNS word. Using the MSB results in RNS j = 1, the RNS values ​​decrease, therefore, the logic in the re-encoding function decreases.

[0163] Assume RNS j is the modulus m in the modulus set i The modulus m i Need p i bits to represent the residual r i ,in, 0 ≤ r i < m i . Among the m i possible values of r i , the values with MSB(r i ) = 0, h1 = m i - h0 values have MSB(r i ) = 1. If then in all other cases, h1 < h0. Therefore, the r i values with MSB(r i ) = 1 will never be more than the r i values with MSB(r i ) = 0. If the modulus m is not of the form i , then the r i values with MSB(r i ) = 1 will be fewer than the r i values with MSB(r

[0164] ) = 0. Alternatively, as another example, the truncated bit is the MSB of the modulus, and the modulus is of the form It can be shown that using the MSB of a modulus of the form i results in as few re - encoded RNS values as possible in the m

[0165] residue sequence, specifically, only one RNS value. Other forms of the modulus have more than one re - encoded value for each sequence of m i residues. This application has shown that if the modulus m i is of the form i then the values of the residue r i < m i will be in the range 0 ≤ r i and the maximum value of r

[0166] Thus, only the value will have MSB(r i ) = 1. Any other form of the modulus will result in a higher fraction of values with MSB(r i ) = 1.

[0167] Alternatively, as an example, the truncated bit of the RNS word is the MSB of the residue r corresponding to the modulus m k of the form k , where the modulus m k is the maximum value in the modulus set.

[0168] This application has proved that if the MSB is truncated modulus m i The form is The value range that must be recoded is [0; 2 n –1] is Since f and m i Inversely proportional, it is obvious that m i The larger the value, the smaller f is. i is the maximum value modulus in the set of moduli, then no other modulus in the set of moduli will result in a smaller value of f. Therefore, for a given set of moduli, using the form with the highest value in the set of moduli is more likely to be useful than other choices for truncating bits. The modulus of corresponds to the MSB of the residual that results in the fewest possible recoded values ​​in the bijection.

[0169] Note that there is another modulus in another set of moduli than the one described, which results in a smaller value of f.

[0170] A method 400 for converting a second representation to a first representation is described below.

[0171] Figure 4 4 is a schematic diagram of a method for converting a second representation of a value into a first representation. A method (400) specifically comprises the following steps:

[0172] Step 410: Receive a second representation of the first value, where the second representation is a representation of the first value in the CRNS, and the second representation includes n bits.

[0173] Step 420: Determine whether the second representation is the same in the CRNS and the RNS.

[0174] Step 430: convert the second representation into a first representation, where the first representation is a representation of the first value in the RNS, and the first representation includes n+1 bits;

[0175] Wherein, if the second representation is the same in CRNS and RNS, the first representation is the same as the second representation n bits and the truncated bits with zeros, and if the second representation is different in CRNS and RNS, the first representation is the same as the second representation n bits re-encoded and the truncated bits with 1s. In other words, if the second representation is the same in CRNS and RNS, the first representation is the same as the second representation n bits and the truncated bits with zeros, or if the second representation is different in CRNS and RNS, the first representation is the same as the second representation n bits and the truncated bits with 1s. The truncated bits in method 400 are predetermined.

[0176] In step 420, if the second representation belongs to the f second representations corresponding to the f first representations of the first type, the second representation is different in the CRNS and the RNS, and if the second representation does not belong to the f second representations corresponding to the f first representations, the second representation is the same in the CRNS and the RNS, wherein the f second representations are predetermined. For the f second representations corresponding to the f first representations of the first type, reference may be made to the embodiment of method 200, which will not be described in detail herein.

[0177] The first value is 2 n One of the values, 2 n The value can be represented by n-bit BNS, 2 n The value range is [0; 2 n –1], where n is an integer.

[0178] Note that converting the CRNS representation to the RNS representation is the inverse operation of converting the RNS representation to the CRNS representation. The truncated bit may be any one of the n+1 bits of the first representation in method 200, so the truncated bit in method 400 may be added to any position of the n bits of the second representation, for example, before the n bits, after the n bits, or between any two adjacent bits in the n bits. For the truncated bit in method 400, reference may be made to the explanation of the truncated bit in method 200, which will not be repeated here.

[0179] Some detailed implementations of how to convert the (n+1)-bit RNS representation into the n-bit CRNS representation are given below.

[0180] Or, as an example, a 2:1 multiplexer and a logic function are used to implement a bijection from RNS to CRNS.

[0181] Figure 5 Schematic diagram of an embodiment of converting from RNS to CRNS. The symbol "n:0" means "bit n: bit 0", and the symbol "n-1:0" means "bit n-1: bit 0". The symbol "n:0\j" means "bit n to 0 except bit j", and the symbol "\" is borrowed from mathematical "set theory", where "\" is an exclusion operator. These symbols are applicable to the following embodiments and will not be repeated here.

[0182] like Figure 5 As shown, in the bit RNS j When it is equal to "0", the RNS representation is directly mapped to the CRNS representation, and the CRNS representation is the same as the RNS representation except for the RNS bit. j The remaining n bits are the same. j When equal to "1", RNS indicates the number of bits except RNS j The remaining n bits are recoded to be unused by the RNSj = 0 represents the occupied CRNS representation. In this embodiment, whether the RNS representation should be re-encoded depends on the bit RNS representation. j Equal to "0" or "1".

[0183] Or, as an example, truncated bits (ie, bits RNS j ) is the form The modulus m i MSB.

[0184] Figure 6 is a schematic diagram of an embodiment of converting from RNS to CRNS; in this embodiment, the number of inputs to the re-encoder function can be reduced to the truncated modulus m i The number of bits in p i =q i +1, therefore, Figure 6 In the above equation, h = n – p i We know that and m i The residual r i Belongs to the range 0≤r i <m i , where q i is corresponding to m i Therefore, the MSB (r i The only occurrence of ) = 1 is when When using the recoder function, i The value is constant, so you can ignore r in the recoder function input i value.

[0185] The number of inputs to the re-encoder function is reduced by p i , also called residual r i The number of bits is reduced, so the complexity is reduced. Optionally, as an example, the input of the re-encoder function is bit 0 to bit h-1, that is, (h-1:0), such as Figure 6 All other forms of truncated modulus result in only one bit being removed from the input, namely the bit RNS j In a modulus set with k moduli, m k is the modulus with the largest value in the modulus set. If the truncated modulus is m k , then the advantage is maximized.

[0186] like Figure 6 As shown, assuming that the truncated bit is the MSB of the modulus with the largest value in the modulus set, the modulus with the largest value is in the form of Among them, q k is corresponding to m kFor simplicity, in some embodiments, the modulus with the maximum value will be represented as the "maximum value modulus". Figure 6 In the embodiment shown, the truncated bit (ie, RNS j ) is "bit n". The remaining n bits (excluding bit n) represented by the (n+1)-bit RNS are specifically bit n-1 to bit 0. j In the case where bit n of the (n+1)-bit RNS representation is equal to "1", the remaining n bits of the (n+1)-bit RNS representation except the truncated bits need to be re-encoded. The re-encoded n bits are not occupied by the CRNS representation, which corresponds to the RNS representation with bit n equal to "0".

[0187] Note that in its representation, no modulus has more bits than the modulus with the highest value, so if the modulus with the highest value is of the form Then the advantages will be maximized.

[0188] There are other moduli m t With modulus m k same number of bits, but no modulus will have more bits than the maximum modulus. In addition, the form Any other modulus of must have fewer bits than the largest modulus, since q t Must be less than q k ,q t k =>p t <p k .

[0189] Figure 6 The embodiment shown is a continuation of the above embodiment, which is a form of The purpose of this embodiment is to use a 2:1 multiplexer and reduce the number of inputs to the recoder function while reducing the number of recoded values ​​in the above embodiments. Figure 6 The embodiment shown is Figure 5 The embodiment shown has a special form (i.e. ) situation.

[0190] Some detailed implementations on how to convert the n-bit CRNS representation back to the (n+1)-bit RNS representation are given below.

[0191] Figure 7 ​Schematic diagram of an embodiment of conversion from CRNS to RNS. The conversion from CRNS to RNS uses a 2:1 multiplexer and a logic function (referred to herein as "mux-ctrl") to implement the bijection from CRNS to RNS.

[0192] like Figure 7 As shown, the "mux-ctrl" function identifies all re-encoded CRNS representations and determines whether the input CRNS representation is the same in CRNS and RNS. The 2:1 multiplexer passes the same CRNS representation in CRNS and RNS. The re-encoder function re-encodes the CRNS representations that are different in CRNS and RNS. When the multiplexer passes the CRNS representation directly to RNS, the output of the re-encoder function will be ignored. This can optimize the implementation of the logic of the re-encoder function. We know that if the bit RNS j = 0, then CRNS will be passed unchanged. If the bit RNS j = 1, the re-encoder function is used. Therefore, the bit RNS j As a constant added before the multiplexer, such as Figure 7 Specifically, the above 2 n The values ​​correspond to 2 n RNS represents and 2 n CRNS indicates. 2 n The CRNS representations include f CRNS representations, the f CRNS representations corresponding to the f RNS representations of the first type in the RNS. Each of the f CRNS representations in the CRNS and the RNS is the same. The f CRNS representations are predetermined and known to the hardware, so the hardware can be designed to identify whether the CRNS representations are the same in the CRNS and the RNS.

[0193] Alternatively, as an example, the truncated bits (i.e., bits RNS) can also be directly converted to the output of the "mux-ctrl" function. j ) is inserted into the multiplexer, such as Figure 8 shown. Figure 8 is a schematic diagram of an embodiment of converting from CRNS to RNS.

[0194] Alternatively, as another example, the present application also covers the case where the output of the "mux-ctrl" function is inverted, and the inverted value of the output is directly merged into the RNS value as the bit RNS after the multiplexer. j ,like Fig. 9 shown. Fig. 9 is a schematic diagram of an embodiment of converting from CRNS to RNS. Note that Fig. 9In , the multiplexer inputs are swapped because the polarity of the multiplexer's control signal changes.

[0195] Alternatively, in the above embodiment, the truncated bit (ie, RNS j ) is the form The width of the output of the re-encoder function can be reduced by p if the MSB of the modulus is i =q i +1 bit. The truncated bits are of the form In the case of the MSB of the modulus, the output width of the recoder function can be reduced by p i =q i +1, then the number of outputs of the logic function decreases Then, the number of gates and the area occupied are reduced by about the same relative amount, although not every output has the same logic function and complexity.

[0196] Fig.10 is a schematic diagram of an embodiment of the conversion from CRNS to RNS. This shows that the truncated modulus m i The p=n–h+1 bit of the RNS word is positioned as the most significant bit, i.e., bit [n:h]. Then, bit RNS j Change to RNS n , in fact, j = n. This application should cover the truncated modulus m i The corresponding truncated residual r i This can be the case anywhere in the RNS word, not just in the most significant bit. If generalized in this way, Fig.10 would be too complicated, so Fig.10 Just an example.

[0197] Fig.11 It is a schematic block diagram of the chip or chip system 10 of the present application.

[0198] like Fig.11 As shown, the chip (or chip system) may include an interface 11 and multiple circuits 12. Alternatively, the interface 11 is used to receive the RNS representation of the value and transmit the RNS representation to the multiple circuits 12. The multiple circuits 12 execute the method 200 to convert the RNS representation into the CRNS representation. Alternatively, the interface 11 is used to receive the CRNS representation of the value and transmit the CRNS representation to the multiple circuits 12. The multiple circuits 12 execute the method 400 to convert the CRNS representation into the RNS representation.

[0199] Alternatively, the interface 11 includes an input interface and an output interface, wherein the input interface is used to receive the RNS representation or the second representation, and the output interface is used to output conversion results of the plurality of circuits 12. As an embodiment, the interface 11 is an interface circuit.

[0200] As an embodiment, the functions of the chip are implemented by hardware (eg, multiple circuits 12), and the hardware includes one or more corresponding structures, such as multiplexers, controllers, re-encoders, logic gates, etc.

[0201] In several embodiments provided in the present application, it should be understood that the disclosed systems and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the units is only a logical function division, and there may be other division methods in actual implementation. For example, multiple units or components can be merged or integrated into another system, or some features can be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed can be implemented through some interfaces. The direct coupling or communication connection between devices or units can be implemented in electronic, mechanical or other forms.

[0202] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0203] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0204] The above descriptions are only some specific implementations of the present application and are not intended to limit the scope of protection of the present application. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed in the present application should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application shall be subject to the scope of protection of the claims.

Claims

1. A method for converting representations of values ​​in different systems, characterized in that The method comprises: Receiving a first representation of a first value, wherein the first representation is a representation of the first value in a residual number system (RNS), and the first representation comprises n+1 bits; converting the first representation into a second representation according to the truncated bits, wherein the second representation is a representation of the first value in a compact residual number system (CRNS), and the second representation comprises n bits; The truncated bit is any one of the n+1 bits, if the truncated bit in the n+1 bits is equal to zero, then the second representation is the same as the remaining n bits of the n+1 bits contained in the first representation except the truncated bit, if the truncated bit in the n+1 bits is equal to 1, then the second representation is the same as the remaining n bits of the n+1 bits contained in the first representation except the truncated bit. Among them, the first value is 2 n One of the values, the 2 n The value can be represented by an n-bit binary number system (BNS). n The value range is [0; 2 n –1], where n is an integer.

2. The method according to claim 1, characterized in that 2 n The value corresponds to 2 in the RNS n The first representation is that n The value corresponds to 2 in the CRNS n The second means that the 2 n The first representation and the 2 n The second representation is a bijective mapping relationship.

3. The method according to claim 2, characterized in that 2 n The first representation includes f first representations of the first type and (2 n f) a first representation, the truncated bits of the first representation of the first type being equal to 1 and the truncated bits of the first representation of the second type being equal to zero; wherein the f first representations of the first type correspond to f second representations, each of the f second representations being identical to the re-encoded remaining n bits of the corresponding first representation of the first type except for the truncated bits; Wherein, the second type of (2 n –f) first representation corresponds to (2 n –f) second representation, and the (2 n -f) second representations are identical to the remaining n bits of the corresponding first representation of the second type except for the truncated bits.

4. The method according to claim 3, characterized in that The bijective mapping relationship between the f first representations and the f second representations of the first type is adjustable.

5. The method according to any one of claims 1 to 4, characterized in that The n+1 bits of the first representation include k parts, the k parts are residuals corresponding to k moduli of the RNS, and the k parts are arranged in one of the following orders: Arrange in ascending order according to the corresponding values ​​of the k moduli; Arrange in descending order according to the corresponding values ​​of the k moduli; or Arranged in random order.

6. The method according to claim 5, characterized in that The k parts include a first part, which includes p i bits, the truncated bits are the p i Any one of the bits, m i is a modulus among the k moduli corresponding to the first part, the first part is any one of the k parts, 1≤i≤k, i and k are integers.

7. The method according to claim 6, characterized in that The truncated bit is the p i The most significant bit (MSB) in a bit.

8. The method according to claim 7, characterized in that The m i For the form q i is an integer.

9. The method according to claim 8, characterized in that The m i is the modulus having the maximum value among the k moduli.

10. A chip, characterized in that: The chip comprises: An input interface, wherein the input interface is used to receive a first representation of a first value, the first representation being a representation of the first value in the RNS, the first representation comprising n+1 bits; A plurality of circuits, wherein the plurality of circuits are used to: Determine whether the truncated bit in the n+1 bits is equal to zero or 1; Convert the first representation to a second representation, wherein the second representation is a representation of the first value in CRNS, and the second representation comprises n bits; Wherein, when the truncated bit is equal to zero, the second representation is the same as the remaining n bits of the n+1 bits of the first representation except the truncated bit, and when the truncated bit is equal to 1, the second representation is the same as the re-encoded remaining bits of the n+1 bits of the first representation except the truncated bit; The first value is 2 n One of the values, the 2 n The value can be represented by an n-bit binary number system (BNS), n The value range is [0; 2 n –1], where n is an integer.

11. The chip according to claim 10, characterized in that: 2 n The value corresponds to 2 in the RNS n The first representation is that n The value corresponds to 2 in the CRNS n The second means that the 2 n The first representation and the 2 n The second representation is a bijective mapping relationship.

12. The chip according to claim 11, characterized in that: 2 n The first representation includes f first representations of the first type and (2 n f) a first representation, the truncated bits of the first representation of the first type being equal to 1 and the truncated bits of the first representation of the second type being equal to zero; wherein the f first representations of the first type correspond to f second representations, each of the f second representations being identical to the re-encoded remaining n bits of the corresponding first representation of the first type except for the truncated bits; Wherein, the second type of (2 n –f) first representation corresponds to (2 n –f) second representation, and the (2 n -f) second representations are identical to the remaining n bits of the corresponding first representation of the second type except for the truncated bits.

13. The chip according to claim 12, characterized in that: The bijective mapping relationship between the f first representations and the f second representations of the first type is adjustable.

14. A method for converting representations of values ​​in different systems, characterized in that The method comprises: receiving a second representation of a first value, wherein the second representation is a representation of the first value in a compact residual number system (CRNS), the second representation comprising n bits; determining whether the second representation is the same in the CRNS and a residual number system (RNS); Convert the second representation into a first representation, wherein the first representation is a representation of the first value in the RNS, and the first representation includes n+1 bits; wherein, if the second representation is the same in the CRNS and the RNS, the first representation is the same as the n bits of the second representation and the truncated bits with zero added, and if the second representation is different in the CRNS and the RNS, the first representation is the same as the re-encoded n bits of the second representation and the truncated bits with 1 added; Among them, the first value is 2 n One of the values, the 2 n The value can be represented by an n-bit binary number system (BNS). n The value range is [0; 2 n –1], where n is an integer.

15. The method according to claim 14, characterized in that 2 n The value corresponds to 2 in the CRNS n The second means that the 2 n The value corresponds to 2 in the RNS n The first representation is that n The second representation and the 2 n The first representation is a bijective mapping relationship.

16. The method according to claim 15, characterized in that 2 n The first representation includes f first representations of the first type and (2 n f) a first representation, the truncated bits of the first representation of the first type being equal to 1 and the truncated bits of the first representation of the second type being equal to zero; wherein the f first representations of the first type correspond to f second representations, each of the f second representations being identical to the re-encoded remaining n bits of the corresponding first representation of the first type except for the truncated bits; Wherein, the second type of (2 n –f) first representation corresponds to (2 n –f) second representation, and the (2 n -f) second representations are identical to the remaining n bits of the corresponding first representation of the second type except for the truncated bits.

17. The method according to claim 16, characterized in that The f second representations corresponding to the f first representations of the first type are different in the CRNS and the RNS, and are different from the (2 n –f) first representation corresponding to the (2 n – f) the second representation is the same in the CRNS and the RNS; Wherein, determining whether the second representation is the same in the CRNS and the CRNS includes: By identifying whether the second representation belongs to the f second representations, it is determined whether the second representation is the same in the CRNS and the CRNS, wherein the f second representations are predetermined.

18. A chip, characterized in that: The chip comprises: an input interface, wherein the input interface is used to receive a second representation of a first value, wherein the second representation is a representation of the first value in a CRNS, and the second representation comprises n bits; A plurality of circuits, wherein the plurality of circuits are used to: determining whether the second representation is the same in the CRNS and the RNS; Convert the second representation into a first representation, wherein the first representation is a representation of the first value in the RNS, and the first representation includes n+1 bits; wherein, if the second representation is the same in the CRNS and the RNS, the first representation is the same as the n bits of the second representation and the truncated bits with zero added, and if the second representation is different in the CRNS and the RNS, the first representation is the same as the n bits of the second representation and the truncated bits with 1 added; Among them, the first value is 2 n One of the values, the 2 n The value can be represented by an n-bit binary number system (BNS). n The value range is [0; 2 n –1], where n is an integer.

19. The chip according to claim 18, characterized in that: 2 n The value corresponds to 2 in the CRNS n The second means that the 2 n The value corresponds to 2 in the RNS n The first representation is that n The second representation and the 2 n The first representation is a bijective mapping relationship.

20. The chip according to claim 19, characterized in that: 2 n The first representation includes f first representations of the first type and (2 n f) a first representation, the truncated bits of the first representation of the first type being equal to 1 and the truncated bits of the first representation of the second type being equal to zero; wherein the f first representations of the first type correspond to f second representations, each of the f second representations being identical to the re-encoded remaining n bits of the corresponding first representation of the first type except for the truncated bits; Wherein, the second type of (2 n –f) first representation corresponds to (2 n –f) second representation, and the (2 n -f) second representations are identical to the remaining n bits of the corresponding first representation of the second type except for the truncated bits.

21. The chip according to claim 20, characterized in that: The f second representations corresponding to the f first representations of the first type are different in the CRNS and the RNS, and are different from the (2 n –f) first representation corresponding to the (2 n – f) the second representation is the same in the CRNS and the RNS; Wherein, the plurality of circuits are used for: By identifying whether the second representation belongs to the f second representations, it is determined whether the second representation is the same in the CRNS and the RNS, wherein the f second representations are predetermined.

22. A device, characterized in that The device comprises a chip according to any one of claims 10 to 13 and / or a chip according to any one of claims 18 to 21.

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