Wafer chip selection method and device, readable storage medium and program product

Abstract

The invention relates to a wafer chip selection method and device, a readable storage medium and a program product. The method comprises the following steps: acquiring a wafer map and a selected BIN; performing clustering processing based on density according to the selected BIN and the wafer map to obtain a cluster set; according to a clustering cluster screening rule, screening out a target clustering cluster subset matched with the clustering cluster screening rule from the clustering cluster set; performing map recombination processing according to the target cluster subset to obtain a target wafer map; and carrying out chip selection based on the target wafer map. By adopting the method, the chip selection efficiency can be improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a wafer chip selection method, device, readable storage medium and program product. Background Art

[0002] Wafers are the basic materials for semiconductor manufacturing. The larger the wafer size, the more chips can be produced under the same process conditions. Common wafer sizes are 4 inches, 6 inches, 8 inches, and 12 inches. The higher the utilization rate, the lower the cost per chip. A single chip on a wafer can be a mass-produced model of the same design or a research and development model of multiple designs, which belongs to a multi-project wafer MPW (MultiProject Wafer). Regardless of whether it is a mass-produced model or a research and development model, the more chip particles on a wafer, or the more design types, combined with the difference in process consistency, the chips on the entire wafer will present different performance distributions. After testing each chip, it is divided into BINs based on multiple data indicators to meet the different needs of the market and projects. The traditional method is to generate a new map with physical coordinates by merging the physical address of the chip with the BIN information on the wafer map, and then pick the chip. This pre-scanning mode solves the problem of high precision requirements to a certain extent, but when the number of chip particles is large, it will take a lot of time. Summary of the invention

[0003] Based on this, it is necessary to provide a chip selection method, device, readable storage medium and program product for wafers that can improve chip selection efficiency in response to the above technical problems.

[0004] A wafer chip selection method, the method comprising:

[0005] Get wafer map and selected BIN;

[0006] Performing density-based clustering processing according to the selected BIN and the wafer map to obtain a cluster set;

[0007] According to the cluster screening rule, a target cluster subset matching the cluster screening rule is screened out from the cluster set;

[0008] Performing reorganization map processing according to the target cluster subset to obtain a target wafer map;

[0009] Chip selection is performed based on the target wafer map.

[0010] An intelligent sorting device includes a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the method described in each embodiment of the present application when executing the computer program.

[0011] A computer-readable storage medium stores a computer program, which, when executed by a processor, implements the steps of the method described in each embodiment of the present application.

[0012] A computer program product includes a computer program, and when the computer program is executed by a processor, the steps of the method described in each embodiment of the present application are implemented.

[0013] The chip selection method, device, readable storage medium and program product of the above-mentioned wafer perform density-based clustering processing according to the selected BIN and wafer map to obtain a cluster cluster set, and according to the cluster cluster screening rule, screen out a target cluster cluster subset matching the cluster cluster screening rule from the cluster cluster set, and further perform reorganization map processing to obtain a target wafer map, and perform chip selection based on the target wafer map, that is, through a density-based clustering algorithm, the chips in the high-density area are grouped together for screening, and the target wafer map is formed after reorganization map processing, which can greatly shorten the chip picking path, improve the efficiency, accuracy, reliability and flexibility of chip selection, and improve overall production capacity. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the drawings required for use in the embodiments of the present application or related technical descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0015] Figure 1 A schematic flow chart of a method for selecting chips from a wafer in one embodiment;

[0016] Figure 2 A schematic diagram of cluster distribution after density-based clustering processing using different clustering parameters in one embodiment;

[0017] Figure 3 is a schematic diagram of a target wafer map in one embodiment;

[0018] Figure 4 It is a schematic diagram of cluster distribution after density-based clustering processing is performed using different clustering parameters in another embodiment;

[0019] Figure 5 is a schematic diagram of a target wafer map in another embodiment;

[0020] Figure 6 It is a schematic diagram of cluster distribution after density-based clustering processing is performed using different clustering parameters in another embodiment;

[0021] Figure 7 A schematic diagram of a polygonal outline generated according to chip coordinates in one embodiment;

[0022] Figure 8 It is a schematic diagram of cluster distribution after density-based clustering processing is performed using different clustering parameters in another embodiment;

[0023] Fig. 9 A schematic diagram of cluster distribution after density-based clustering processing using different clustering parameters in yet another embodiment;

[0024] Fig.10 A schematic diagram of a target wafer map corresponding to each target area in an embodiment;

[0025] Fig.11 In one embodiment Fig.10 The corresponding polygon outline diagram generated according to the chip coordinates;

[0026] Fig.12 In one embodiment Fig. 9 (c) Schematic diagram of the target wafer corresponding to each target area in the figure;

[0027] Fig.13 In one embodiment Fig.12 The corresponding polygon outline diagram generated according to the chip coordinates;

[0028] Fig.14 The figure is a diagram of the internal structure of an intelligent sorting device in one embodiment. DETAILED DESCRIPTION

[0029] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0030] The chip selection method for wafers provided in the embodiment of the present application can be applied to intelligent sorting equipment for chip sorting. BIN sorting is a key step in chip sorting. It is to classify the chip particles on the wafer according to different levels. The total number of chip particles on a wafer will be between hundreds and hundreds of thousands due to the different sizes of single chips. The number is extremely large. Combined with the diversity of design types or the differences that may be introduced by process consistency, the chips on the entire wafer present different degrees of performance distribution, thereby dividing them into different levels. This process is called BIN sorting. BIN sorting usually contains more than 2 types (good products and bad products, that is, two BINs. If the sorting precision is higher, then the good products will contain more levels, that is, multiple BINs). In the case of multiple BINs, the chip picking order is arranged first. The chip picking path setting of the intelligent sorting equipment is line-by-line scanning, taking a Z-shaped route to shorten the chip picking time. If BIN4 is currently picked, then move to BIN4 in this row to pick the chip. When there is no BIN4 in this row, move to the next row to pick the chip. Intelligent sorting equipment can also perform real-time self-correction of position. When the software locks on the target chip, it will automatically correct the position information to ensure the accuracy of the stepping distance of the next step. If there are too many consecutive vacancies in the chips on the wafer, it will be impossible to accurately locate and calibrate the position in real time. The accumulated error will cause wrong rows or columns. Therefore, if there are many consecutive vacancies on the wafer, there will be a certain amount of error accumulation, which will increase the error rate.

[0031] In the traditional way, equipment manufacturers have a pre-scan mode, which combines the physical address of the chip with the BIN information of the map to generate a new map with physical coordinates. This pre-scan mode solves the situation of high precision requirements to a certain extent (for example, the error and omission of rows caused by slight offset of small-size chips), but when the number of chip particles is large (for example, greater than 20k, or even more than 200k), the pre-scan will take a lot of time. The principle is to first partition and take pictures of all chips on the wafer, extract the physical coordinates, and then combine the map with the BIN information of the map to generate a new wafer map. The pre-scan must be completed once, because during the process, if the physical position of the wafer changes slightly, it is necessary to pre-scan again to ensure the accuracy of the physical position information. Some equipment manufacturers will use connected domains, which are a common technology in image processing and are usually used to identify objects or areas in images. The connected domain algorithm is a tree diagram that constructs a hierarchical structure based on the distance or similarity between data objects, and then divides clusters of different levels according to different cutting standards. At present, the application scope of connected domains is limited, and only 4-connected or 8-connected are commonly used, which limits the application of complex scenes. Therefore, a chip selection method for a wafer in an embodiment of the present application is proposed, in which chip screening is performed by performing density-based clustering processing to improve the efficiency, flexibility and accuracy of chip selection.

[0032] In one embodiment, Figure 1 FIG. 1 is a flow chart of a method for selecting chips from a wafer in an embodiment, which is described by taking the method applied to an intelligent sorting device as an example, and includes the following steps:

[0033] Step 102, obtaining a wafer map and a selected BIN.

[0034] Specifically, the function of the wafer map is a chip map on a wafer, which contains the BIN information of each chip and the relative position relationship between the chips. The intelligent sorting equipment sorts the chips according to this wafer map. It can be understood that the wafer map can be a map of a whole wafer, or a part of a wafer, etc., which can be set according to the needs. The wafer map can contain the relative position relationship of each chip, i.e., the coordinate information, and the BIN situation of each chip, i.e., good products (such as definition 6) and bad products (such as definition 2); or when there are multiple BINs, the good products contain multiple categories (such as numbers or letters such as definition 3, 5, 8), and at the same time select the BIN to be selected at this time (such as only selecting good BIN6), or when there are multiple BINs, first arrange the order of picking (such as first selecting BIN3, then BIN5, and finally BIN8). It can be understood that the wafer map can be pre-stored in the intelligent sorting equipment, or it can be a wafer map after some processing, or a wafer map generated by scanning, analysis, etc. Then, in response to the triggering operation on the selected BIN, the selected BIN is obtained, and the selected BIN is specifically a single BIN.

[0035] Step 104 , performing density-based clustering processing according to the selected BIN and wafer map to obtain a cluster set.

[0036] Among them, density-based clustering is different from connected domain-based clustering. The core of the algorithm is to divide clusters according to the density of data objects, that is, the area with high density is a cluster, and the area with low density is the boundary between clusters. Its advantage is that it can find spatial clusters of arbitrary shapes without pre-specifying the number of clusters. Density-based clustering algorithms include DBSCAN (Density Based Spatial Clustering of Application with Noise), OPTICS (Ordering Points To Identify the Clustering Structure), DENCLUE (DENsity based CLUstEring), etc. Taking the DBSCAN algorithm as an example, it is a relatively representative density-based clustering algorithm. It can identify areas with sufficiently high density and divide them into clusters. The core of the DBSCAN algorithm lies in the definition of density and the clustering process. It describes the density of data points through two main parameters: ε (epsilon, neighborhood radius) and MinPts (minimum point number threshold), and forms clusters by connecting points that can be reached by density. The core algorithm of DBSCAN is very sensitive to the selection of parameters ε and MinPts. Different parameter combinations may lead to completely different clustering results. The adjustment of epsilon and MinPts is relatively complex, and it is necessary to find the appropriate optimal parameter combination.

[0037] Specifically, the intelligent sorting device extracts corresponding BIN information in the wafer map according to the selected BIN, and clusters the BIN information through a density-based clustering algorithm to obtain a cluster set, which includes at least one cluster cluster.

[0038] Step 106: According to the cluster screening rule, a target cluster subset matching the cluster screening rule is screened out from the cluster set.

[0039] The cluster screening rules are program rules set according to actual usage scenarios. The cluster screening rules include but are not limited to responding to the selected clusters or proportion rules.

[0040] Specifically, when the number of clusters in the cluster set is greater than one, in response to the selected cluster, a cluster subset is screened out. Alternatively, when the number of clusters in the cluster set is greater than one, in response to the number ratio rule, the number ratio rule screens out clusters with a high number ratio, and clusters with a number ratio less than a preset ratio are deleted from the cluster set to screen out a cluster subset.

[0041] Step 108 , performing reorganization map processing according to the target cluster subset to obtain a target wafer map.

[0042] Specifically, the intelligent sorting equipment extracts or merges the chip coordinates in the target cluster subset to generate a target wafer map. The target wafer map is used to characterize the location of the chips to be selected. The target wafer map contains BIN information, such as BIN and empty jump.

[0043] Step 110 , performing chip selection based on the target wafer map.

[0044] Specifically, the intelligent sorting equipment performs chip selection along the target wafer map in a Z-shaped path.

[0045] In this embodiment, density-based clustering processing is performed according to the selected BIN and wafer map to obtain a cluster cluster set, and according to the cluster cluster screening rule, a target cluster cluster subset matching the cluster cluster screening rule is screened out from the cluster cluster set, and further reorganization map processing is performed to obtain a target wafer map, and chip selection is performed based on the target wafer map, that is, chips in high-density areas are grouped together for screening through a density-based clustering algorithm, and a target wafer map is formed after reorganization map processing, which can greatly shorten the chip picking path, improve the efficiency, accuracy, reliability and flexibility of chip selection, and improve overall production capacity.

[0046] In one embodiment, density-based clustering is performed according to the selected BIN and wafer map to obtain a cluster set, including:

[0047] According to the selected BIN and wafer map, different clustering parameter values ​​are used to perform density-based clustering processing to obtain a cluster set under each clustering parameter value;

[0048] According to the clustering screening rule, a target clustering subset matching the clustering screening rule is screened out from the clustering set, including:

[0049] According to the clustering screening rule, a target cluster subset matching the clustering screening rule is screened out from the clustering set under each clustering parameter value.

[0050] Among them, the density-based clustering algorithm DBSCAN algorithm is used as an example to illustrate. It describes the density of data points through two main parameters: ε (epsilon, neighborhood radius) and MinPts (minimum point threshold). The neighborhood radius represents the range of a circular area with a point as the center and ε as the radius, which is used to determine the set of other data points contained in the neighborhood of the point. The minimum point threshold represents the minimum number of data points that need to be contained in the neighborhood radius ε. Then, different clustering parameters can be clustering parameters within a certain set range or preset clustering parameters. For example, a clustering parameter is taken every 0.05 from 0.05 to 0.2 for clustering processing to obtain the clustering cluster set corresponding to each clustering parameter; or the minimum point threshold is taken as 1, 2, etc., or the combination of parameter values ​​can be traversed to obtain the clustering cluster set corresponding to each clustering parameter value combination.

[0051] Specifically, the intelligent sorting device can select a preset number of clusters with the largest number of chips from the cluster cluster set under each cluster parameter value according to the screening principle of the largest number of chips, and obtain a reference cluster cluster subset under each cluster parameter value; then select a reference cluster cluster subset with the largest total number of chips from the reference cluster cluster subset to obtain a target cluster cluster subset. Alternatively, according to the density screening principle, a preset number of cluster clusters with the highest density can be selected from the cluster cluster set under each cluster parameter value to obtain a reference cluster cluster subset under each cluster parameter value; then select a reference cluster cluster subset with the highest total density from the reference cluster cluster subset to obtain a target cluster cluster subset.

[0052] Optionally, the cluster screening rule is a selection rule, and in response to a triggered cluster set selection operation, a selected target cluster subset is screened out from the cluster set under each cluster parameter value.

[0053] For example, Figure 2 The diagram is a schematic diagram of cluster distribution after density-based clustering processing is performed using different clustering parameters in an embodiment. Figure 2 It is a part of a wafer, and the selected BINs are all BIN5. The purple dots are chips corresponding to cluster 1. The eps-ε parameter values ​​are taken as examples to illustrate different clustering parameter values. Figure 2 In (a), the eps-ε value is 0.08, in (b), the eps-ε value is 0.1, in (c), the eps-ε value is 0.15, and the MinPts value of each graph is 1. It can be understood that Figure 2 Different colors represent different clusters.

[0054]

[0055]

[0056] Note: Cluster 2 in the table indicates the second largest cluster in terms of number. Figure 2 The same is true for cluster 2 and cluster 3 in the above. As can be seen from Table 2, the number / density of clusters 2 and 3 are extremely low and can be omitted. Therefore, taking the reference cluster subset containing cluster 1 as an example, Figure 2 Figure (a) in Figure 2 Figure (b) and Figure 2 The proportion of cluster 1 in (c) is not much different, and both are greater than 90%; Figure 2 In the figure (a), cluster 1 has the highest area saving, so the target cluster subset is cluster 1 when ε=0.08 and MinPts=1. If there is enough time and the whole grain is full, a large number of empty jumps can be accepted without considering the time cost while ensuring the accuracy. In this case, Figure 2 Figure (b) or Figure 2 Cluster 1 in Figure (c) is used as the target cluster subset (either 92.7% or 94% is acceptable).

[0057] If you want to save time, or have already selected one or two BINs, and there are many vacancies in the chip particles, that is, when the accuracy is reduced, you will choose Figure 1 Cluster 1 (high concentration, accounting for 93.5%), that is, the green branches are screened out to avoid Figure 2 The empty jumps in the yellow area shown in Figure (d) in the figure, or if the yellow area is other BINs that have been selected before, there are many vacancies, which will cause cumulative errors and affect the accuracy.

[0058] Figure 2 The distribution map of Figure (e) is the adjusted one, that is, Figure 1 Only cluster 1 (purple) is selected, and all other clusters are deleted, leaving only the densely distributed areas. The regenerated map is Figure 2 Figure (e) only retains the purple area and lacks the scattered distribution. Figure 3 Schematic diagram of a target wafer map in one embodiment. Figure 3 It is also the TXT text used for equipment identification. The blue dotted box is the adjusted target wafer map, which reduces nearly 50% of empty jumps compared to the initial wafer map.

[0059] When there is enough time and the number of particles on the entire sheet is sufficient to ensure accuracy, then select directly without partial splitting. This is OK when the number of particles on the entire wafer is within 10-20k, but it is very time-consuming when the number is greater than 20k, because of the differences in the distribution of different wafers, some may have a large number of empty jumps. In summary, different clustering cluster screening rules can be set based on different needs, so that the screened clustering cluster subset meets specific needs.

[0060] In this embodiment, since the density-based clustering algorithm is more sensitive to the selection of clustering parameters, it is necessary to use different clustering parameter values ​​for clustering according to the selected BIN and wafer map, to obtain a set of cluster clusters under each clustering parameter value, and to filter out matching cluster cluster subsets according to the cluster cluster screening rules, which can greatly shorten the wafer picking path, improve the accuracy, reliability, and flexibility of the operation process, and improve overall production capacity.

[0061] In one embodiment, according to the cluster screening rule, a target cluster subset matching the cluster screening rule is screened out from the cluster set under each cluster parameter value, including:

[0062] From the clustering cluster sets under each clustering parameter value, a preset number of clustering clusters with the largest number of chips or the largest chip density under each clustering parameter value are screened out to obtain a reference clustering cluster subset under each clustering parameter value;

[0063] The reference cluster subsets under each clustering parameter value are screened according to the characteristic data of the reference cluster subsets to obtain the target cluster subsets.

[0064] The maximum number of chips can be based on the number of chips or the percentage of chips. The maximum number of chips can be the maximum number of chips or the highest percentage of chips. The percentage of chips refers to the ratio of the number of chips in the cluster to the total number of chips in the BIN. The maximum chip density can be the maximum ratio of the number of chips to the total chip area or the maximum ratio of the number of chips to the square of the total chip area.

[0065] Specifically, the cluster screening rule includes screening out a preset number of clusters with the largest number of chips or the highest chip density, and also includes screening the reference cluster subset according to further feature data. The chip quantity ratio refers to the ratio of the number of chips in the cluster to the total number of chips in the BIN. The preset number of clusters with the highest chip quantity ratio refers to obtaining the ratio of each cluster, sorting from high to low, and taking the preset number of clusters with the highest sorting; thereby obtaining the reference cluster subset. For example, if the cluster parameter value A corresponds to clusters 1 to 50, it is necessary to take the 5 clusters with the highest quantity ratio, and clusters 1 to 5 have the highest quantity ratio, then take the reference cluster subset 1 to 5 corresponding to the cluster parameter value A. If the cluster parameter value B corresponds to clusters 1 to 60, it is necessary to take the 5 clusters with the highest quantity ratio, and clusters 2 to 6 have the highest quantity ratio, then take clusters 2 to 6, and the reference cluster subset 2 to 6 corresponding to the cluster parameter value B.

[0066] The characteristic data of the reference cluster subset refers to the total amount, area and density of chips used to characterize the reference cluster subset, such as chip quantity data, chip area data, and chip density data. The chip area data can be the total chip area or the chip area percentage. Among them, the chip area percentage is the ratio of the area of ​​the maximum length and the maximum width of the cluster to the area of ​​the BIN; or the irregular area percentage (such as the ratio of the area occupied by the leftmost and rightmost of each row of the cluster to the area of ​​the BIN). The intelligent sorting device screens the reference cluster subsets under each cluster parameter value according to the characteristic data of the reference cluster subset, screens out the cluster clusters whose characteristic data conform to the rules, and obtains the target cluster subset. For example, from the reference cluster subsets 1 to 5 corresponding to the cluster parameter value A and the reference cluster subsets 2 to 6 corresponding to the cluster parameter value B, the target cluster subset with the lowest area percentage, that is, the reference cluster subsets 2 to 6 corresponding to the cluster parameter value B, is screened.

[0067] For example, Figure 4 FIG. 4 is a schematic diagram of cluster distribution after density-based clustering processing is performed using different clustering parameters in another embodiment. Figure 4 The figure below shows the wafer map of BIN1, and the purple dots are the chips corresponding to cluster 1. Figure 4 The characteristic data is the chip area ratio.

[0068]

[0069] Intelligent sorting equipment can extract Figure 4 Cluster 1 in (c) of the figure is deleted, and all other clusters are deleted, that is, only cluster 1 is included in the reference cluster subset. It can be seen from Table 3 that the proportion of cluster 1 in the three figures is similar, and the area proportion is when ε=0.08, the area proportion of cluster 1 is the smallest, so the best feature data is the area proportion. After reorganizing the map according to the target cluster subset, as shown in Figure 5 , which is a schematic diagram of a target wafer map in another embodiment. Figure 5 It is also the TXT text used for equipment identification. The dotted box is the adjusted target wafer map, which reduces nearly 7% of empty jumps compared to the initial wafer map of a single BIN.

[0070] In this embodiment, a preset number of cluster clusters with the highest proportion under each cluster parameter value are screened out from the cluster cluster set under each cluster parameter value to obtain a reference cluster cluster subset under each cluster parameter value. The reference cluster cluster subset under each cluster parameter value is screened according to the characteristic data of the reference cluster cluster subset to obtain a target cluster cluster subset, which can exclude scattered clusters, reduce empty jumps of equipment, and improve the efficiency of chip selection.

[0071] In one embodiment, the reference cluster subsets under each cluster parameter value are screened according to the characteristic data of the reference cluster subsets to obtain the target cluster subsets, including:

[0072] Obtain chip quantity data of reference cluster subsets under each clustering parameter;

[0073] Obtain chip area data of the reference cluster subset under each clustering parameter;

[0074] Obtain chip density data of the reference cluster subset under each clustering parameter;

[0075] According to the chip quantity data, chip area data and chip density data, a matching target cluster subset is screened out from the reference cluster subset under each clustering parameter value.

[0076] Among them, the reference cluster subset contains a preset number of clusters with the highest proportion. The chip quantity data can be the total number of chips or the percentage of the chip quantity. Among them, the chip quantity percentage refers to the ratio of the number of chips in the cluster to the total number of chips in the BIN. The chip area data can be the total chip area or the chip area percentage. Among them, the chip area percentage is the ratio of the area of ​​the maximum length and the maximum width of the cluster to the area of ​​the BIN; or the irregular area percentage (such as the area occupied by the leftmost and rightmost of each row of the cluster, or the area of ​​the polygonal outline calculated by the Monte Carlo algorithm, etc., to the area of ​​the BIN). The chip density data refers to the ratio of the number of chips to the total chip area, or it can be the ratio of the number of chips to the square of the total chip area.

[0077] The feature data includes M1, M2 and M3, where M1 refers to the chip quantity ratio, M2 refers to the chip area ratio, and M3 refers to the chip density. Parameter combination refers to the combination of clustering parameters. The results obtained based on different clustering parameter values ​​are automatically listed for data comparison.

[0078] ① Chip quantity ratio M1: The combination of the first N clusters, N is the sum of the quantity ratios of the first few clusters > 90%, and the cluster information is displayed in order according to the ratio. The scattered clusters after cluster N can be ignored, or the ratio is less than a certain set value.

[0079] ② Chip area ratio M2: Displays the effective area ratio of each cluster map after clustering. For example, the area ratio after map row and column optimization and reduction. If the area is complex, the polygonal Monte Carlo approximation can also be used to estimate the relative area.

[0080] ③Chip density M3: Density is the relative value of the proportion of chip quantity to the proportion of occupied area. The higher the density, the higher the efficiency of picking up effective chips per unit time.

[0081] Filtering conditions: SUM = chip quantity ratio * first positive weight + chip quantity ratio * negative weight + chip density * second positive weight. The value of each weight is adjusted according to the actual situation to meet the needs of different focuses.

[0082] For example, Figure 2 The same example is analyzed in . Figure 6 This is a schematic diagram of the distribution of clusters after density-based clustering processing using different clustering parameters in another embodiment. First, data preprocessing is performed to select a small part of a wafer (a total of about 60k), and the BIN to be selected, namely BIN5, is extracted, with a quantity of about 14.6k. Using a For loop, the dynamic parameter combination is traversed within a certain range, DBSCAN clustering is executed, and the result of each combination is output. Dynamic parameter combinations such as eps-ε: 0.05-0.2, step: 0.01, MinPts: 1, 2, etc., and the parameter range is an empirical value. Take the preset number of clusters with the highest proportion as 1, that is, the reference cluster subset only includes cluster 1 as an example for explanation. Among them, parameter combination 1 corresponds to Figure 6 In Figure (a), parameter combination 2 corresponds to Figure 6 In Figure (b), parameter combination 3 corresponds to Figure 6 In Figure (c), parameter combination 4 corresponds to Figure 6 Table 4 shows the output results of several dynamic combinations.

[0083]

[0084] From the data table, among the four groups of parameters, the first three clustering parameter combinations have a cluster ratio of > 90% and a chip particle number difference of no more than 200 pcs, so they can all be selected. Then, in terms of map area optimization and clustering speedup, the map area of ​​the third group is 50% smaller. From the ratio point of view, the density is the highest, so the third group is the optimal combination, that is, the target cluster subset includes cluster 1 corresponding to the third group of clustering parameters. The optimized figure is as follows Figure 2 As shown in Figure (e), the optimized map area is reduced by half and the paths are also reduced by half. Figure 7 A schematic diagram of a polygonal outline generated according to chip coordinates in an embodiment. Figure 7 Figure (a) is a schematic diagram of the polygonal outline corresponding to the initial wafer map of a single BIN. Figure 7 Figure (b) in Figure 1 shows the polygonal outline of cluster 1 corresponding to the third set of clustering parameters. After comparison, it is found that the polygonal outline is shortened by half, so the corresponding chip selection path is also shortened by half.

[0085] For example, Figure 8 FIG. 4 is a schematic diagram of cluster distribution after density-based clustering processing is performed using different clustering parameters in yet another embodiment. Figure 8The purple dots in the middle are chips corresponding to cluster 1. First, data preprocessing is performed to select a small part of a wafer ( Figure 8 The total amount of the corresponding whole wafer is about 260k), and the BIN to be selected is extracted, which is about 64k. Using the For loop, the dynamic parameter combination is traversed within a certain range, DBSCAN clustering is performed, and the results of each clustering parameter combination are output. Dynamic clustering parameter combinations such as eps-ε: 0.05-0.2, step: 0.01, MinPts: 1, 2, etc., the parameter range is an empirical value. Take the preset number of clusters as 3, that is, the reference cluster subset contains clusters 1~3 (the cluster with the largest number of chips) as an example. Parameter combination 1 corresponds to Figure 8 In Figure (a), parameter combination 2 corresponds to Figure 8 In Figure (b), parameter combination 3 corresponds to Figure 8 In Figure (c), parameter combination 4 corresponds to Figure 8 Figure (d) in Figure 5. Tables 5 to 7 show the output results of several dynamic combinations:

[0086]

[0087]

[0088]

[0089] Note: Cluster 2 in the table indicates the second largest cluster in terms of number. Figure 2 The same is true for cluster 2 and cluster 3. From the data, because the distribution of the three clusters is very concentrated and scattered, the differences between the combinations are not large, and the proportion of cluster 1 is 90%; from the perspective of area optimization, such as Figure 8 In Figures (c) and (d), the clustering parameters of the third and fourth groups are better, and the difference in density ratio is also very small; in terms of the proportion of the number of the first three clusters, the proportion of the four groups is similar, so both the third and fourth groups can be selected. That is, the target cluster subset includes clusters 1 to 3 corresponding to the third group of clustering parameters or clusters 1 to 3 corresponding to the fourth group of clustering parameters.

[0090] For example, Fig. 9 FIG. 4 is a schematic diagram of cluster distribution after density-based clustering processing is performed using different clustering parameters in yet another embodiment. Fig. 9The purple dot in the middle is the chip corresponding to cluster 1. First, perform data preprocessing, select a small part of a wafer (a total of about 60k), and extract the BIN to be selected, that is, BIN5, which is about 14.6k in number. Using a For loop, the dynamic parameter combination is traversed within a certain range, DBSCAN clustering is executed, and the results of each combination are output. Dynamic parameter combinations such as eps-ε: 0.05-0.2, step: 0.01, MinPts: 1, 2, etc., the parameter range is an empirical value. Take the preset number of clusters with the largest number of chips as 2, that is, the reference cluster subset only contains clusters 1~2 (the clusters with the highest proportion) as an example. Table 8 shows the output results of several groups of dynamic combinations:

[0091]

[0092] It can be seen that when eps-ε is equal to 0.15, 0.1, 0.08 and 0.05, Fig. 9 In the figure (a), there is only one cluster, and the proportion is 100%. The clustering is meaningless, so the clustering is invalid. When eps-ε is 0.03 and Minpts is 1 and 2, Fig. 9 In Figure (b), the area ratio is still 100%, so this clustering is meaningless. Only clustering parameter combination 7 has an effect on area optimization, when eps-ε is 0.02 and Minpts is 1. Fig. 9 In Figure (c), there are a total of 1415 clusters, and the first two clusters with the largest number of chips (reference cluster subsets) account for more than 90%, so they can be used as target cluster subsets. Fig. 9 Figure (d) shows the wafer chip distribution diagram of cluster 1 (purple) and cluster 2 (red) with eps-ε of 0.02 and Minpts of 1.

[0093] In this embodiment, the chip quantity data characterizes the number of chips that can be currently selected, and the chip area data and chip density data are used to characterize the concentration of the chips that can currently be selected. Both are important technical features for chip selection. By using the chip quantity data, chip area data and chip density data, matching target cluster subsets are screened out from the reference cluster subsets under each clustering parameter value, and clusters with higher concentration can be screened out, thereby improving chip selection efficiency.

[0094] In one embodiment, according to the chip quantity data, the chip area data and the chip density data, a matching target cluster subset is selected from the reference cluster subsets under each cluster parameter value, including:

[0095] Determine the screening index value corresponding to each clustering parameter value according to the product of the chip quantity data and the first positive weight, the product of the chip area data and the negative weight, and the product of the chip density data and the second positive weight;

[0096] The reference cluster subset with the largest screening index value is used as the target cluster subset.

[0097] The values ​​of the first positive weight ω1 and the second positive weight ω2 may be the same or different. Negative weight means that the weight is a negative number, such as -ω. The first positive weight, the negative weight and the second positive weight are configured according to the empirical value. And the empirical value can be pre-configured in the intelligent sorting device.

[0098] Specifically, in the chip selection process, for a single cluster, the higher the proportion of total chips, the better, the smaller the proportion of chip area, the better, and the higher the chip density, the better. Therefore, the chip quantity data M1 corresponds to the first positive weight ω1, the chip area data M2 corresponds to the negative weight -ω, and the chip density data M3 corresponds to the second positive weight ω2. According to the product of the chip quantity data and the first positive weight, the product of the chip area data and the negative weight, and the product of the density data and the second positive weight, the screening index value M corresponding to each clustering parameter value is determined:

[0099] M= M1*ω1+ M2*(-ω)+ M3*ω2

[0100] The intelligent sorting device uses the reference cluster subset corresponding to the maximum screening index value as the matching target cluster subset.

[0101] In this embodiment, the screening index value corresponding to each clustering parameter value is determined according to the product of the chip quantity data and the first positive weight, the product of the chip area data and the negative weight, and the product of the density data and the second positive weight, and the reference cluster subset with the largest screening index value is used as the matching target cluster subset. Clusters with a large number of chips, a small occupied area and a high density can be screened out to generate a target wafer map, thereby greatly improving the chip selection efficiency.

[0102] In one embodiment, performing a reorganization map process on a target cluster subset to obtain a target wafer map includes:

[0103] Obtain the chip density corresponding to the target cluster in the target cluster subset; the chip density is the chip density of the occupied area;

[0104] Determine the target area where the chip density meets the density conditions;

[0105] Extract the chip locations in the target area and generate a target wafer map.

[0106] The chip density of the target cluster may refer to the chip density in the area surrounded by the edge chips of the target cluster. The chip density corresponding to the target cluster may be the chip density of a single cluster or the chip density calculated by multiple target clusters. The chip density may be determined based on the ratio of the total number of chips in the area to the area of ​​the area, or the ratio of the total number of chips in the area to the square of the area of ​​the area.

[0107] Specifically, in response to the selected area, the intelligent sorting equipment can obtain the chip density corresponding to each target cluster in the area; when the chip density of the target cluster in the area reaches the density condition, the chip position of the target cluster in the area can be extracted to generate a target wafer map.

[0108] Optionally, the intelligent sorting device can traverse the target clusters in the target cluster subset to form a combination, and determine the chip density corresponding to each combination of the target clusters. For example, there are 5 target clusters in the target cluster subset, namely target clusters 1 to 5, then after traversing the combination, the values ​​obtained are 1, 2, 3, 4, 5, 1+2, 1+3, 1+4, 1+5, 2+3, 2+4, 2+5, 3+4, 3+5, 4+5, 1+2+3, 1+2+4, 1+2+5, 1+3+4, 1+3+5, 1+4+5, 2+3+4, 2+3+5, 2+4+5, 3+4+5, 1+2+3+4, 2+3+4+5, 1+2+3+4+5, and the corresponding chip densities can be calculated; determine the cluster combination whose chip density meets the density condition, extract the chip position in the combination, and generate the target wafer map. When there are more than one regions where the chip density reaches the density condition, the more than one regions are split to obtain the target wafer map corresponding to each region. When there are repeated target clusters in the region where the chip density reaches the density condition, the region with a large number of chips is selected to generate the target wafer map. If 1+2 reaches the chip density, and 1+2+3 also reaches the chip density, the chip position in 1+2+3 is selected to generate the target wafer map.

[0109] In this embodiment, the chip density corresponding to the target cluster in the target cluster subset is obtained, the chip position in the target area where the density meets the condition is extracted, and the target wafer map is generated to effectively extract the high-density area, reduce equipment empty jumps, and improve chip selection efficiency.

[0110] In one embodiment, extracting a target cluster subset whose area density meets a density condition and generating a target wafer map includes:

[0111] When the regional densities of at least two regions meet the density condition, the at least two regions are split to generate at least two target wafer maps.

[0112] Specifically, when there are at least two target areas where the chip density reaches a density condition, the intelligent sorting device splits the at least two areas to generate a target wafer map corresponding to each target area.

[0113] For example, Fig.10 Schematic diagram of a target wafer map corresponding to each target area in an embodiment. Fig.10 Figure (a) is Figure 8 In (c), the clustering parameter value eps-ε is 0.08, and Minpts is 1, and the three clusters with the highest number of clusters are selected (refer to the cluster subset), which is Fig.10 The purple, green and red target clusters in (b) correspond to the target wafer maps as shown in Fig.10 The three dashed boxes in (c) of the figure. Obviously, the area of ​​the wafer map is reduced by more than half, which can greatly reduce the time consumed by the equipment's empty jump. Fig.11 In one embodiment Fig.10 The corresponding polygon outline diagram generated according to the chip coordinates. Fig.11 When (a) in the figure is a single BIN, Fig.10 Schematic diagram of the polygonal outline of the wafer map in (a). Fig.11 Figures (b) to (d) in the figure are the polygonal outlines after the split corresponding to the third set of clustering parameters, which are the polygonal outlines of cluster 1, cluster 2, and cluster 3, respectively; they correspond to three target wafer maps. Chip selection is performed in a Z-shape, and when there is no next chip to be selected in a row, the row is skipped. It can be seen that after the wafer map is split according to the target area, the chip selection area is reduced, the selection path is greatly shortened, and the chip selection time is greatly shortened.

[0114] For example, Fig.12 In one embodiment Fig. 9 (c) Schematic diagram of the target wafer corresponding to each target area in Figure . Fig.12 Figure (a) is Fig. 9 Figure (c) shows a circular shape in terms of distribution. If you follow the conventional map and take the default Z-shaped path, there will be a lot of empty jumps, which is very time-consuming. When there is enough time and the number of particles on the entire sheet is full to ensure accuracy, you can directly select them without local splitting. This situation is OK when the number of particles on the entire sheet is within 10-20k. When the number is greater than 20k, it is very time-consuming. Due to the differences in the distribution of different wafers, some may have a large number of empty jumps. When you need to consider saving time, you can roughly split it into two parts. Fig.12In (b), the same BIN can be divided into two clusters, purple and red, by adjusting the EPS parameter according to the distribution. These two clusters are split into a new map to save time for empty jumps. Fig.12 Please select slowly from the picture (c) above.

[0115] Fig.13 In one embodiment Fig.12 The corresponding polygon outline diagram generated according to the chip coordinates. Fig.13 Figure (a) shows the polygonal outline of the target area corresponding to cluster 1; Fig.13 Figure (b) in Figure 13 shows the polygonal outline of the target area corresponding to cluster 2; Figure (c) in Figure 13 shows the polygonal outline of the target area corresponding to cluster 3. Then, the intelligent sorting device is based on Fig.13 The chip coordinates in Figure (a) are used for chip selection. Fig.13 The chip coordinates in the middle (b) are used for chip selection. Fig.13 The chip coordinates in the middle (c) map are used for chip selection. The order of the three maps is not limited. Fig.13 The split selection path is relative to Fig.12 The selection path corresponding to Figure (a) is greatly shortened.

[0116] In this embodiment, when the regional density of at least two areas reaches the density condition, the at least two areas are split and processed to generate at least two target wafer maps, which can greatly reduce the empty jumps in the wafer picking process and improve the wafer picking efficiency.

[0117] In one embodiment, a wafer chip selection method includes:

[0118] Step (a1), obtain the wafer map and the selected BIN.

[0119] Step (a2), according to the selected BIN and wafer map, different clustering parameter values ​​are used to perform density-based clustering processing to obtain a cluster set under each clustering parameter value.

[0120] Step (a3) ​​is to select a preset number of clusters with the highest proportion or the largest density under each cluster parameter value from the cluster cluster sets under each cluster parameter value, and obtain a reference cluster cluster subset under each cluster parameter value.

[0121] Step (a4), obtaining chip quantity data of the reference cluster subset under each clustering parameter.

[0122] Step (a5), obtaining chip area data of the reference cluster subset under each clustering parameter.

[0123] Step (a6), obtaining chip density data of the reference cluster subset under each clustering parameter.

[0124] Step (a7), determining the screening index value corresponding to each clustering parameter value according to the product of the chip quantity data and the first positive weight, the product of the chip area data and the negative weight, and the product of the chip density data and the second positive weight.

[0125] Step (a8), taking the reference cluster subset with the largest screening index value as the target cluster subset.

[0126] Step (a9), obtaining the chip density corresponding to the target cluster in the target cluster subset. The chip density is the chip density of the occupied area.

[0127] Step (a10), determining a target area where the chip density reaches a density condition.

[0128] Step (a11), extracting the chip positions in the target area and generating a target wafer map.

[0129] Step (a12), when there are at least two target areas, splitting the at least two target areas to generate a target wafer map corresponding to each target area.

[0130] Step (a13), chip selection is performed based on the target wafer map.

[0131] In this embodiment, density-based clustering processing is performed according to the selected BIN and wafer map to obtain a cluster cluster set, and according to the cluster cluster screening rule, a cluster cluster subset matching the cluster cluster screening rule is screened out from the cluster cluster set to obtain a target wafer map, and chip selection is performed based on the target wafer map, that is, chips in high-density areas are grouped together for screening through a density-based clustering algorithm, and a target wafer map is formed after reorganization map processing, which can greatly shorten the chip picking path, improve the efficiency, accuracy, reliability and flexibility of chip selection, and improve overall production capacity.

[0132] It should be understood that, although the steps in the flowcharts involved in the above embodiments are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above embodiments may include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0133] Based on the same inventive concept, the embodiment of the present application also provides a wafer chip selection device for implementing the wafer chip selection method involved above. A wafer chip selection device is used to implement the steps of the wafer chip selection method in each embodiment of the present application. The implementation solution provided by the device to solve the problem is similar to the implementation solution recorded in the above method, so the specific limitations can be referred to the limitations of the wafer chip selection method above, which will not be repeated here.

[0134] Each module in the wafer chip selection device can be implemented in whole or in part by software, hardware, or a combination thereof. Each module can be embedded in or independent of a processor in a computer device in the form of hardware, or can be stored in a memory in a computer device in the form of software, so that the processor can call and execute operations corresponding to each module.

[0135] In an exemplary embodiment, an intelligent sorting device is provided. The intelligent sorting device may be a terminal, and its internal structure diagram may be as shown in FIG. Fig.14 As shown. The intelligent sorting device includes a processor, a memory, an input / output interface, a communication interface, a display unit and an input device. Among them, the processor, the memory and the input / output interface are connected through a system bus, and the communication interface, the display unit and the input device are connected to the system bus through the input / output interface. Among them, the processor of the intelligent sorting device is used to provide computing and control capabilities. The memory of the intelligent sorting device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The input / output interface of the intelligent sorting device is used to exchange information between the processor and the external device. The communication interface of the intelligent sorting device is used to communicate with an external terminal in a wired or wireless manner, and the wireless manner can be realized through WIFI, a mobile cellular network, near field communication (Near Field Communication, NFC) or other technologies. When the computer program is executed by the processor, a chip selection method for a wafer is realized. The display unit of the intelligent sorting device is used to form a visually visible picture, which can be a display screen, a projection device or a virtual reality imaging device. The display screen can be a liquid crystal display screen or an electronic ink display screen. The input device of the intelligent sorting device can be a touch layer covering the display screen, or a button, trackball or touchpad set on the shell of the intelligent sorting device, or an external keyboard, touchpad or mouse.

[0136] Those skilled in the art will understand that Fig.14The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0137] In an exemplary embodiment, a computer device is provided, including a memory and a processor, wherein a computer program is stored in the memory, and the processor implements the steps of each embodiment of the present application when executing the computer program.

[0138] In one embodiment, a computer program product is provided, including a computer program, which implements the steps of various embodiments of the present application when executed by a processor.

[0139] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiments can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in this application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited to this. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, an artificial intelligence (AI) processor, etc., but are not limited to this.

[0140] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0141] The above embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A wafer chip selection method, characterized in that: The method comprises: Get wafer map and selected BIN; Performing density-based clustering processing according to the selected BIN and the wafer map to obtain a cluster set; According to the cluster screening rule, a target cluster subset matching the cluster screening rule is screened out from the cluster set; Performing reorganization map processing according to the target cluster subset to obtain a target wafer map; Chip selection is performed based on the target wafer map.

2. The method according to claim 1, characterized in that The performing density-based clustering processing according to the selected BIN and the wafer map to obtain a cluster set includes: According to the selected BIN and the wafer map, different clustering parameter values ​​are used to perform density-based clustering processing to obtain a cluster cluster set under each clustering parameter value; The step of selecting a target cluster subset matching the cluster screening rule from the cluster set according to the cluster screening rule includes: According to the cluster screening rule, a target cluster subset matching the cluster screening rule is screened out from the cluster set under each cluster parameter value.

3. The method according to claim 2, characterized in that The step of filtering out a target cluster subset matching the cluster screening rule from the cluster set under each cluster parameter value according to the cluster screening rule includes: From the clustering cluster sets under each clustering parameter value, a preset number of clustering clusters with the largest number of chips or the largest chip density under each clustering parameter value are screened out to obtain a reference clustering cluster subset under each clustering parameter value; The reference cluster subsets under each clustering parameter value are screened according to the characteristic data of the reference cluster subsets to obtain the target cluster subsets.

4. The method according to claim 3, characterized in that: The step of screening the reference cluster subsets under each cluster parameter value according to the characteristic data of the reference cluster subsets to obtain the target cluster subsets includes: Obtaining chip quantity data of the reference cluster subset under each clustering parameter; Obtaining chip area data of the reference cluster subset under each clustering parameter; Obtaining chip density data of the reference cluster subset under each clustering parameter; According to the chip quantity data, the chip area data and the chip density data, a matching target cluster subset is screened out from the reference cluster subsets under each cluster parameter value.

5. The method according to claim 4, characterized in that The step of selecting a matching target cluster subset from the reference cluster subsets under each cluster parameter value according to the chip quantity data, the chip area data and the chip density data includes: Determine the screening index value corresponding to each clustering parameter value according to the product of the chip quantity data and the first positive weight, the product of the chip area data and the negative weight, and the product of the chip density data and the second positive weight; The reference cluster subset with the largest screening index value is used as the target cluster subset.

6. The method according to claim 1, characterized in that The step of performing reorganization map processing according to the target cluster subset to obtain a target wafer map includes: Obtaining the chip density corresponding to the target cluster in the target cluster subset; the chip density is the chip density of the occupied area; Determine the target area where the chip density meets the density conditions; The chip positions in the target area are extracted to generate a target wafer map.

7. The method according to claim 6, characterized in that The step of extracting chip positions in the target area and generating a target wafer map includes: When there are at least two target areas, the at least two target areas are split to generate a target wafer map corresponding to each target area.

8. An intelligent sorting device, comprising a memory and a processor, wherein the memory stores a computer program, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 7 are implemented.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

10. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

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