Chip selection method, device, readable storage medium and program product for wafers

Abstract

The present application relates to a wafer chip selection method, device, readable storage medium, and program product. The method comprises: obtaining a wafer map and selected BINs; performing density-based clustering based on the selected BINs and the wafer map to obtain a cluster set; screening a target cluster subset from the cluster set that matches the cluster screening rule based on the cluster screening rule; performing remap processing based on the target cluster subset to obtain a target wafer map; and performing chip selection based on the target wafer map. This method can improve chip selection efficiency.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a method, device, readable storage medium and program product for selecting chips from a wafer. Background Art

[0002] Wafers are the fundamental material for semiconductor manufacturing. Larger wafer sizes mean more chips can be produced under the same process conditions. Common wafer sizes include 4-inch, 6-inch, 8-inch, and 12-inch wafers. The higher the utilization rate, the lower the cost per chip. A single chip on a wafer can be a single mass-production design or a combination of multiple designs for R&D, known as a multi-project wafer (MPW). Whether mass-production or R&D, the greater the number of chips or the variety of designs on a wafer, combined with differences in process consistency, will result in varying performance distributions across the wafer. After testing each chip, binning is performed based on a combination of multiple data metrics to meet diverse market and project requirements. Traditionally, the physical address of the chip is combined with the BIN information on the wafer map to generate a new map with physical coordinates for chip selection. This pre-scanning approach addresses high-precision requirements to a certain extent, but it can be time-consuming when processing large numbers of chips. Summary of the Invention

[0003] Based on this, it is necessary to provide a chip selection method, device, readable storage medium and program product for wafers that can improve chip selection efficiency in response to the above technical problems.

[0004] A wafer chip selection method, the method comprising:

[0005] Get wafer map and selected BIN;

[0006] Performing density-based clustering according to the selected BIN and the wafer map to obtain a cluster set;

[0007] According to the cluster screening rule, a target cluster subset matching the cluster screening rule is screened out from the cluster set;

[0008] Performing reorganization map processing according to the target cluster subset to obtain a target wafer map;

[0009] Die selection is performed based on the target wafer map.

[0010] An intelligent sorting device includes a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the method described in each embodiment of the present application when executing the computer program.

[0011] A computer-readable storage medium stores a computer program, which, when executed by a processor, implements the steps of the method described in each embodiment of the present application.

[0012] A computer program product includes a computer program, which, when executed by a processor, implements the steps of the method described in each embodiment of the present application.

[0013] The chip selection method, device, readable storage medium and program product of the above-mentioned wafer perform density-based clustering processing according to the selected BIN and wafer map to obtain a cluster cluster set, and according to the cluster cluster screening rule, screen out a target cluster cluster subset that matches the cluster cluster screening rule from the cluster cluster set, and further perform reorganization map processing to obtain a target wafer map, and perform chip selection based on the target wafer map, that is, through a density-based clustering algorithm, the chips in the high-density area are grouped together for screening, and the target wafer map is formed after reorganization map processing, which can greatly shorten the chip picking path, improve the efficiency, accuracy, reliability and flexibility of chip selection, and improve overall production capacity. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the following briefly introduces the drawings required for use in the embodiments of the present application or related technical descriptions. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying any creative work.

[0015] Figure 1 A schematic flow chart of a method for selecting chips from a wafer according to an embodiment;

[0016] Figure 2 FIG. 1 is a schematic diagram of cluster distribution after density-based clustering processing using different clustering parameters in one embodiment;

[0017] Figure 3 is a schematic diagram of a target wafer map in one embodiment;

[0018] Figure 4 FIG. 1 is a schematic diagram of cluster distribution after density-based clustering processing using different clustering parameters in another embodiment;

[0019] Figure 5 is a schematic diagram of a target wafer map in another embodiment;

[0020] Figure 6 FIG. 1 is a schematic diagram of cluster distribution after density-based clustering processing using different clustering parameters in another embodiment;

[0021] Figure 7 A schematic diagram of a polygonal outline generated according to chip coordinates in one embodiment;

[0022] Figure 8 FIG. 1 is a schematic diagram of cluster distribution after density-based clustering processing using different clustering parameters in another embodiment;

[0023] Figure 9 Schematic diagram of cluster distribution after density-based clustering using different clustering parameters in another embodiment;

[0024] Figure 10 A schematic diagram of a target wafer map corresponding to each target area in one embodiment;

[0025] Figure 11 In one embodiment Figure 10 The corresponding polygon outline diagram generated according to the chip coordinates;

[0026] Figure 12 In one embodiment Figure 9 (c) Schematic diagram of the target wafer corresponding to each target area in the figure;

[0027] Figure 13 In one embodiment Figure 12 The corresponding polygon outline diagram generated according to the chip coordinates;

[0028] Figure 14 This is a diagram of the internal structure of an intelligent sorting device in one embodiment. DETAILED DESCRIPTION

[0029] In order to make the purpose, technical solutions and advantages of this application more clear, the following further describes this application in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.

[0030] The wafer chip sorting method provided in the embodiments of the present application can be applied to intelligent sorting equipment for chip sorting. BIN sorting is a key step in chip sorting, classifying the chips on the wafer into different grades. The total number of chips on a wafer can range from a few hundred to several hundred thousand depending on the size of the individual chips, an extremely large number. Combined with the diversity of design types or the differences that may be introduced by process consistency, the chips on the entire wafer exhibit different levels of performance distribution, thereby being divided into different grades. This process is called BIN sorting. BIN sorting typically includes two or more types (good and bad products, i.e., two BINs. If the sorting precision is higher, the good products may contain more grades, i.e., multiple BINs). When multiple BINs are sorted, the chip picking order is first arranged. The intelligent sorting equipment's chip picking path is set to scan row by row, following a Z-shaped route to shorten chip picking time. For example, if BIN 4 is currently being picked, the chip is picked from BIN 4 in the current row. When BIN 4 is no longer in the current row, the chip is picked from the next row. Intelligent sorting equipment can also perform real-time self-calibration of position. When the software locks onto the target chip, it will automatically correct the position information to ensure the accuracy of the step distance of the next step. If there are too many consecutive vacancies in the chips on the wafer, it will not be possible to accurately locate and calibrate the position in real time. The accumulated error will cause wrong rows or columns. Therefore, if there are many consecutive vacancies on the wafer, there will be a certain amount of error accumulation, which will increase the error rate.

[0031] Traditionally, equipment manufacturers use a pre-scan mode that combines the chip's physical address with the map's BIN information to generate a new map with physical coordinates. This pre-scan mode addresses high-precision requirements to a certain extent (for example, missing rows due to slight offsets of small chips). However, when the number of chips is large (for example, greater than 20k or even 200k), pre-scanning can be time-consuming. The principle is to first photograph all the chips on the wafer in sections, extract the physical coordinates, and then combine the images with the map's BIN information to generate a new wafer map. Pre-scanning must be completed in a single pass; even slight changes in the wafer's physical position during the process require a re-scan to ensure accurate physical location information. Some equipment manufacturers utilize connected domains, a common technique in image processing, typically used to identify objects or regions in images. Connected domain algorithms construct a hierarchical tree based on distances or similarities between data objects, then divide clusters into different levels according to different segmentation criteria. Currently, the application of connected domains is limited, with only 4-connected and 8-connected methods commonly used, limiting their application to complex scenarios. Therefore, a chip selection method for wafers in an embodiment of the present application is proposed, which improves the efficiency, flexibility and accuracy of chip selection by performing chip screening in a density-based clustering processing manner.

[0032] In one embodiment, Figure 1 FIG. 1 is a flow chart of a method for selecting chips from a wafer in one embodiment, which is described by taking the method applied to an intelligent sorting device as an example, and includes the following steps:

[0033] Step 102: Obtain wafer map and selected BIN.

[0034] Specifically, a wafer map functions as a map of the chips on a wafer, containing the BIN information for each chip and the relative positional relationships between chips. Intelligent sorting equipment uses this wafer map to sort chips. It's understood that a wafer map can be a map of the entire wafer or a portion of a wafer, depending on the needs. The wafer map can include the relative positional relationships (i.e., coordinate information) of each chip, as well as the BIN status of each chip, i.e., good chips (e.g., definition 6) and defective chips (e.g., definition 2). Alternatively, when there are multiple BINs, good chips can be classified into multiple categories (e.g., numbers or letters like 3, 5, and 8), and the BIN to be selected for the current chip selection process can be selected (e.g., only good BIN 6 can be selected). Alternatively, when there are multiple BINs, the order of chip selection can be pre-set (e.g., BIN 3 first, BIN 5 second, and BIN 8 last). It's understood that this wafer map can be pre-stored in the intelligent sorting equipment, a processed wafer map, or a wafer map generated through scanning or analysis. Then, in response to the triggering operation on the selected BIN, the selected BIN is obtained, and the selected BIN is specifically a single BIN.

[0035] Step 104 : Perform density-based clustering according to the selected BIN and wafer map to obtain a cluster set.

[0036] Density-based clustering differs from connected-domain clustering in that its core algorithm divides data objects into clusters based on their density. Specifically, high-density regions form clusters, while low-density regions serve as boundaries between clusters. Its advantage lies in discovering spatial clusters of arbitrary shapes without requiring a predefined number of clusters. Density-based clustering algorithms include DBSCAN (Density Based Spatial Clustering of Application with Noise), OPTICS (Ordering Points To Identify the Clustering Structure), and DENCLUE (DENsity-based CLUstEring). DBSCAN, for example, is a representative density-based clustering algorithm. It identifies regions of sufficiently high density and divides them into clusters. The core of the DBSCAN algorithm lies in the definition of density and the clustering process. It uses two key parameters: epsilon (neighborhood radius) and MinPts (minimum number of points threshold) to describe the density of data points. Clusters are formed by connecting density-reachable points. The core algorithm of DBSCAN is very sensitive to the selection of parameters ε and MinPts. Different parameter combinations may lead to completely different clustering results. The adjustment of epsilon and MinPts is relatively complex, and it is necessary to find the appropriate optimal parameter combination.

[0037] Specifically, the intelligent sorting device extracts corresponding BIN information in the wafer map according to the selected BIN, and clusters the BIN information through a density-based clustering algorithm to obtain a cluster set, which includes at least one cluster.

[0038] Step 106 : According to the cluster screening rule, a target cluster subset matching the cluster screening rule is screened from the cluster set.

[0039] The cluster selection rules are program rules set according to the actual use scenario. The cluster selection rules include but are not limited to the response to the selected cluster or the proportion rule.

[0040] Specifically, when the number of clusters in the cluster set is greater than one, a cluster subset is screened out in response to the selected cluster. Alternatively, when the number of clusters in the cluster set is greater than one, in response to the number ratio rule, clusters with a high number ratio are screened out, and clusters with a number ratio less than a preset ratio are deleted from the cluster set to screen out a cluster subset.

[0041] Step 108 : performing map reorganization processing according to the target cluster subset to obtain a target wafer map.

[0042] Specifically, the intelligent sorting equipment extracts or merges the chip coordinates from the target cluster subset to generate a target wafer map. The target wafer map is used to identify the locations of the chips to be sorted. This target wafer map contains BIN information, such as BIN and empty jumps.

[0043] Step 110 , performing chip selection based on the target wafer map.

[0044] Specifically, the intelligent sorting equipment performs chip selection along the target wafer map in a Z-shaped path.

[0045] In this embodiment, density-based clustering processing is performed according to the selected BIN and wafer map to obtain a cluster cluster set. According to the cluster cluster screening rule, a target cluster cluster subset matching the cluster cluster screening rule is screened out from the cluster cluster set, and further reorganization map processing is performed to obtain a target wafer map. Chip selection is performed based on the target wafer map, that is, the chips in the high-density area are grouped together for screening through a density-based clustering algorithm, and the target wafer map is formed after reorganization map processing. This can greatly shorten the chip picking path, improve the efficiency, accuracy, reliability and flexibility of chip selection, and improve overall production capacity.

[0046] In one embodiment, density-based clustering is performed based on the selected BINs and wafer maps to obtain a cluster set, including:

[0047] According to the selected BIN and wafer map, different clustering parameter values are used to perform density-based clustering processing to obtain the cluster set under each clustering parameter value;

[0048] According to the cluster screening rules, a target cluster subset matching the cluster screening rules is screened out from the cluster set, including:

[0049] According to the cluster screening rule, a target cluster subset matching the cluster screening rule is screened out from the cluster set under each cluster parameter value.

[0050] The density-based clustering algorithm, DBSCAN, is used as an example. It describes the density of data points using two key parameters: ε (epsilon, neighborhood radius) and MinPts (minimum point count threshold). The neighborhood radius represents the circular area centered on a point and with a radius of ε, which determines the set of other data points within the neighborhood of that point. The minimum point count threshold represents the minimum number of data points required within the neighborhood radius of ε. Clustering parameters can be within a set range or preset. For example, clustering can be performed with a neighborhood radius of 0.05 to 0.2, with each 0.05 increment being used to generate clusters corresponding to each parameter. Alternatively, the minimum point count threshold can be set to 1, 2, and so on. Alternatively, combinations of parameter values can be used to generate clusters corresponding to each parameter value.

[0051] Specifically, the intelligent sorting device can, based on the principle of screening for the largest number of chips, screen out a preset number of clusters with the largest number of chips from the cluster set under each cluster parameter value, thereby obtaining a reference cluster subset under each cluster parameter value; then, from the reference cluster subset, screen out a reference cluster subset with the largest total number of chips, thereby obtaining a target cluster subset. Alternatively, based on the principle of density screening, the device can screen out a preset number of clusters with the highest density from the cluster set under each cluster parameter value, thereby obtaining a reference cluster subset under each cluster parameter value; then, from the reference cluster subset, screen out a reference cluster subset with the highest total density, thereby obtaining a target cluster subset.

[0052] Optionally, the cluster screening rule is a selection rule, and in response to a triggered cluster set selection operation, a selected target cluster subset is screened out from the cluster set under each cluster parameter value.

[0053] For example, Figure 2 The figure is a schematic diagram of cluster distribution after density-based clustering processing is performed using different clustering parameters in one embodiment. Figure 2 This is a part of a wafer, and the selected BIN is BIN 5. The purple dots are the chips corresponding to cluster 1. The example with different clustering parameter values for the eps-ε parameter is used for illustration. Figure 2 In (a), the eps-ε value is 0.08, in (b), the eps-ε value is 0.1, and in (c), the eps-ε value is 0.15, and the MinPts value of each graph is 1. It can be understood that, Figure 2 Different colors represent different clusters.

[0054]

[0055]

[0056] Note: Cluster 2 in the table represents the second largest cluster in terms of number of clusters. Figure 2 The same is true for cluster 2 and cluster 3. As shown in Table 2, the number / density of clusters 2 and 3 is very low and can be omitted. Therefore, taking the reference cluster subset containing cluster 1 as an example, Figure 2 Figure (a) in Figure 2 Figure (b) and Figure 2 The proportion of cluster 1 in (c) is not much different, and both are greater than 90%; Figure 2 In the figure (a), cluster 1 has the highest area saving, so the target cluster subset is cluster 1 when ε=0.08 and MinPts=1. If there is enough time and the whole image is full of particles, a large number of empty jumps can be accepted without considering the time cost while ensuring the accuracy. In this case, you can choose Figure 2 Figure (b) or Figure 2 Cluster 1 in (c) is used as the target cluster subset (either 92.7% or 94% is acceptable).

[0057] If you want to save time, or have already selected one or two BINs, and there are many vacancies in the chip particles, that is, when the accuracy is reduced, you will choose Figure 1 Cluster 1 (high concentration, accounting for 93.5%), that is, the green branches are screened out to avoid Figure 2 The empty jumps in the yellow area shown in Figure (d) or if the yellow area is other BINs that have been selected before, there are many vacancies, which will cause cumulative errors and affect the accuracy.

[0058] Figure 2 The distribution map of Figure (e) is the adjusted one, that is, Figure 1 Only cluster 1 (purple) is selected, and all other clusters are deleted, leaving only the densely distributed areas. The regenerated map is Figure 2 Figure (e) only retains the purple area and reduces the scattered distribution. Figure 3 Schematic diagram of a target wafer map in one embodiment. Figure 3 This is also the TXT text used for device recognition. The blue dotted box is the adjusted target wafer map, which reduces nearly 50% of empty jumps compared to the initial wafer map.

[0059] If time is sufficient and the number of particles on the entire wafer is sufficient to ensure accuracy, then direct selection can be performed without partial splitting. This is acceptable for wafers with a total number of 10-20k particles, but becomes very time-consuming when the number exceeds 20k. Due to the differences in distribution across wafers, some may experience a large number of empty jumps. In summary, different cluster selection rules can be set based on different needs, so that the selected cluster subset meets specific requirements.

[0060] In this embodiment, since the density-based clustering algorithm is more sensitive to the selection of clustering parameters, it is necessary to use different clustering parameter values for clustering according to the selected BIN and wafer map, obtain a set of cluster clusters under each clustering parameter value, and filter out a matching cluster cluster subset according to the cluster cluster screening rules. This can greatly shorten the wafer picking path, improve the accuracy, reliability, and flexibility of the operation process, and improve overall production capacity.

[0061] In one embodiment, according to the cluster screening rule, a target cluster subset matching the cluster screening rule is screened out from the cluster set under each cluster parameter value, including:

[0062] From the cluster sets under each cluster parameter value, a preset number of clusters with the largest number of chips or the largest chip density under each cluster parameter value are selected to obtain a reference cluster subset under each cluster parameter value;

[0063] The reference cluster subsets under each clustering parameter value are screened according to the characteristic data of the reference cluster subsets to obtain the target cluster subsets.

[0064] The maximum number of chips can be measured by the number of chips or the percentage of chips. The maximum number of chips can be the largest total number of chips or the highest percentage of chips. The percentage of chips refers to the ratio of the number of chips in the cluster to the total number of chips in the BIN. The maximum chip density can be the largest ratio of the number of chips to the total chip area or the largest ratio of the number of chips to the square of the total chip area.

[0065] Specifically, the cluster screening rules include selecting a preset number of clusters with the largest number of chips or the highest chip density, and also include screening a reference cluster subset based on further feature data. The chip quantity ratio refers to the ratio of the number of chips in the cluster to the total number of chips in the BIN. The preset number of clusters with the highest chip quantity ratio refers to obtaining the ratio of each cluster, sorting from high to low, and selecting the preset number of clusters with the highest sorting ratio; thereby obtaining a reference cluster subset. For example, if the cluster parameter value A corresponds to clusters 1-50, the five clusters with the highest quantity ratio need to be selected. Clusters 1-5 have the highest quantity ratio, so the reference cluster subsets 1-5 corresponding to the cluster parameter value A are selected. If the cluster parameter value B corresponds to clusters 1-60, the five clusters with the highest quantity ratio need to be selected. Clusters 2-6 have the highest quantity ratio, so clusters 2-6 are selected, and the reference cluster subsets 2-6 corresponding to the cluster parameter value B are selected.

[0066] The characteristic data of the reference cluster subset refers to the total number, area, and density of chips used to characterize the reference cluster subset. Examples include chip count data, chip area data, and chip density data. The chip area data can be the total chip area or the chip area percentage. The chip area percentage is the ratio of the maximum length and maximum width of the cluster to the area of the bin, or the irregular area percentage (e.g., the ratio of the area occupied by the leftmost and rightmost parts of each row of the cluster to the area of the bin). Based on the characteristic data of the reference cluster subset, the intelligent sorting device screens the reference cluster subsets for each cluster parameter value, selecting clusters whose characteristic data conforms to the rules and obtaining the target cluster subset. For example, from reference cluster subsets 1-5 corresponding to cluster parameter value A and reference cluster subsets 2-6 corresponding to cluster parameter value B, the target cluster subset with the lowest area percentage is selected, namely, reference cluster subsets 2-6 corresponding to cluster parameter value B.

[0067] For example, Figure 4 FIG. 1 is a schematic diagram of cluster distribution after density-based clustering processing using different clustering parameters in another embodiment. Figure 4 The figure below shows the wafer map of BIN1, and the purple dots are the chips corresponding to cluster 1. Figure 4 The characteristic data is the chip area ratio.

[0068]

[0069] Intelligent sorting equipment can extract Figure 4 Cluster 1 in Figure (c) is deleted, and all other clusters are deleted, that is, only cluster 1 is included in the reference cluster subset. Table 3 shows that the proportion of cluster 1 in the three figures is similar, and the area proportion is the smallest when ε=0.08, so the best feature data is the area proportion. After reorganizing the map according to the target cluster subset, as shown in Figure 5 , which is a schematic diagram of a target wafer map in another embodiment. Figure 5 It is also the TXT text used for equipment recognition. The dotted box is the adjusted target wafer map, which reduces nearly 7% of empty jumps compared to the initial wafer map of a single BIN.

[0070] In this embodiment, a preset number of clusters with the highest proportion under each cluster parameter value are screened out from the cluster cluster set under each cluster parameter value to obtain a reference cluster cluster subset under each cluster parameter value. The reference cluster cluster subset under each cluster parameter value is screened according to the characteristic data of the reference cluster cluster subset to obtain a target cluster cluster subset, which can exclude scattered clusters, reduce empty jumps of equipment, and improve the efficiency of chip selection.

[0071] In one embodiment, the reference cluster subsets under various clustering parameter values are screened according to the characteristic data of the reference cluster subsets to obtain the target cluster subsets, including:

[0072] Obtain chip quantity data of the reference cluster subset under each clustering parameter;

[0073] Obtain chip area data of the reference cluster subset under each clustering parameter;

[0074] Obtain chip density data of the reference cluster subset under each clustering parameter;

[0075] According to the chip quantity data, chip area data and chip density data, a matching target cluster subset is screened out from the reference cluster subset under each clustering parameter value.

[0076] Among them, the reference cluster subset contains a preset number of clusters with the highest proportion. The chip quantity data can be the total number of chips or the chip quantity proportion. Among them, the chip quantity proportion refers to the ratio of the number of chips in the cluster to the total number of chips in the BIN. The chip area data can be the total chip area or the chip area proportion. Among them, the chip area proportion is the ratio of the area of the maximum length and maximum width of the cluster to the area of the BIN; or the irregular area proportion (such as the area occupied by the leftmost and rightmost areas of each row of the cluster, or the area of the polygonal outline calculated by the Monte Carlo algorithm, etc., to the area of the BIN). The chip density data refers to the ratio of the number of chips to the total chip area, or it can be the ratio of the number of chips to the square of the total chip area.

[0077] Feature data includes M1, M2, and M3, where M1 refers to the chip count percentage, M2 refers to the chip area percentage, and M3 refers to the chip density. Parameter combinations refer to clustering parameter combinations. Results obtained based on different clustering parameter values are automatically listed for comparison.

[0078] ① Chip Quantity Ratio M1: This is the combination of the first N clusters, where N is the sum of the first few clusters' proportions > 90%. Cluster information is displayed in descending order of proportion. Scattered clusters after cluster N can be ignored, or those with a proportion less than a set value can be ignored.

[0079] ② Chip Area Ratio M2: This shows the effective area ratio of each cluster map after clustering. For example, this is the area ratio after map row and column optimization. If the area is complex, polygonal Monte Carlo approximation can also be used to estimate the relative area.

[0080] ③ Chip density M3: Density is the relative value of the proportion of the number of chips to the proportion of the area occupied. The higher the density, the higher the efficiency of picking up valid chips per unit time.

[0081] Filter criteria: SUM = Chip Quantity Percentage * First Positive Weight + Chip Quantity Percentage * Negative Weight + Chip Density * Second Positive Weight. Adjust the weights based on actual conditions to meet different priorities.

[0082] For example, Figure 2 The same example is analyzed in . Figure 6 The following is a schematic diagram of the distribution of clusters after density-based clustering processing using different clustering parameters in another embodiment. First, data preprocessing is performed, a small part of a wafer is selected (a total of about 60k), and the BIN to be selected, namely BIN5, is extracted, with a quantity of about 14.6k. Using a For loop, the dynamic parameter combination is traversed within a certain range, DBSCAN clustering is performed, and the result of each combination is output. Dynamic parameter combinations such as eps-ε: 0.05-0.2, step: 0.01, MinPts: 1, 2, etc., the parameter range is an empirical value. Take the preset number of clusters with the highest proportion as 1, that is, the reference cluster subset only includes cluster 1 as an example for explanation. Parameter combination 1 corresponds to Figure 6 In Figure (a), parameter combination 2 corresponds to Figure 6 In Figure (b), parameter combination 3 corresponds to Figure 6 In Figure (c), parameter combination 4 corresponds to Figure 6 Table 4 shows the output results of several dynamic combinations.

[0083]

[0084] From the data table, we can see that among the four parameter groups, the first three clustering parameter combinations have a cluster ratio greater than 90%, and the chip number difference does not exceed 200 pcs, so they can all be selected. Then, in terms of map area optimization and clustering speed, the map area of group 3 is 50% smaller, and the density is the highest from the ratio point of view, so group 3 is the optimal combination, that is, the target cluster subset includes cluster 1 corresponding to group 3 cluster parameters. The optimized figure is as follows: Figure 2 As shown in Figure (e), the optimized map area is reduced by half and the path is also reduced by half. Figure 7 A schematic diagram of a polygon outline generated according to chip coordinates in one embodiment. Figure 7 Figure (a) is a schematic diagram of the polygon outline corresponding to the initial wafer map of a single BIN. Figure 7 Figure (b) shows the polygonal outline of cluster 1 corresponding to the third set of clustering parameters. After comparison, it is found that the polygonal outline is shortened by half, and therefore the corresponding chip selection path is also shortened by half.

[0085] For example, Figure 8 FIG. 1 is a schematic diagram of cluster distribution after density-based clustering processing using different clustering parameters in another embodiment. Figure 8The purple dot in the middle is the chip corresponding to cluster 1. First, data preprocessing is performed to select a small part of a wafer ( Figure 8 The total amount of the corresponding whole wafer is about 260k), and the BIN to be selected is extracted, which is about 64k. Using a For loop, the dynamic parameter combination is traversed within a certain range, DBSCAN clustering is performed, and the results of each clustering parameter combination are output. Dynamic clustering parameter combinations such as eps-ε: 0.05-0.2, step: 0.01, MinPts: 1, 2, etc. The parameter range is an empirical value. Take the preset number of clusters as 3, that is, the reference cluster subset contains clusters 1~3 (the cluster with the largest number of chips) as an example for explanation. Parameter combination 1 corresponds to Figure 8 In Figure (a), parameter combination 2 corresponds to Figure 8 In Figure (b), parameter combination 3 corresponds to Figure 8 In Figure (c), parameter combination 4 corresponds to Figure 8 Figure (d) in the figure. Tables 5 to 7 show the output results of several dynamic combinations:

[0086]

[0087]

[0088]

[0089] Note: Cluster 2 in the table represents the second largest cluster in terms of number of clusters. Figure 2 The same is true for cluster 2 and cluster 3. From the data, because the distribution of the three clusters is very concentrated and dispersed, the differences between the several combinations are not large, and the proportion of cluster 1 is 90%; from the perspective of area optimization, such as Figure 8 In Figures (c) and (d), clustering parameters for groups 3 and 4 are better, and the difference in density ratio is very small. The proportion of the first three clusters is similar across all four groups, so both groups 3 and 4 can be used. In other words, the target cluster subset includes clusters 1-3 corresponding to the third clustering parameter group or clusters 1-3 corresponding to the fourth clustering parameter group.

[0090] For example, Figure 9 FIG. 1 is a schematic diagram of cluster distribution after density-based clustering processing is performed using different clustering parameters in another embodiment. Figure 9The purple dot in the middle is the chip corresponding to cluster 1. First, data preprocessing is performed, and a small part of a wafer is selected (a total of about 60k), and the BIN to be selected, namely BIN5, is extracted, with a quantity of about 14.6k. Using a For loop, the dynamic parameter combination is traversed within a certain range, DBSCAN clustering is performed, and the results of each combination are output. Dynamic parameter combinations such as eps-ε: 0.05-0.2, step: 0.01, MinPts: 1, 2, etc., the parameter range is an empirical value. Take the preset number of clusters with the largest number of chips as 2, that is, the reference cluster subset only contains clusters 1~2 (the clusters with the highest proportion) as an example for explanation. Table 8 shows the output results of several sets of dynamic combinations:

[0091]

[0092] It can be seen that when eps-ε is equal to 0.15, 0.1, 0.08 and 0.05, as Figure 9 In the graph (a), there is only one cluster, and the proportion is 100%. The clustering is meaningless, so the clustering is invalid. When eps-ε is 0.03 and Minpts is 1 and 2, Figure 9 In Figure (b), the area ratio is still 100%, so this clustering is meaningless. Only clustering parameter combination 7 is effective in area optimization, when eps-ε is 0.02 and Minpts is 1. Figure 9 In Figure (c), there are a total of 1415 clusters, and the first two clusters with the largest number of chips (reference cluster subsets) account for more than 90%, so they can be used as target cluster subsets. Figure 9 Figure (d) shows the wafer chip distribution diagram of cluster 1 (purple) and cluster 2 (red) with eps-ε of 0.02 and Minpts of 1.

[0093] In this embodiment, the chip quantity data represents the number of chips that can be currently selected, and the chip area data and chip density data are used to represent the concentration of the chips that can currently be selected. Both are important technical features for chip selection. By using the chip quantity data, chip area data and chip density data, a matching target cluster subset is screened out from the reference cluster subset under each cluster parameter value, and clusters with higher concentration can be screened out, thereby improving chip selection efficiency.

[0094] In one embodiment, according to the chip quantity data, the chip area data, and the chip density data, a matching target cluster subset is selected from the reference cluster subsets under each clustering parameter value, including:

[0095] Determine the screening index value corresponding to each clustering parameter value based on the product of the chip quantity data and the first positive weight, the product of the chip area data and the negative weight, and the product of the chip density data and the second positive weight;

[0096] The reference cluster subset with the largest screening index value is used as the target cluster subset.

[0097] The values of the first positive weight ω1 and the second positive weight ω2 can be the same or different. Negative weights are negative numbers, such as -ω. The first positive weight, negative weight, and second positive weight are configured based on empirical values. These empirical values can be pre-configured in the intelligent sorting equipment.

[0098] Specifically, during the chip selection process, for a single cluster, the higher the proportion of total chips, the better, the smaller the proportion of chip area, the better, and the higher the chip density, the better. Therefore, the chip quantity data M1 corresponds to the first positive weight ω1, the chip area data M2 corresponds to the negative weight -ω, and the chip density data M3 corresponds to the second positive weight ω2. Based on the product of the chip quantity data and the first positive weight, the product of the chip area data and the negative weight, and the product of the density data and the second positive weight, the screening index value M corresponding to each cluster parameter value is determined:

[0099] M= M1*ω1+ M2*(-ω)+ M3*ω2

[0100] The intelligent sorting device uses the reference cluster subset corresponding to the maximum screening index value as the matching target cluster subset.

[0101] In this embodiment, the screening index value corresponding to each clustering parameter value is determined based on the product of the chip quantity data and the first positive weight, the product of the chip area data and the negative weight, and the product of the density data and the second positive weight. The reference cluster subset with the largest screening index value is used as the matching target cluster subset. Clusters with a large number of chips, a small occupied area and a high density can be screened out to generate a target wafer map, thereby greatly improving the chip selection efficiency.

[0102] In one embodiment, performing a remap process on a target cluster subset to obtain a target wafer map includes:

[0103] Obtain the chip density corresponding to the target cluster in the target cluster subset; the chip density is the chip density of the occupied area;

[0104] Determine the target area where the chip density meets the density conditions;

[0105] Extract the chip locations in the target area and generate a target wafer map.

[0106] The chip density of a target cluster can refer to the chip density in the area enclosed by the edge chips of the target cluster. The chip density corresponding to a target cluster can be the chip density of a single cluster or the chip density calculated for multiple target clusters. The chip density can be determined based on the ratio of the total number of chips in a region to the area of the region, or the ratio of the total number of chips in a region to the square of the area of the region.

[0107] Specifically, in response to the selected area, the intelligent sorting equipment can obtain the chip density corresponding to each target cluster in the area; when the chip density of the target cluster in the area reaches the density condition, the chip position of the target cluster in the area can be extracted to generate a target wafer map.

[0108] Optionally, the intelligent sorting device can traverse the target clusters in the target cluster subset to form combinations, and determine the chip density corresponding to each target cluster combination. For example, if there are five target clusters in the target cluster subset, namely target clusters 1 to 5, then after traversing the combinations, the following are obtained: 1, 2, 3, 4, 5, 1+2, 1+3, 1+4, 1+5, 2+3, 2+4, 2+5, 3+4, 3+5, 4+5, 1+2+3, 1+2+4, 1+2+5, 1+3+4, 1+3+5, 1+4+5, 2+3+4, 2+3+5, 2+4+5, 3+4+5, 1+2+3+4, 2+3+4+5, 1+2+3+4+5, and the corresponding chip density can be calculated. The cluster combination whose chip density meets the density condition is determined, the chip positions in the combination are extracted, and the target wafer map is generated. If there are more than one region where the chip density meets the density condition, the more than one region is split and the target wafer map corresponding to each region is obtained. If there are repeated target clusters in the region where the chip density meets the density condition, the region with the largest number of chips is selected to generate the target wafer map. For example, if 1+2 meets the chip density, and 1+2+3 also meets the chip density, the chip position in 1+2+3 is selected to generate the target wafer map.

[0109] In this embodiment, the chip density corresponding to the target cluster in the target cluster subset is obtained, the chip position in the target area where the density meets the conditions is extracted, and a target wafer map is generated to effectively extract the high-density area, reduce equipment empty jumps, and improve chip selection efficiency.

[0110] In one embodiment, extracting a target cluster subset whose area density meets a density condition and generating a target wafer map includes:

[0111] When the regional densities of at least two regions meet the density condition, the at least two regions are split to generate at least two target wafer maps.

[0112] Specifically, when the chip density of at least two target areas reaches a density condition, the intelligent sorting equipment splits the at least two areas and generates a target wafer map corresponding to each target area.

[0113] For example, Figure 10 Schematic diagram of a target wafer map corresponding to each target area in an embodiment. Figure 10 Figure (a) is Figure 8 In (c), the cluster parameter value eps-ε is 0.08 and Minpts is 1, from which the three clusters with the highest number of clusters are selected (reference cluster subset), which are Figure 10 In (b), the purple, green, and red target clusters correspond to the target wafer maps. Figure 10 The three dashed boxes in (c) of Figure 1 clearly reduce the wafer map area by more than half, which can greatly reduce the time consumed by equipment idle jumps. Figure 11 In one embodiment Figure 10 The corresponding polygon outline diagram generated according to the chip coordinates. Figure 11 When the image (a) is a single BIN, Figure 10 Schematic diagram of the polygonal outline of the wafer map in (a). Figure 11 Figures (b) through (d) show the polygonal outlines of clusters 1, 2, and 3 after splitting for the third set of clustering parameters. These correspond to three target wafer maps. Chip picking is performed in a Z-shaped pattern, with rows skipped if there are no more chips to be picked. Splitting the wafer map by target area reduces the chip picking area and significantly shortens the picking path, significantly reducing chip picking time.

[0114] For example, Figure 12 In one embodiment Figure 9 Schematic diagram of the target wafer corresponding to each target area in Figure (c). Figure 12 Figure (a) is Figure 9 The distribution of Figure (c) is in the shape of a ring. If you follow the conventional map and take the default Z-shaped path, there will be a lot of empty jumps, which is very time-consuming. When there is enough time and the number of particles on the entire sheet is full to ensure accuracy, then you can directly select them without local splitting. This situation is okay when the number of particles on the entire sheet is within 10-20k. When the number is greater than 20k, it is very time-consuming. Due to the differences in the distribution of different wafers, some may have a large number of empty jumps. When you need to consider saving time, you can roughly split it into two parts. Figure 12In the (b) diagram, the same BIN can be divided into two clusters, purple and red, by adjusting the EPS parameters according to the distribution. These two clusters are split into new maps to save the time of empty jumps. Figure 12 Then slowly select from the (c) picture.

[0115] Figure 13 In one embodiment Figure 12 The corresponding polygon outline diagram generated according to the chip coordinates. Figure 13 Figure (a) shows the polygonal outline of the target area corresponding to cluster 1; Figure 13 Figure (b) in Figure 13 shows the polygonal outline of the target area corresponding to cluster 2; Figure (c) in Figure 13 shows the polygonal outline of the target area corresponding to cluster 3. Figure 13 The chip coordinates in the figure (a) are used for chip selection and processing. Figure 13 The chip coordinates in the middle (b) are used for chip selection. Figure 13 The chip coordinates in the middle (c) map are used for chip selection. The order of the three maps is not limited. Figure 13 The split selection path is relative to Figure 12 The selection path corresponding to Figure (a) is greatly shortened.

[0116] In this embodiment, when the regional density of at least two areas reaches the density condition, the at least two areas are split and processed to generate at least two target wafer maps, which can greatly reduce the empty jumps in the wafer picking process and improve the wafer picking efficiency.

[0117] In one embodiment, a method for selecting chips from a wafer includes:

[0118] Step (a1), obtain the wafer map and the selected BIN.

[0119] Step (a2): Based on the selected BIN and wafer map, different clustering parameter values are used to perform density-based clustering processing to obtain a set of cluster clusters under each clustering parameter value.

[0120] Step (a3) is to select a preset number of clusters with the highest proportion or the largest density under each cluster parameter value from the cluster cluster set under each cluster parameter value, and obtain a reference cluster subset under each cluster parameter value.

[0121] Step (a4), obtaining chip quantity data of the reference cluster subset under each clustering parameter.

[0122] Step (a5), obtaining chip area data of the reference cluster subset under each clustering parameter.

[0123] Step (a6), obtaining chip density data of the reference cluster subset under each clustering parameter.

[0124] Step (a7) determines the screening index value corresponding to each clustering parameter value based on the product of the chip quantity data and the first positive weight, the product of the chip area data and the negative weight, and the product of the chip density data and the second positive weight.

[0125] In step (a8), the reference cluster subset with the largest screening index value is used as the target cluster subset.

[0126] Step (a9) obtains the chip density corresponding to the target cluster in the target cluster subset. The chip density is the chip density of the occupied area.

[0127] Step (a10), determining the target area where the chip density reaches the density condition.

[0128] Step (a11), extracting the chip positions in the target area and generating a target wafer map.

[0129] Step (a12): when there are at least two target areas, splitting the at least two target areas to generate target wafer maps corresponding to the respective target areas.

[0130] Step (a13), chip selection based on the target wafer map.

[0131] In this embodiment, density-based clustering processing is performed according to the selected BIN and wafer map to obtain a cluster cluster set. According to the cluster cluster screening rule, a cluster cluster subset that matches the cluster cluster screening rule is screened out from the cluster cluster set to obtain a target wafer map. Chip selection is performed based on the target wafer map, that is, the chips in the high-density area are grouped together for screening through a density-based clustering algorithm, and the target wafer map is formed after reorganization map processing. This can greatly shorten the chip picking path, improve the efficiency, accuracy, reliability and flexibility of chip selection, and improve overall production capacity.

[0132] It should be understood that, although the steps in the flowcharts of the above embodiments are shown in sequence as indicated by the arrows, these steps are not necessarily performed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction on the execution of these steps, and these steps can be performed in other orders. Moreover, at least a portion of the steps in the flowcharts of the above embodiments may include multiple steps or multiple stages, and these steps or stages are not necessarily performed at the same time, but can be performed at different times. The execution order of these steps or stages is not necessarily to be performed in sequence, but can be performed in turn or alternately with other steps or at least a portion of steps or stages in other steps.

[0133] Based on the same inventive concept, the embodiments of the present application also provide a wafer chip selection device for implementing the wafer chip selection method involved above. A wafer chip selection device is used to implement the steps of the wafer chip selection method in each embodiment of the present application. The implementation solution provided by the device is similar to the implementation solution described in the above method, so the specific limitations can be found in the limitations of the wafer chip selection method above and will not be repeated here.

[0134] Each module in the aforementioned wafer chip selection apparatus may be implemented in whole or in part through software, hardware, or a combination thereof. Each module may be embedded in or independent of a processor in a computer device in hardware form, or may be stored in a computer device memory in software form, so that the processor can call and execute the corresponding operations of each module.

[0135] In an exemplary embodiment, an intelligent sorting device is provided. The intelligent sorting device may be a terminal, and its internal structure diagram may be as shown in FIG. Figure 14 As shown. The intelligent sorting device includes a processor, memory, an input / output interface, a communication interface, a display unit, and an input device. The processor, memory, and input / output interface are connected via a system bus, and the communication interface, display unit, and input device are connected to the system bus via the input / output interface. The processor of the intelligent sorting device is used to provide computing and control capabilities. The memory of the intelligent sorting device includes a non-volatile storage medium and internal memory. The non-volatile storage medium stores an operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage medium. The input / output interface of the intelligent sorting device is used to exchange information between the processor and external devices. The communication interface of the intelligent sorting device is used to communicate with external terminals via wired or wireless communication. The wireless communication method can be achieved through Wi-Fi, mobile cellular networks, near-field communication (NFC), or other technologies. When executed by the processor, the computer program implements a wafer chip selection method. The display unit of the intelligent sorting device is used to form a visual image and can be a display screen, a projection device, or a virtual reality imaging device. The display screen can be a liquid crystal display screen or an electronic ink display screen, and the input device of the intelligent sorting device can be a touch layer covering the display screen, or a button, trackball or touchpad set on the shell of the intelligent sorting device, or an external keyboard, touchpad or mouse, etc.

[0136] Those skilled in the art will understand that Figure 14The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than shown in the figure, or combine certain components, or have a different component arrangement.

[0137] In an exemplary embodiment, a computer device is provided, including a memory and a processor, wherein a computer program is stored in the memory, and the processor implements the steps of each embodiment of the present application when executing the computer program.

[0138] In one embodiment, a computer program product is provided, including a computer program, which implements the steps of various embodiments of the present application when executed by a processor.

[0139] Those skilled in the art will understand that all or part of the processes in the above-mentioned embodiments can be implemented by instructing the relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, database or other media used in the embodiments provided in this application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The databases involved in the various embodiments provided herein may include at least one of a relational database and a non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the various embodiments provided herein may be, but are not limited to, general-purpose processors, central processing units (CPUs), graphics processing units (GPUs), digital signal processors (DSPs), programmable logic devices (PLDs), quantum computing-based data processing logic devices, artificial intelligence (AI) processors, and the like.

[0140] The technical features of the above embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0141] The above embodiments merely illustrate several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that a person skilled in the art may make various modifications and improvements without departing from the spirit of the present invention, all of which fall within the scope of protection of the present application. Therefore, the scope of protection of the present application shall be determined by the appended claims.

Claims

1. A chip selection method for a wafer, characterized in that: The method comprises: Get wafer map and selected BIN; According to the selected BIN and the wafer map, different clustering parameter values are used to perform density-based clustering processing to obtain a cluster set under each clustering parameter value; From the cluster sets under each cluster parameter value, a preset number of clusters with the largest number of chips or the largest chip density under each cluster parameter value are selected to obtain a reference cluster subset under each cluster parameter value; Screening the reference cluster subsets under each clustering parameter value according to the characteristic data of the reference cluster subsets to obtain a target cluster subset; Performing reorganization map processing according to the target cluster subset to obtain a target wafer map; Die selection is performed based on the target wafer map.

2. The method according to claim 1, characterized in that The step of screening the reference cluster subsets under each clustering parameter value according to the characteristic data of the reference cluster subsets to obtain the target cluster subsets includes: Obtaining chip quantity data of the reference cluster subset under each clustering parameter; Obtaining chip area data of the reference cluster subset under various clustering parameters; Obtaining chip density data of the reference cluster subset under each clustering parameter; According to the chip quantity data, the chip area data and the chip density data, a matching target cluster subset is screened out from the reference cluster subsets under each clustering parameter value.

3. The method according to claim 2, characterized in that The step of selecting a matching target cluster subset from the reference cluster subsets under each clustering parameter value according to the chip quantity data, the chip area data, and the chip density data includes: Determining a screening index value corresponding to each clustering parameter value according to a product of the chip quantity data and a first positive weight, a product of the chip area data and a negative weight, and a product of the chip density data and a second positive weight; The reference cluster subset with the largest screening index value is used as the target cluster subset.

4. The method according to claim 1, wherein The reorganizing map processing according to the target cluster subset to obtain a target wafer map includes: Obtaining a chip density corresponding to a target cluster in the target cluster subset; the chip density is a chip density of an occupied area; Determine the target area where the chip density meets the density conditions; The chip positions in the target area are extracted to generate a target wafer map.

5. The method according to claim 4, characterized in that The step of extracting chip positions in the target area and generating a target wafer map includes: When there are at least two target areas, the at least two target areas are split to generate a target wafer map corresponding to each target area.

6. An intelligent sorting device, comprising a memory and a processor, wherein the memory stores a computer program, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 5 are implemented.

7. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 5 are implemented.

8. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 5 are implemented.

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