Verification method and device of ssd interrupt vector, computer device and storage medium

Abstract

The present application relates to the technical field of solid state disk, and discloses a verification method and device of SSD interrupt vector, computer equipment and storage medium.The method comprises the following steps: configuring parameters required for testing to obtain verification parameters; writing an interrupt test script according to the verification parameters; executing the interrupt test script and initiating an interrupt request to the SSD to trigger corresponding interrupts; capturing data packets related to interrupt processing; processing and analyzing the data packets to obtain processing and analysis results; comparing the processing and analysis results with preset indicators to obtain comparison results.Through the method of the present application, the calling conditions of interrupt vectors can be captured and analyzed in real time, thereby avoiding information omission caused by traditional static testing, and the interrupt script can be automatically generated and adjusted according to different workloads and task scenarios.In addition, through the automatic interrupt script generation and dynamic analysis process, the time and workload of manual configuration are significantly reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of solid state disk, more particularly, to a method and device for verifying an interrupt vector of an SSD, a computer device and a storage medium. BACKGROUND

[0002] With the rapid development of information technology, solid state disks (SSDs) have been widely used in enterprise-level applications, data centers, cloud computing infrastructure, high-performance computing (HPC), embedded systems, automotive electronic systems, Internet of Things (IoT) devices, and industrial control systems. In these applications, the stability and reliability of SSDs are critical to ensure the normal operation of the system and the safety of data. Interrupt verification technology, as an important means to evaluate the performance stability of SSDs under high load conditions, has attracted widespread attention from manufacturers and service providers.

[0003] However, the current verification methods for SSD interrupt processing still have many limitations. Traditional interrupt testing frameworks are mostly based on static performance evaluation techniques, using fixed test scenarios for verification. Although this method can verify the basic functions of SSDs to some extent, it lacks dynamic adaptability and cannot effectively respond to load changes and interrupt patterns in actual applications. Therefore, the test results often have great limitations and cannot fully reflect the performance of SSDs in actual applications.

[0004] On the other hand, existing simulation-based interrupt verification methods also have obvious shortcomings. Although simulation tools can simulate interrupt behavior and predict system responses to some extent, they cannot accurately reflect the interrupt processing performance of SSDs under real conditions due to differences between simulation environments and actual running environments, and the simulation method often relies on fixed parameters and assumptions. In particular, in high-load, multi-task application scenarios, the limitations of simulation methods are more pronounced, and they cannot effectively evaluate the performance bottlenecks of SSDs.

[0005] In addition, existing technologies also have great difficulties in interrupt vector verification. Since most existing technologies can only be observed through a black box, testers cannot effectively and accurately verify the actual performance of interrupt vectors by going deep into the system. This makes it difficult to effectively evaluate the response capability of the system under special conditions, which may lead to unstable performance of SSDs in actual applications.

[0006] In summary, the current verification methods for SSD interrupt processing have obvious shortcomings in dynamic response, flexibility, and interrupt vector verification. These limitations make it difficult for existing technologies to effectively support modern high-load, multi-task application requirements, limiting the application range of SSDs in various fields. Therefore, a new interrupt verification technology is urgently needed to improve the stability and reliability of SSDs under high-load environments and meet the needs of modern applications. SUMMARY

[0007] The present application aims to overcome the deficiencies of the prior art, and provide a verification method, device, equipment and medium for SSD interrupt vectors.

[0008] In order to solve the above technical problems, the present application adopts the following technical solutions:

[0009] In a first aspect, a verification method for SSD interrupt vectors is provided, comprising:

[0010] Configuring parameters required for testing to obtain verification parameters;

[0011] Writing an interrupt test script according to the verification parameters;

[0012] Executing the interrupt test script and initiating an interrupt request to the SSD to trigger corresponding interrupts;

[0013] Capturing data packets related to interrupt processing;

[0014] Processing and analyzing the data packets to obtain processing and analysis results;

[0015] Comparing the processing and analysis results with preset indicators to obtain comparison results.

[0016] In a second aspect, a verification device for SSD interrupt vectors is provided, comprising:

[0017] A configuration unit configured to configure parameters required for testing to obtain verification parameters;

[0018] A writing unit configured to write an interrupt test script according to the verification parameters;

[0019] An execution initiation unit configured to execute the interrupt test script and initiate an interrupt request to the SSD to trigger corresponding interrupts;

[0020] A capturing unit configured to capture data packets related to interrupt processing;

[0021] A processing and analyzing unit configured to process and analyze the data packets to obtain processing and analysis results;

[0022] A comparison unit configured to compare the processing and analysis results with preset indicators to obtain comparison results.

[0023] In a third aspect, a computer device is provided, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the above-mentioned verification method for SSD interrupt vectors.

[0024] In a fourth aspect, a computer-readable storage medium is provided, which stores a computer program. The computer program, when executed by a processor, implements the steps of the method for verifying an SSD interrupt vector.

[0025] The method for verifying an SSD interrupt vector can capture and analyze the calling conditions of the interrupt vector in real time by dynamically recording the interrupt response, thereby avoiding information omission caused by traditional static testing. The real-time nature not only greatly improves the accuracy of the interrupt verification result, but also ensures that the test result can truly reflect the performance of the SSD in actual application. This improvement is of great significance to ensuring the stability and reliability of the SSD in a high-load and multi-task environment. In addition, the method can automatically generate an interrupt script and adjust it according to different workloads and task scenarios. The flexibility of the method enables the test process to adapt to various dynamic conditions, thereby more effectively evaluating the performance of the SSD under different pressures. The adaptive test method ensures the stability of the SSD in actual use and provides a more reliable storage solution for users. Furthermore, the method significantly reduces the time and workload of manual configuration through the automated interrupt script generation and dynamic analysis process. This automated testing method not only improves the test efficiency, but also reduces the risk of test errors caused by human intervention. This enables users to quickly and easily obtain reliable results when evaluating the interrupt performance of the SSD, thereby accelerating the product development and optimization process.

[0026] The application will be further described below in conjunction with the accompanying drawings and specific embodiments. BRIEF DESCRIPTION OF DRAWINGS

[0027] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0028] Figure 1 A flowchart of the method for verifying an SSD interrupt vector provided by the embodiments of the present application is shown.

[0029] Figure 2 A schematic block diagram of the verification device for an SSD interrupt vector provided by the embodiments of the present application is shown.

[0030] Figure 3 A structural schematic diagram of a computer device in the embodiments of the present application is shown. DETAILED DESCRIPTION

[0031] With reference to the drawings of the embodiments of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described. Obviously, the described embodiments are a part of the embodiments of the present application, but not all the embodiments of the present application. Based on the embodiments in the present application, all the other embodiments obtained by a person of ordinary skill in the art without creative work fall within the scope of the present application.

[0032] It should be understood that the terms "comprising" and "including" as used in the specification and the appended claims indicate the presence of the described features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0033] It should also be understood that the terms used in the present application specification are only for the purpose of describing specific embodiments and are not intended to limit the present application. As used in the present application specification and the appended claims, the singular forms "a", "an" and "the" are intended to include the plural forms, unless the context clearly indicates otherwise.

[0034] It should be further understood that the term "and / or" as used in the present application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes these combinations.

[0035] With reference to the drawings of the specific embodiments shown, Figure 1 The present application discloses a method for verifying an SSD interrupt vector, comprising the following steps:

[0036] S110, configuring parameters required for testing to obtain verification parameters;

[0037] Specifically, in the verification process of the SSD interrupt vector, a series of parameters required for testing need to be configured first. These parameters include but are not limited to the model, capacity, interface type, read-write speed, workload mode, interrupt trigger condition, interrupt handling time threshold, etc. of the SSD. The configuration of these parameters aims to simulate various scenarios and conditions that the SSD may encounter in actual application environments, to ensure the comprehensiveness and accuracy of the verification. In specific implementation, these parameters can be configured through professional testing software or tools. First, according to the model and specifications of the SSD, the corresponding test template or configuration file is selected. Then, according to the testing requirements, parameters such as workload mode and interrupt trigger condition are adjusted. For example, specific read-write speeds, data block sizes, I / O request types, etc. can be set to simulate different application scenarios. At the same time, the interrupt handling time threshold can be set to evaluate the performance of the SSD in interrupt handling. After the parameters are configured, they will be converted into verification parameters for subsequent interrupt test script writing and execution. The exact values of the verification parameters will directly affect the accuracy and reliability of the test results.

[0038] The technical feature of configuring the parameters required for testing to obtain verification parameters has the following technical effects:

[0039] Improving the pertinence and accuracy of the test: By accurately configuring the parameters required for testing, various scenarios and conditions that the SSD may encounter in actual application environments can be simulated. This helps to ensure the pertinence and accuracy of the test results, so as to more accurately evaluate the performance of the SSD in interrupt handling.

[0040] Enhancing the flexibility of the test: The process of configuring test parameters allows testers to adjust and optimize according to actual needs. This enhances the flexibility of the test, making the test adaptable to different SSD models, specifications and application scenarios.

[0041] Reducing test costs: By accurately configuring test parameters, unnecessary waste of test resources can be avoided. For example, invalid tests under inappropriate test conditions can be avoided, thereby reducing test costs and time costs.

[0042] Providing data support for optimization: The process of configuring test parameters can also provide data support for the optimization of the SSD. By comparing test results under different parameter configurations, the bottlenecks and problems of the SSD in interrupt handling can be found out, thereby providing targeted suggestions and guidance for subsequent optimization work.

[0043] In an embodiment, the parameters required for testing are set through the instrument control panel and configuration files, including link establishment configuration, packet capture rules, etc. In addition, according to the testing requirements, the corresponding control modules and drivers are loaded to ensure that the SSD and the analyzer can work normally.

[0044] The chain configuration file in.peg format is only recognized and used by the trainer software. In this file, scripts can be written to configure SSD chain to GEN1-GEN5, x1-x4, using full EQ mode or Bypass mode, etc.

[0045] Packet capture rules: During the chain building process, a large number of TS code streams will be captured, and many messages are unnecessary during analysis. It is necessary to set the packet capture trigger event to ensure that the required messages can be accurately captured.

[0046] The control module and driver refer to opening the Host memory mapping space, writing the space address to the BAR register through the CfgWr0 command, and ensuring that the memory read and write can be mapped to the Host memory space.

[0047] That is, the tester manually inputs or selects various parameters required for testing through the physical or virtual control panel of the instrument. These parameters include but are not limited to test mode, data transmission rate, test time, etc. In addition to manually setting parameters, pre-written configuration files can be loaded to quickly set test parameters. These configuration files usually contain a set of verified parameter settings suitable for specific test scenarios or SSD models. In addition, setting parameters through the instrument control panel and configuration files can quickly and accurately configure the test environment, thereby improving test efficiency. At the same time, accurate parameter setting can also help improve the accuracy of testing.

[0048] The tester uses the.peg file format recognized by the trainer software to write scripts to configure the chain parameters of the SSD. These parameters include but are not limited to link rate (GEN1-GEN5), link width (x1-x4), and equalization mode (full EQ mode or Bypass mode). Load the written.peg script into the test system and execute the script through the trainer software to complete the chain configuration between the SSD and the analyzer. In addition, using.peg files to write chain configuration scripts allows testers to flexibly adjust test parameters according to different SSD models and test requirements. In addition, by loading different configuration files, it is easy to extend to other test scenarios or SSD models.

[0049] During the link establishment process, the test system will capture a large amount of TS code streams. In order to accurately capture the required messages, the test personnel need to set the packet capture trigger events, which can be specific packet types, packet sizes, or packet occurrence times, etc. By setting the packet capture rules, the test system can automatically filter out unnecessary messages captured during the link establishment process, so as to only retain the key messages related to the test. In addition, by setting the packet capture rules and trigger events, the required messages can be accurately captured, thereby optimizing the data capture and analysis process, which helps to reduce unnecessary data processing and analysis work, and improves the test efficiency.

[0050] In order to ensure that the SSD and analyzer can work normally, it is necessary to enable the Host memory mapping space. This usually involves the configuration and operation of hardware registers. The test personnel write the CfgWr0 command, which is used to write the address of the Host memory mapping space to the BAR (Base Address Register) register. In this way, the test system can map the memory read and write operations to the Host memory space, thereby realizing data transmission and control between the SSD and the analyzer. In addition, loading the corresponding control module and driver can ensure normal communication and data transmission between the SSD and the analyzer, which is crucial for the smooth progress of the test and the accuracy of the results. At the same time, by enabling the Host memory mapping space and writing the CfgWr0 command, the data transmission and control process can be further optimized, and the performance and stability of the test system can be improved.

[0051] S120, according to the verification parameters, write the interrupt test script;

[0052] Specifically, according to the test requirements and verification parameters, select the appropriate test framework or tool to write the interrupt test script. These frameworks or tools usually provide rich APIs and function libraries for simulating interrupts, sending I / O requests, monitoring SSD responses, etc. After understanding the verification parameters and selecting the appropriate test framework or tool, start writing the interrupt test script. The script needs to include the following key parts:

[0053] Initialization part: set up the test environment, including loading necessary drivers, configuring SSD parameters, etc.

[0054] Interrupt simulation part: according to the interrupt trigger conditions in the verification parameters, simulate the interrupt conditions that the SSD may encounter. This can be achieved by sending specific I / O requests, triggering hardware interrupts, etc.

[0055] Response monitoring part: monitor the response of the SSD to the interrupt, including response time, processing process, error handling, etc. This part usually needs to use the monitoring and logging functions provided by the test framework or tool.

[0056] Result judgment part: According to the expected interrupt response time and other verification indicators, judge whether the interrupt processing capability of SSD meets the requirements. This part may need to write complex logic to analyze monitoring data and make judgments.

[0057] After writing the test script, debugging and optimization work is needed. This includes verifying the correctness of the script, adjusting the interrupt trigger conditions to cover more scenarios, optimizing monitoring and logging functions, etc.

[0058] The implementation of the above technical features according to the verification parameter to write the interrupt test script brings the following technical effects:

[0059] Improve the automation of testing: By writing interrupt test scripts, automated execution of tests can be achieved, reducing the likelihood of human intervention and errors. This helps improve testing efficiency and accuracy.

[0060] Enhance the relevance and flexibility of testing: Test scripts written according to verification parameters can be tested for specific SSD models, specifications, and workload patterns, enhancing the relevance and flexibility of testing. At the same time, by adjusting the interrupt trigger conditions and expected response indicators, different test scenarios and requirements can be easily covered.

[0061] Optimize the testing process and result analysis: Test scripts usually contain detailed monitoring and logging functions, which help optimize the testing process and simplify result analysis. By monitoring the SSD's response to interrupts and recording it, potential problems can be easily identified and optimized.

[0062] Improve the accuracy of SSD interrupt handling capability verification: By writing accurate interrupt test scripts and strictly following the verification parameters for testing, the interrupt handling capability of SSD can be more accurately evaluated. This helps ensure that SSD can handle interrupt requests stably and efficiently in actual applications.

[0063] In an embodiment, the interrupt test script is written on the trainer using a programming language (special language). The main functions of the interrupt test script include: defining the interrupt vector to be triggered, defining the NVMe initialization process, and defining multiple test scenarios to simulate different working environments.

[0064] Specifically, the software provided by the trainer Vendor provides a programming language, such as: Summit Exerciser TM Scripting Language.

[0065] Define the interrupt vector to be triggered: Write the entry of the interrupt vector to the memory space through the configured memory mapping space to call when the interrupt is triggered.

[0066] Define NVMe initialization flow: configure MSI-X space, BAR0-BAR1-BAR2 addresses, DeviceID and RequesterID, configure ACQS and ASQS after disabling NVM Controller, configure ASQ, ACQB and Admin queue, and enable NVM Controller to make it effective to complete initialization.

[0067] Define multiple test scenarios to simulate different working environments: configure 64bit and 32bit MSI-X and MSI mode when configuring interrupts, and configure INTx mode.

[0068] That is, define the interrupt vector to be triggered: choose a special programming language provided by the trainer vendor, such as Summit Exerciser TM Scripting Language, as the basis for script writing. Using the syntax and function library of the language, start writing interrupt test scripts. In the script, through the configured memory mapping space, write the entry of the interrupt vector (i.e. the address of the interrupt handling function) to the specified memory location. When the interrupt occurs, the trainer will call the corresponding interrupt handling function according to the configuration. In addition, by writing the interrupt test script, the automation of the test is realized, reducing the possibility of manual intervention and errors. The script defines the interrupt vector, NVMe initialization flow and test scenario in detail, ensuring the accuracy and repeatability of the test. The special programming language provides a rich syntax and function library, making the test script easy to write and modify. By adjusting the parameters and configurations in the script, different test scenarios and requirements can be easily covered, enhancing the flexibility and scalability of the test.

[0069] Define the NVMe initialization process: In the script, first configure the MSI-X space, including setting the addresses of BAR0-BAR2, DeviceID, RequesterID, and other parameters. Then, disable the NVM controller (Disable NVM Controller), and configure the ACQS (Admin Command Queue Submission Queue) and ASQS (Admin Command Queue Completion Queue). Next, configure the ASQ (Submission Queue), ACQB (Submission Queue BaseAddress), and Admin queue. Finally, enable the NVM controller (Enable NVM Controller) to take effect and complete the NVMe initialization process. In addition, the NVMe initialization process defined in the script ensures the correct configuration and initialization of the NVMe device before testing. By simulating various test scenarios, the performance and stability of the NVMe device under different working environments can be fully evaluated.

[0070] Define various test scenarios to simulate different working environments: In the script, different test scenarios are simulated by configuring interrupt parameters. Both 64-bit and 32-bit MSI-X and MSI modes can be configured to test the response and processing capabilities of the SSD under different interrupt modes. At the same time, INTx mode can also be configured to cover a wider range of interrupt handling scenarios. For each test scenario, different I / O load, delay requirements, and other parameters can be set to simulate the working environment that the SSD may encounter in actual applications. In addition, by configuring different interrupt modes and parameters in the script, the interrupt handling capabilities of the SSD can be efficiently verified. This helps to ensure that the SSD can stably and efficiently handle interrupt requests in actual applications, improving the overall performance and reliability of the system.

[0071] S130, execute the interrupt test script and initiate an interrupt request to the SSD to trigger the corresponding interrupt;

[0072] Specifically, ensure that the SSD is properly installed and connected to the test system. Check if the drivers and firmware on the test system are updated to the latest version to ensure compatibility with the SSD. Load and run the interrupt test script, which should contain code defining the interrupt vectors to be triggered, NVMe initialization procedures, and simulated test scenarios. Start the interrupt test script on the test system. The script will automatically perform NVMe initialization procedures, including configuring MSI-X space, BAR address, DeviceID, and RequesterID parameters, and disabling and enabling the NVM controller. The script will configure and prepare the interrupt vectors, which will be used to call the corresponding interrupt handling functions when the interrupt is triggered. In the script, initiate an interrupt request to the SSD through specific function calls or instructions. The interrupt request can be an MSI-X interrupt, MSI interrupt, or INTx interrupt sent through the PCIe bus, depending on the test scenario and the support of the SSD. The interrupt request contains the interrupt vector number or other necessary parameters so that the SSD can identify and handle the interrupt. After the SSD receives the interrupt request, it will trigger the corresponding interrupt handling procedure. The SSD's interrupt handling function will perform the corresponding interrupt handling operations, such as reading or writing data, updating status information, etc., according to the interrupt vector number or other parameters. The interrupt test script on the test system will monitor the SSD's interrupt handling process and record relevant performance indicators and log information.

[0073] By implementing the above technical features of executing the interrupt test script and initiating an interrupt request to the SSD to trigger the corresponding interrupt, the following technical effects are achieved:

[0074] Verify the interrupt handling capability of the SSD: By executing the interrupt test script and initiating an interrupt request to the SSD, the processing capability and response speed of the SSD under different interrupt modes can be verified. This helps to ensure that the SSD can stably and efficiently handle interrupt requests in actual applications, improving the overall performance and reliability of the system.

[0075] Optimize the drivers and firmware of the SSD: During testing, if problems or performance bottlenecks are found in the interrupt handling of the SSD, the drivers and firmware can be optimized and improved. This helps to improve the compatibility and performance of the SSD, making it better adapt to different application scenarios and requirements.

[0076] Improve test efficiency and accuracy: By automatically executing the interrupt test script, test efficiency and accuracy can be significantly improved. The automated testing and monitoring functions in the script can ensure the consistency and repeatability of the testing process, reducing the likelihood of human intervention and errors.

[0077] Support for multiple test scenarios: Interrupt test scripts can be configured with multiple test scenarios and parameters to simulate different working environments and load conditions. This helps to comprehensively evaluate the interrupt handling capability and performance of SSDs under different conditions, providing strong support for subsequent optimization and improvement.

[0078] Preferably, the written interrupt script is called in a timely manner using an automated testing framework, which can be invoked through command line tools, API calls, or graphical user interfaces.

[0079] The automated testing framework refers to the company's internal framework, which uses Python's win32 and handle capture software provided by the vendor to operate the execution and verification of the software through code.

[0080] Specifically, build an automated testing framework: Use internal resources to build or improve an automated testing framework. The framework should support multiple invocation methods, including command line tools, API calls, and graphical user interfaces. The framework integrates Python's win32 library to interact with the Windows system. Introduce handle capture software provided by the vendor to monitor and control the execution of test software.

[0081] Write interrupt scripts: According to the test requirements, write interrupt test scripts. The script should contain code that defines interrupt vectors, NVMe initialization processes, and test scenarios. Ensure that the script can be correctly called and executed within the automated testing framework.

[0082] Set up a timing task: In the automated testing framework, create a timing task. Set the task to execute within a specific time range or specify a specific time point to execute the script. Configure the timeout judgment logic, if the script execution exceeds the predetermined time, it is judged as timeout.

[0083] Call and execute scripts: According to the settings of the timing task, the automated testing framework will call the interrupt script at the specified time. The invocation method can be command line tools, API calls, or graphical user interfaces. Use Python's win32 library and handle capture software to operate the execution and verification of the software through code.

[0084] Monitoring and reporting: The automated testing framework should monitor the execution status of the script in real time. If the script execution is successful, record the test results and performance indicators. If the script execution fails or times out, record the error information and handle it accordingly.

[0085] That is, the automated testing framework and timing tasks can significantly improve testing efficiency, reduce manual intervention and waiting time, and quickly and accurately complete testing tasks by operating software execution and verification in a coded manner. In addition, the automated testing framework can ensure the consistency and repeatability of the testing process, and the timing tasks and timeout determination logic can avoid testing failures or omissions caused by human factors. In addition, the automated testing framework supports multiple invocation methods to meet testing needs in different scenarios, and command line tools, API calls, and graphical user interfaces can be used to invoke and execute interrupt scripts. In addition, by introducing the handle capture software provided by the trainer vendor, the execution of the testing software can be more accurately monitored and controlled, which helps to optimize the testing process and improve the accuracy and effectiveness of testing. In addition, the automated testing framework and timing tasks can reduce testing costs, reduce the workload and time cost of testers, and through automated testing, problems can be more efficiently identified and repaired, improving product quality and user experience.

[0086] Preferably, after the script is executed, a specific interrupt request will be sent to the SSD, such as a simulated device I / O, read or write operation, to trigger the corresponding interrupt.

[0087] Specifically, when verifying the interrupt vector, the interrupt vector to be triggered can be specified in the request to trigger, thereby achieving the purpose of accurate verification. That is, the type of interrupt request to be sent is defined in the script, such as simulating a device I / O operation, a read or write operation, etc. According to the testing requirements, the interrupt vector to be triggered is specified in the request. The interrupt vector is an identifier used by the SSD to identify and handle different types of interrupts. The interrupt request is sent to the SSD using appropriate interfaces or commands, which usually involves communication protocols with the SSD, such as PCIe, NVMe, etc. After the SSD receives the interrupt request, it will call the corresponding interrupt handling function according to the interrupt vector in the request. In the interrupt handling function, operations corresponding to the request are performed, such as processing I / O requests, reading or writing data, etc. The script should contain verification logic to check whether the SSD has correctly processed the interrupt request and returned the expected result. This can be achieved by comparing the actual result with the expected result. During the execution of the script, relevant log information is recorded, including the sending time, receiving time, processing result, etc. of the interrupt request. According to the test results, a report is generated to summarize the testing process, results and any potential problems.

[0088] More specifically, by specifying the interrupt vector to be triggered in the interrupt request, the precise verification of the SSD interrupt handling capability can be achieved, which helps to ensure that the SSD can correctly respond and handle the interrupt request under different conditions. In addition, the automated test script can significantly improve the testing efficiency, reduce manual intervention and waiting time, and quickly trigger the interrupt on the SSD by simulating device I / O operations, read or write operations, etc., and verifying its processing capability. In addition, by regularly testing the interrupt handling capability of the SSD, potential performance problems can be discovered and solved in a timely manner, which helps to optimize the performance of the SSD and improve its stability and reliability.

[0089] S140, capturing data packets related to interrupt processing;

[0090] Specifically, data packet capture first needs to select a network interface as the source of data packets. This can be an Ethernet interface, a wireless network interface, etc. Professional data packet capture tools such as Wireshark, Tcpdump, etc. are used to capture data packets. These tools usually provide graphical or command line interfaces, allowing users to set filtering conditions, select capture interfaces, etc. After configuration, start the capture tool to begin capturing data packets. During the capture process, the tool records data packets passing through the network interface in real time and stores them in memory or disk for subsequent analysis. Data packet capture technology allows users to monitor network traffic in real time and discover abnormal behavior in the network in a timely manner. Captured data packets can be used to analyze the details of network communication, including source address, destination address, port number, protocol type, etc. Information helps to discover network failures, performance bottlenecks or security threats. Through the captured data packets, users can understand the working principle and function of different network protocols, and better understand the mechanism of network communication.

[0091] When an external event occurs (such as a data packet arriving at the network card), the hardware will send an interrupt signal to the processor. After receiving the interrupt signal, the processor will pause the task currently being executed and execute the interrupt handling program instead. In the interrupt handling program, the operating system will read the data packet in the network card and pass it to the upper layer application program for processing as needed. After the interrupt handling program is executed, the processor will resume the execution state before the interrupt and continue to execute the paused task. Interrupt handling technology allows the operating system to respond to external events in real time, ensuring that critical information such as data packets can be processed in a timely manner. Through the interrupt handling program, the operating system can efficiently process data packets, reducing processing delay and resource occupation. Modern operating systems and hardware support parallel processing of interrupts, which means that multiple interrupts can be processed simultaneously, thereby improving the overall performance of the system.

[0092] Preferably, the analyzer is configured with relevant parameters to facilitate the capturing of the data packets of the interruption event. During the execution of the script, the analyzer records all relevant data of the interruption event in real time, including timestamps, transmitted data packets, system status, and other information. Among them, the relevant parameters include the above packet capture rules, and in addition, the link polarity and signal parameters are configured to ensure the integrity and correctness of the captured data packets.

[0093] Specifically, packet capture rules are set on the analyzer, which define which data packets should be captured. For example, filtering conditions can be set based on specific IP addresses, port numbers, protocol types, etc., to ensure that only data packets related to the interruption event are captured. In addition to the packet capture rules, the link polarity and signal parameters of the analyzer also need to be configured. Link polarity involves the transmission direction of the signal (such as forward or reverse), while signal parameters include the frequency, amplitude, phase, etc. of the signal. The configuration of these parameters is crucial to ensuring the integrity and correctness of the captured data packets. During the execution of the script, the analyzer records all relevant data of the interruption event in real time. This includes timestamps (used to record the time of data packet arrival), transmitted data packets (containing data packet content, length, checksum, etc. information), system status (such as CPU usage, memory usage, etc.), and other information. By comparing the captured data packets with the expected data packet content, the integrity of the data packets is verified. This can include checking whether the length, checksum, etc. of the data packet is consistent. According to the configured link polarity and signal parameters, it is verified whether the captured data packets meet the expectations. For example, the signal frequency, amplitude, etc. of the data packet can be checked to match the configured values.

[0094] More specifically, by configuring packet capture rules and link polarity, signal parameters, the analyzer can efficiently capture data packets related to the interruption event, avoiding interference from irrelevant data packets, and improving the efficiency of data capture. In addition, by recording all relevant data of the interruption event in real time and verifying the integrity and correctness of the data packets, the integrity and correctness of the captured data packets are ensured, which helps subsequent data analysis and troubleshooting. In addition, by writing an automated script, the triggering of the interruption event and the automation of data capture are realized, and the analyzer can monitor the data packets of the interruption event in real time, improving the efficiency and accuracy of the test. In addition, this implementation has good scalability and reusability, and by adjusting the configuration of packet capture rules, link polarity, and signal parameters, it can adapt to different testing needs, improving the flexibility and applicability of the test.

[0095] S150, processing the analysis data packet to obtain a processing analysis result;

[0096] Specifically, the captured data packets are pre-processed, including deduplication, denoising, formatting, etc., to improve the accuracy and efficiency of subsequent analysis. Key information of the data packets is extracted, such as source address, target address, protocol type, port number, data content, etc. The content of the data packets is parsed according to network protocols (such as TCP / IP, HTTP, HTTPS, DNS, etc.), extracting the information of the communication parties, request and response content, etc. Using protocol parsers or parsing libraries, the data packets are converted into readable forms, facilitating subsequent analysis. Statistical analysis is performed on the parsed data packets, such as traffic analysis, session analysis, protocol distribution analysis, etc., using data mining techniques to discover abnormal patterns, potential threats or performance bottlenecks in network traffic. In combination with business scenarios, business-level analysis is performed on the data packets, such as user behavior analysis, business traffic trend prediction, etc. The analysis results are presented in the form of charts, reports, etc., facilitating user understanding and decision-making, providing visualization tools allowing users to interactively explore and analyze data packets.

[0097] By implementing the above technical features of processing and analyzing data packets to obtain processing and analysis results, the following technical effects are achieved:

[0098] Improved analysis accuracy: Through data packet preprocessing and parsing, key information in data packets can be accurately extracted and analyzed, reducing false positives and false negatives. Combined with business scenarios for data analysis, network problems and potential threats can be more accurately identified.

[0099] Improved analysis efficiency: Using automated tools and algorithms for data packet capture, parsing and analysis can greatly improve analysis efficiency. Providing visualization tools and interactive interfaces allows users to quickly understand and process analysis results.

[0100] Discovery of potential problems: Through data mining and statistical analysis, abnormal patterns and potential threats in network traffic can be discovered, such as DDoS attacks, malware propagation, etc. Combined with business scenarios for analysis, business-level problems and bottlenecks can be discovered, such as user behavior anomalies, business traffic fluctuations, etc.

[0101] Optimization of network performance: Through analysis of network traffic and protocol distribution, bottlenecks and performance problems in the network can be identified, such as network latency, packet loss, etc. According to the analysis results, appropriate optimization measures can be taken, such as adjusting network configuration, optimizing routing strategy, etc., to improve network performance.

[0102] Support for business decisions: Through analysis of business traffic and user behavior, support for business decisions can be provided, such as optimizing business processes, improving user experience, etc. Providing real-time or periodic analysis reports helps users understand network status and business development trends.

[0103] Preferably, the captured data is processed and analyzed in real time to extract key indicators such as interrupt handling time, packet loss, processing results, etc. After the software is automatically executed, the information of the captured trace is read for analysis to observe whether the link establishment state is normal, whether the NVMe initialization is successful, whether the NVMe message is normally issued, and whether the SSD returns a successful message.

[0104] Specifically, the pre-processed data packets are processed and analyzed in real time to extract key indicators such as interrupt handling time, packet loss, processing results, etc. Interrupt handling time can be calculated by recording the time difference from interrupt triggering to processing completion. Packet loss can be evaluated by comparing the number of sent and received data packets. Processing results can be determined according to the content or status code of the data packet. An automated script or program is written to control the test process, trigger interrupt events, record trace information, etc. After the software is automatically executed, the captured trace information is read, which usually includes detailed communication records, system status, error logs, etc. The link establishment state is observed to determine whether the TCP / IP connection establishment, SSL / TLS handshake, etc. are successful. The NVMe initialization is checked to determine whether the NVMe driver loading, device identification, configuration setting, etc. are successful. The NVMe message is observed to determine whether it is normally issued, including command sending, response receiving, status code checking, etc. The SSD is confirmed to determine whether it returns a successful message, including whether the data read / write operation, status query, etc. are successfully completed. The extracted key indicators and observed states, messages are comprehensively analyzed to determine whether the system performance, stability, reliability, etc. meet the requirements. A detailed test report is generated, including test environment, test steps, test results, problem records, etc. for subsequent analysis and improvement.

[0105] More specifically, by capturing and processing data packets in real time, abnormal behavior in the network can be discovered and recorded in a timely manner, improving the real-time and accuracy of testing, and the extracted key indicators and observed states and messages can truly reflect the performance and stability of the system. In addition, the execution of automated scripts or programs can reduce human intervention and improve testing efficiency, real-time processing and analysis can reduce data backlog and delay and improve the response speed of testing. In addition, observing the key steps of building a chain state, NVMe initialization, NVMe message issuance, and SSD returning a success message can comprehensively cover the key functions and performance of the system, and in-depth analysis of trace information can discover potential problems and bottlenecks, providing a basis for system optimization and improvement. In addition, the automated testing process can ensure that the conditions and environment of each test are consistent, improving the repeatability and verifiability of the test, and detailed test reports can record the results and problems of each test, facilitating subsequent verification and improvement. In addition, the extracted key indicators and observed states and messages can provide decision support for system optimization, performance tuning, and fault troubleshooting, and by analyzing the test results, bottlenecks and problems in the system can be discovered and appropriate optimization measures can be taken to improve the performance and stability of the system.

[0106] In summary, by real-time processing and analysis of captured data, extraction of key indicators, and observation of key states and messages, the performance and stability of the system can be comprehensively and deeply evaluated, providing strong support for system optimization and improvement.

[0107] S160, compare the processing analysis result with the preset index to obtain a comparison result.

[0108] Specifically, after completing data processing and analysis, the processing analysis results are obtained, which may include performance indicators (such as response time, throughput, error rate, etc.), security indicators (such as attack detection, vulnerability scanning results, etc.), or business indicators (such as user activity, conversion rate, etc.). According to business needs, industry standards or historical data, a series of preset indicators are set. These indicators should be clear, quantifiable, and reflect the key aspects of the system or business. The preset indicators may include performance indicator thresholds (such as response time not exceeding 200 milliseconds), security standards (such as no high-risk vulnerabilities), or business goals (such as daily active user number reaching 1 million). Compare the processing analysis results with the preset indicators one by one. This can be achieved by writing scripts, using data analysis tools or integrating into existing monitoring systems. The comparison process may involve numerical comparison (such as whether the actual response time is lower than the threshold), state judgment (such as whether the system detects security vulnerabilities) or trend analysis (such as whether the user activity is increasing). According to the comparison results, generate detailed comparison reports or alarms. The report should include processing analysis results, preset indicators, comparison results and possible explanations or suggestions. If the processing analysis results do not meet the preset indicators, an alarm mechanism should be triggered to take timely measures. According to the comparison results, take necessary follow-up actions such as optimizing system performance, fixing security vulnerabilities, adjusting business strategies, etc. Review the comparison results regularly to evaluate the effectiveness of improvement measures and adjust the preset indicators as needed.

[0109] By implementing the above comparison of processing analysis results with preset indicators to obtain comparison results, the following technical effects are achieved:

[0110] Improving decision-making accuracy: By comparing processing analysis results with preset indicators, the performance, security and business goal achievement of the system or business can be more accurately evaluated, enabling more informed decision-making.

[0111] Enhancing monitoring and early warning capabilities: Comparing processing analysis results with preset indicators in real time or regularly can help identify abnormalities or potential problems in the system or business and trigger alarm mechanisms, improving monitoring and early warning capabilities.

[0112] Optimizing resource allocation: Based on the comparison results, resources can be more reasonably allocated, such as optimizing system performance, strengthening security protection, adjusting business strategies, etc., thereby improving resource utilization efficiency.

[0113] Promoting continuous improvement: Regularly reviewing comparison results, evaluating the effectiveness of improvement measures and adjusting preset indicators as needed can promote continuous improvement and optimization of the system or business.

[0114] Preferably, the interruption processing of the SSD is confirmed to be within an acceptable range by comparing with preset indicators; if not, the failure reason is recorded. For example, the current issued request is vector = 0 or vector = max, and it is verified whether the Vector carried in the interruption message returned by the SSD is as specified in the request.

[0115] Specifically, according to the specification of the SSD, business requirements or industry standards, a series of preset indicators about interruption processing are defined. These indicators may include the upper limit of interruption processing time, the correctness of interruption response (such as whether the returned Vector value is consistent with the request), the success rate of interruption processing, etc. Through specific test tools or software, interruption processing requests are sent to the SSD. These requests can include different Vector values, such as vector = 0 (usually representing the lowest priority or interruption of a specific function) or vector = max (representing the highest priority or interruption of another specific function). The interruption processing response returned by the SSD is received and parsed, especially the Vector value, to ensure that the parsing process is accurate and can correctly extract the Vector value. The parsed Vector value is compared with the Vector value specified in the request to verify whether the interruption message returned by the SSD carries the correct Vector value. At the same time, according to the preset indicators, it is evaluated whether the interruption processing time is within an acceptable range and whether the interruption processing is successful (i.e. no error or exception occurs). If the interruption processing of the SSD does not meet the preset indicators (such as the returned Vector value is inconsistent with the request, or the interruption processing time exceeds the upper limit), the failure reason is recorded. This may include detailed error information, time stamp, complete content of request and response, etc. The recorded data is further analyzed to determine the root cause of the problem and develop corresponding repair measures. The analysis results are fed back to the manufacturer or developer of the SSD so that they can understand the problem and take corresponding improvement measures. According to the analysis results, the test strategy or preset indicators are adjusted to ensure that future tests are more accurate and effective.

[0116] More specifically, by comparing the preset indicators with the actual interrupt handling results of the SSD, the interrupt handling capability of the SSD can be more accurately evaluated, ensuring that it can work normally in various situations. In addition, timely discovery and recording of failure cases in SSD interrupt handling can help quickly locate problems and take remedial measures, thereby improving the stability and reliability of the system. In addition, according to the test results and analysis results, the test process is continuously optimized to improve test efficiency and reduce test cost. In addition, by feeding back the test results to the manufacturer or developer of the SSD, the continuous improvement and optimization of the SSD product can be promoted, and the product quality and performance can be improved. In addition, ensuring that the interrupt handling of the SSD is within an acceptable range can help improve the response speed and stability of the entire system, thereby improving user experience and business efficiency.

[0117] In an embodiment, after the step of comparing the processing analysis results with the preset indicators to obtain comparison results, the method further comprises: visually presenting the comparison results.

[0118] Specifically, a detailed performance report is generated according to the analysis results, including interrupt vector trigger accuracy, interrupt response time, processing accuracy, etc. The test results are displayed through a user interface in the form of charts, tables, etc. to intuitively present the data, making it easy for users to understand and make decisions.

[0119] That is, the collected data is processed and analyzed using data analysis tools or scripts to generate a detailed performance report. The report should include the calculation results of all key indicators, statistical charts, and possible explanations or suggestions. According to the content of the performance report and user needs, a user interface is designed. The interface should be simple and easy to navigate, and contain all necessary charts, tables, and information display areas. The chart types can be selected according to the characteristics of the data, such as bar charts for interrupt vector trigger accuracy, line charts for interrupt response time trends, and pie charts for processing accuracy distribution, etc. The data in the performance report is imported into the user interface to realize the visualization of the data. Ensure that the data in the charts and tables is accurate and can be updated in real time (if necessary). Add necessary interactive functions to the user interface, such as data filtering, chart scaling, data export, etc., so that users can customize the view and obtain more detailed information according to their needs. Test the user interface to ensure that it works normally on various devices and browsers, and that the data display is accurate. According to user feedback and test results, optimize the interface to improve user experience.

[0120] The implementation of the above technical feature of visually presenting the comparison results brings the following technical effects:

[0121] Enhanced data readability: Performance data is presented in an intuitive manner through charts, tables, and other forms, making it easier for users to understand and analyze test results.

[0122] Improved decision support: Detailed performance reports and intuitive data visualization provide comprehensive information support for users, helping them make more informed decisions.

[0123] Enhanced user experience: The user interface is simple, clear, and easy to navigate and operate, improving user experience and satisfaction.

[0124] Facilitated data sharing and communication: Through data export functions, users can easily share performance reports with other team members or stakeholders, promoting data sharing and communication.

[0125] Optimized testing process: Intuitive data presentation and interactive functions enable testers to quickly identify problems and take appropriate measures, optimizing the testing process and improving testing efficiency.

[0126] Support for continuous improvement: Performance reports and data visualization provide strong support for continuous improvement of the system. By regularly analyzing and comparing test results, potential problems can be identified and appropriate improvement measures can be taken.

[0127] The application can capture and analyze the call situation of the interrupt vector in real time by dynamically recording the interrupt response, thereby avoiding the information omission caused by the traditional static test. The real-time performance not only greatly improves the accuracy of the interrupt verification result, but also ensures that the test result can truly reflect the performance of the SSD in actual application. This improvement is of great significance to ensure the stability and reliability of the SSD in a high-load and multi-task environment. In terms of flexibility and adaptability, the interrupt script can be automatically generated and adjusted according to different workloads and task scenarios. The flexibility of the test process can adapt to various dynamic conditions, thereby more effectively evaluating the performance of the SSD under different pressures. The adaptive test method ensures the stability of the SSD in actual use and provides a more reliable storage solution for users. In terms of test efficiency, the automatic interrupt script generation and dynamic analysis process significantly reduce the time and workload of manual configuration. The automated test method not only improves the test efficiency, but also reduces the risk of test errors caused by human intervention. This makes it easier for users to quickly and easily obtain reliable results when evaluating the interrupt performance of the SSD, thereby speeding up the product development and optimization process. In terms of performance analysis, the call situation of the interrupt vector is verified, and each link in the interrupt processing process can be deeply analyzed. The deep performance analysis provides comprehensive information support for SSD optimization, which helps engineers to optimize the system for specific problems, thereby improving the overall performance of the SSD. This comprehensive performance analysis method is of great significance to the continuous development of SSD technology.

[0128] In summary, the SSD interrupt vector verification method proposed by the application realizes systematic and accurate evaluation of the interrupt performance of the SSD through unique structure and working principle. The method not only solves many defects of the prior art, but also significantly improves the verification accuracy, flexibility and adaptability, test efficiency and performance analysis capability. These technical effects make the method of the application have wide application prospect and market value in the modern high-load and multi-task application demand, greatly promoting the development and application of SSD technology and related fields.

[0129] Figure 2 is a schematic block diagram of an SSD interrupt vector verification device 300 provided by an embodiment of the application. As shown in Figure 2 Corresponding to the above SSD interrupt vector verification method, the application further provides an SSD interrupt vector verification device 300. The SSD interrupt vector verification device 300 includes a unit for executing the above SSD interrupt vector verification method, and the device can be configured in a server. Specifically, please refer to Figure 2The SSD interrupt vector verification device 300 comprises a configuration unit 301, a writing unit 302, an execution initiation unit 303, a capturing unit 304, a processing analysis unit 305 and a comparison unit 306;

[0130] The configuration unit 301 is configured to configure parameters required for testing, so as to obtain verification parameters.

[0131] The writing unit 302 is configured to write an interrupt test script according to the verification parameters.

[0132] The execution initiation unit 303 is configured to execute the interrupt test script and initiate an interrupt request to the SSD, so as to trigger a corresponding interrupt.

[0133] The capturing unit 304 is configured to capture a data packet related to interrupt processing.

[0134] The processing analysis unit 305 is configured to process and analyze the data packet, so as to obtain a processing analysis result.

[0135] The comparison unit 306 is configured to compare the processing analysis result with a preset index, so as to obtain a comparison result.

[0136] In an embodiment, the parameters required for testing comprise link establishment configuration and packet capture rules.

[0137] In an embodiment, main functions of the interrupt test script comprise defining an interrupt vector to be triggered, defining an NVMe initialization flow and defining multiple test scenes to simulate different working environments.

[0138] In an embodiment, the device further comprises a visualization unit configured to visually display the comparison result.

[0139] It should be noted that a person skilled in the art can clearly understand the specific implementation process of the above-mentioned SSD interrupt vector verification device 300 and each unit, which can refer to the corresponding description in the foregoing method embodiments. For the convenience and brevity of description, it will not be repeated here.

[0140] In an embodiment, a computer device is provided, which can be a server, and an internal structure diagram of the computer device can be as shown in Figure 3As shown. The computer device includes a processor, a memory, a network interface and a database connected through a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes non-volatile and / or volatile storage media, internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The network interface of the computer device is used to communicate with the external client through the network connection. The computer program is executed by the processor to realize the functions or steps of the server side of the SSD interrupt vector verification method.

[0141] In one embodiment, a computer device is provided, comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor executing the computer program to implement the following steps:

[0142] Configuring parameters required for testing to obtain verification parameters; writing an interrupt test script according to the verification parameters; executing the interrupt test script and initiating an interrupt request to the SSD to trigger the corresponding interrupt; capturing data packets related to interrupt processing; processing and analyzing the data packets to obtain processing and analysis results; comparing the processing and analysis results with preset indicators to obtain comparison results.

[0143] In one embodiment, a computer readable storage medium is provided, having a computer program stored thereon, the computer program being executed by a processor to implement the following steps:

[0144] Configuring parameters required for testing to obtain verification parameters; writing an interrupt test script according to the verification parameters; executing the interrupt test script and initiating an interrupt request to the SSD to trigger the corresponding interrupt; capturing data packets related to interrupt processing; processing and analyzing the data packets to obtain processing and analysis results; comparing the processing and analysis results with preset indicators to obtain comparison results.

[0145] It should be noted that the functions or steps that the computer readable storage medium or the computer device can implement described above can be referred to the related description of the server side and the client side in the foregoing method embodiments. To avoid repetition, they will not be described one by one here.

[0146] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a non-volatile computer readable storage medium, and when executed, can include the processes of the above-mentioned embodiment methods. Any reference to memory, storage, database or other medium used in the embodiments provided by the present application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration but not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

[0147] Those skilled in the art can clearly understand that, for the convenience and brevity of description, only the above-mentioned division of functional units and modules is exemplified, and in actual application, the above-mentioned functions can be completed by different functional units and modules according to needs, that is, the internal structure of the device is divided into different functional units or modules to complete all or part of the above-described functions.

[0148] The above-mentioned embodiments are only used to illustrate the technical solutions of the present application, but not to limit it; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that the technical solutions recorded in the foregoing embodiments can be modified, or some technical features can be replaced by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be included in the protection scope of the present application.

Claims

1. A method for verifying an SSD interrupt vector, characterized in that, The method comprises the following steps: configuring parameters required for testing to obtain verification parameters; writing an interrupt test script according to the verification parameters; executing the interrupt test script and initiating an interrupt request to the SSD to trigger a corresponding interrupt; capturing data packets related to interrupt processing; processing and analyzing the data packets to obtain processing and analyzing results; comparing the processing and analyzing results with preset indicators to obtain comparison results; the configuring parameters required for testing comprises link establishment configuration and packet capturing rules.

2. The method of claim 1, wherein, The main functions of the interrupt test script comprise defining interrupt vectors to be triggered, defining NVMe initialization procedures, and defining multiple test scenarios to simulate different working environments.

3. The method of claim 1, wherein the method further comprises: After the step of comparing the processing and analyzing results with preset indicators to obtain comparison results, the method further comprises visually displaying the comparison results.

4. A verification apparatus of an SSD interrupt vector, characterized by The method comprises the following steps: a configuration unit configured to configure parameters required for testing to obtain verification parameters; a writing unit configured to write an interrupt test script according to the verification parameters; an execution initiation unit configured to execute the interrupt test script and initiate an interrupt request to the SSD to trigger a corresponding interrupt; a capturing unit configured to capture data packets related to interrupt processing; a processing and analyzing unit configured to process and analyze the data packets to obtain processing and analyzing results; a comparison unit configured to compare the processing and analyzing results with preset indicators to obtain comparison results; the configuring parameters required for testing comprises link establishment configuration and packet capturing rules.

5. The apparatus for verifying of SSD interrupt vectors of claim 4, wherein, The main functions of the interrupt test script comprise defining interrupt vectors to be triggered, defining NVMe initialization procedures, and defining multiple test scenarios to simulate different working environments.

6. The apparatus for verifying of SSD interrupt vectors of claim 4, wherein, The device further comprises a visualizing unit configured to visually display the comparison results.

7. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, The processor executes the computer program to implement the steps of the method for verifying an interrupt vector of an SSD according to any one of claims 1 to 3.

8. A storage medium storing a computer program, characterized by The computer program is executed by the processor to implement the steps of the method for verifying an interrupt vector of an SSD according to any one of claims 1 to 3.

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