Signal generation method, electronic equipment, receiver and computer readable storage medium

Abstract

The invention provides a signal generation method, electronic equipment, a receiver and a computer readable storage medium, relates to the technical field of data processing, and can output PPS signals with a relatively large duration as a period. The method is applied to the electronic equipment, the electronic equipment comprises a target instruction sending device, an AND gate circuit, a signal generation device and an event shielding register, the target instruction sending device is connected with the signal generation device through the AND gate circuit, and the event shielding register is connected with the signal generation device through the AND gate circuit. The method comprises the following steps: configuring an event mask register to be low level in a first time period; the event shielding register is configured to be at a high level in a second time period; the first time period is adjacent to the second time period, the second time length is larger than the first time length, the second time length is the sum of the third time length and the fourth time length, the third time length is the time length of the first time period, the fourth time length is the time length of the second time period, and the fourth time length is smaller than the first time length.

Description

Technical Field

[0001] The present application relates to the field of data processing technology, and in particular to a signal generating method, an electronic device, a receiver and a computer-readable storage medium. Background Art

[0002] The Pulse Per Second (PPS) signal is a pulse position signal. A GNSS positioning chip used to receive satellite signals can usually output a PPS signal once every 1 second.

[0003] In some cases, the GNSS positioning chip needs to output the PPS signal with a longer period, for example, with a period of 2 seconds, 3 seconds or 4 seconds. Summary of the invention

[0004] The present application provides a signal generating method, an electronic device, a receiver and a computer-readable storage medium, which can output a PPS signal with a relatively long period.

[0005] In order to achieve the above objectives, this application adopts the following technical solutions:

[0006] In a first aspect, a signal generating method is provided, and the method is applied to an electronic device, the electronic device comprising a target instruction sending device, an AND gate circuit, a signal generating device and an event masking register, the target instruction sending device is connected to the signal generating device through the AND gate circuit, the event masking register is connected to the signal generating device through the AND gate circuit, the target instruction sending device periodically sends a target instruction to the signal generating device with a first time length as a period, the target instruction is used to make the signal generating device generate a PPS signal, the method comprising: configuring the event masking register to a low level in a first time period; configuring the event masking register to a high level in a second time period; the first time period is adjacent to the second time period, the second time length is greater than the first time length, the second time length is the sum of the third time length and the fourth time length, the third time length is the length of the first time period, the fourth time length is the length of the second time period, and the fourth time length is less than the first time length.

[0007] In combination with the first aspect, in certain embodiments of the first aspect, the method also includes: obtaining a first duration, a second duration and a first moment; the signal generating device generates a PPS signal at the first moment; taking the second moment as the starting moment of the second time period, and taking the third moment as the ending moment of the second time period, to obtain the second time period; the duration between the second moment and the third moment is less than the first duration, and the second time period includes the first moment; taking the fourth moment as the starting moment of the first time period, and taking the fifth moment as the ending moment of the first time period, to obtain the first time period; the fifth moment is adjacent to the second moment, and the duration between the fourth moment and the third moment is the second duration.

[0008] In combination with the first aspect, in certain embodiments of the first aspect, the target instruction sending device includes an input end and an event control register, the input end is connected to the event control register, the event control register is connected to the AND gate circuit, and the target instruction sending device periodically sends target instructions to the signal generating device with a first time length as a period, including: triggering the event control register in response to a target interrupt signal input from the input end; the event control register is used to send the target instruction to the signal generating device, and the period length of the input period of the target interrupt signal is the first time length.

[0009] In a second aspect, an electronic device is provided for implementing the signal generating method of the first aspect. The electronic device includes a module, unit, or means corresponding to the above method, and the module, unit, or means can be implemented by hardware, software, or by hardware executing the corresponding software. The hardware or software includes one or more modules or units corresponding to the above functions. The electronic device includes a target instruction sending device, an AND gate circuit, a signal generating device, and an event masking register. The target instruction sending device is connected to the signal generating device through the AND gate circuit, and the event masking register is connected to the signal generating device through the AND gate circuit. The target instruction sending device periodically sends a target instruction to the signal generating device with a first duration as a period, and the target instruction is used to make the signal generating device generate a PPS signal.

[0010] In combination with the second aspect, in certain embodiments of the second aspect, the electronic device includes: a processing module; a processing module for configuring the event mask register to a low level in a first time period; a processing module for configuring the event mask register to a high level in a second time period; the first time period is adjacent to the second time period, the second time period is greater than the first time period, the second time period is the sum of the third time period and the fourth time period, the third time period is the length of the first time period, the fourth time period is the length of the second time period, and the fourth time period is less than the first time period.

[0011] In combination with the second aspect, in certain embodiments of the second aspect, the electronic device also includes: an acquisition module; an acquisition module for acquiring a first duration, a second duration and a first moment; a signal generating device generating a PPS signal at the first moment; a processing module, further used to use the second moment as the starting moment of the second time period, and the third moment as the ending moment of the second time period, to obtain the second time period; the duration between the second moment and the third moment is less than the first duration, and the second time period includes the first moment; the processing module, further used to use the fourth moment as the starting moment of the first time period, and the fifth moment as the ending moment of the first time period, to obtain the first time period; the fifth moment is adjacent to the second moment, and the duration between the fourth moment and the third moment is the second duration.

[0012] In combination with the second aspect, in certain embodiments of the second aspect, the target instruction sending device includes an input end and an event control register, the input end is connected to the event control register, the event control register is connected to the AND gate circuit, and the target instruction sending device periodically sends target instructions to the signal generating device with a first time length as a period, including: triggering the event control register in response to a target interrupt signal input from the input end; the event control register is used to send the target instruction to the signal generating device, and the period length of the input period of the target interrupt signal is the first time length.

[0013] According to a third aspect, an electronic device is provided, comprising: at least one processor and a memory for storing instructions executable by the processor; wherein the processor is configured to execute instructions to implement the method provided in the first aspect and any possible implementation manner thereof.

[0014] In a fourth aspect, a computer-readable storage medium is provided. When the instructions in the computer-readable storage medium are executed by a processor of a problem base station determination device, the problem base station determination device is enabled to perform the method provided in the first aspect and any possible implementation manner thereof.

[0015] In a fifth aspect, a computer program product comprising instructions is provided, which, when executed on a computer, enables the computer to execute the method provided in the first aspect and any possible implementation manner thereof.

[0016] In a sixth aspect, a receiver is provided, which includes the electronic device provided in the third aspect.

[0017] Among them, the technical effects brought about by any implementation of the second to sixth aspects can refer to the technical effects brought about by different implementations of the first aspect mentioned above, and will not be repeated here.

[0018] Based on the signal generating method provided by the present application, the electronic device includes a target instruction sending device, an AND gate circuit, a signal generating device and an event masking register, the target instruction sending device is connected to the signal generating device through the AND gate circuit, the event masking register is connected to the signal generating device through the AND gate circuit, the target instruction sending device periodically sends a target instruction to the signal generating device with a first time length as a period, and the target instruction is used to make the signal generating device generate a PPS signal. In the first time period, the event masking register is configured to be a low level; in the second time period, the event masking register is configured to be a high level; the first time period is adjacent to the second time period, the second time length is greater than the first time length, and the second time length is the same as the first time length. The sum of the third time length and the fourth time length, the third time length is the time length of the first time period, the fourth time length is the time length of the second time period, and the fourth time length is less than the first time length. Since the target instruction sending device and the event masking register are respectively connected to the signal generating device through the AND gate circuit, the event masking register is configured to a low level in the first time period. Even if the target instruction sending device sends a target instruction in the first time period, the signal generating device will not generate a PPS signal. Only when the event masking register is configured to a high level in the second time period and the target instruction sending device sends a target instruction in the second time period, the signal generating device will generate a PPS signal, thereby being able to output a PPS signal with a larger time length as a period. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 A schematic diagram of the architecture of a signal generating system provided in this application;

[0020] Figure 2 A schematic diagram of a flow chart of a signal generating method provided in this application;

[0021] Figure 3 A schematic diagram of the structure of an electronic device provided in this application;

[0022] Figure 4 A schematic diagram of the structure of another electronic device provided in this application. DETAILED DESCRIPTION

[0023] In the description of this application, unless otherwise specified, "plurality" means two or more than two. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single items or plural items. For example, at least one of a, b, or c can mean: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple.

[0024] In addition, in order to clearly describe the technical solutions of the embodiments of the present application, in the embodiments of the present application, words such as "first" and "second" are used to distinguish the same items or similar items with substantially the same functions and effects. Those skilled in the art can understand that words such as "first" and "second" do not limit the quantity and execution order, and words such as "first" and "second" do not necessarily limit the difference.

[0025] Meanwhile, in the embodiments of the present application, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a concrete manner for ease of understanding.

[0026] It is understood that the "embodiment" mentioned throughout the specification means that the specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present application. Therefore, the various embodiments in the entire specification do not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It is understood that in various embodiments of the present application, the size of the sequence number of each process does not mean the order of execution, and the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiment of the present application.

[0027] It can be understood that in the present application, "when", "if" and "if" all mean that corresponding processing will be carried out under certain objective circumstances, but do not limit the time, nor do they require judgment actions when implementing them, nor do they mean the existence of other limitations.

[0028] It can be understood that some optional features in the embodiments of the present application may be implemented independently in certain scenarios without relying on other features, such as the solution on which they are currently based, to solve corresponding technical problems and achieve corresponding effects, or may be combined with other features according to needs in certain scenarios. Accordingly, the devices provided in the embodiments of the present application may also realize these features or functions accordingly, which will not be elaborated here.

[0029] In this application, unless otherwise specified, the same or similar parts between the various embodiments can refer to each other. In the various embodiments in this application, and the various implementation methods in each embodiment, if there is no special description and logical conflict, the terms and / or descriptions between different embodiments and the various implementation methods in each embodiment are consistent and can be referenced to each other. The technical features in different embodiments and the various implementation methods in each embodiment can be combined to form new embodiments, implementation methods, implementation methods, or implementation methods according to their inherent logical relationships. The following implementation methods of this application do not constitute a limitation on the scope of protection of this application.

[0030] The Pulse Per Second (PPS) signal is a pulse position signal. The PPS signal can also be called the PPS second pulse. It is a precise time signal obtained by the Global Navigation Satellite System (GNSS) positioning chip from the satellite. Its function is to indicate the moment of the whole second, which is usually marked by the rising edge of the PPS second pulse. The accuracy can be down to the nanosecond level (20-50ns) and there is no cumulative error.

[0031] GNSS positioning chips can usually output a PPS signal once every 1 second.

[0032] In some cases, the GNSS positioning chip needs to output the PPS signal with a longer period, for example, with a period of 2 seconds, 3 seconds or 4 seconds. Therefore, how to output the PPS signal with a longer period becomes an urgent problem to be solved.

[0033] In order to solve the above problems, the present application provides a signal generating method, which can be applied to a signal generating system. Figure 1 This is a schematic diagram of the architecture of a signal generating system provided in this application. The technical solution of the embodiment of this application can be applied to Figure 1 The electronic equipment shown, such as Figure 1 As shown, the signal generating system 10 includes an electronic device 11 and an input device 12 .

[0034] The electronic device 11 includes a target instruction sending device, an AND gate circuit, a signal generating device and an event mask register.

[0035] The target instruction sending device is connected to the signal generating device through an AND gate circuit, the event mask register is connected to the signal generating device through an AND gate circuit, the target instruction sending device periodically sends target instructions to the signal generating device with a first time length as a period, and the target instruction is used to enable the signal generating device to generate a PPS signal.

[0036] Optionally, the electronic device 11 may further include an input terminal connected to the event control register.

[0037] The electronic device 11 may be a GNSS positioning chip. Of course, the electronic device 11 may also be other devices, and this application does not impose any specific limitation on this.

[0038] In one design, Figure 1 As shown, the target instruction sending device includes an input end and an event control register, the input end is connected to the event control register, the event control register is connected to the AND gate circuit, and the target instruction sending device periodically sends the target instruction to the signal generating device with a first time length as a period.

[0039] In this design, the target instruction sending device periodically sends the target instruction to the signal generating device with the first time length as a period, which may specifically include:

[0040] The electronic device 11 triggers the event control register in response to the target interrupt signal inputted from the input terminal.

[0041] The event control register is used to send a target instruction to the signal generating device, and the period duration of the input period of the target interrupt signal is the first period duration.

[0042] It should be noted that, taking the electronic device 11 as a GNSS positioning chip as an example, the target interrupt signal may be an interrupt signal generated after the GNSS positioning chip receives a PPS signal from a satellite.

[0043] That is to say, the GNSS positioning chip will receive a PPS signal from the satellite every 1 second. Correspondingly, it will also generate a target interrupt signal every 1 second to trigger the event control register.

[0044] The signal generating method provided in the embodiment of the present application is described below in conjunction with the accompanying drawings.

[0045] Figure 2 A schematic diagram of a signal generation method provided in this application, which is applied to Figure 1 The electronic equipment shown, such as Figure 2 As shown, the signal generating method includes the following steps:

[0046] S201. The electronic device obtains a first duration, a second duration, and a first moment.

[0047] Wherein, the signal generating device generates a PPS signal at a first moment.

[0048] It should be noted that the target instruction sending device periodically sends the target instruction to the signal generating device with the first time length as a period.

[0049] The first duration may be 1 second.

[0050] The second duration is greater than the first duration. For example, the second duration may be 2 seconds, 3 seconds, or 4 seconds. Of course, the second duration may also be other durations, and this application does not impose any specific limitation on this.

[0051] The first moment may be 10:00:00:00 on January 1, 2024, 10:00:00:00 on February 1, 2024, or 10:00:00:00 on March 1, 2024. Of course, the first moment may also be other moments, and this application does not impose any specific restrictions on this.

[0052] As a possible implementation manner, the electronic device receives information from an input device, where the information includes a first duration, a second duration, and a first moment, and the electronic device obtains the first duration, the second duration, and the first moment from the information.

[0053] S202: The electronic device uses the second moment as the start moment of a second time period and uses the third moment as the end moment of the second time period to obtain the second time period.

[0054] The duration between the second moment and the third moment is shorter than the first duration, and the second time period includes the first moment.

[0055] It can be understood that the duration between the second moment and the third moment is the duration of the second time period.

[0056] As a possible implementation method, take the first moment as 10:00:00:00 on January 1, 2024, and the first duration as 1 second as an example.

[0057] First, the electronic device determines the end time of the second time period, that is, the third time. The electronic device can use 10:00:00:00 on January 1, 2024 as the third time, the electronic device can use 10:00:00:01 on January 1, 2024 as the third time, and the electronic device can use 10:00:00:02 on January 1, 2024 as the third time, as long as the third time is after the first time and the duration between the third time and the first time is not greater than the first duration.

[0058] Thereafter, the electronic device determines the start time of the second time period, i.e., the second time. If the third time is 10:00:00:02 on January 1, 2024, the electronic device may use 09:59:59:03 on January 1, 2024 as the second time, the electronic device may use 09:59:59:04 on January 1, 2024 as the second time, or the electronic device may use 09:59:59:05 on January 1, 2024 as the second time, as long as the second time is before the first time and the duration between the second time and the third time is less than the first duration, the application does not impose any specific restrictions on the duration of the second time period.

[0059] S203: The electronic device uses the fourth moment as the start moment of the first time period and the fifth moment as the end moment of the first time period to obtain the first time period.

[0060] Among them, the fifth moment is adjacent to the second moment, and the duration between the fourth moment and the third moment is the second duration.

[0061] As a possible implementation method, taking the second moment as 09:59:59:04 on January 1, 2024 and the second time length as 4 seconds, the electronic device uses 09:59:59:03 on January 1, 2024 as the fifth moment.

[0062] If the fifth moment is 09:59:59:03 on January 1, 2024, the electronic device will use 09:59:55:03 on January 1, 2024 as the fourth moment.

[0063] Based on S201-S203, by acquiring the first duration, the second duration and the first moment, since the signal generating device generates the PPS signal at the first moment, the second moment can be used as the starting moment of the second time period, and the third moment can be used as the ending moment of the second time period to obtain the second time period; the duration between the second moment and the third moment is less than the first duration, and the second time period includes the first moment; the fourth moment can be used as the starting moment of the first time period, and the fifth moment can be used as the ending moment of the first time period to obtain the first time period; the fifth moment is adjacent to the second moment, and the duration between the fourth moment and the third moment is the second duration.

[0064] After determining a first time period or a second time period, after the first time period or the second time period has passed, the next new first time period and the next new second time period can be determined, the duration between the start time of the next new first time period and the start time of the first time period is the second duration, the duration between the end time of the next new first time period and the end time of the first time period is the second duration, the duration between the start time of the next new second time period and the start time of the second time period is the second duration, and the duration between the end time of the next new second time period and the end time of the second time period is the second duration. In this way, after determining a first time period or a second time period, it is only necessary to add the second duration to the original time to determine the next new first time period or the second time period, without re-executing S201-S203, thereby reducing the calculation pressure of the electronic device.

[0065] S204: The electronic device configures the event mask register to a low level in the first time period.

[0066] As a possible implementation, at the beginning of the first time period, the electronic device sends a first instruction to the event mask register, where the first instruction is used to set the corresponding bit of the event mask register to 0, that is, configure the event mask register to a low level.

[0067] S205: The electronic device configures the event mask register to a high level in the second time period.

[0068] Among them, the first time period is adjacent to the second time period, the second time period is greater than the first time period, the second time period is the sum of the third time period and the fourth time period, the third time period is the length of the first time period, the fourth time period is the length of the second time period, and the fourth time period is less than the first time period.

[0069] As a possible implementation, at the beginning of the second time period, the electronic device sends a second instruction to the event mask register, and the first instruction is used to set the corresponding bit of the event mask register to 1, that is, configure the event mask register to a high level.

[0070] Based on S204-S205, the electronic device includes a target instruction sending device, an AND gate circuit, a signal generating device and an event masking register, the target instruction sending device is connected to the signal generating device through the AND gate circuit, the event masking register is connected to the signal generating device through the AND gate circuit, the target instruction sending device periodically sends a target instruction to the signal generating device with a first time length as a period, and the target instruction is used to make the signal generating device generate a PPS signal. In the first time period, the event masking register is configured to be a low level; in the second time period, the event masking register is configured to be a high level; the first time period is adjacent to the second time period, the second time period is greater than the first time period, and the second time period is the third time period. The third time length is the time length of the first time period, the fourth time length is the time length of the second time period, and the fourth time length is less than the first time length. Since the target instruction sending device and the event masking register are respectively connected to the signal generating device through the AND gate circuit, the event masking register is configured to a low level in the first time period. Even if the target instruction sending device sends a target instruction in the first time period, the signal generating device will not generate a PPS signal. Only when the event masking register is configured to a high level in the second time period and the target instruction sending device sends a target instruction in the second time period, the signal generating device will generate a PPS signal, thereby being able to output a PPS signal with a larger time length as a period.

[0071] The above mainly introduces the solution provided by the embodiment of the present application from the perspective of the electronic device executing the signal generation method. In order to achieve the above functions, the electronic device includes a hardware structure and / or software module corresponding to the execution of each function. It should be easily appreciated by those skilled in the art that, in combination with the units and algorithm steps of each example described in the embodiments disclosed herein, the embodiments of the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of this application.

[0072] The embodiment of the present application can divide the functional modules of the electronic device according to the above method example. For example, each functional module can be divided corresponding to each function, or two or more functions can be integrated into one processing module. The above integrated module can be implemented in the form of hardware or in the form of software functional modules. Optionally, the division of modules in the embodiment of the present application is schematic, which is only a logical function division, and there may be other division methods in actual implementation. In addition, the "module" here may refer to a specific application-specific integrated circuit (ASIC), a circuit, a processor and memory that executes one or more software or firmware programs, an integrated logic circuit, and / or other devices that can provide the above functions.

[0073] In the case of functional module division, Figure 3 FIG. 1 shows a schematic diagram of the structure of an electronic device. Figure 3 As shown, the electronic device 30 includes an acquisition module 301 and a processing module 302 .

[0074] In some embodiments, the electronic device 30 may further include a storage module ( Figure 3 ), for storing program instructions and data.

[0075] Among them, the processing module 302 is used to configure the event mask register to a low level in the first time period; the processing module 302 is used to configure the event mask register to a high level in the second time period; the first time period is adjacent to the second time period, the second time period is greater than the first time period, the second time period is the sum of the third time period and the fourth time period, the third time period is the length of the first time period, the fourth time period is the length of the second time period, and the fourth time period is less than the first time period.

[0076] Optionally, the acquisition module 301 is used to acquire the first duration, the second duration and the first moment; the signal generating device generates a PPS signal at the first moment; the processing module 302 is also used to use the second moment as the starting moment of the second time period, and the third moment as the ending moment of the second time period, to obtain the second time period; the duration between the second moment and the third moment is less than the first duration, and the second time period includes the first moment; the processing module 302 is also used to use the fourth moment as the starting moment of the first time period, and the fifth moment as the ending moment of the first time period, to obtain the first time period; the fifth moment is adjacent to the second moment, and the duration between the fourth moment and the third moment is the second duration.

[0077] Optionally, the target instruction sending device includes an input end and an event control register, the input end is connected to the event control register, the event control register is connected to the AND gate circuit, the target instruction sending device periodically sends target instructions to the signal generating device with a first time length as a period, including: responding to the target interrupt signal input from the input end, triggering the event control register; the event control register is used to send the target instruction to the signal generating device, and the period length of the input period of the target interrupt signal is the first time length.

[0078] All relevant contents of each step involved in the above method embodiment can be referred to the functional description of the corresponding functional module, and will not be repeated here.

[0079] When the functions of the above functional modules are implemented in the form of hardware, Figure 4 FIG. 2 shows a schematic diagram of the structure of another electronic device. Figure 4 As shown, the electronic device 40 includes a processor 401, a memory 402 and a bus 403. The processor 401 and the memory 402 may be connected via the bus 403.

[0080] The processor 401 is the control center of the electronic device 40, and can be a processor or a general term for multiple processing elements. For example, the processor 401 can be a general-purpose central processing unit (CPU) or other general-purpose processors. Among them, the general-purpose processor can be a microprocessor or any conventional processor.

[0081] As an embodiment, the processor 401 may include one or more CPUs, such as Figure 4 CPU0 and CPU1 are shown in the figure.

[0082] The memory 402 may be a read-only memory (ROM) or other type of static storage device that can store static information and instructions, a random access memory (RAM) or other type of dynamic storage device that can store information and instructions, an electrically erasable programmable read-only memory (EEPROM), a disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited to these.

[0083] As a possible implementation, the memory 402 may exist independently of the processor 401, and the memory 402 may be connected to the processor 401 via a bus 403 to store instructions or program codes. When the processor 401 calls and executes the instructions or program codes stored in the memory 402, the signal generation method provided in the embodiment of the present application can be implemented.

[0084] In another possible implementation, the memory 402 may also be integrated with the processor 401 .

[0085] The bus 403 may be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus. The bus may be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 4 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.

[0086] It should be pointed out that Figure 4 The structure shown does not constitute a limitation on the electronic device 40. Figure 4 In addition to the components shown, the electronic device 40 may include more or fewer components than shown, or combine certain components, or arrange the components differently.

[0087] As an example, combining Figure 3 The functions implemented by the acquisition module 301 and the processing module 302 in the electronic device 30 are similar to those Figure 4 The function of processor 401 in is the same.

[0088] Optional, such as Figure 4 As shown, the electronic device 40 provided in the embodiment of the present application may further include a communication interface 404 .

[0089] The communication interface 404 is used to connect with other devices through a communication network. The communication network may be Ethernet, wireless access network, wireless local area network (WLAN), etc. The communication interface 404 may include a receiving unit for receiving data and a sending unit for sending data.

[0090] In a possible implementation, in the electronic device 40 provided in the embodiment of the present application, the communication interface 404 may also be integrated in the processor 401, which is not specifically limited in the embodiment of the present application.

[0091] As a possible product form, the electronic device of the embodiment of the present application can also be implemented using the following: one or more field programmable gate arrays (FPGA), programmable logic devices (PLD), controllers, state machines, gate logic, discrete hardware components, any other suitable circuits, or any combination of circuits capable of performing the various functions described throughout the present application.

[0092] Through the description of the above implementation methods, those skilled in the art can clearly understand that for the convenience and simplicity of description, only the division of the above functional units is used as an example. In practical applications, the above functions can be assigned to different functional units as needed, that is, the internal structure of the device can be divided into different functional units to complete all or part of the functions described above. The specific working process of the system, device and unit described above can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here.

[0093] An embodiment of the present application also provides a computer-readable storage medium on which a computer program or instruction is stored. When the computer program or instruction is executed, the computer executes each step in the method flow shown in the above method embodiment.

[0094] An embodiment of the present application provides a computer program product including instructions. When the instructions are executed on a computer, the computer is caused to execute each step in the method flow shown in the above method embodiment.

[0095] An embodiment of the present application provides a chip system, including: a processor and an interface circuit; the interface circuit is used to receive a computer program or instruction and transmit it to the processor; the processor is used to execute the computer program or instruction so that the chip system executes each step in the method flow shown in the above method embodiment.

[0096] Among them, the computer-readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or device, or any combination of the above. More specific examples of computer-readable storage media (a non-exhaustive list) include: an electrical connection with one or more wires, a portable computer disk, and a hard disk. Random Access Memory (RAM), Read-Only Memory (ROM), Erasable Programmable Read Only Memory (EPROM), registers, hard disks, optical fibers, portable compact disk read-only memories (CD-ROM), optical storage devices, magnetic storage devices, or any other form of computer-readable storage media in a suitable combination of the above, or numerical values ​​in the art. An exemplary storage medium is coupled to a processor so that the processor can read information from the storage medium and write information to the storage medium. Of course, the storage medium can also be a component of the processor. The processor and the storage medium can be located in a specific-purpose ASIC. In the embodiments of the present application, a computer-readable storage medium may be any tangible medium that contains or stores a program, which may be used by or in conjunction with an instruction execution system, apparatus, or device.

[0097] Since the electronic device, computer-readable storage medium, and computer program product provided in this embodiment can be applied to the signal generating method provided by this embodiment, the technical effects that can be obtained can also refer to the above-mentioned method embodiments, and the embodiments of this application will not be repeated here.

[0098] Although the present application is described herein in conjunction with various embodiments, in the process of implementing the claimed application, those skilled in the art may understand and implement other changes to the disclosed embodiments by viewing the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other components or steps, and "one" or "an" does not exclude multiple situations. A single processor or other unit may implement several functions listed in the claims. Certain measures are recorded in different dependent claims, but this does not mean that these measures cannot be combined to produce good results.

[0099] Although the present application has been described in conjunction with specific features and embodiments thereof, it is obvious that various modifications and combinations may be made thereto without departing from the spirit and scope of the present application. Accordingly, this specification and the drawings are merely exemplary illustrations of the present application as defined by the appended claims, and are deemed to have covered any and all modifications, variations, combinations or equivalents within the scope of the present application. Obviously, those skilled in the art may make various modifications and variations to the present application without departing from the spirit and scope of the present application. Thus, if these modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to include these modifications and variations.

Claims

1. A signal generating method, characterized in that: The method is applied to an electronic device, the electronic device comprising a target instruction sending device, an AND gate circuit, a signal generating device and an event masking register, the target instruction sending device is connected to the signal generating device through the AND gate circuit, the event masking register is connected to the signal generating device through the AND gate circuit, the target instruction sending device periodically sends a target instruction to the signal generating device with a first time length as a period, the target instruction is used to make the signal generating device generate a PPS signal, the method comprising: Configuring the event mask register to be at a low level during a first time period; The event masking register is configured to a high level in a second time period; the first time period is adjacent to the second time period, the second time period is greater than the first time period, the second time period is the sum of a third time period and a fourth time period, the third time period is the length of the first time period, the fourth time period is the length of the second time period, and the fourth time period is less than the first time period.

2. The method according to claim 1, characterized in that The method further comprises: Acquire the first duration, the second duration and a first moment; the signal generating device generates the PPS signal at the first moment; The second time period is obtained by taking the second moment as the start moment of the second time period and the third moment as the end moment of the second time period; the duration between the second moment and the third moment is less than the first duration, and the second time period includes the first moment; The first time period is obtained by taking the fourth moment as the start moment of the first time period and the fifth moment as the end moment of the first time period; the fifth moment is adjacent to the second moment, and the duration between the fourth moment and the third moment is the second duration.

3. The method according to claim 1 or 2, characterized in that: The target instruction sending device includes an input end and an event control register, the input end is connected to the event control register, the event control register is connected to the AND gate circuit, and the target instruction sending device periodically sends the target instruction to the signal generating device with a first time length as a period, including: In response to the target interrupt signal input from the input end, the event control register is triggered; the event control register is used to send the target instruction to the signal generating device, and the period duration of the input period of the target interrupt signal is the first period duration.

4. An electronic device, characterized in that: The electronic device comprises a target instruction sending device, an AND gate circuit, a signal generating device and an event masking register, wherein the target instruction sending device is connected to the signal generating device via the AND gate circuit, and the event masking register is connected to the signal generating device via the AND gate circuit, and the target instruction sending device periodically sends a target instruction to the signal generating device with a first time length as a period, and the target instruction is used to make the signal generating device generate a PPS signal, and the electronic device comprises: a processing module; The processing module is used to configure the event mask register to a low level in a first time period; The processing module is used to configure the event mask register to a high level in a second time period; the first time period is adjacent to the second time period, the second time period is greater than the first time period, the second time period is the sum of a third time period and a fourth time period, the third time period is the length of the first time period, the fourth time period is the length of the second time period, and the fourth time period is less than the first time period.

5. The method according to claim 4, characterized in that The electronic device further comprises: an acquisition module; The acquisition module is used to acquire the first duration, the second duration and the first moment; the signal generating device generates the PPS signal at the first moment; The processing module is further configured to use the second moment as the start moment of the second time period and the third moment as the end moment of the second time period to obtain the second time period; the duration between the second moment and the third moment is less than the first duration, and the second time period includes the first moment; The processing module is also used to use the fourth moment as the starting moment of the first time period and the fifth moment as the ending moment of the first time period to obtain the first time period; the fifth moment is adjacent to the second moment, and the duration between the fourth moment and the third moment is the second duration.

6. The method according to claim 4 or 5, characterized in that: The target instruction sending device includes an input end and an event control register, the input end is connected to the event control register, the event control register is connected to the AND gate circuit, and the target instruction sending device periodically sends the target instruction to the signal generating device with a first time length as a period, including: In response to the target interrupt signal input from the input end, the event control register is triggered; the event control register is used to send the target instruction to the signal generating device, and the period duration of the input period of the target interrupt signal is the first period duration.

7. An electronic device, characterized in that: The electronic device comprises: a processor, the processor is coupled to a memory, the memory is used to store programs or instructions, and when the program or instructions are executed by the processor, the device executes the method according to any one of claims 1 to 3.

8. A receiver, characterized in that: The receiver comprises: the electronic device as claimed in claim 7.

9. A computer-readable storage medium having a computer program or instruction stored thereon, characterized in that: When the computer program or instructions are executed, the computer is caused to perform the method according to any one of claims 1 to 3.

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