Multi-condition wafer scheduling method and device based on fuzzy thought

Abstract

The invention provides a fuzzy thought-based multi-condition wafer scheduling method, which comprises the following steps of: S1, acquiring scheduling task information, and determining a total scheduling step number according to the scheduling task information; s2, calculating a current scheduling step number; s3, characterization parameters corresponding to limiting conditions are introduced, wherein the limiting conditions comprise the requirement for uniform aging of all the units and the residence time of the wafer in the units; s4, preprocessing the characterization parameters, and outputting the scheduling priority condition of each unit based on a fuzzy thought; s5, introducing the importance coefficient of each characterization parameter and the state of each to-be-scheduled unit, and calculating the unit number for finally executing the scheduling task in combination with the scheduling priority condition of each unit; and S6, judging whether the scheduling is finished or not according to the current scheduling step number, if not, continuing to execute S2, and otherwise, ending. According to the scheme, the method is high in adaptability, many compound scenes of wafer scheduling are simply and reliably covered, and the potential of equipment is exerted to the maximum extent from the perspective of an algorithm.

Description

Technical Field

[0001] The present application relates to the technical field of wafer processing, and in particular to a multi-condition wafer scheduling method and device based on fuzzy thinking. Background Art

[0002] In semiconductor equipment, wafer scheduling is one of the most basic and important software functions. It uses robots to transport wafers between various units, which directly determines the production efficiency of the product. There are many factors that affect wafer scheduling. Each specific condition corresponding to process requirements, equipment safety, production process consistency, product yield and other issues will restrict scheduling. At present, many semiconductor equipment manufacturers are committed to improving the efficiency of wafer scheduling, but due to the complexity of scheduling problems or the singleness of customer requirements, they often only consider one constraint, and there is a lack of relevant research on scheduling scenarios with multiple conditions. With the development of the industry, wafer scheduling is no longer a simple search for the fastest path. How to combine various production factors and production conditions to seek ways to maximize the comprehensive capabilities of equipment such as efficiency, yield, stability, and safety has become an important direction for studying wafer scheduling.

[0003] The invention patent with patent number CN118116854B - "A wafer scheduling method, device, equipment and storage medium" proposes that when the duration of the wafer in the circulation chamber reaches the set time, the robot is controlled to schedule the wafer in the circulation chamber to the next circulation chamber to avoid the wafer being stored in a contaminated environment for too long, causing contamination of the wafer surface and waste. This invention only considers the constraint of the wafer's residence time in the circulation chamber, and does not consider other conditions.

[0004] The invention patent with patent number CN117196132B, "A wafer handling scheduling method, system, device and medium based on SWAP strategy", proposes a wafer handling scheduling method based on SWAP strategy. The wafer handling scheduling method includes: obtaining multiple feasible paths for the wafer; obtaining the number of wafer movements based on the feasible paths, and calculating the total working time under each feasible path; calculating the optimal time for a wafer movement based on multiple total working times and the number of movements; obtaining the optimal path for the wafer based on multiple optimal times. This method obviously only considers the time dimension and lacks attention to the stability of the entire scheduling and even the performance of the system. Summary of the invention

[0005] To achieve the above object, in a first aspect of the present application, a multi-condition wafer scheduling method based on fuzzy thinking is proposed, comprising:

[0006] S1. Obtain scheduling task information and determine the total number of scheduling steps according to the scheduling task information;

[0007] S2, calculate the current scheduling steps;

[0008] S3, introducing characterization parameters corresponding to the constraints, the constraints including: uniform aging requirements of each unit and residence time of the wafer in the unit;

[0009] S4, preprocess the characterization parameters and output the scheduling priority of each unit based on fuzzy thinking;

[0010] S5, introducing the importance coefficient of each characterization parameter and the status of each unit to be scheduled, and calculating the unit number of the final execution scheduling task in combination with the scheduling priority of each unit;

[0011] S6. Determine whether the scheduling is completed according to the current scheduling step number. If not, continue to execute S2, otherwise end.

[0012] Through the above technical scheme, through a clear step-by-step process, that is, obtaining the scheduling task information to determine the total scheduling steps, calculating the current scheduling steps, introducing the characterization parameters corresponding to the constraint conditions, preprocessing the characterization parameters and outputting the scheduling priority of each unit based on fuzzy thinking, and then combining the importance coefficient and the unit status to calculate the unit number that finally executes the scheduling task, and finally judging whether the scheduling is completed according to the current scheduling steps, the systematic management of the wafer scheduling process is realized, which helps to improve the accuracy and efficiency of wafer scheduling, ensure the orderly flow of wafers between units, and meet the wafer processing needs under multiple condition constraints.

[0013] Specifically, the characterization parameters include: C, T, where C is the cumulative number of wafers processed in the next possible target unit, and T is the retention time of the wafers in the next possible target unit. These two parameters can directly reflect the state of the wafer during the processing, provide a key data basis for subsequent scheduling decisions, and help to more accurately evaluate the load conditions of each unit and the processing progress of the wafer, thereby optimizing the scheduling strategy.

[0014] Specifically, the mathematical processing of the characterization parameter C is as follows:

[0015] Obtain the maximum value Cmax of the cumulative number of processed wafers of all possible next target units, Cmax = Max[C1, C2, ..., Cn];

[0016] Subtract each C from Cmax, the difference is Dc, Dci = Cmax-Ci, (0<i<n);

[0017] Take the minimum value Dcmin and the maximum value Dcmax in the difference, and divide the maximum value Dcmax and the minimum value Dcmin into three domains, specifically: the first domain [Dcmin, (Dcmax-Dcmin) / 4], the second domain [(Dcmax-Dcmin) / 4, (Dcmax-Dcmin) / 2], and the third domain [(Dcmax-Dcmin) / 2, Dcmax].

[0018] By performing specific mathematical processing on the characterization parameter C, obtaining the maximum value Cmax and calculating the difference Dc, the three domains are divided. This processing method can normalize and classify the cumulative number of processed wafers of different units, so that in the subsequent scheduling priority calculation based on fuzzy thinking, the differences between the units can be considered more scientifically, highlighting the units with relatively less processing volume, which is conducive to achieving uniform aging of each unit and improving the stability and reliability of the entire wafer processing system.

[0019] Specifically, the mathematical processing of the characterization parameter T is as follows:

[0020] Obtain the maximum value Tmax of the residence time of all possible next target unit wafers;

[0021] Subtract each T from Tmax, the difference is Dt, Dti = Tmax-Ti, (0<i<n);

[0022] Take the minimum value Dtmin and the maximum value Dtmax in the difference, and divide the maximum value Dtmax and the minimum value Dtmin into three domains, specifically: the first domain [Dtmin, (Dtmax-Dtmin) / 4], the second domain [(Dtmax-Dtmin) / 4, (Dtmax-Dtmin) / 2], and the third domain [(Dtmax-Dtmi n) / 2, Dtmax].

[0023] Performing similar mathematical processing on the characterization parameter T to obtain the maximum value Tmax, calculate the difference Dt and divide the domain helps to quantify and analyze the residence time of the wafer in the unit. During the scheduling process, better attention can be paid to the units with longer residence time, reducing the waiting time of the wafer in the unit, improving processing efficiency, and also helping to avoid wafer quality problems caused by excessive residence time.

[0024] Specifically, the characterization parameter C is preprocessed, and the scheduling priority of each unit is output based on the fuzzy idea as follows:

[0025] Where 0<Yc<100.

[0026] Specifically, the characterization parameter T is preprocessed, and the scheduling priority of each unit is output based on the fuzzy idea as follows:

[0027] Where 0<Yt<100.

[0028] Specifically, S5 is:

[0029] S501, introducing importance coefficients Kc and Kt, wherein Kc is the importance coefficient of the characterization parameter C, 0<Kc<1, and Kt is the importance coefficient of the characterization parameter T, 0<Kt<1;

[0030] S502, introducing a unit idle state coefficient Ka, when the unit is idle, Ka = 1, otherwise Ka = 0;

[0031] S503. Calculate the final result Yi of all possible next units, Yi=Ka(KcYci+KtYti), and output the final executed scheduling unit Yx, Yx=Max{Y1, Y2, ..., Yn}, where x=i.

[0032] By introducing the importance coefficients Kc, Kt and the unit idle state coefficient Ka, calculating the final result Yi and determining the final executed scheduling unit Yx, the weights of different characterization parameters can be flexibly adjusted according to actual needs, and idle units can be prioritized for scheduling, further optimizing the scheduling strategy, improving the accuracy and adaptability of scheduling, and maximizing the overall efficiency of the wafer processing system while meeting multiple conditional constraints.

[0033] In the second aspect of the present application, a multi-condition wafer scheduling method based on fuzzy thinking is provided.

[0034] A device for executing the above method, comprising: a loading and unloading unit, a buffer unit, a process unit and a manipulator;

[0035] The handling unit is configured for loading and unloading of wafers;

[0036] The buffer unit is configured for buffering and transfer orders of wafers;

[0037] The process unit is configured to execute a wafer-related process recipe;

[0038] The robot is configured to perform scheduling so that wafers can enter and exit each unit in an orderly manner.

[0039] Specifically, the process unit includes: a vacuum heating unit, a hot plate unit, a cold plate unit, a coating unit and a developing unit. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] The accompanying drawings are included to provide a further understanding of the embodiments and are incorporated into and constitute a part of this specification. The accompanying drawings illustrate the embodiments and are used together with the description to explain the principles of the present application. It will be easy to recognize other embodiments and many expected advantages of the embodiments because they become better understood by reference to the following detailed description. The elements of the drawings are not necessarily to scale with each other. The same reference numerals refer to corresponding similar parts.

[0041] Figure 1 is a flow chart of a multi-condition wafer scheduling method based on fuzzy thinking according to an embodiment of the present application;

[0042] Figure 2 It is a flow chart of a multi-condition wafer scheduling method based on fuzzy thinking according to a specific embodiment of the present application;

[0043] Figure 3 It is a structural block diagram of a multi-condition wafer scheduling device based on fuzzy thinking according to an embodiment of the present application;

[0044] Figure 4 It is a structural schematic diagram of a multi-condition wafer scheduling device based on fuzzy thinking according to an embodiment of the present application. DETAILED DESCRIPTION

[0045] In the following detailed description, reference is made to the accompanying drawings, which form a part of the detailed description and are shown by illustrative specific embodiments in which the present application can be practiced. To this end, directional terms, such as "top", "bottom", "left", "right", "up", "down", etc., are used with reference to the orientation of the figures described. Because the components of the embodiments can be positioned in several different orientations, directional terms are used for the purpose of illustration and are by no means limiting. It should be understood that other embodiments may be utilized or logical changes may be made without departing from the scope of the present application. Therefore, the following detailed description should not be adopted in a limiting sense, and the scope of the present application is defined by the appended claims.

[0046] Figure 1 is a flowchart of a multi-condition wafer scheduling method based on fuzzy thinking according to an embodiment of the present application, such as Figure 1 As shown, a multi-condition wafer scheduling method based on fuzzy thinking includes:

[0047] S1. Obtain scheduling task information and determine the total number of scheduling steps according to the scheduling task information;

[0048] S2, calculate the current scheduling steps;

[0049] S3, introducing characterization parameters corresponding to the constraints, the constraints including: uniform aging requirements of each unit and residence time of the wafer in the unit;

[0050] S4, preprocess the characterization parameters and output the scheduling priority of each unit based on fuzzy thinking;

[0051] S5, introducing the importance coefficient of each characterization parameter and the status of each unit to be scheduled, and calculating the unit number of the final execution scheduling task in combination with the scheduling priority of each unit;

[0052] S6. Determine whether the scheduling is completed according to the current scheduling step number. If not, continue to execute S2, otherwise end.

[0053] Specifically, the mathematical processing of the characterization parameter C is as follows:

[0054] Obtain the maximum value Cmax of the cumulative number of processed wafers of all possible next target units, Cmax = Max[C1, C2, ..., Cn];

[0055] Subtract each C from Cmax, the difference is Dc, Dci = Cmax-Ci, (0<i<n);

[0056] Take the minimum value Dcmin and the maximum value Dcmax in the difference, and divide the maximum value Dcmax and the minimum value Dcmin into three domains, specifically: the first domain [Dcmin, (Dcmax-Dcmin) / 4], the second domain [(Dcmax-Dcmin) / 4, (Dcmax-Dcmin) / 2], and the third domain [(Dcmax-Dcmin) / 2, Dcmax].

[0057] Specifically, the mathematical processing of the characterization parameter T is as follows:

[0058] Obtain the maximum value Tmax of the residence time of all possible next target unit wafers;

[0059] Subtract each T from Tmax, the difference is Dt, Dti = Tmax-Ti, (0<i<n);

[0060] Take the minimum value Dtmin and the maximum value Dtmax in the difference, and divide the maximum value Dtmax and the minimum value Dtmin into three domains, specifically: the first domain [Dtmin, (Dtmax-Dtmin) / 4], the second domain [(Dtmax-Dtmin) / 4, (Dtmax-Dtmin) / 2], and the third domain [(Dtmax-Dtmi n) / 2, Dtmax].

[0061] Specifically, the characterization parameter C is preprocessed, and the scheduling priority of each unit is output based on the fuzzy idea as follows:

[0062] Where 0<Yc<100.

[0063] Specifically, the characterization parameter T is preprocessed, and the scheduling priority of each unit is output based on the fuzzy idea as follows:

[0064] Where 0<Yt<100.

[0065] Specifically, S5 is:

[0066] S501, introducing importance coefficients Kc and Kt, where Kc is the importance coefficient of the characterization parameter C, 0<Kc<1, and Kt is the importance coefficient of the characterization parameter T, 0<Kt<1;

[0067] S502, introducing a unit idle state coefficient Ka, when the unit is idle, Ka = 1, otherwise Ka = 0;

[0068] S503. Calculate the final result Yi of all possible next units, Yi=Ka(KcYci+KtYti), and output the final executed scheduling unit Yx, Yx=Max{Y1, Y2, ..., Yn}, where x=i.

[0069] In order to better understand the present application, a specific embodiment is taken as an example. Figure 2 As shown:

[0070] Wafer specific scheduling method:

[0071] (1) Obtain the total number of scheduling steps according to the recipe;

[0072] (2) Obtain and calculate the current number of steps according to the scheduling process;

[0073] (3) Introduce corresponding characterization parameters according to the constraints;

[0074] (4) Perform mathematical processing on each characterization parameter, analyze the process based on fuzzy thinking, and output the results;

[0075] (5) Output the unit number for the final execution schedule based on the importance coefficient of each constraint and the unit status;

[0076] (6) Based on the current number of steps, determine whether the scheduling is completed. If not, continue to execute step (2). If completed, end.

[0077] In this embodiment, two constraints are included, where: Constraint 1: Considering the requirement of uniform aging of each unit, that is, the number of wafers processed by each unit needs to be as close as possible;

[0078] Constraint 2: Consider the residence time requirement of the wafer in the unit, that is, the residence time should be kept within a reasonable range. The longer the time, the more likely it is to affect the product yield.

[0079] Considering the above two constraints, the wafer scheduling process is as follows:

[0080] (1) Obtain the total number of scheduling steps Smax according to the recipe.

[0081] (2) Obtain and calculate the current step number Scur according to the scheduling process: the initial value is 1, and it increases by 1 after each scheduling.

[0082] (3) Introduce two characterization parameters:

[0083] C——The cumulative number of processed wafers in the next possible target unit.

[0084] That is: C1: the cumulative number of processed wafers in the next possible target unit 1

[0085] C2: The cumulative number of processed wafers in the next possible target unit 2 ......

[0087] Cn: The cumulative number of processed wafers in the next possible target unit n

[0088] T – The time the next possible target unit wafer has been detained.

[0089] That is: T1: The next possible target unit 1 wafer has been detained for a certain period of time

[0090] T2: The next possible target unit 2 wafer has been staying for a certain period of time ......

[0092] Tn: The next possible target unit n wafer has been staying for a certain period of time

[0093] (4) Make necessary processing on the parameters C and T to accurately characterize the constraints.

[0094] For constraint 1: According to the barrel theory, the uniform aging requirement is converted into the processing quantity of the unit with a smaller C value. The parameter C is processed as follows:

[0095] ① Obtain the maximum value Cmax of the cumulative number of processed wafers of all possible next target units.

[0096] Cmax=Max{C1, C2,...,Cn}

[0097] ② Subtract each C from Cmax, and the difference is Dc.

[0098] Dci=Cmax-Ci,(0 <i<n)

[0099] ③ Take Dcmin = Min{Dc1, Dc2, ..., Dcn}, Dcmax = Max{Dc1, Dc2, ..., Dcn}, and divide the following domains:

[0100] The first domain: [Dcmin, (Dcmax - Dcmin) / 4)

[0101] The second domain: [(Dcmax - Dcmin) / 4, (Dcmax - Dcmin) / 2)

[0102] The third domain: [(Dcmax - Dcmin) / 2, Dcmax]

[0103] ④ Analyze based on the fuzzy idea and output the result Yc, 0 < Yc < 100. Yc is used to evaluate the scheduling priorities of each unit in the next possible target unit for Constraint 1. The larger the value, the higher the priority:

[0104]

[0105] For Constraint 2: According to the bucket theory, convert the requirement of controlling the residence time into the practical problem of preferentially scheduling the unit with a larger T value. The processing of parameter T is as follows:

[0106] ① Obtain the maximum value Tmax of the residence time of all the next possible target unit n wafers

[0107] ② Subtract each T from Tmax, and the difference is Dt.

[0108] Dti = Tmax - Ti, (0 < i < n)

[0109] ③ Take Dtmin = Min{Dt1, Dt2, ..., Dtn}, Dtmax = Max{Dt1, Dt2, ..., Dtn}, and divide the following domains:

[0110] The first domain: [Dtmin, (Dtmax - Dtmin) / 4)

[0111] The second domain: [(Dtmax - Dtmin) / 4, (Dtmax - Dtmin) / 2)

[0112] The third domain: [(Dtmax - Dcmin) / 2, Dtmax]

[0113] ④ Analyze based on the fuzzy idea and output the result Yt, 0 < Yt < 100. Yt is used to evaluate the scheduling priorities of each unit in the next possible target unit for Constraint 2. The larger the value, the higher the priority:

[0114]

[0115] (5) Introduce importance coefficients \(K_c\) (\(0 < K_c < 1\)) and \(K_t\) (\(0 < K_t < 1\)), and \(K_c + K_t = 1\). That is, each constraint corresponds to an importance coefficient. The more important the condition, the larger the coefficient. The sum of the importance coefficients of all constraints is 1.

[0116] (6) Specifically, the premise for a unit to be scheduled is that it is in an idle state. Therefore, introduce the unit idle state coefficient \(K_a\). When the unit is idle, \(K_a = 1\); otherwise, \(K_a = 0\).

[0117] (7) Calculate the final result \(Y_i\) of all the next possible units:

[0118] \(Y_i = K_a(K_cY_{ci}+K_tY_{ti})\)

[0119] (8) Assume that when \(i = x\), \(Y_i\) reaches the maximum value, that is, \(Y_x = \max\{Y_1, Y_2, \cdots, Y_n\}\), then \(x\) is the next target unit for wafer scheduling. Output the result \(x\) and schedule the wafer to the corresponding unit.

[0120] (9) Judge whether there is still scheduling: When \(S_{cur}=S_{max}\), it means that the scheduling has reached the last step, and the production of this wafer is completed. Continue to execute the scheduling of other wafers until the production of all wafers is completed; when \(S_{cur}<S_{max}\), continue to loop from step (2).

[0121] As Figure 3 shown, the device generally consists of a loading and unloading unit, a buffer unit, a process unit, a manipulator, etc. The functions of each component are as follows:

[0122] (1) Loading and unloading unit: The unit for loading and unloading wafers, which is the starting and ending position of wafer scheduling.

[0123] (2) Buffer unit: The buffer and transfer unit for wafers, which can play a transitional role between each unit or different devices.

[0124] (3) Process unit: Execute the process recipes related to wafers, such as baking, cooling, coating, developing, cleaning, etc.

[0125] (4) Manipulator: Execute scheduling to enable wafers to enter and exit each unit orderly.

[0126] As Figure 4As shown in the figure, the main hardware components of the equipment are: 2 vacuum heating units (AD), 10 hot plate units (HotPlate), 4 cold plate units (Cool Plate), 2 loading and unloading units (Carrier), 2 coating units (COT), 2 developing units (DEV), and 1 double-arm robot. The scheduling algorithm controls the robot to transport and transfer wafers between each unit according to the recipe to complete the wafer production process in the equipment.

[0127] Obviously, those skilled in the art can make various modifications and changes to the embodiments of the present application without departing from the spirit and scope of the present application. In this way, if these modifications and changes are within the scope of the claims of the present application and their equivalents, the present application is also intended to cover these modifications and changes. The word "comprising" does not exclude the presence of other elements or steps not listed in the claims. The simple fact that certain measures are recorded in mutually different dependent claims does not indicate that the combination of these measures cannot be used to profit. Any figure mark in the claims should not be considered to limit the scope.

Claims

1. A multi-condition wafer scheduling method based on fuzzy thinking, characterized in that: include: S1. Obtain scheduling task information and determine the total number of scheduling steps according to the scheduling task information; S2, calculate the current scheduling steps; S3, introducing characterization parameters corresponding to the constraint conditions, wherein the constraint conditions include: the requirement for uniform aging of each unit and the residence time of the wafer in the unit; S4, preprocessing the characterization parameters, and outputting the scheduling priority of each unit based on fuzzy thinking; S5, introducing the importance coefficient of each characterization parameter and the status of each unit to be scheduled, and calculating the unit number of the final execution scheduling task in combination with the scheduling priority of each unit; S6. Determine whether the scheduling is completed according to the current scheduling step number. If not, continue to execute S2, otherwise end.

2. The multi-condition wafer scheduling method based on fuzzy thinking according to claim 1 is characterized in that: The characterization parameters include: C, T, where C is the cumulative number of processed wafers of the next possible target unit, and T is the retention time of the wafers of the next possible target unit.

3. The multi-condition wafer scheduling method based on fuzzy thinking according to claim 2 is characterized in that: The mathematical processing of the characterization parameter C is as follows: Obtain the maximum value Cmax of the cumulative number of processed wafers of all possible next target units, Cmax = Max[C1, C2, ..., Cn]; Subtract each C from Cmax, the difference is Dc, Dci = Cmax-Ci, (0<i<n); Take the minimum value Dcmin and the maximum value Dcmax in the difference, and divide the difference between the maximum value Dcmax and the minimum value Dcmin into three domains, specifically: the first domain [Dcmin, (Dcmax-Dcmi n) / 4], the second domain [(Dcmax-Dcmin) / 4, (Dcmax-Dcmin) / 2], and the third domain [(Dcmax-Dcmin) / 2, Dcmax].

4. The multi-condition wafer scheduling method based on fuzzy thinking according to claim 3 is characterized in that: The mathematical processing of the characterization parameter T is specifically as follows: Obtain the maximum value Tmax of the residence time of all possible next target unit wafers; Subtract each T from Tmax, the difference is Dt, Dti = Tmax-Ti, (0<i<n); Take the minimum value Dtmin and the maximum value Dtmax in the difference, and divide the maximum value Dtmax and the minimum value Dtmin into three domains, specifically: the first domain [Dtmin, (Dtmax-Dtmin) / 4], the second domain [(Dtmax-Dtmin) / 4, (Dtmax-Dtmin) / 2], and the third domain [(Dtmax-Dtmi n) / 2, Dtmax].

5. The multi-condition wafer scheduling method based on fuzzy thinking according to claim 4 is characterized in that: The characterization parameter C is preprocessed, and the scheduling priority of each unit is output based on fuzzy thinking as follows: Where 0<Yc<100.

6. The multi-condition wafer scheduling method based on fuzzy thinking according to claim 5 is characterized in that: The characterization parameter T is preprocessed, and the scheduling priority of each unit is output based on fuzzy thinking as follows: Where 0<Yt<100.

7. The multi-condition wafer scheduling method based on fuzzy thinking according to claim 6 is characterized in that: The S5 is specifically: S501, introducing importance coefficients Kc and Kt, where Kc is the importance coefficient of the characterization parameter C, 0<Kc<1, and Kt is the importance coefficient of the characterization parameter T, 0<Kt<1; S502, introducing a unit idle state coefficient Ka, when the unit is idle, Ka = 1, otherwise Ka = 0; S503. Calculate the final result Yi of all possible next units, Yi=Ka(KcYci+KtYti), and output the final executed scheduling unit Yx, Yx=Max{Y1, Y2, ..., Yn}, where x=i.

8. A multi-condition wafer scheduling device based on fuzzy thinking, using the method as described in any one of claims 1 to 7, characterized in that: include: Loading and unloading units, buffer units, process units and robots; The loading and unloading unit is configured for loading and unloading of wafers; The buffer unit is configured for buffering and transferring orders of wafers; The process unit is configured to execute a wafer-related process recipe; The robot is configured to perform scheduling so that wafers can enter and exit each unit in an orderly manner.

9. The multi-condition wafer scheduling device based on fuzzy thinking according to claim 8, characterized in that: The process unit comprises: a vacuum heating unit, a hot plate unit, a cold plate unit, a coating unit and a developing unit.

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