Layout correction method, storage medium, and storage terminal
By segmenting and redistributing conflicting patterns, the problem of generating fin cutting layers is solved, improving the accuracy of pattern allocation and the yield of semiconductor structures, and avoiding process problems such as incomplete etching.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SEMICON MFG INT (SHANGHAI) CORP
- Filing Date
- 2023-11-22
- Publication Date
- 2026-06-26
AI Technical Summary
In advanced technology nodes, the generation and patterning of fin cutting layers become difficult, resulting in insufficient precision in the removal of pseudo-fin structures and affecting the yield of semiconductor structures.
By dividing the conflicting graphic into several division units, and redistributing the division units of the conflicting region, the conflicting region and the non-conflicting region are located on different maps, ensuring that the graphic allocation conforms to the rules and improving the freedom and accuracy of graphic splitting.
It effectively improves the accuracy of pattern allocation, reduces weak areas caused by pattern splitting, improves the yield of semiconductor structures, and avoids process problems such as incomplete etching.
Smart Images
Figure CN120030618B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor technology, and in particular to a layout correction method, a storage medium, and a storage terminal. Background Technology
[0002] In advanced technology nodes, fin cutting layers are used to cut pseudo-fins to achieve the final design. Generally, fin cutting layers are generated by the factory according to its own processes and must be photolithography-friendly.
[0003] As nodes become smaller, generating and graphically representing fin cut layers becomes increasingly difficult. Summary of the Invention
[0004] The technical problem solved by this invention is to provide a layout correction method, storage medium, and storage terminal to better generate a mask layer suitable for fin cutting.
[0005] To address the aforementioned technical problems, the present invention provides a layout correction method, comprising: providing an initial layout, the initial layout including a plurality of graphics to be assigned, wherein the extension direction of the plurality of graphics to be assigned is parallel to a first direction; dividing the plurality of graphics to be assigned into a first graphic and a second graphic according to graphic assignment rules, wherein the first graphic and the second graphic are located in different layouts; obtaining conflicting graphics in each layout based on the first graphic and the second graphic; segmenting the conflicting graphics to obtain a plurality of segmentation units distributed along the first direction; obtaining conflicting regions and non-conflicting regions, wherein the conflicting region is a region in the conflicting graphics that does not satisfy the graphic assignment rules; and redistributing the segmentation units in the conflicting region so that the conflicting region and the non-conflicting region are located in different layouts.
[0006] Optionally, the graphic allocation rules include: a first rule, a second rule, and a third rule; the first rule includes: when the width of the graphic to be allocated in the second direction is less than or equal to a preset value, the graphic to be allocated needs to be allocated to a specific layout and will not be subsequently reallocated, wherein the second direction is perpendicular to the first direction; the second rule includes: when the distance between two adjacent graphics to be allocated in the second direction is less than or equal to a preset value, the adjacent graphics to be allocated need to be allocated to different layouts; the third rule includes: the width of the graphic to be allocated in the second direction is within a preset range.
[0007] Optionally, the first graphic is located in a first layout, and the second graphic is located in a second layout; based on the first graphic and the second graphic, conflicting graphics in each layout are obtained, including: checking the first graphic located in the first layout according to the graphic allocation rules to obtain conflicting graphics, wherein the conflicting graphics are the first graphic in the first layout that does not meet the graphic allocation rules; checking the second graphic located in the second layout according to the graphic allocation rules to obtain conflicting graphics, wherein the conflicting graphics are the second graphic in the second layout that does not meet the graphic allocation rules.
[0008] Optionally, when the conflicting graphic does not satisfy the third rule, before splitting the conflicting graphic, the method further includes: splitting the conflicting graphic along the second direction to obtain two independent sub-graphics; assigning the two sub-graphics to different layouts; and after assigning the two sub-graphics to different layouts, re-obtaining the conflicting graphic based on the first graphic, the second graphic, and the sub-graphics.
[0009] Optionally, after redistributing the conflict-splitting units, the method further includes: continuing to acquire conflict graphics; dividing the conflict graphics to acquire several splitting units distributed along the first direction; acquiring conflict regions and non-conflict regions; redistributing the splitting units in the conflict regions so that the conflict regions and non-conflict regions are located in different layouts, until the first and second graphics in each layout satisfy the graphic allocation rules.
[0010] Optionally, segmenting the conflict graphic includes: segmenting the conflict graphic to obtain a plurality of segmentation units distributed along a first direction, wherein the size of the segmentation unit in the first direction is a preset minimum size.
[0011] Optionally, it also includes extending the conflict area and the non-conflict area along a first direction, so that the conflict area and the non-conflict area have a partial overlap at the junction.
[0012] Optionally, the length by which the conflict area and the non-conflict area are extended along the first direction is half of the preset minimum size.
[0013] Accordingly, the present invention also provides a storage medium storing computer instructions, which execute the steps of the above method when the computer instructions are run.
[0014] Accordingly, the present invention also provides a storage terminal, including a memory and a processor, wherein the memory stores computer instructions that can be executed on the processor, and the processor executes the steps of the above method when executing the computer instructions.
[0015] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:
[0016] The layout correction method of the present invention divides conflicting graphics into several division units, and only redistributes the division units of conflicting regions, so that conflicting regions and non-conflicting regions are located in different layouts. This method of redistributing only local areas of conflicting graphics makes the graphic splitting more flexible, applicable to the allocation of various graphics, and effectively reduces the weak areas caused by graphic splitting, making the graphic allocation results more accurate and effectively improving the yield.
[0017] Furthermore, the conflicting graphic is segmented to obtain a plurality of segmentation units distributed along a first direction. The size of the segmentation unit in the first direction is a preset minimum size. The size of the conflicting graphic in the first direction is an integer multiple of the preset minimum size. Segmenting the conflicting graphic with the preset minimum size facilitates the segmentation operation so that the conflicting graphic is divided into a plurality of segmentation units.
[0018] Furthermore, the conflict and non-conflict regions are extended along the first direction, so that the conflict and non-conflict regions partially overlap at their junctions. This ensures that when the conflict and non-conflict regions, which have been split into different layouts, subsequently form a mask layer that acts on the original conflict pattern area, process problems such as incomplete etching and residues will not occur due to the splitting of the entire pattern. Attached Figure Description
[0019] Figure 1 and Figure 2 This is a schematic diagram of a semiconductor structure in one embodiment;
[0020] Figures 3 to 5 This is a schematic diagram of layout modification in one embodiment;
[0021] Figure 6 This is a flowchart illustrating the layout correction method in an embodiment of the present invention;
[0022] Figures 7 to 12 This is a schematic diagram of layout correction in an embodiment of the present invention. Detailed Implementation
[0023] As described in the background section, generating and patterning the fin cutting layer has become more difficult. This will now be explained in conjunction with specific embodiments.
[0024] Figure 1 and Figure 2 This is a schematic diagram of a semiconductor structure in one embodiment.
[0025] Please refer to Figure 1 A substrate is provided, the substrate including an active region 100; a plurality of fin structures 101 are formed on the substrate, the fin structures 101 being parallel to a first direction X, and the fin structures 101 located outside the active region 100 being pseudo fin structures.
[0026] Please refer to Figure 2 A first mask layer is formed on the substrate, the first mask layer being used to remove pseudo fin structures adjacent to the edge of the active region 100 parallel to the first direction X; a second mask layer is formed on the substrate, the second mask layer being used to remove the remaining pseudo fin structures other than those removed by the first mask layer.
[0027] As the technology nodes become smaller, the first mask layer removes the pseudo-fin structure adjacent to the edge of the active region 100 parallel to the first direction X. The first mask layer has higher dimensional accuracy and smaller size. Therefore, forming the first mask layer and the second mask layer requires two different mask plates. The first mask plate has a first pattern 102 for forming the first mask layer, and the second mask plate has a second pattern 103 for forming the second mask layer.
[0028] Typically, the first and second graphics are designed on the same design layout. Then, according to graphic allocation rules, they are assigned to different mask layouts. The graphics on different mask layouts also need to meet the graphic allocation rules. However, as the complexity of the graphics increases and their size decreases, situations arise where graphics assigned to different masks cannot fully meet the graphic allocation rules. Please refer to [link to documentation] for details. Figures 3 to 5 .
[0029] Figures 3 to 5 This is a schematic diagram of the layout correction process in one embodiment.
[0030] Please refer to Figure 3 An initial layout is provided, which includes several graphics to be assigned, the extension direction of which is parallel to a first direction X; according to the graphics assignment rules, the graphics to be assigned are divided into a first graphic and a second graphic, which are located in different layouts.
[0031] Figure 3 The diagram schematically illustrates several active regions 200 on a substrate corresponding to the initial layout. Each active region 200 has a different width in the second direction Y, which is perpendicular to the first direction X. The pattern to be assigned is adjacent to the edges of the active regions 200 in the second direction Y.
[0032] Figure 3The first figures schematically shown include: figures 201, 203, 205, 207, 209, 212, 213, and 215; the second figures schematically shown include: figures 202, 204, 206, 208, 210, 211, and 214. The first and second figures are located in different layouts, with the first figure located in the first layout and the second figure located in the second layout. The first and second layouts are used to form different photomasks.
[0033] Please continue to refer to this. Figure 3 The graphic allocation rules include: a first rule, a second rule, and a third rule.
[0034] The first rule includes: when the width of the graphic to be assigned in the second direction Y is less than or equal to a preset value, the graphic to be assigned needs to be assigned to a specific layout and will not be subsequently reallocated. (Reference) Figure 3 In this design, patterns 202 and 214 have smaller widths in the second direction Y, smaller than the widths of the remaining second and first patterns. Therefore, during pattern allocation, patterns 202 and 214 need to be fixed in the second pattern to allow for the subsequent fabrication of a mask with higher dimensional accuracy, so that the patterns of 202 and 214 can be exposed on the photoresist to form a mask layer. After patterns 202 and 214 are fixed in the second pattern, they are not affected by subsequent pattern allocation rules.
[0035] The second rule includes: when the spacing between two adjacent graphics to be assigned in the second direction Y is less than or equal to a preset value, the adjacent graphics to be assigned need to be assigned to different layouts. (Reference) Figure 3 The active regions 200 of these graphic pairs are: graphic 202 and graphic 203, graphic 204 and graphic 205, graphic 205 and graphic 206, graphic 206 and graphic 207, graphic 208 and graphic 209, graphic 210 and graphic 212, and graphic 214 and graphic 213. The spacing between the active regions 200 of these graphic pairs in the second direction Y is small, and the spacing is less than or equal to a preset value. Therefore, these graphic pairs need to be assigned to different first and second layouts.
[0036] The third rule includes: the width of the graphic to be assigned in the second direction Y is within a preset range. That is, graphics with a width exceeding the preset range are not allowed in the layout. (Reference) Figure 3Several graphic pairs in the image: graphic 201 and graphic 202, graphic 203 and graphic 204, graphic 207 and graphic 208, graphic 211 and graphic 213, graphic 214 and graphic 215. The total width of these adjacent graphics in the second direction Y exceeds the preset range. Therefore, it is necessary to design the two graphics to be assigned to different first and second layouts.
[0037] However, due to the complexity of graphic 207, region A of graphic 207 causes graphic 207 in the first layout to not meet the third rule in the graphic allocation rules, and graphic 207 needs to be reallocated.
[0038] The process of redistributing graphic 207 is as follows.
[0039] Please refer to Figure 4 The graphic 207 is split into connected graphics 216 and 217, and graphics 216 and 217 are assigned to different first and second plates. As shown in the figure, graphic 216 is assigned to the first plate and graphic 217 is assigned to the second plate.
[0040] However, graphics 217, 206, and 210 are all located in the second layout. Graphics 217, 206, and 210 violate the second rule in the graphic allocation rules. Graphics 217 and 206, and graphics 217 and 210 need to be allocated to different layouts.
[0041] Please refer to Figure 5 Graphics 206 and 210 are assigned to a first layout different from graphic 217. Accordingly, graphics 205, 204, 203, and 212 need to be reassigned. After reassignment, graphics 205, 203, and 212 are located in the second layout, while graphic 204 is located in the first layout.
[0042] Since graphic 202 is constrained by the first rule and is fixed in the second layout, graphic 203 and graphic 202 cannot satisfy the second rule in the graphic allocation rules.
[0043] Therefore, when redistributing conflicting patterns, some situations will inevitably arise where the patterns on each layout cannot fully satisfy the pattern allocation rules. This affects the subsequently formed mask, and consequently, the removal accuracy of dummy fin structures in the semiconductor structure.
[0044] To address the aforementioned issues, the present invention provides a layout correction method, a storage medium, and a storage terminal. By segmenting conflicting graphics to obtain several segmentation units, and redistributing only the segmentation units of the conflicting regions, the conflicting and non-conflicting regions are located in different layouts. This method of redistributing only local areas of the conflicting graphics allows for greater freedom in graphic splitting, is applicable to the allocation of various graphics, effectively reduces weak areas caused by graphic splitting, and results in more accurate graphic allocation, thus significantly improving yield.
[0045] To make the above-mentioned objectives, features and beneficial effects of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
[0046] Figure 6 This is a flowchart illustrating the layout correction method in an embodiment of the present invention.
[0047] Please refer to Figure 6 The layout correction method includes:
[0048] Step S10: Provide an initial layout, the initial layout including a plurality of graphics to be assigned, the extension direction of the plurality of graphics to be assigned being parallel to a first direction;
[0049] Step S20: According to the graphic allocation rules, several graphics to be allocated are divided into a first graphic and a second graphic, with the first graphic and the second graphic located in different layouts.
[0050] Step S30: Based on the first and second graphics, obtain the conflicting graphics in each layout;
[0051] Step S40: Divide the conflicting graphic into segments to obtain several segments distributed along the first direction;
[0052] Step S50: Obtain conflict areas and non-conflict areas. The conflict area is the area in the conflict graphic that does not meet the graphic allocation rules. The segmentation units in the conflict area are redistributed so that the conflict area and the non-conflict area are located in different layouts.
[0053] The proposed layout correction method involves dividing conflicting graphics into several segmentation units and redistributing only the segmentation units in the conflicting regions, so that the conflicting regions and non-conflicting regions are located in different layouts. This method of redistributing only local areas of conflicting graphics allows for greater freedom in graphic splitting, is applicable to the allocation of various graphics, and effectively reduces weak areas caused by graphic splitting, resulting in more accurate graphic allocation and improved yield.
[0054] Next, combined Figures 7 to 12 Each step is analyzed and explained. Figures 7 to 12 This is a schematic diagram of layout correction in an embodiment of the present invention.
[0055] Please combine Figure 7 Continue to refer to Figure 6 Step S10: Provide an initial layout, the initial layout including several graphics to be assigned, the extension direction of the graphics to be assigned being parallel to the first direction X; Step S20: According to the graphics assignment rules, divide the graphics to be assigned into a first graphic and a second graphic, the first graphic and the second graphic being located in different layouts.
[0056] In this embodiment, the first graphic is located in the first layout, and the second graphic is located in the second layout. The first and second layouts are used to form different photomasks.
[0057] According to graphic design rules, the size of the graphic in the first direction X must be an integer multiple of a preset minimum size, and the size of the graphic in the second direction Y must be an integer multiple of a preset minimum size. The preset minimum sizes in the first direction X and the second direction Y are different.
[0058] Specifically, in relation to the semiconductor structure, the minimum preset dimension in the first direction X is the contacted polysilicon gate pitch (CPP), which is the period of one gate. The period of the gate is the sum of the size of the gate in the first direction X and the spacing between adjacent gates. The minimum preset dimension in the second direction Y is the fin pitch (FP). The fins are parallel to the first direction X. The fin pitch is the sum of the size of the fin in the second direction Y and the spacing between adjacent fins.
[0059] The extension direction of several of the shapes to be assigned is parallel to the first direction X, and the size of several of the shapes to be assigned in the first direction X is an integer multiple of a preset minimum size in the first direction X; the size of several of the shapes to be assigned in the second direction Y is an integer multiple of a preset minimum size in the second direction Y.
[0060] Figure 7 The diagram schematically illustrates several active regions 300 on a substrate corresponding to the initial layout. Each active region 300 has a different width in the second direction Y, which is perpendicular to the first direction X. The pattern to be assigned is adjacent to the edges of the active regions 300 in the second direction Y.
[0061] In this embodiment, the graphic allocation rules include: a first rule, a second rule, and a third rule.
[0062] The first rule includes: when the width of the graphic to be assigned in the second direction Y is less than or equal to a preset value, the graphic to be assigned needs to be assigned to a specific layout and will not be subsequently reassigned. The second rule includes: when the distance between two adjacent graphics to be assigned in the second direction Y is less than or equal to a preset value, the adjacent graphics to be assigned need to be assigned to different layouts. The third rule includes: the width of the graphic to be assigned in the second direction Y is within a preset range, that is, graphics with a width exceeding the preset range are not allowed in the layout. For a detailed description of the first, second, and third rules, please refer to [link to relevant documentation]. Figure 3 The details mentioned above will not be repeated here.
[0063] Figure 7 The first figures shown schematically include: figures 301, 303, 305, 307, 309, 312, 313 and 315; the second figures shown schematically include: figures 302, 304, 306, 308, 310, 311 and 314.
[0064] Please combine Figure 7 Continue to refer to Figure 6 Step S30: Based on the first and second graphics, obtain the conflicting graphics in each layout.
[0065] Based on the first and second graphics, conflicting graphics in each layout are obtained, including: checking the first graphics located in the first layout according to the graphics allocation rules to obtain conflicting graphics, wherein the conflicting graphics are the first graphics in the first layout that do not meet the graphics allocation rules; and checking the second graphics located in the second layout according to the graphics allocation rules to obtain conflicting graphics, wherein the conflicting graphics are the second graphics in the second layout that do not meet the graphics allocation rules.
[0066] In this embodiment, graphic 307 in the first layout is a conflicting graphic. Graphic 307 does not meet the third rule of graphic allocation rules, that is, the width of graphic 307 exceeds the preset range.
[0067] Please refer to Figure 8 When the conflicting graphic does not satisfy the third rule, the conflicting graphic is split along the second direction Y to obtain two independent sub-graphics, the two sub-graphics shown in the figure are graphic 316 and graphic 317.
[0068] Please continue to refer to this. Figure 8 The two sub-graphics are assigned to different layouts. Figure 8 The diagram shows that graphic 316 is assigned to the first layout and graphic 317 is assigned to the second layout.
[0069] Please continue to refer to this. Figure 8After assigning the two sub-graphics to different layouts, the conflicting graphic is re-acquired based on the first graphic, the second graphic, and the sub-graphics.
[0070] After assigning graphic 316 to the first layout and graphic 317 to the second layout, and then re-acquiring the conflicting graphics, it can be seen that graphics 306, 310, and 317 are all located in the second layout. Graphics 317 and 306 violate the second rule in the graphic allocation rules, and graphics 317 and 310 violate the second rule in the graphic allocation rules. The conflicting graphics are graphics 306 and 310.
[0071] Please continue to combine Figure 8 refer to Figure 6 Step S40: Divide the conflicting graphic into segments and obtain several segmentation units 320 distributed along the first direction X.
[0072] The process of segmenting the conflict graphic includes: segmenting the conflict graphic to obtain a plurality of segmentation units 320 distributed along a first direction X, wherein the size of the segmentation unit 320 in the first direction X is a preset minimum size.
[0073] In this embodiment, the size of the slicing unit 320 in the first direction X is the period size of a gate.
[0074] The size of the conflicting graphic in the first direction X is an integer multiple of a preset minimum size. The conflicting graphic is divided into several division units 320 by using the preset minimum size to facilitate the division operation.
[0075] Figure 8 As shown, both graphic 306 and graphic 310 are divided into several segmentation units 320 distributed along the first direction X.
[0076] Please combine Figure 9 refer to Figure 6 Step S50: Obtain conflict areas and non-conflict areas. The conflict area is the area in the conflict graphic that does not meet the graphic allocation rules. The segmentation units in the conflict area are redistributed so that the conflict area and the non-conflict area are located in different layouts.
[0077] Figure 8 Graphics 306 and 310 are both conflict areas. Graphics 317 and 306 violate the second rule of graphic allocation rules. Graphics 317 and 310 also violate the second rule of graphic allocation rules. Therefore... Figure 9 Both graphic 306 and graphic 310 were reassigned to the first edition.
[0078] After reallocating the conflict-splitting units, the layout correction method further includes: continuing to acquire conflicting graphics; dividing the conflicting graphics to acquire several splitting units distributed along a first direction; acquiring conflicting and non-conflicting regions; and reallocating the splitting units in the conflicting regions so that the conflicting and non-conflicting regions are located in different layouts, until the first and second graphics in each layout satisfy the graphic allocation rules. Please refer to [reference needed for the process]. Figures 10 to 12 .
[0079] Please refer to Figure 10 After reassigning both graphics 306 and 310 to the first layout, the conflicting graphics are obtained as graphics 305 and 312, where graphics 305 and 312 are located in the first layout. Graphics 305 and 306 do not satisfy the second rule in the graphics allocation rules, and graphics 310 and 312 do not satisfy the second rule in the graphics allocation rules.
[0080] Please continue to refer to this. Figure 10 The graphics 305 and 312 are divided to obtain a number of division units 320 distributed along the first direction X; conflict regions and non-conflict regions are obtained, wherein the conflict region is the region in the conflict graphics that does not meet the graphic allocation rules.
[0081] Figure 312 are all conflict areas, and figures 310 and 312 do not satisfy the second rule in the figure allocation rules; figure 305 includes conflict area 321 and non-conflict area 322, and conflict area 321 and figure 306 do not satisfy the second rule in the figure allocation rules.
[0082] Please continue to refer to this. Figure 10 The segmentation units in the conflict zone are redistributed so that the conflict zone and the non-conflict zone are located on different maps.
[0083] All of the graphics 312 are conflict areas, so all of the graphics 312 are assigned to the second layout; the conflict area 321 of the graphics 305 is assigned to the second layout, while the non-conflict area 322 remains in the first layout.
[0084] Please continue to refer to this. Figure 10 The conflicting graphic is then obtained as graphic 304, which is located in the second layout and does not satisfy the second rule in the graphic allocation rules with the conflict area 321 allocated to the second layout. Graphic 304 is then divided to obtain several division units 320 distributed along the first direction X.
[0085] Please refer to Figure 11, obtain conflict region 324 and non-conflict region 323, wherein the conflict region 324 and the conflict region 321 do not satisfy the second rule in the graphic allocation rules; allocate the conflict region 324 to the first layout, and the non-conflict region 323 remains in the first layout.
[0086] At this point, the graphics in both the first and second maps after the redistribution satisfy the graphic allocation rules.
[0087] In this embodiment, the layout correction method further includes: extending the conflict area and the non-conflict area along a first direction so that the conflict area and the non-conflict area have a partial overlap at the junction.
[0088] This ensures that when conflicting and non-conflicting areas in different layouts are subsequently used to form mask layers that act on the original conflicting pattern, process problems such as incomplete etching and residues will not occur due to the splitting of the entire pattern.
[0089] Please refer to Figure 12 Taking the conflict region 324 and the non-conflict region 323 as an example, the conflict region 324 and the non-conflict region 323 are extended along the first direction X, so that the conflict region 324 and the non-conflict region 323 have a partially overlapping area at the junction.
[0090] In this embodiment, the length by which the conflict area and the non-conflict area are extended along the first direction X is half of the preset minimum size. As shown in the figure, the length by which the conflict area 324 is extended along the first direction X is d1, and the length by which the non-conflict area 323 is extended along the first direction X is d2. d1 and d2 are half of the preset minimum size, and the sum of d1 and d2 is the preset minimum size.
[0091] In this embodiment, the preset minimum size is a periodic size of one gate along the first direction X. Extending the conflict region 324 and the non-conflict region 323 along the first direction X by half the preset minimum size is simple. Furthermore, the overlapping area of the conflict region 324 and the non-conflict region 323 is the sum of d1 and d2. The large overlapping area ensures that the ends of the semiconductor structures corresponding to the conflict region 324 and the non-conflict region 323 are cleanly etched.
[0092] In this embodiment, the modified layout is used to form a mask to remove dummy fin structures in the semiconductor structure, thereby improving the mask accuracy and the removal accuracy of the dummy fin structures. In other embodiments, the modified layout is also applicable to other semiconductor structures that require improved accuracy.
[0093] Accordingly, embodiments of the present invention also provide a storage medium storing computer instructions thereon, which are executed when the computer instructions are run. Figure 6 The steps of the method are described.
[0094] Accordingly, embodiments of the present invention also provide a storage terminal, including a memory and a processor, wherein the memory stores computer instructions that can be executed on the processor, and the processor executes the computer instructions. Figure 6 The steps of the method are described.
[0095] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.
Claims
1. A layout correction method, characterized in that, include: An initial layout is provided, the initial layout including a plurality of graphics to be assigned, wherein the extension direction of the plurality of graphics to be assigned is parallel to a first direction; According to the graphic allocation rules, several graphics to be allocated are divided into a first graphic and a second graphic. The first graphic and the second graphic are located in different layouts. The graphic allocation rules include: a first rule, a second rule, and a third rule. The first rule includes: when the width of the graphic to be allocated in the second direction is less than or equal to a preset value, the graphic to be allocated needs to be allocated to a specific layout and will not be subsequently reallocated. The second direction is perpendicular to the first direction. The second rule includes: when the distance between two adjacent graphics to be allocated in the second direction is less than or equal to a preset value, the adjacent graphics to be allocated need to be allocated to different layouts. The third rule includes: the width of the graphic to be allocated in the second direction is within a preset range. Based on the first and second graphics, obtain the conflicting graphics in each map; The conflicting graphic is segmented to obtain several segmentation units distributed along the first direction; Obtain conflict and non-conflict regions. The conflict region is the area in the conflict graphic that does not meet the graphic allocation rules. The segmentation units in the conflict region are redistributed so that the conflict region and the non-conflict region are located in different layouts.
2. The layout correction method as described in claim 1, characterized in that, The first graphic is located in the first layout, and the second graphic is located in the second layout. Based on the first and second graphics, conflicting graphics in each layout are obtained, including: checking the first graphic located in the first layout according to graphic allocation rules to obtain conflicting graphics, wherein the conflicting graphics are the first graphic in the first layout that does not satisfy the graphic allocation rules; and checking the second graphic located in the second layout according to the graphic allocation rules to obtain conflicting graphics, wherein the conflicting graphics are the second graphic in the second layout that does not satisfy the graphic allocation rules.
3. The layout correction method as described in claim 2, characterized in that, When the conflicting graphic does not satisfy the third rule, before splitting the conflicting graphic, the method further includes: splitting the conflicting graphic along the second direction to obtain two independent sub-graphics; assigning the two sub-graphics to different layouts; and after assigning the two sub-graphics to different layouts, re-obtaining the conflicting graphic based on the first graphic, the second graphic, and the sub-graphics.
4. The layout correction method as described in claim 1, characterized in that, After redistributing the conflict-splitting units, the process further includes: continuing to acquire conflict graphics; dividing the conflict graphics to acquire several division units distributed along the first direction; acquiring conflict regions and non-conflict regions; redistributing the division units in the conflict regions so that the conflict regions and non-conflict regions are located in different layouts, until the first and second graphics in each layout satisfy the graphic allocation rules.
5. The layout correction method as described in claim 1, characterized in that, The process of segmenting the conflict graphic includes: segmenting the conflict graphic to obtain a plurality of segmentation units distributed along a first direction, wherein the size of the segmentation unit in the first direction is a preset minimum size.
6. The layout correction method as described in claim 1, characterized in that, Also includes: The conflict area and the non-conflict area are extended along the first direction so that the conflict area and the non-conflict area have a partial overlap at the junction.
7. The layout correction method as described in claim 6, characterized in that, The length by which the conflict area and the non-conflict area are extended along the first direction is half of the preset minimum size.
8. A storage medium storing computer instructions thereon, characterized in that, When the computer instructions are executed, they perform the steps of the method according to any one of claims 1 to 7.
9. A storage terminal, comprising a memory and a processor, wherein the memory stores computer instructions capable of running on the processor, characterized in that, When the processor executes the computer instructions, it performs the steps of the method according to any one of claims 1 to 7.