Power control device for converter
Through the combination of multi-core heterogeneous chips and FPGA chips, the problem of single functions and low integration in the power grid power control system is solved, real-time control and status monitoring of the converter are realized, and the integration and maintainability of the system are improved.
Patent Information
- Application Number
- CN202510507133.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-22
- Publication Date
- 2025-08-26
- Estimated Expiration
- 2045-04-22
AI Technical Summary
In the existing power grid power control systems, there are problems such as single functions and low integration, especially in the power transmission and distribution process from power stations to end users, a large number of different main control boards are required for monitoring and control.
Power control devices using multi-core heterogeneous chips, FPGA chips and interface modules. The multi-core heterogeneous chips include multiple cores. The interface module is relatively independent of the multi-core heterogeneous chips and FPGA chips. They receive external sensor data through the interface module, and the multi-core chip generates control signals and monitors the converter status to achieve rich control functions and high integration.
Real-time control and status monitoring of the converter is realized, and has status prediction and fault warning functions, which improves the system integration and maintainability and reduces maintenance costs.
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Figure CN120033857B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of new energy technology, and in particular to a power control device applied to a converter. Background Art
[0002] In recent years, with the rapid rise of renewable energy generation technology worldwide, a large number of photovoltaic, wind, and solar-storage power stations have emerged. Currently, with the development of intelligent power grids, power control systems are becoming increasingly complex, often requiring the coordination of multiple processors. For example, to ensure the normal two-way flow of information and power between all nodes in the entire power transmission and distribution process from power stations to end users, each node usually needs to be monitored and controlled accordingly. In existing technologies, multiple main control boards are usually installed on both the power generation side and the grid side of the power grid. Power grid control is achieved through the sensing and measurement technology of multiple power generation-side main control boards and the control and decision-making technology of the grid-side main control boards. This results in the entire control system requiring a large number of different main control boards, resulting in single functions and low integration. Summary of the Invention
[0003] The technical problem to be solved by the present invention is to provide a power control device for a converter with rich control functions and high integration.
[0004] In order to solve the above technical problems, a power control device for a converter is provided. The converter is connected to a generator set and a power grid. The power control device includes a multi-core heterogeneous chip, an FPGA chip and an interface module. The multi-core heterogeneous chip includes multiple cores, wherein:
[0005] The interface module is used to transmit data with external sensors, external power equipment and the background;
[0006] The FPGA chip is used to receive the operating parameters of the converter collected by the external sensor through the interface module;
[0007] The multiple cores are used to obtain the operating parameters of the converter received by the FPGA chip, generate the control signals required for controlling the converter based on the operating parameters of the converter, and monitor the operating status of the converter based on the operating parameters of the converter.
[0008] In the solution implemented by the power control device applied to the converter, the multi-core heterogeneous chip includes multiple cores, and the interface module is relatively independent of the multi-core heterogeneous chip and the FPGA chip. The FPGA chip can receive the converter operating parameters collected by external sensors through the interface module, and then obtain the converter operating parameters received by the FPGA chip through the multiple cores in the multi-core heterogeneous chip. Based on the converter operating parameters, the FPGA chip generates control signals required for converter control. The control signals can be transmitted to external power equipment (such as a generator set) through the interface module. They can also be used to control internal components of the converter to achieve generator set and converter control. The converter operating status can be monitored based on the converter operating parameters, thereby achieving operating status prediction and fault warning. It can be seen that in the present invention, multiple cores are integrated into a single chip, with rich control functions and a high degree of integration. In addition, the interface module is independently provided. When the degree of integration is high, function replacement can be achieved by replacing the independent interface module, which is conducive to function expansion and maintenance. BRIEF DESCRIPTION OF THE DRAWINGS
[0009] Figure 1 1 is a schematic structural diagram of a power control device applied to a converter provided by a first embodiment of the present invention;
[0010] Figure 2 yes Figure 1 Schematic diagram of the internal architecture structure of the first core and the second core in the multi-core heterogeneous chip shown;
[0011] Figure 3 is a structural diagram of a power control device applied to a converter provided by a second embodiment of the present invention;
[0012] Figure 4 1 is a schematic diagram of the structure of a multi-core heterogeneous chip in a power control device for a converter provided by a third embodiment of the present invention;
[0013] Figure 5 It is a structural diagram of a power generation system provided by an embodiment of the present invention. DETAILED DESCRIPTION
[0014] In order to more fully understand the technical content of the present invention, the technical solution of the present invention is further introduced and illustrated below with reference to schematic diagrams, but is not limited thereto.
[0015] The power control device provided by the present invention is applied to a converter. The converter connects a generator set to the power grid and controls the generator set, enabling it to operate in a variable speed constant frequency state and deliver high-quality power to the power grid. The converter provided by the present invention is applicable to power generation systems such as wind power generation, photovoltaic power generation, and wind / photovoltaic power generation. For example, the converter can be a wind / photovoltaic converter.
[0016] Reference Figure 1 , Figure 1 A schematic structural diagram of a power control device 100 for a converter provided in accordance with the first embodiment of the present invention. In the embodiment shown in the accompanying drawings, the power control device 100 for a converter includes a multi-core heterogeneous chip 12, an FPGA chip 11, and an interface module. The FPGA chip 11 and the multi-core heterogeneous chip 12 can communicate using a General-Purpose Chip-Select Machine (GPCM) bus. The multi-core heterogeneous chip 12 includes multiple cores. The interface module is used to transmit data with external sensors, external power equipment, and / or a backend. The FPGA chip 11 is used to receive operating parameters of the converter collected by external sensors through the interface module. The multiple cores are used to obtain the operating parameters of the converter received by the FPGA chip, generate control signals required for controlling the converter based on the operating parameters of the converter, and monitor the operating status of the converter based on the operating parameters of the converter.
[0017] A multi-core heterogeneous chip is a chip that integrates multiple different types of processing cores with different architectures and functions to meet different computing needs.
[0018] Specifically, the multi-core heterogeneous chip can use the FUXI-H chip.
[0019] Specifically, in some embodiments, the multiple cores include a control function module 124 and a monitoring function module 125, and the operating parameters of the converter include the electrical parameters of the converter motor side and the grid side and the status parameters of the internal components of the converter; wherein, the control function module 124 is used to obtain the operating parameters of the converter received by the FPGA chip, generate the control signal required for the converter control based on the electrical parameters of the converter motor side and the grid side and / or the status parameters of the internal components of the converter, and transmit the control signal to the generator set through the interface module, or control the internal components of the converter based on the control signal; the monitoring function module 125 is used to monitor the operating status of the converter based on the electrical parameters of the converter motor side and the grid side and the status parameters of the internal components of the converter, and can perform status prediction and fault warning based on the operating status.
[0020] In some embodiments, the interface module includes a data transmission interface, such as Figure 1As shown, the data transmission interface includes an Ethernet interface 136, an SPI interface 135, an ADC interface 132, a DI / DO interface 131, a fiber optic input / output interface 133, and an RS485 / CAN bus interface 134, which are used to transmit data with external sensors, external power equipment, and / or the backend through the data transmission interface. Preferably, the DI / DO interface 131 can be used to receive digital quantities of different states input by external devices for data reception / output of state detection / switch control. The ADC interface 132 can be used to connect to external sensors (such as current transformers or voltage transformers). The fiber optic input / output interface 133 can be used to communicate and interact with power conversion equipment. The RS485 / CAN bus interface 134 is used for extended communication and to receive data information or instructions from other external devices. The SPI interface 135 is mainly used for secure and encrypted communication with the backend (such as a server). The Ethernet interface 136 can be a Gigabit Ethernet interface and can be used to communicate with the main control room monitoring backend or other monitoring systems for remote monitoring data transmission. It can also be used for data transmission with the local debugging backend.
[0021] Preferably, in this embodiment, the electrical parameters of the motor side and the grid side of the converter include voltage, current and / or power parameters of the motor side and the grid side, that is, voltage, current and / or power parameters of the input side and the output side of the converter, and the state parameters of the internal components of the converter include temperature parameters. Specifically, the FPGA chip 11 is used to perform sampling at a frequency of not less than 1000 Hz through the ADC interface 132 and the DI / DO interface 131 through the AC / DC analog or digital sampling module or circuit, and the digital signal input DI / digital signal output DO module (or circuit), or the analog signal input AI / analog signal output AO module (or circuit); after the FPGA chip 11 converts the relevant analog quantity obtained by the sampling into a digital quantity, the control function module 124 of the multi-core heterogeneous chip 12 calculates the amplitude, power, frequency of the current / voltage, and the temperature and safety threshold based on the data collected by the FPGA chip 11. The control signals required for converter control are generated based on the collected or calculated values and the compared values. Specifically, the control signals required for converter control are generated based on the electrical parameters on the converter's motor and grid sides, the status parameters of the converter's internal components, and the pre-stored constants or parameters in the device, thereby achieving real-time control of the generator and converter. Real-time control includes, but is not limited to, power control, protection control (for example, initiating protection control mechanisms such as current limiting, load reduction, or shutdown when abnormal voltage or current is detected), and temperature control (for example, adjusting the cooling system's operation, such as increasing fan speed or activating a water cooling system, when the temperature exceeds a safety threshold). The control signals include at least one of converter output power control signals (active power adjustment control signals and reactive power adjustment control signals), generator speed adjustment control signals, generator shutdown control signals, converter grid disconnection control signals (disconnecting the converter from the grid), converter fan speed adjustment control signals, or converter water cooling system control signals.
[0022] Furthermore, the monitoring module 125 of the multi-core heterogeneous chip 12 monitors the operating status of the converter based on the voltage, current, and / or power parameters on the converter's motor and grid sides, as well as the temperature parameters of the converter's internal components, acquired by the control module 124. The monitoring module 125 can also perform status prediction and fault warning based on the operating status. Maintenance personnel can take appropriate maintenance measures based on the predicted operating status and early warning of potential faults, thereby improving converter reliability and reducing maintenance costs.
[0023] Continue to refer to Figure 1The multi-core heterogeneous chip 12 includes a first core 121 and a second core 122. The first core 121 is a CK810 processor core, and the second core 122 is a CK860 processor core. In this embodiment, there is one first core 121 and two second cores 122. The first core 121 includes a control function module 124, and the second core 122 includes a monitoring function module 125. The first core 121 is equipped with an RTOS (Real Time Operate System). The real-time control program in the control function module 124 is run in this core, responsible for accurate and low-latency data acquisition and control logic, leveraging the RTOS's rapid response capabilities to acquire real-time data and perform real-time control. The second core 122 is equipped with the Linux system. Data exchange between the multiple cores in the multi-core heterogeneous chip 12 is performed through inter-core shared memory. Therefore, data from the first core 121 can be exchanged with the second core 122 through efficient inter-core interaction. Preferably, the operation debugging function, monitoring service, fault warning and other functions are run in the Linux system of CK860. The Linux system has stronger computing and storage capabilities and is responsible for further analysis, storage and intelligent processing of the data transmitted by the real-time operating system. It can be understood that in some other embodiments, the control function module 124 can also be implemented in the second core 122, and the monitoring function module 125 can also be implemented in the first core 121, that is, it can be adjusted according to the actual processor cores and the operating systems carried by the first core 121 and the second core 122. Based on the above design, the low latency characteristics of the real-time operating system and the high computing power of the Linux system are effectively utilized, so that the multi-core heterogeneous chip 12 can respond to changes in real time and perform complex calculations and big data analysis.
[0024] For example, if, during converter operation, the RTOS detects that the current on the motor side suddenly exceeds a set safety threshold due to some reason (such as a grid short circuit or equipment failure), it can generate a control signal to adjust the converter's control strategy and activate the overcurrent protection control mechanism. Specifically, the RTOS can first generate and issue a power control signal for the generator set, reducing the current by reducing the generator's output power. If the current still exceeds the safety threshold, the RTOS will implement more stringent protection measures, such as generating a converter disconnection control signal to disconnect the converter from the grid, or generating a generator speed adjustment control signal to reduce the generator speed (in the case of a wind turbine, this can be achieved by changing the pitch angle) until the current falls within a safe range. In addition, after an overcurrent event, the RTOS real-time operating system can also record event details and perform fault recording. The operating parameters, event records and fault recordings can all be stored in the Linux file system in the form of files through inter-core interaction. In the Linux system, fault diagnosis is performed based on the preset intelligent fault diagnosis algorithm to determine the specific cause of the overcurrent. Based on the diagnosis results, maintenance personnel can take corresponding maintenance measures, such as replacing damaged parts or adjusting operating parameters, to prevent future overcurrent events, thereby more effectively monitoring and controlling the operation of the converter and generator set and improving reliability.
[0025] Reference Figure 2 , Figure 2 Schematic diagram of the internal architecture of the first core 121 and the second core 122 in the multi-core heterogeneous chip 12. As shown in the figure, in this embodiment, the internal architecture of the first core 121 and the second core 122 includes, from the bottom to the top, a hardware layer, a driver layer, an operating system layer, a component layer, and an application layer.
[0026] The hardware layer includes the processor core; the hardware layer includes the actual physical hardware, such as Figure 2 As shown, the hardware layer of the first core 121 includes CK810, and the hardware layer of the second core 122 includes two CK860, which are the physical basis for executing instructions of upper-layer software components.
[0027] The driver layer includes interfaces for communication between the operating system layer and the hardware layer, which may include ADC (analog-to-digital converter), UART (universal asynchronous receiver / transmitter), SPI (serial peripheral interface), etc.
[0028] The operating system layer includes an operating system carried by the processor core, which is used to provide an operating environment for the component layer and the application layer; the operating system layer of the first core 121 includes RTOS, and the operating system layer of the second core 122 includes Linux.
[0029] The component layer includes software components, such as communication components, control algorithm components, artificial intelligence models, etc. These software components can be called by the application layer to provide support and services for the application layer to achieve more complex functions.
[0030] The application layer is the top layer, interacting directly with users or external systems. It includes applications such as user interfaces (UIs) and the implementation of specific functions (such as real-time control and monitoring). Software components in the component layers corresponding to these applications are processed by the processor core within the onboard operating system to implement the corresponding control functions. Based on the above design, the internal architecture of the first core 121 and the second core 122 of the present invention is an embedded system architecture with multiple layers, each built on the foundation of the next, forming a complete system architecture. This layered design facilitates modular development and improves the system's maintainability and scalability.
[0031] Further, combined with Figure 1 In some embodiments, the first core 121 may also include a data preprocessing functional module 126, and the second core 122 may also include an AI edge computing functional module 127. In some other embodiments, the data preprocessing functional module 126 may also be implemented in the second core 122, and the AI edge computing functional module 127 may also be implemented in the first core 121, that is, it can be adjusted according to the actual processor cores and the installed operating systems of the first core 121 and the second core 122. Specifically, the data preprocessing function module 126 is used to preprocess the electrical parameters of the converter motor side and the grid side and the status parameters of the converter internal components received by the FPGA chip 11. The preprocessing can be to clean and format the collected raw data to ensure the quality and consistency of the data, and the clustering algorithm can be used to classify and categorize the data to help identify patterns and trends in the data; and the AI edge computing function module 127 is used to intelligently detect the operating health of the converter through the AI model based on the preprocessed current and historical electrical parameters of the converter motor side and the grid side and the status parameters of the converter internal components, as well as the type of fault warned. Preferably, the AI model can be a deep learning network model, that is, based on the deep learning network model, the operating health of the converter is intelligently detected to obtain the life cycle of the converter.
[0032] As can be seen from the above, in the power control device 100 applied to the converter in this embodiment, multiple cores are integrated into one chip, with rich control functions and high integration. It can not only realize real-time control of the converter, but also monitor the operating status, realize status prediction and fault warning, and provide operating conditions and fault judgment to the operation and maintenance team, thereby reducing downtime and maintenance costs.
[0033] Reference Figure 3 , Figure 3: This is a structural diagram of a power control device 100 applied to a converter provided by the second embodiment of the present invention. The difference between this embodiment and the above-mentioned first embodiment is that the power control device 100 applied to the converter further includes a control board 14, and the rest of the structure is the same or similar. In this embodiment, the power control device 100 applied to the converter includes a control board 14, and the multi-core heterogeneous chip 12 and the FPGA chip 11 are installed on the same control board 14 to further improve the integration. Among them, the control board 14 can be a kind of printed circuit board, and the interface module can be detachably arranged on the control board 14, that is, the Ethernet interface 136, the SPI interface 135, the ADC interface 132, the DI / DO interface 131, the optical fiber input and output interface 133 and / or the bus interface 134 can be detachably arranged on the control board 14 to realize data transmission between the power control device 100 applied to the converter and external sensors, external power equipment and / or background, and the number of the above-mentioned interfaces can be one or more, and the present invention does not limit this.
[0034] After the control board 14 starts working, the FPGA chip 11 starts to collect electrical data on the motor side and grid side of the converter and status parameters of the internal components of the converter through the ADC interface 132 and / or the DI / DO interface 131. The first core 121 in the multi-core heterogeneous chip 12 can generate the control signal required for converter control based on the electrical data on the motor side and grid side of the converter and / or the status parameters of the internal components of the converter to control the working state of the converter. The second core 122 can obtain the electrical data on the motor side and grid side of the converter and the status parameters of the internal components of the converter in the first core 121 through inter-core memory sharing, thereby monitoring the operating state of the converter to perform state prediction and fault warning, and improve the operating reliability of the converter.
[0035] As can be seen from the above, in this embodiment, by installing the multi-core heterogeneous chip 12 and the FPGA chip 11 on the same control board 14, the integration level of the power control device 100 applied to the converter can be further improved.
[0036] Figure 4 1 is a schematic diagram of the structure of the multi-core heterogeneous chip 12 in the power control device 100 for the converter provided by the third embodiment of the present invention. The difference between this embodiment and the second embodiment is that the specific structure of the multi-core heterogeneous chip 12 in the power control device 100 for the converter is different, and the rest of the structures are the same or similar. Figure 4As shown, in this embodiment, the multi-core heterogeneous chip 12 also includes a processor core 123 of model CK802. The processor core 123 of model CK802 includes an encryption function module 128. The encryption function module 128 is used to encrypt data consisting of the operating parameters, control signals, and operating status of the converter and transmit it to the backend, enabling secure encrypted communication between the power control device 100 for the converter and the backend of the power generation system. That is, in this embodiment, the multi-core heterogeneous chip 12 includes not only the first core 121 and the second core 122, but also the processor core 123 of model CK802. The encryption function module 128 of the processor core 123 is equipped with an encryption algorithm to encrypt data and ensure data security. It can be seen that the processor core 123 is also integrated into the multi-core heterogeneous chip 12, eliminating the need for an additional control board. While adding functional modules, the high integration of the power control device 100 for the converter is still maintained.
[0037] To sum up, in the present invention, real-time control of the converter can be achieved through the multi-core heterogeneous chip 12 and the FPGA chip 11 with a multi-core heterogeneous structure. The operating status can also be monitored to achieve status prediction and fault warning. The control functions are rich, and multiple cores are integrated in the multi-core heterogeneous chip 12. The multi-core heterogeneous chip 12 and the FPGA chip 11 can also be set on the same control board 14 with high integration. The independently set interface module for data interaction with the outside can also be detachably set on the control board 14. When the integration is high, function replacement can be achieved by replacing the independent interface module, which is beneficial to the function expansion and maintenance of the converter.
[0038] Reference Figure 5 , Figure 5 The schematic diagram of the structure of the power generation system provided by the embodiment of the present invention. The power generation system provided by the present invention can be a photovoltaic power generation system, a wind power generation system, a wind / photovoltaic power generation system, etc. Figure 5 As shown, the power generation system provided by the present invention includes a generator set 2 and a converter 1, the converter 1 includes a power control device 100 applied to the converter, the generator set 2 is connected to the power grid through the converter 1, and the power control device 100 applied to the converter can be the power control device 100 applied to the converter described in the first embodiment, the second embodiment or the third embodiment above, so as to realize real-time control and state prediction of the converter 1 and fault warning, thereby improving the reliability of the power generation system.
[0039] Specifically, if the power generation system of the present invention is a wind-solar power generation system, the generator set 2 may include a photovoltaic generator set and a wind generator set, the converter 1 may be a wind power / photovoltaic converter, the power grid may be an AC power grid, the number of photovoltaic generator sets 2 and wind generator sets 2 may be one or more respectively, and the wind power / photovoltaic converter 1 has both inversion and rectification functions as well as control functions, and undertakes the tasks of power conversion, power generation and grid-connected control of the wind-solar power generation system. During operation, the power control device 100 applied to the converter in the wind power / photovoltaic converter 1 collects and obtains the operating parameters of the converter 1, generates the control signal required for controlling the converter 1 based on the operating parameters of the converter 1, and can monitor the operating status of the converter 1 based on the operating parameters of the converter 1, thereby performing status prediction and fault warning according to the operating status.
[0040] It should be noted that, for the specific limitations of the power control device 100 applied to the converter, please refer to the limitations of the power control device 100 applied to the converter in the first, second and third embodiments above, which will not be repeated here.
[0041] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present invention, and should all be included in the scope of protection of the present invention.
Claims
1. A power control device for a converter, wherein the converter is connected to a generator set and a power grid, characterized in that: The power control device includes a multi-core heterogeneous chip, an FPGA chip and an interface module. The multi-core heterogeneous chip includes multiple cores, wherein: The interface module is used to transmit data with external sensors, external power equipment and the background; The FPGA chip is used to receive the operating parameters of the converter collected by the external sensor through the interface module; Each of the multiple cores is equipped with an RTOS real-time operating system / Linux system, which is used to obtain the operating parameters of the converter received by the FPGA chip, generate the control signal required for controlling the converter based on the operating parameters of the converter through the RTOS real-time operating system, monitor the operating status of the converter based on the operating parameters of the converter through the Linux system, and perform status prediction and fault warning based on the operating status; and at least one core among the multiple cores is also used to encrypt the operating parameters, control signals and operating status of the converter to achieve encrypted communication.
2. The power control device according to claim 1, wherein: The FPGA chip and the multi-core heterogeneous chip communicate with each other using a GPCM bus.
3. The power control device according to claim 1, wherein: The multiple cores include a control function module and a monitoring function module, and the operating parameters of the converter include electrical parameters on the motor side and the grid side of the converter and status parameters of the internal components of the converter; wherein, The control function module is used to obtain the operating parameters of the converter received by the FPGA chip, generate the control signal required for controlling the converter based on the electrical parameters of the converter motor side and the grid side and / or the state parameters of the internal components of the converter, and transmit the control signal to the generator set through the interface module, or control the internal components of the converter based on the control signal; The monitoring function module is used to monitor the operating status of the converter based on the electrical parameters of the converter motor side and the grid side and the status parameters of the internal components of the converter, and can perform status prediction and fault warning based on the operating status.
4. The power control device according to claim 1 or 3, characterized in that: The internal architecture of at least one of the multiple cores includes, from bottom to top, a hardware layer, a driver layer, an operating system layer, a component layer, and an application layer, wherein: The hardware layer includes a processor core; The driver layer includes an interface for enabling communication between the operating system layer and the hardware layer; The operating system layer includes an operating system carried by the processor core, which is used to provide an operating environment for the component layer and the application layer; The component layer includes software components; The application layer includes an application program, which is used to call the software component of the component layer corresponding to the application program to be processed in the onboard operating system through the processor core to implement the corresponding function.
5. The power control device according to claim 3, wherein: The multiple cores exchange data via an inter-core shared memory; The multi-core heterogeneous chip includes a first core and a second core, the first core is a processor core of model CK810, and the second core is a processor core of model CK860; The first core includes a control function module and / or a monitoring function module, and the second core includes a monitoring function module and / or a control function module.
6. The power control device according to claim 5, wherein: The number of the first cores is one, the number of the second cores is two, and the first core is equipped with an RTOS real-time operating system, and the second core is equipped with a Linux system.
7. The power control device according to claim 5, wherein: The multi-core heterogeneous chip also includes a processor core with model CK802.
8. The power control device according to claim 3 or 5, characterized in that: The multiple cores also include a data preprocessing function module and an AI edge computing function module; The data preprocessing function module is used to preprocess the electrical parameters of the converter motor side and the grid side and the status parameters of the converter internal components received by the FPGA chip; The AI edge computing functional module is used to intelligently detect the operating health of the converter through an AI model based on the preprocessed current and historical electrical parameters of the converter motor side and grid side, the status parameters of the converter internal components, and the warned fault type.
9. The power control device according to claim 3, wherein: The electrical parameters of the converter motor side and the grid side include at least one of voltage, current, and power parameters, and the state parameters of the converter internal components include temperature parameters.
10. The power control device according to claim 3 or 9, characterized in that: The control signal includes at least one of a power control signal, a generator speed adjustment control signal, a generator shutdown control signal, a converter grid disconnection control signal, a converter fan speed adjustment control signal or a converter water cooling system control signal.
11. The power control device according to claim 1, wherein: The power control device includes a control board, the multi-core heterogeneous chip and the FPGA chip are installed on the same control board, and the interface module is detachably arranged on the control board. The interface module includes a data transmission interface to transmit data with external sensors, external power equipment and / or background through the data transmission interface.
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