UVM verification method based on PCIe protocol and storage medium
By adopting the UVM verification method based on the PCIe protocol in PCIe bus verification, using the combination of parameter passing files and VIP and rm components, the problems of low efficiency and high complexity of traditional verification methods are solved, and an efficient and reliable verification environment is achieved.
Patent Information
- Application Number
- CN202510481373.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-17
- Publication Date
- 2025-05-23
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
The traditional PCIe bus verification method cannot meet the growing verification needs, and is highly complex and inefficient.
UVM verification method based on PCIe protocol is adopted, and a parameter passing file is established, a class derived from uvm_object is defined, which contains all parameters in the verification process, and end-to-end inspection is performed using VIP and rm components in the verification environment.
It improves the efficiency of verification environment construction, reduces labor investment and communication costs, and achieves efficient and reliable PCIe bus verification.
Smart Images

Figure CN120034474A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of network communication, and in particular to a UVM verification method and a storage medium based on a PCIe protocol. Background Art
[0002] With the rapid development of network communication, high-speed bus has gradually become one of the bottlenecks. PCIe, as a high-speed and scalable high-speed bus protocol, has become one of the widely used protocols in the field of switching communication. However, with the rapid development of PCIe protocol, the verification of PCIe bus is also facing great challenges. The traditional verification method is limited to testing by writing a simple SV environment, which can no longer meet the growing verification needs. Therefore, it is necessary to propose an efficient and reliable verification method. Summary of the invention
[0003] To achieve the above purpose and other related purposes, the present invention discloses a UVM verification method based on PCIe protocol, comprising: Create a parameter transfer file, which contains all the parameters used in the verification process; The VIP source port sends the message to be tested to the DUT and the rm component in the verification environment; The DUT responds to the message to be detected and generates a response message; The rm component generates the expected response of the message to be detected and calculates the destination port of the message to be sent; The verification environment establishes source port × destination port queues based on the message type; According to the message type, the expected response of the message to be detected is sent to the corresponding source port × destination port queue in sequence; When VIP receives the response message, it transmits the response message to the verification environment, and the verification environment calculates the source port of the received response message; The expected response in the source port×destination port queue corresponding to the source port of the response message is compared with the expected response.
[0004] Furthermore, the establishment of the parameter transfer file includes: Create a parameter transfer file, which defines a class derived from uvm_object, and defines all the parameters in the verification process; Insert the parameter passing file into the base test class; Set the class in the parameter transfer file in the base test class; The top level of the verification environment obtains the class in the parameter transfer file and sets it to the subordinate components of the top level of the verification environment; The subordinate components at the top level of the verification environment obtain the classes in the parameter passing file so that all development cases derived from the basic test class can directly use the parameters in the parameter passing file.
[0005] Furthermore, the rm component calculates the destination port according to the routing method.
[0006] Furthermore, the subordinate components include a reference model and a scoreboard.
[0007] Furthermore, the parameter transfer file also includes multiple functions, which are used to divide port addresses, control port opening, configure VIP speed, configure the number of lanes and print information.
[0008] On the other hand, the present invention provides a computer-readable storage medium having a computer program stored thereon, which implements the above method when executed by a processor.
[0009] By adopting the above technical solution and establishing a parameter transfer file, the parameter transfer file can be directly called in subsequent steps, which has high reuse and low complexity, greatly improving the efficiency of setting up the verification environment. BRIEF DESCRIPTION OF THE DRAWINGS
[0010] The above and other features, advantages and aspects of the embodiments of the present disclosure will become more apparent with reference to the following detailed description in conjunction with the accompanying drawings. The accompanying drawings are used to better understand the present solution and do not constitute a limitation of the present disclosure. In the accompanying drawings, the same or similar reference numerals represent the same or similar elements, among which: Figure 1 is a flow chart of the present invention; Figure 2 This is a diagram of parameter passing for pcie_top_env_cfg. DETAILED DESCRIPTION
[0011] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.
[0012] Reference Figure 1 The embodiment of the present invention provides a UVM verification method based on PCIe protocol, comprising the following steps: Create a parameter transfer file, which contains all the parameters used in the verification process.
[0013] The steps of establishing a parameter transfer file include: Create a parameter transfer file, which defines a class derived from uvm_object, and defines all the parameters in the verification process; Insert the parameter passing file into the base test class; Set the class in the parameter transfer file in the base test class; The top level of the verification environment obtains the class in the parameter transfer file and sets it to the subordinate components of the top level of the verification environment; The subordinate components at the top level of the verification environment obtain the classes in the parameter passing file so that all development cases derived from the basic test class can directly use the parameters in the parameter passing file.
[0014] In this embodiment, the following steps are specifically included: 1. Define a class named pcie_top_env_cfg (file name env_cfg.sv), derived from uvm_object. The class can define any parameters we use, such as port lane, port rate and other information.
[0015] 2. Include env_cfg.sv into base_test.sv.
[0016] 3. Set pcie_top_env_cfg to base_test.sv so that all use cases derived from base_test can get and instantiate the top level of the verification environment top_env.sv in base_test.sv.
[0017] 4. After top_env.sv gets to pcie_top_env_cfg, set it to its subordinate components (such as referencemodel, scoreboard).
[0018] 5. Get the pcie_top_env_cfg class in the reference model and scoreboard.
[0019] 6. All development use cases derived from base_test can directly use the parameters in the pcie_top_env_cfg class.
[0020] The VIP source port sends the message to be tested to the DUT and the rm component in the verification environment; The DUT responds to the message to be detected and generates a response message; The rm component generates the expected response of the message to be detected and calculates the destination port of the message to be sent; The verification environment establishes source port × destination port queues based on the message type; According to the message type, the expected response of the message to be detected is sent to the corresponding source port × destination port queue in sequence; When VIP receives the response message, it transmits the response message to the verification environment, and the verification environment calculates the source port of the received response message; The expected response in the source port×destination port queue corresponding to the source port of the response message is compared with the expected response.
[0021] As mentioned above, the PCIe switching device is verified, and the verification environment performs an end-to-end check. One copy of the message sent by the VIP source port is transmitted to the DUT, and the other copy is transmitted to the rm component in the verification environment. The rm component will calculate the destination port of the sent message. PCIe specifies three types of TLP messages, namely P, NP, and CPL. The verification environment establishes source port × destination port queues according to different types of messages. After rm calculates the destination port, it sends the message to the corresponding queue according to the message type. When the VIP receives the message, the VIP sends the message to the verification environment. The verification environment calculates the source port of the received message, and then compares it with the packets in the queues with the same source port and destination port. For the messages in the queue, the first packet that enters comes out first for comparison, which can achieve order-preserving check.
[0022] In actual use, env_cfg not only contains all parameters, but also some functions, such as the division of each port address, which ports are open, VIP rate configuration, lane number configuration, and some information printing functions, etc. These functions can be directly applied to all use cases, and use cases with different test intentions can also change some parameters in the function to achieve different test results.
[0023] In actual projects, this method has high reusability and low complexity when building a comparison environment, and two engineers can complete the construction of the above verification environment.
[0024] This verification environment construction method can not only be applied to PCIe switching verification, but also can be used for other bus protocols frequently used in the switching field, such as Ethernet, srio, FC, etc. This construction method has strong versatility.
[0025] By using the present invention to build a PCIe protocol UVM system-level verification platform, manpower investment can be effectively reduced, communication costs and trial-and-error costs can be lowered, thereby improving verification efficiency.
[0026] From the perspective of working hours: According to past experience, building a system-level verification platform for PCIe switching requires at least two experienced engineers to spend two weeks listing all situations in order and without omission to ensure the quality of the verification environment, which takes a total of four man-weeks.
[0027] Using the above method to build a PCIe switch verification platform only takes an experienced engineer two weeks, and it is expected to improve efficiency by 50%.
[0028] This verification platform construction method has high integration and adaptability. The automatic comparison mechanism in the environment can cover most of the functional points in the PCIe protocol, which can reduce the pressure of subsequent verification work.
[0029] The env_cfg parameter passing method allows all parameters used in the environment to be managed in a unified manner, avoiding confusion and ensuring the readability of the verification environment. Subsequent testing based on this also becomes easy. If you need to add other parameters or functions, you only need to add them in the env_cfg file. The verification environment has already done the work of passing to each component.
[0030] The present invention also provides a computer-readable storage medium on which a computer program is stored, and the program implements the above method when executed by a processor.
[0031] Those skilled in the art will appreciate that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as those generally understood by those skilled in the art in the art to which the present invention belongs. It should also be understood that terms such as those defined in general dictionaries should be understood to have meanings consistent with the meanings in the context of the prior art, and will not be interpreted with idealized or overly formal meanings unless specifically defined.
[0032] For the method embodiments, for the sake of simplicity, they are all described as a series of action combinations, but those skilled in the art should know that the embodiments of the present invention are not limited by the order of the actions described, because according to the embodiments of the present invention, some steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also know that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily required by the embodiments of the present invention.
[0033] It can be known from the description of the above implementation modes that those skilled in the art can clearly understand that the present application can be implemented by means of software plus a necessary general hardware platform. Based on such an understanding, the technical solution of the present application can be essentially or partly contributed to the prior art in the form of a software product, which can be stored in a storage medium such as ROM / RAM, a magnetic disk, an optical disk, etc., and includes several instructions for enabling a computer device (which can be a personal computer, a server or a network device, etc.) to execute the methods described in the various implementation modes of the present application or certain parts of the implementation modes.
[0034] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.
Claims
1. A UVM verification method based on PCIe protocol, characterized in that, include: Create a parameter transfer file, which contains all the parameters used in the verification process; The VIP source port sends the message to be tested to the DUT and the rm component in the verification environment; The DUT responds to the message to be detected and generates a response message; The rm component generates the expected response of the message to be detected and calculates the destination port of the message to be sent; The verification environment establishes source port × destination port queues based on the message type; According to the message type, the expected response of the message to be detected is sent to the corresponding source port × destination port queue in sequence; When VIP receives the response message, it transmits the response message to the verification environment, and the verification environment calculates the source port of the received response message; The expected response in the source port×destination port queue corresponding to the source port of the response message is compared with the expected response.
2. The method according to claim 1, characterized in that The establishment of parameter transfer file includes: Create a parameter transfer file, which defines a class derived from uvm_object, and defines all the parameters in the verification process; Insert the parameter passing file into the base test class; Set the class in the parameter transfer file in the base test class; The top level of the verification environment obtains the class in the parameter transfer file and sets it to the subordinate components of the top level of the verification environment; The subordinate components at the top level of the verification environment obtain the classes in the parameter passing file so that all development cases derived from the basic test class can directly use the parameters in the parameter passing file.
3. The method according to claim 1, characterized in that The rm component calculates the destination port based on the routing method.
4. The method according to claim 2, characterized in that: The subordinate components include a reference model and a scoreboard.
5. The method according to claim 2, characterized in that: The parameter transfer file also includes multiple functions, which are used to divide port addresses, control port opening, configure VIP speed, configure the number of lanes and print information.
6. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the method described in any one of claims 1 to 5 is implemented.
Citation Information
Patent Citations
Ethernet switch chip UVM and FPGA prototype verification method and upper computer
CN117749640A
Simulation verification method, electronic equipment and computer readable medium
CN117787154A
Switching chip verification platform based on UVM and VIP
CN118194788A
Request comparison method applied to UVM verification
CN119598519A